cpuswitch.S revision 1.22
1 /* $NetBSD: cpuswitch.S,v 1.22 2002/10/12 12:20:10 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 #include "opt_multiprocessor.h" 48 49 #include "assym.h" 50 #include <machine/param.h> 51 #include <machine/cpu.h> 52 #include <machine/frame.h> 53 #include <machine/asm.h> 54 55 #undef IRQdisable 56 #undef IRQenable 57 58 /* 59 * New experimental definitions of IRQdisable and IRQenable 60 * These keep FIQ's enabled since FIQ's are special. 61 */ 62 63 #define IRQdisable \ 64 mrs r14, cpsr ; \ 65 orr r14, r14, #(I32_bit) ; \ 66 msr cpsr_c, r14 ; \ 67 68 #define IRQenable \ 69 mrs r14, cpsr ; \ 70 bic r14, r14, #(I32_bit) ; \ 71 msr cpsr_c, r14 ; \ 72 73 /* 74 * setrunqueue() and remrunqueue() 75 * 76 * Functions to add and remove a process for the run queue. 77 */ 78 79 .text 80 81 .Lwhichqs: 82 .word _C_LABEL(sched_whichqs) 83 84 .Lqs: 85 .word _C_LABEL(sched_qs) 86 87 /* 88 * On entry 89 * r0 = process 90 */ 91 92 ENTRY(setrunqueue) 93 /* 94 * Local register usage 95 * r0 = process 96 * r1 = queue 97 * r2 = &qs[queue] and temp 98 * r3 = temp 99 * r12 = whichqs 100 */ 101 #ifdef DIAGNOSTIC 102 ldr r1, [r0, #(P_BACK)] 103 teq r1, #0x00000000 104 bne .Lsetrunqueue_erg 105 106 ldr r1, [r0, #(P_WCHAN)] 107 teq r1, #0x00000000 108 bne .Lsetrunqueue_erg 109 #endif 110 111 /* Get the priority of the queue */ 112 ldrb r1, [r0, #(P_PRIORITY)] 113 114 /* Indicate that there is a process on this queue */ 115 ldr r12, .Lwhichqs 116 mov r1, r1, lsr #2 117 ldr r2, [r12] 118 mov r3, #0x00000001 119 mov r3, r3, lsl r1 120 orr r2, r2, r3 121 str r2, [r12] 122 123 /* Get the address of the queue */ 124 ldr r2, .Lqs 125 add r1, r2, r1, lsl # 3 126 127 /* Hook the process in */ 128 str r1, [r0, #(P_FORW)] 129 ldr r2, [r1, #(P_BACK)] 130 131 str r0, [r1, #(P_BACK)] 132 #ifdef DIAGNOSTIC 133 teq r2, #0x00000000 134 beq .Lsetrunqueue_erg 135 #endif 136 str r0, [r2, #(P_FORW)] 137 str r2, [r0, #(P_BACK)] 138 139 mov pc, lr 140 141 #ifdef DIAGNOSTIC 142 .Lsetrunqueue_erg: 143 mov r2, r1 144 mov r1, r0 145 add r0, pc, #.Ltext1 - . - 8 146 bl _C_LABEL(printf) 147 148 ldr r2, .Lqs 149 ldr r1, [r2] 150 add r0, pc, #.Ltext2 - . - 8 151 b _C_LABEL(panic) 152 153 .Ltext1: 154 .asciz "setrunqueue : %08x %08x\n" 155 .Ltext2: 156 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 157 .align 0 158 #endif 159 160 /* 161 * On entry 162 * r0 = process 163 */ 164 165 ENTRY(remrunqueue) 166 /* 167 * Local register usage 168 * r0 = oldproc 169 * r1 = queue 170 * r2 = &qs[queue] and scratch 171 * r3 = scratch 172 * r12 = whichqs 173 */ 174 175 /* Get the priority of the queue */ 176 ldrb r1, [r0, #(P_PRIORITY)] 177 mov r1, r1, lsr #2 178 179 /* Unhook the process */ 180 ldr r2, [r0, #(P_FORW)] 181 ldr r3, [r0, #(P_BACK)] 182 183 str r3, [r2, #(P_BACK)] 184 str r2, [r3, #(P_FORW)] 185 186 /* If the queue is now empty clear the queue not empty flag */ 187 teq r2, r3 188 189 /* This could be reworked to avoid the use of r4 */ 190 ldreq r12, .Lwhichqs 191 moveq r3, #0x00000001 192 ldreq r2, [r12] 193 moveq r3, r3, lsl r1 194 biceq r2, r2, r3 195 streq r2, [r12] 196 197 /* Remove the back pointer for the process */ 198 mov r1, #0x00000000 199 str r1, [r0, #(P_BACK)] 200 201 mov pc, lr 202 203 204 /* 205 * cpuswitch() 206 * 207 * preforms a process context switch. 208 * This function has several entry points 209 */ 210 211 #ifdef MULTIPROCESSOR 212 .Lcpu_info_store: 213 .word _C_LABEL(cpu_info_store) 214 .Lcurproc: 215 /* FIXME: This is bogus in the general case. */ 216 .word _C_LABEL(cpu_info_store) + CI_CURPROC 217 218 .Lcurpcb: 219 .word _C_LABEL(cpu_info_store) + CI_CURPCB 220 #else 221 .Lcurproc: 222 .word _C_LABEL(curproc) 223 224 .Lcurpcb: 225 .word _C_LABEL(curpcb) 226 #endif 227 228 .Lwant_resched: 229 .word _C_LABEL(want_resched) 230 231 .Lcpufuncs: 232 .word _C_LABEL(cpufuncs) 233 234 #ifndef MULTIPROCESSOR 235 .data 236 .global _C_LABEL(curpcb) 237 _C_LABEL(curpcb): 238 .word 0x00000000 239 .text 240 #endif 241 242 .Lblock_userspace_access: 243 .word _C_LABEL(block_userspace_access) 244 245 .Lcpu_do_powersave: 246 .word _C_LABEL(cpu_do_powersave) 247 248 /* 249 * Idle loop, exercised while waiting for a process to wake up. 250 * 251 * NOTE: When we jump back to .Lswitch_search, we must have a 252 * pointer to whichqs in r7, which is what it is when we arrive 253 * here. 254 */ 255 /* LINTSTUB: Ignore */ 256 ASENTRY_NP(idle) 257 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 258 bl _C_LABEL(sched_unlock_idle) 259 #endif 260 ldr r3, .Lcpu_do_powersave 261 262 /* Enable interrupts */ 263 IRQenable 264 265 /* If we don't want to sleep, use a simpler loop. */ 266 ldr r3, [r3] /* r3 = cpu_do_powersave */ 267 teq r3, #0 268 bne 2f 269 270 /* Non-powersave idle. */ 271 1: /* should maybe do uvm pageidlezero stuff here */ 272 ldr r3, [r7] /* r3 = whichqs */ 273 teq r3, #0x00000000 274 bne .Lswitch_search 275 b 1b 276 277 2: /* Powersave idle. */ 278 ldr r4, .Lcpufuncs 279 3: ldr r3, [r7] /* r3 = whichqs */ 280 teq r3, #0x00000000 281 bne .Lswitch_search 282 283 /* if saving power, don't want to pageidlezero */ 284 mov r0, #0 285 adr lr, 3b 286 ldr pc, [r4, #(CF_SLEEP)] 287 /* loops back around */ 288 289 290 /* 291 * Find a new process to run, save the current context and 292 * load the new context 293 */ 294 295 ENTRY(cpu_switch) 296 /* 297 * Local register usage. Some of these registers are out of date. 298 * r1 = oldproc 299 * r3 = whichqs 300 * r4 = queue 301 * r5 = &qs[queue] 302 * r6 = newproc 303 * r7 = scratch 304 */ 305 stmfd sp!, {r4-r7, lr} 306 307 /* 308 * Get the current process and indicate that there is no longer 309 * a valid process (curproc = 0). Zero the current PCB pointer 310 * while we're at it. 311 */ 312 ldr r7, .Lcurproc 313 ldr r6, .Lcurpcb 314 mov r0, #0x00000000 315 ldr r1, [r7] /* r1 = curproc */ 316 str r0, [r7] /* curproc = NULL */ 317 str r0, [r6] /* curpcb = NULL */ 318 319 /* stash the old proc while we call functions */ 320 mov r5, r1 321 322 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 323 /* release the sched_lock before handling interrupts */ 324 bl _C_LABEL(sched_unlock_idle) 325 #endif 326 327 /* Lower the spl level to spl0 and get the current spl level. */ 328 #ifdef __NEWINTR 329 mov r0, #(IPL_NONE) 330 bl _C_LABEL(_spllower) 331 #else /* ! __NEWINTR */ 332 #ifdef spl0 333 mov r0, #(_SPL_0) 334 bl _C_LABEL(splx) 335 #else 336 bl _C_LABEL(spl0) 337 #endif /* spl0 */ 338 #endif /* __NEWINTR */ 339 340 /* Push the old spl level onto the stack */ 341 str r0, [sp, #-0x0004]! 342 343 /* First phase : find a new process */ 344 345 ldr r7, .Lwhichqs 346 347 /* rem: r5 = old proc */ 348 /* rem: r7 = &whichqs */ 349 350 .Lswitch_search: 351 IRQdisable 352 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 353 bl _C_LABEL(sched_lock_idle) 354 #endif 355 356 /* Do we have any active queues */ 357 ldr r3, [r7] 358 359 /* If not we must idle until we do. */ 360 teq r3, #0x00000000 361 beq _ASM_LABEL(idle) 362 363 /* put old proc back in r1 */ 364 mov r1, r5 365 366 /* rem: r1 = old proc */ 367 /* rem: r3 = whichqs */ 368 /* rem: interrupts are disabled */ 369 370 /* 371 * We have found an active queue. Currently we do not know which queue 372 * is active just that one of them is. 373 */ 374 /* this is the ffs algorithm devised by d.seal and posted to 375 * comp.sys.arm on 16 Feb 1994. 376 */ 377 rsb r5, r3, #0 378 ands r0, r3, r5 379 380 adr r5, .Lcpu_switch_ffs_table 381 382 /* X = R0 */ 383 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 384 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 385 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 386 387 /* used further down, saves SA stall */ 388 ldr r6, .Lqs 389 390 /* now lookup in table indexed on top 6 bits of a4 */ 391 ldrb r4, [ r5, r4, lsr #26 ] 392 393 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 394 /* rem: r1 = old proc */ 395 /* rem: r3 = whichqs */ 396 /* rem: r4 = queue number */ 397 /* rem: interrupts are disabled */ 398 399 /* Get the address of the queue (&qs[queue]) */ 400 add r5, r6, r4, lsl #3 401 402 /* 403 * Get the process from the queue and place the next process in 404 * the queue at the head. This basically unlinks the process at 405 * the head of the queue. 406 */ 407 ldr r6, [r5, #(P_FORW)] 408 409 /* rem: r6 = new process */ 410 ldr r7, [r6, #(P_FORW)] 411 str r7, [r5, #(P_FORW)] 412 413 /* 414 * Test to see if the queue is now empty. If the head of the queue 415 * points to the queue itself then there are no more processes in 416 * the queue. We can therefore clear the queue not empty flag held 417 * in r3. 418 */ 419 420 teq r5, r7 421 biceq r3, r3, r0 422 423 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 424 425 /* Fix the back pointer for the process now at the head of the queue. */ 426 ldr r0, [r6, #(P_BACK)] 427 str r0, [r7, #(P_BACK)] 428 429 /* Update the RAM copy of the queue not empty flags word. */ 430 ldr r7, .Lwhichqs 431 str r3, [r7] 432 433 /* rem: r1 = old proc */ 434 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 435 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 436 /* rem: r6 = new process */ 437 /* rem: interrupts are disabled */ 438 439 /* Clear the want_resched flag */ 440 ldr r7, .Lwant_resched 441 mov r0, #0x00000000 442 str r0, [r7] 443 444 /* 445 * Clear the back pointer of the process we have removed from 446 * the head of the queue. The new process is isolated now. 447 */ 448 str r0, [r6, #(P_BACK)] 449 450 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 451 /* 452 * unlock the sched_lock, but leave interrupts off, for now. 453 */ 454 mov r7, r1 455 bl _C_LABEL(sched_unlock_idle) 456 mov r1, r7 457 #endif 458 459 #ifdef MULTIPROCESSOR 460 /* XXX use curcpu() */ 461 ldr r0, .Lcpu_info_store 462 str r0, [r6, #(P_CPU)] 463 #else 464 /* p->p_cpu initialized in fork1() for single-processor */ 465 #endif 466 467 /* Process is now on a processor. */ 468 mov r0, #SONPROC /* p->p_stat = SONPROC */ 469 strb r0, [r6, #(P_STAT)] 470 471 /* We have a new curproc now so make a note it */ 472 ldr r7, .Lcurproc 473 str r6, [r7] 474 475 /* Hook in a new pcb */ 476 ldr r7, .Lcurpcb 477 ldr r0, [r6, #(P_ADDR)] 478 str r0, [r7] 479 480 /* At this point we can allow IRQ's again. */ 481 IRQenable 482 483 /* rem: r1 = old proc */ 484 /* rem: r6 = new process */ 485 /* rem: interrupts are enabled */ 486 487 /* 488 * If the new process is the same as the process that called 489 * cpu_switch() then we do not need to save and restore any 490 * contexts. This means we can make a quick exit. 491 * The test is simple if curproc on entry (now in r1) is the 492 * same as the proc removed from the queue we can jump to the exit. 493 */ 494 teq r1, r6 495 beq .Lswitch_return 496 497 /* Remember the old process in r0 */ 498 mov r0, r1 499 500 /* 501 * If the curproc on entry to cpu_switch was zero then the 502 * process that called it was exiting. This means that we do 503 * not need to save the current context. Instead we can jump 504 * straight to restoring the context for the new process. 505 */ 506 teq r0, #0x00000000 507 beq .Lswitch_exited 508 509 /* rem: r0 = old proc */ 510 /* rem: r6 = new process */ 511 /* rem: interrupts are enabled */ 512 513 /* Stage two : Save old context */ 514 515 /* Get the user structure for the old process. */ 516 ldr r1, [r0, #(P_ADDR)] 517 518 /* Save all the registers in the old process's pcb */ 519 add r7, r1, #(PCB_R8) 520 stmia r7, {r8-r13} 521 522 /* 523 * This can be optimised... We know we want to go from SVC32 524 * mode to UND32 mode 525 */ 526 mrs r3, cpsr 527 bic r2, r3, #(PSR_MODE) 528 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 529 msr cpsr_c, r2 530 531 str sp, [r1, #(PCB_UND_SP)] 532 533 msr cpsr_c, r3 /* Restore the old mode */ 534 535 /* rem: r0 = old proc */ 536 /* rem: r1 = old pcb */ 537 /* rem: r6 = new process */ 538 /* rem: interrupts are enabled */ 539 540 /* What else needs to be saved Only FPA stuff when that is supported */ 541 542 /* r1 now free! */ 543 544 /* Third phase : restore saved context */ 545 546 /* rem: r0 = old proc */ 547 /* rem: r6 = new process */ 548 /* rem: interrupts are enabled */ 549 550 /* 551 * Don't allow user space access between the purge and the switch. 552 */ 553 ldr r3, .Lblock_userspace_access 554 mov r1, #0x00000001 555 mov r2, #0x00000000 556 str r1, [r3] 557 558 stmfd sp!, {r0-r3} 559 ldr r1, .Lcpufuncs 560 add lr, pc, #.Lcs_cache_purged - . - 8 561 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 562 563 .Lcs_cache_purged: 564 ldmfd sp!, {r0-r3} 565 566 .Lcs_cache_purge_skipped: 567 /* At this point we need to kill IRQ's again. */ 568 IRQdisable 569 570 /* 571 * Interrupts are disabled so we can allow user space accesses again 572 * as none will occur until interrupts are re-enabled after the 573 * switch. 574 */ 575 str r2, [r3] 576 577 /* Get the user structure for the new process in r1 */ 578 ldr r1, [r6, #(P_ADDR)] 579 580 /* Get the pagedir physical address for the process. */ 581 ldr r0, [r1, #(PCB_PAGEDIR)] 582 583 /* Switch the memory to the new process */ 584 ldr r3, .Lcpufuncs 585 add lr, pc, #.Lcs_context_switched - . - 8 586 ldr pc, [r3, #CF_CONTEXT_SWITCH] 587 588 .Lcs_context_switched: 589 /* 590 * This can be optimised... We know we want to go from SVC32 591 * mode to UND32 mode 592 */ 593 mrs r3, cpsr 594 bic r2, r3, #(PSR_MODE) 595 orr r2, r2, #(PSR_UND32_MODE) 596 msr cpsr_c, r2 597 598 ldr sp, [r1, #(PCB_UND_SP)] 599 600 msr cpsr_c, r3 /* Restore the old mode */ 601 602 /* Restore all the save registers */ 603 add r7, r1, #PCB_R8 604 ldmia r7, {r8-r13} 605 606 mov r7, r1 /* preserve PCB pointer */ 607 608 #ifdef ARMFPE 609 add r0, r1, #(USER_SIZE) & 0x00ff 610 add r0, r0, #(USER_SIZE) & 0xff00 611 bl _C_LABEL(arm_fpe_core_changecontext) 612 #endif 613 614 /* We can enable interrupts again */ 615 IRQenable 616 617 /* rem: r6 = new proc */ 618 /* rem: r7 = new PCB */ 619 620 /* 621 * Check for restartable atomic sequences (RAS). 622 */ 623 624 ldr r2, [r6, #(P_NRAS)] 625 ldr r4, [r7, #(PCB_TF)] /* r4 = trapframe (used below) */ 626 teq r2, #0 /* p->p_nras == 0? */ 627 bne .Lswitch_do_ras /* no, check for one */ 628 629 .Lswitch_return: 630 631 /* Get the spl level from the stack and update the current spl level */ 632 ldr r0, [sp], #0x0004 633 bl _C_LABEL(splx) 634 635 /* cpu_switch returns the proc it switched to. */ 636 mov r0, r6 637 638 /* 639 * Pull the registers that got pushed when either savectx() or 640 * cpu_switch() was called and return. 641 */ 642 ldmfd sp!, {r4-r7, pc} 643 644 .Lswitch_do_ras: 645 ldr r1, [r4, #(TF_PC)] /* second ras_lookup() arg */ 646 mov r0, r6 /* first ras_lookup() arg */ 647 bl _C_LABEL(ras_lookup) 648 cmn r0, #1 /* -1 means "not in a RAS" */ 649 strne r0, [r4, #(TF_PC)] 650 b .Lswitch_return 651 652 .Lswitch_exited: 653 /* 654 * We skip the cache purge because switch_exit() already did 655 * it. Load up registers the way Lcs_cache_purge_skipped 656 * expects. Userspace access already blocked in switch_exit(). 657 */ 658 ldr r3, .Lblock_userspace_access 659 mov r2, #0x00000000 660 b .Lcs_cache_purge_skipped 661 662 /* 663 * void switch_exit(struct proc *p, struct proc *p0); 664 * Switch to proc0's saved context and deallocate the address space and kernel 665 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 666 */ 667 668 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 669 ENTRY(switch_exit) 670 /* 671 * r0 = proc 672 * r1 = proc0 673 */ 674 675 mov r3, r0 676 677 /* In case we fault */ 678 ldr r0, .Lcurproc 679 mov r2, #0x00000000 680 str r2, [r0] 681 682 /* ldr r0, .Lcurpcb 683 str r2, [r0]*/ 684 685 /* 686 * Don't allow user space access between the purge and the switch. 687 */ 688 ldr r0, .Lblock_userspace_access 689 mov r2, #0x00000001 690 str r2, [r0] 691 692 /* Switch to proc0 context */ 693 694 stmfd sp!, {r0-r3} 695 696 ldr r0, .Lcpufuncs 697 add lr, pc, #.Lse_cache_purged - . - 8 698 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 699 700 .Lse_cache_purged: 701 ldmfd sp!, {r0-r3} 702 703 IRQdisable 704 705 ldr r2, [r1, #(P_ADDR)] 706 ldr r0, [r2, #(PCB_PAGEDIR)] 707 708 /* Switch the memory to the new process */ 709 ldr r4, .Lcpufuncs 710 add lr, pc, #.Lse_context_switched - . - 8 711 ldr pc, [r4, #CF_CONTEXT_SWITCH] 712 713 .Lse_context_switched: 714 /* Restore all the save registers */ 715 add r7, r2, #PCB_R8 716 ldmia r7, {r8-r13} 717 718 /* This is not really needed ! */ 719 /* Yes it is for the su and fu routines */ 720 ldr r0, .Lcurpcb 721 str r2, [r0] 722 723 IRQenable 724 725 /* str r3, [sp, #-0x0004]!*/ 726 727 /* 728 * Schedule the vmspace and stack to be freed. 729 */ 730 mov r0, r3 /* exit2(p) */ 731 bl _C_LABEL(exit2) 732 733 /* Paranoia */ 734 ldr r1, .Lcurproc 735 mov r0, #0x00000000 736 str r0, [r1] 737 738 ldr r7, .Lwhichqs /* r7 = &whichqs */ 739 mov r5, #0x00000000 /* r5 = old proc = NULL */ 740 b .Lswitch_search 741 742 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 743 ENTRY(savectx) 744 /* 745 * r0 = pcb 746 */ 747 748 /* Push registers.*/ 749 stmfd sp!, {r4-r7, lr} 750 751 /* Store all the registers in the process's pcb */ 752 add r2, r0, #(PCB_R8) 753 stmia r2, {r8-r13} 754 755 /* Pull the regs of the stack */ 756 ldmfd sp!, {r4-r7, pc} 757 758 ENTRY(proc_trampoline) 759 #ifdef MULTIPROCESSOR 760 bl _C_LABEL(proc_trampoline_mp) 761 #endif 762 add lr, pc, #(.Ltrampoline_return - . - 8) 763 mov r0, r5 764 mov r1, sp 765 mov pc, r4 766 767 .Ltrampoline_return: 768 /* Kill irq's */ 769 mrs r0, cpsr 770 orr r0, r0, #(I32_bit) 771 msr cpsr_c, r0 772 773 PULLFRAME 774 775 movs pc, lr /* Exit */ 776 777 .type .Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 778 .Lcpu_switch_ffs_table: 779 /* same as ffs table but all nums are -1 from that */ 780 /* 0 1 2 3 4 5 6 7 */ 781 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 782 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 783 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 784 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 785 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 786 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 787 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 788 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 789 790 /* End of cpuswitch.S */ 791
Indexes created Mon Oct 20 20:10:13 GMT 2025