cpuswitch.S revision 1.28.2.2
1 /* $NetBSD: cpuswitch.S,v 1.28.2.2 2002/10/19 11:59:36 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 #include "opt_multiprocessor.h" 48 49 #include "assym.h" 50 #include <machine/param.h> 51 #include <machine/cpu.h> 52 #include <machine/frame.h> 53 #include <machine/asm.h> 54 55 #undef IRQdisable 56 #undef IRQenable 57 58 /* 59 * New experimental definitions of IRQdisable and IRQenable 60 * These keep FIQ's enabled since FIQ's are special. 61 */ 62 63 #define IRQdisable \ 64 mrs r14, cpsr ; \ 65 orr r14, r14, #(I32_bit) ; \ 66 msr cpsr_c, r14 ; \ 67 68 #define IRQenable \ 69 mrs r14, cpsr ; \ 70 bic r14, r14, #(I32_bit) ; \ 71 msr cpsr_c, r14 ; \ 72 73 .text 74 75 .Lwhichqs: 76 .word _C_LABEL(sched_whichqs) 77 78 .Lqs: 79 .word _C_LABEL(sched_qs) 80 81 /* 82 * cpuswitch() 83 * 84 * preforms a process context switch. 85 * This function has several entry points 86 */ 87 88 #ifdef MULTIPROCESSOR 89 .Lcpu_info_store: 90 .word _C_LABEL(cpu_info_store) 91 .Lcurproc: 92 /* FIXME: This is bogus in the general case. */ 93 .word _C_LABEL(cpu_info_store) + CI_CURPROC 94 95 .Lcurpcb: 96 .word _C_LABEL(cpu_info_store) + CI_CURPCB 97 #else 98 .Lcurproc: 99 .word _C_LABEL(curproc) 100 101 .Lcurpcb: 102 .word _C_LABEL(curpcb) 103 #endif 104 105 .Lwant_resched: 106 .word _C_LABEL(want_resched) 107 108 .Lcpufuncs: 109 .word _C_LABEL(cpufuncs) 110 111 #ifndef MULTIPROCESSOR 112 .data 113 .global _C_LABEL(curpcb) 114 _C_LABEL(curpcb): 115 .word 0x00000000 116 .text 117 #endif 118 119 .Lblock_userspace_access: 120 .word _C_LABEL(block_userspace_access) 121 122 .Lcpu_do_powersave: 123 .word _C_LABEL(cpu_do_powersave) 124 125 /* 126 * Idle loop, exercised while waiting for a process to wake up. 127 * 128 * NOTE: When we jump back to .Lswitch_search, we must have a 129 * pointer to whichqs in r7, which is what it is when we arrive 130 * here. 131 */ 132 /* LINTSTUB: Ignore */ 133 ASENTRY_NP(idle) 134 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 135 bl _C_LABEL(sched_unlock_idle) 136 #endif 137 ldr r3, .Lcpu_do_powersave 138 139 /* Enable interrupts */ 140 IRQenable 141 142 /* If we don't want to sleep, use a simpler loop. */ 143 ldr r3, [r3] /* r3 = cpu_do_powersave */ 144 teq r3, #0 145 bne 2f 146 147 /* Non-powersave idle. */ 148 1: /* should maybe do uvm pageidlezero stuff here */ 149 ldr r3, [r7] /* r3 = whichqs */ 150 teq r3, #0x00000000 151 bne .Lswitch_search 152 b 1b 153 154 2: /* Powersave idle. */ 155 ldr r4, .Lcpufuncs 156 3: ldr r3, [r7] /* r3 = whichqs */ 157 teq r3, #0x00000000 158 bne .Lswitch_search 159 160 /* if saving power, don't want to pageidlezero */ 161 mov r0, #0 162 adr lr, 3b 163 ldr pc, [r4, #(CF_SLEEP)] 164 /* loops back around */ 165 166 167 /* 168 * Find a new process to run, save the current context and 169 * load the new context 170 */ 171 172 ENTRY(cpu_switch) 173 /* 174 * Local register usage. Some of these registers are out of date. 175 * r1 = oldproc 176 * r3 = whichqs 177 * r4 = queue 178 * r5 = &qs[queue] 179 * r6 = newproc 180 * r7 = scratch 181 */ 182 mov ip, sp 183 stmfd sp!, {r4-r10, fp, ip, lr, pc} 184 sub fp, ip, #4 185 186 /* 187 * Get the current process and indicate that there is no longer 188 * a valid process (curproc = 0). Zero the current PCB pointer 189 * while we're at it. 190 */ 191 ldr r7, .Lcurproc 192 ldr r6, .Lcurpcb 193 mov r0, #0x00000000 194 ldr r1, [r7] /* r1 = curproc */ 195 str r0, [r7] /* curproc = NULL */ 196 str r0, [r6] /* curpcb = NULL */ 197 198 /* stash the old proc while we call functions */ 199 mov r5, r1 200 201 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 202 /* release the sched_lock before handling interrupts */ 203 bl _C_LABEL(sched_unlock_idle) 204 #endif 205 206 /* Lower the spl level to spl0 and get the current spl level. */ 207 #ifdef __NEWINTR 208 mov r0, #(IPL_NONE) 209 bl _C_LABEL(_spllower) 210 #else /* ! __NEWINTR */ 211 #ifdef spl0 212 mov r0, #(_SPL_0) 213 bl _C_LABEL(splx) 214 #else 215 bl _C_LABEL(spl0) 216 #endif /* spl0 */ 217 #endif /* __NEWINTR */ 218 219 /* Push the old spl level onto the stack */ 220 str r0, [sp, #-0x0004]! 221 222 /* First phase : find a new process */ 223 224 ldr r7, .Lwhichqs 225 226 /* rem: r5 = old proc */ 227 /* rem: r7 = &whichqs */ 228 229 .Lswitch_search: 230 IRQdisable 231 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 232 bl _C_LABEL(sched_lock_idle) 233 #endif 234 235 /* Do we have any active queues */ 236 ldr r3, [r7] 237 238 /* If not we must idle until we do. */ 239 teq r3, #0x00000000 240 beq _ASM_LABEL(idle) 241 242 /* put old proc back in r1 */ 243 mov r1, r5 244 245 /* rem: r1 = old proc */ 246 /* rem: r3 = whichqs */ 247 /* rem: interrupts are disabled */ 248 249 /* 250 * We have found an active queue. Currently we do not know which queue 251 * is active just that one of them is. 252 */ 253 /* this is the ffs algorithm devised by d.seal and posted to 254 * comp.sys.arm on 16 Feb 1994. 255 */ 256 rsb r5, r3, #0 257 ands r0, r3, r5 258 259 adr r5, .Lcpu_switch_ffs_table 260 261 /* X = R0 */ 262 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 263 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 264 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 265 266 /* used further down, saves SA stall */ 267 ldr r6, .Lqs 268 269 /* now lookup in table indexed on top 6 bits of a4 */ 270 ldrb r4, [ r5, r4, lsr #26 ] 271 272 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 273 /* rem: r1 = old proc */ 274 /* rem: r3 = whichqs */ 275 /* rem: r4 = queue number */ 276 /* rem: interrupts are disabled */ 277 278 /* Get the address of the queue (&qs[queue]) */ 279 add r5, r6, r4, lsl #3 280 281 /* 282 * Get the process from the queue and place the next process in 283 * the queue at the head. This basically unlinks the process at 284 * the head of the queue. 285 */ 286 ldr r6, [r5, #(P_FORW)] 287 288 /* rem: r6 = new process */ 289 ldr r7, [r6, #(P_FORW)] 290 str r7, [r5, #(P_FORW)] 291 292 /* 293 * Test to see if the queue is now empty. If the head of the queue 294 * points to the queue itself then there are no more processes in 295 * the queue. We can therefore clear the queue not empty flag held 296 * in r3. 297 */ 298 299 teq r5, r7 300 biceq r3, r3, r0 301 302 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 303 304 /* Fix the back pointer for the process now at the head of the queue. */ 305 ldr r0, [r6, #(P_BACK)] 306 str r0, [r7, #(P_BACK)] 307 308 /* Update the RAM copy of the queue not empty flags word. */ 309 ldr r7, .Lwhichqs 310 str r3, [r7] 311 312 /* rem: r1 = old proc */ 313 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 314 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 315 /* rem: r6 = new process */ 316 /* rem: interrupts are disabled */ 317 318 /* Clear the want_resched flag */ 319 ldr r7, .Lwant_resched 320 mov r0, #0x00000000 321 str r0, [r7] 322 323 /* 324 * Clear the back pointer of the process we have removed from 325 * the head of the queue. The new process is isolated now. 326 */ 327 str r0, [r6, #(P_BACK)] 328 329 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 330 /* 331 * unlock the sched_lock, but leave interrupts off, for now. 332 */ 333 mov r7, r1 334 bl _C_LABEL(sched_unlock_idle) 335 mov r1, r7 336 #endif 337 338 #ifdef MULTIPROCESSOR 339 /* XXX use curcpu() */ 340 ldr r0, .Lcpu_info_store 341 str r0, [r6, #(P_CPU)] 342 #else 343 /* p->p_cpu initialized in fork1() for single-processor */ 344 #endif 345 346 /* Process is now on a processor. */ 347 mov r0, #SONPROC /* p->p_stat = SONPROC */ 348 strb r0, [r6, #(P_STAT)] 349 350 /* We have a new curproc now so make a note it */ 351 ldr r7, .Lcurproc 352 str r6, [r7] 353 354 /* Hook in a new pcb */ 355 ldr r7, .Lcurpcb 356 ldr r0, [r6, #(P_ADDR)] 357 str r0, [r7] 358 359 /* At this point we can allow IRQ's again. */ 360 IRQenable 361 362 /* rem: r1 = old proc */ 363 /* rem: r6 = new process */ 364 /* rem: interrupts are enabled */ 365 366 /* 367 * If the new process is the same as the process that called 368 * cpu_switch() then we do not need to save and restore any 369 * contexts. This means we can make a quick exit. 370 * The test is simple if curproc on entry (now in r1) is the 371 * same as the proc removed from the queue we can jump to the exit. 372 */ 373 teq r1, r6 374 beq .Lswitch_return 375 376 /* Remember the old process in r0 */ 377 mov r0, r1 378 379 /* 380 * If the curproc on entry to cpu_switch was zero then the 381 * process that called it was exiting. This means that we do 382 * not need to save the current context. Instead we can jump 383 * straight to restoring the context for the new process. 384 */ 385 teq r0, #0x00000000 386 beq .Lswitch_exited 387 388 /* rem: r0 = old proc */ 389 /* rem: r6 = new process */ 390 /* rem: interrupts are enabled */ 391 392 /* Stage two : Save old context */ 393 394 /* Get the user structure for the old process. */ 395 ldr r1, [r0, #(P_ADDR)] 396 397 /* Save the remaining registers in the old process's pcb */ 398 add r7, r1, #(PCB_R11) 399 stmia r7, {r11-r13} 400 401 /* 402 * This can be optimised... We know we want to go from SVC32 403 * mode to UND32 mode 404 */ 405 mrs r3, cpsr 406 bic r2, r3, #(PSR_MODE) 407 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 408 msr cpsr_c, r2 409 410 str sp, [r1, #(PCB_UND_SP)] 411 412 msr cpsr_c, r3 /* Restore the old mode */ 413 414 /* rem: r0 = old proc */ 415 /* rem: r1 = old pcb */ 416 /* rem: r6 = new process */ 417 /* rem: interrupts are enabled */ 418 419 /* What else needs to be saved Only FPA stuff when that is supported */ 420 421 /* r1 now free! */ 422 423 /* Third phase : restore saved context */ 424 425 /* rem: r0 = old proc */ 426 /* rem: r6 = new process */ 427 /* rem: interrupts are enabled */ 428 429 /* 430 * Don't allow user space access between the purge and the switch. 431 */ 432 ldr r3, .Lblock_userspace_access 433 mov r1, #0x00000001 434 mov r2, #0x00000000 435 str r1, [r3] 436 437 stmfd sp!, {r0-r3} 438 ldr r1, .Lcpufuncs 439 mov lr, pc 440 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 441 ldmfd sp!, {r0-r3} 442 443 .Lcs_cache_purge_skipped: 444 /* At this point we need to kill IRQ's again. */ 445 IRQdisable 446 447 /* 448 * Interrupts are disabled so we can allow user space accesses again 449 * as none will occur until interrupts are re-enabled after the 450 * switch. 451 */ 452 str r2, [r3] 453 454 /* Get the user structure for the new process in r1 */ 455 ldr r1, [r6, #(P_ADDR)] 456 457 /* Get the pagedir physical address for the process. */ 458 ldr r0, [r1, #(PCB_PAGEDIR)] 459 460 /* Switch the memory to the new process */ 461 ldr r3, .Lcpufuncs 462 mov lr, pc 463 ldr pc, [r3, #CF_CONTEXT_SWITCH] 464 465 /* 466 * This can be optimised... We know we want to go from SVC32 467 * mode to UND32 mode 468 */ 469 mrs r3, cpsr 470 bic r2, r3, #(PSR_MODE) 471 orr r2, r2, #(PSR_UND32_MODE) 472 msr cpsr_c, r2 473 474 ldr sp, [r1, #(PCB_UND_SP)] 475 476 msr cpsr_c, r3 /* Restore the old mode */ 477 478 /* Restore the saved registers from the PCB */ 479 add r7, r1, #PCB_R11 480 ldmia r7, {r11-r13} 481 482 mov r7, r1 /* preserve PCB pointer */ 483 484 #ifdef ARMFPE 485 add r0, r1, #(USER_SIZE) & 0x00ff 486 add r0, r0, #(USER_SIZE) & 0xff00 487 bl _C_LABEL(arm_fpe_core_changecontext) 488 #endif 489 490 /* We can enable interrupts again */ 491 IRQenable 492 493 /* rem: r6 = new proc */ 494 /* rem: r7 = new PCB */ 495 496 /* 497 * Check for restartable atomic sequences (RAS). 498 */ 499 500 ldr r2, [r6, #(P_NRAS)] 501 ldr r4, [r7, #(PCB_TF)] /* r4 = trapframe (used below) */ 502 teq r2, #0 /* p->p_nras == 0? */ 503 bne .Lswitch_do_ras /* no, check for one */ 504 505 .Lswitch_return: 506 507 /* Get the spl level from the stack and update the current spl level */ 508 ldr r0, [sp], #0x0004 509 bl _C_LABEL(splx) 510 511 /* cpu_switch returns the proc it switched to. */ 512 mov r0, r6 513 514 /* 515 * Pull the registers that got pushed when either savectx() or 516 * cpu_switch() was called and return. 517 */ 518 ldmdb fp, {r4-r10, fp, sp, pc} 519 520 .Lswitch_do_ras: 521 ldr r1, [r4, #(TF_PC)] /* second ras_lookup() arg */ 522 mov r0, r6 /* first ras_lookup() arg */ 523 bl _C_LABEL(ras_lookup) 524 cmn r0, #1 /* -1 means "not in a RAS" */ 525 strne r0, [r4, #(TF_PC)] 526 b .Lswitch_return 527 528 .Lswitch_exited: 529 /* 530 * We skip the cache purge because switch_exit() already did 531 * it. Load up registers the way Lcs_cache_purge_skipped 532 * expects. Userspace access already blocked in switch_exit(). 533 */ 534 ldr r3, .Lblock_userspace_access 535 mov r2, #0x00000000 536 b .Lcs_cache_purge_skipped 537 538 /* 539 * void switch_exit(struct proc *p, struct proc *p0); 540 * Switch to proc0's saved context and deallocate the address space and kernel 541 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 542 */ 543 544 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 545 ENTRY(switch_exit) 546 /* 547 * r0 = proc 548 * r1 = proc0 549 */ 550 551 mov r3, r0 552 553 /* In case we fault */ 554 ldr r0, .Lcurproc 555 mov r2, #0x00000000 556 str r2, [r0] 557 558 /* ldr r0, .Lcurpcb 559 str r2, [r0]*/ 560 561 /* 562 * Don't allow user space access between the purge and the switch. 563 */ 564 ldr r0, .Lblock_userspace_access 565 mov r2, #0x00000001 566 str r2, [r0] 567 568 /* Switch to proc0 context */ 569 570 stmfd sp!, {r0-r3} 571 572 ldr r0, .Lcpufuncs 573 mov lr, pc 574 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 575 576 ldmfd sp!, {r0-r3} 577 578 IRQdisable 579 580 ldr r2, [r1, #(P_ADDR)] 581 ldr r0, [r2, #(PCB_PAGEDIR)] 582 583 /* Switch the memory to the new process */ 584 ldr r4, .Lcpufuncs 585 mov lr, pc 586 ldr pc, [r4, #CF_CONTEXT_SWITCH] 587 588 /* Restore all the save registers */ 589 add r7, r2, #PCB_R11 590 ldmia r7, {r11-r13} 591 592 /* This is not really needed ! */ 593 /* Yes it is for the su and fu routines */ 594 ldr r0, .Lcurpcb 595 str r2, [r0] 596 597 IRQenable 598 599 /* str r3, [sp, #-0x0004]!*/ 600 601 /* 602 * Schedule the vmspace and stack to be freed. 603 */ 604 mov r0, r3 /* exit2(p) */ 605 bl _C_LABEL(exit2) 606 607 /* Paranoia */ 608 ldr r1, .Lcurproc 609 mov r0, #0x00000000 610 str r0, [r1] 611 612 ldr r7, .Lwhichqs /* r7 = &whichqs */ 613 mov r5, #0x00000000 /* r5 = old proc = NULL */ 614 b .Lswitch_search 615 616 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 617 ENTRY(savectx) 618 /* 619 * r0 = pcb 620 */ 621 622 /* Push registers.*/ 623 mov ip, sp 624 stmfd sp!, {r4-r10, fp, ip, lr, pc} 625 sub fp, ip, #4 626 627 /* Store all the registers in the process's pcb */ 628 add r2, r0, #(PCB_R11) 629 stmia r2, {r11-r13} 630 631 /* Pull the regs of the stack */ 632 ldmdb fp, {r4-r10, fp, sp, pc} 633 634 ENTRY(proc_trampoline) 635 #ifdef MULTIPROCESSOR 636 bl _C_LABEL(proc_trampoline_mp) 637 #endif 638 mov r0, r5 639 mov r1, sp 640 mov lr, pc 641 mov pc, r4 642 643 /* Kill irq's */ 644 mrs r0, cpsr 645 orr r0, r0, #(I32_bit) 646 msr cpsr_c, r0 647 648 PULLFRAME 649 650 movs pc, lr /* Exit */ 651 652 .type .Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 653 .Lcpu_switch_ffs_table: 654 /* same as ffs table but all nums are -1 from that */ 655 /* 0 1 2 3 4 5 6 7 */ 656 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 657 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 658 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 659 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 660 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 661 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 662 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 663 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 664 665 /* End of cpuswitch.S */ 666
Indexes created Sat Oct 25 10:09:55 GMT 2025