cpuswitch.S revision 1.28.2.4
1 /* $NetBSD: cpuswitch.S,v 1.28.2.4 2002/10/19 12:40:25 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 #include "opt_multiprocessor.h" 48 49 #include "assym.h" 50 #include <machine/param.h> 51 #include <machine/cpu.h> 52 #include <machine/frame.h> 53 #include <machine/asm.h> 54 55 #undef IRQdisable 56 #undef IRQenable 57 58 /* 59 * New experimental definitions of IRQdisable and IRQenable 60 * These keep FIQ's enabled since FIQ's are special. 61 */ 62 63 #define IRQdisable \ 64 mrs r14, cpsr ; \ 65 orr r14, r14, #(I32_bit) ; \ 66 msr cpsr_c, r14 ; \ 67 68 #define IRQenable \ 69 mrs r14, cpsr ; \ 70 bic r14, r14, #(I32_bit) ; \ 71 msr cpsr_c, r14 ; \ 72 73 .text 74 75 .Lwhichqs: 76 .word _C_LABEL(sched_whichqs) 77 78 .Lqs: 79 .word _C_LABEL(sched_qs) 80 81 /* 82 * cpuswitch() 83 * 84 * preforms a process context switch. 85 * This function has several entry points 86 */ 87 88 #ifdef MULTIPROCESSOR 89 .Lcpu_info_store: 90 .word _C_LABEL(cpu_info_store) 91 .Lcurproc: 92 /* FIXME: This is bogus in the general case. */ 93 .word _C_LABEL(cpu_info_store) + CI_CURPROC 94 95 .Lcurpcb: 96 .word _C_LABEL(cpu_info_store) + CI_CURPCB 97 #else 98 .Lcurproc: 99 .word _C_LABEL(curproc) 100 101 .Lcurpcb: 102 .word _C_LABEL(curpcb) 103 #endif 104 105 .Lwant_resched: 106 .word _C_LABEL(want_resched) 107 108 .Lcpufuncs: 109 .word _C_LABEL(cpufuncs) 110 111 #ifndef MULTIPROCESSOR 112 .data 113 .global _C_LABEL(curpcb) 114 _C_LABEL(curpcb): 115 .word 0x00000000 116 .text 117 #endif 118 119 .Lblock_userspace_access: 120 .word _C_LABEL(block_userspace_access) 121 122 .Lcpu_do_powersave: 123 .word _C_LABEL(cpu_do_powersave) 124 125 /* 126 * Idle loop, exercised while waiting for a process to wake up. 127 * 128 * NOTE: When we jump back to .Lswitch_search, we must have a 129 * pointer to whichqs in r7, which is what it is when we arrive 130 * here. 131 */ 132 /* LINTSTUB: Ignore */ 133 ASENTRY_NP(idle) 134 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 135 bl _C_LABEL(sched_unlock_idle) 136 #endif 137 ldr r3, .Lcpu_do_powersave 138 139 /* Enable interrupts */ 140 IRQenable 141 142 /* If we don't want to sleep, use a simpler loop. */ 143 ldr r3, [r3] /* r3 = cpu_do_powersave */ 144 teq r3, #0 145 bne 2f 146 147 /* Non-powersave idle. */ 148 1: /* should maybe do uvm pageidlezero stuff here */ 149 ldr r3, [r7] /* r3 = whichqs */ 150 teq r3, #0x00000000 151 bne .Lswitch_search 152 b 1b 153 154 2: /* Powersave idle. */ 155 ldr r4, .Lcpufuncs 156 3: ldr r3, [r7] /* r3 = whichqs */ 157 teq r3, #0x00000000 158 bne .Lswitch_search 159 160 /* if saving power, don't want to pageidlezero */ 161 mov r0, #0 162 adr lr, 3b 163 ldr pc, [r4, #(CF_SLEEP)] 164 /* loops back around */ 165 166 167 /* 168 * Find a new process to run, save the current context and 169 * load the new context 170 */ 171 172 ENTRY(cpu_switch) 173 /* 174 * Local register usage. Some of these registers are out of date. 175 * r0-r2 = scratch 176 * r3 = whichqs 177 * r4 = queue 178 * r5 = &qs[queue] 179 * r6 = newproc 180 * r7 = &whichqs, new first proc in q, old pcb, new pcb 181 * r8 = oldproc 182 */ 183 mov ip, sp 184 stmfd sp!, {r4-r10, fp, ip, lr, pc} 185 sub fp, ip, #4 186 187 /* 188 * Get the current process and indicate that there is no longer 189 * a valid process (curproc = 0). Zero the current PCB pointer 190 * while we're at it. 191 */ 192 ldr r1, .Lcurproc 193 ldr r2, .Lcurpcb 194 mov r0, #0x00000000 195 ldr r8, [r1] /* r8 = curproc */ 196 str r0, [r1] /* curproc = NULL */ 197 str r0, [r2] /* curpcb = NULL */ 198 199 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 200 /* release the sched_lock before handling interrupts */ 201 bl _C_LABEL(sched_unlock_idle) 202 #endif 203 204 /* Lower the spl level to spl0 and get the current spl level. */ 205 #ifdef __NEWINTR 206 mov r0, #(IPL_NONE) 207 bl _C_LABEL(_spllower) 208 #else /* ! __NEWINTR */ 209 #ifdef spl0 210 mov r0, #(_SPL_0) 211 bl _C_LABEL(splx) 212 #else 213 bl _C_LABEL(spl0) 214 #endif /* spl0 */ 215 #endif /* __NEWINTR */ 216 217 /* Push the old spl level onto the stack */ 218 str r0, [sp, #-0x0004]! 219 220 /* First phase : find a new process */ 221 222 ldr r7, .Lwhichqs 223 224 /* rem: r7 = &whichqs */ 225 /* rem: r8 = old proc */ 226 227 .Lswitch_search: 228 IRQdisable 229 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 230 bl _C_LABEL(sched_lock_idle) 231 #endif 232 233 /* Do we have any active queues */ 234 ldr r3, [r7] 235 236 /* If not we must idle until we do. */ 237 teq r3, #0x00000000 238 beq _ASM_LABEL(idle) 239 240 /* rem: r8 = old proc */ 241 /* rem: r3 = whichqs */ 242 /* rem: interrupts are disabled */ 243 244 /* 245 * We have found an active queue. Currently we do not know which queue 246 * is active just that one of them is. 247 */ 248 /* this is the ffs algorithm devised by d.seal and posted to 249 * comp.sys.arm on 16 Feb 1994. 250 */ 251 rsb r5, r3, #0 252 ands r0, r3, r5 253 254 adr r5, .Lcpu_switch_ffs_table 255 256 /* X = R0 */ 257 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 258 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 259 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 260 261 /* used further down, saves SA stall */ 262 ldr r6, .Lqs 263 264 /* now lookup in table indexed on top 6 bits of a4 */ 265 ldrb r4, [ r5, r4, lsr #26 ] 266 267 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 268 /* rem: r3 = whichqs */ 269 /* rem: r4 = queue number */ 270 /* rem: r8 = old proc */ 271 /* rem: interrupts are disabled */ 272 273 /* Get the address of the queue (&qs[queue]) */ 274 add r5, r6, r4, lsl #3 275 276 /* 277 * Get the process from the queue and place the next process in 278 * the queue at the head. This basically unlinks the process at 279 * the head of the queue. 280 */ 281 ldr r6, [r5, #(P_FORW)] 282 283 /* rem: r6 = new process */ 284 ldr r7, [r6, #(P_FORW)] 285 str r7, [r5, #(P_FORW)] 286 287 /* rem: r7 = new queue head */ 288 289 /* 290 * Test to see if the queue is now empty. If the head of the queue 291 * points to the queue itself then there are no more processes in 292 * the queue. We can therefore clear the queue not empty flag held 293 * in r3. 294 */ 295 296 teq r5, r7 297 biceq r3, r3, r0 298 299 /* Fix the back pointer for the process now at the head of the queue. */ 300 ldr r0, [r6, #(P_BACK)] 301 str r0, [r7, #(P_BACK)] 302 303 /* Update the RAM copy of the queue not empty flags word. */ 304 ldr r7, .Lwhichqs 305 str r3, [r7] 306 307 /* rem: r8 = old proc */ 308 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 309 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 310 /* rem: r6 = new process */ 311 /* rem: interrupts are disabled */ 312 313 /* Clear the want_resched flag */ 314 ldr r1, .Lwant_resched 315 mov r0, #0x00000000 316 str r0, [r1] 317 318 /* 319 * Clear the back pointer of the process we have removed from 320 * the head of the queue. The new process is isolated now. 321 */ 322 str r0, [r6, #(P_BACK)] 323 324 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 325 /* 326 * unlock the sched_lock, but leave interrupts off, for now. 327 */ 328 bl _C_LABEL(sched_unlock_idle) 329 #endif 330 331 #ifdef MULTIPROCESSOR 332 /* XXX use curcpu() */ 333 ldr r0, .Lcpu_info_store 334 str r0, [r6, #(P_CPU)] 335 #else 336 /* p->p_cpu initialized in fork1() for single-processor */ 337 #endif 338 339 /* Process is now on a processor. */ 340 mov r0, #SONPROC /* p->p_stat = SONPROC */ 341 strb r0, [r6, #(P_STAT)] 342 343 /* We have a new curproc now so make a note it */ 344 ldr r7, .Lcurproc 345 str r6, [r7] 346 347 /* Hook in a new pcb */ 348 ldr r7, .Lcurpcb 349 ldr r0, [r6, #(P_ADDR)] 350 str r0, [r7] 351 352 /* At this point we can allow IRQ's again. */ 353 IRQenable 354 355 /* rem: r8 = old proc */ 356 /* rem: r6 = new process */ 357 /* rem: interrupts are enabled */ 358 359 /* 360 * If the new process is the same as the process that called 361 * cpu_switch() then we do not need to save and restore any 362 * contexts. This means we can make a quick exit. 363 * The test is simple if curproc on entry (now in r8) is the 364 * same as the proc removed from the queue we can jump to the exit. 365 */ 366 teq r8, r6 367 beq .Lswitch_return 368 369 /* 370 * If the curproc on entry to cpu_switch was zero then the 371 * process that called it was exiting. This means that we do 372 * not need to save the current context. Instead we can jump 373 * straight to restoring the context for the new process. 374 */ 375 teq r8, #0x00000000 376 beq .Lswitch_exited 377 378 /* rem: r8 = old proc */ 379 /* rem: r6 = new process */ 380 /* rem: interrupts are enabled */ 381 382 /* Stage two : Save old context */ 383 384 /* Get the user structure for the old process. */ 385 ldr r7, [r8, #(P_ADDR)] 386 387 /* Save the remaining registers in the old process's pcb */ 388 add r0, r7, #(PCB_R11) 389 stmia r0, {r11-r13} 390 391 /* rem: r7 = old pcb */ 392 393 /* 394 * This can be optimised... We know we want to go from SVC32 395 * mode to UND32 mode 396 */ 397 mrs r3, cpsr 398 bic r2, r3, #(PSR_MODE) 399 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 400 msr cpsr_c, r2 401 402 str sp, [r7, #(PCB_UND_SP)] 403 404 msr cpsr_c, r3 /* Restore the old mode */ 405 406 /* rem: r6 = new process */ 407 /* rem: r7 = old pcb */ 408 /* rem: r8 = old proc */ 409 /* rem: interrupts are enabled */ 410 411 /* What else needs to be saved Only FPA stuff when that is supported */ 412 413 /* r7 now free! */ 414 415 /* Third phase : restore saved context */ 416 417 /* rem: r6 = new process */ 418 /* rem: r8 = old proc */ 419 /* rem: interrupts are enabled */ 420 421 /* 422 * Don't allow user space access between the purge and the switch. 423 */ 424 ldr r3, .Lblock_userspace_access 425 mov r1, #0x00000001 426 mov r2, #0x00000000 427 str r1, [r3] 428 429 stmfd sp!, {r0-r3} 430 ldr r1, .Lcpufuncs 431 mov lr, pc 432 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 433 ldmfd sp!, {r0-r3} 434 435 .Lcs_cache_purge_skipped: 436 /* At this point we need to kill IRQ's again. */ 437 IRQdisable 438 439 /* 440 * Interrupts are disabled so we can allow user space accesses again 441 * as none will occur until interrupts are re-enabled after the 442 * switch. 443 */ 444 str r2, [r3] 445 446 /* Get the user structure for the new process in r1 */ 447 ldr r7, [r6, #(P_ADDR)] 448 449 /* Get the pagedir physical address for the process. */ 450 ldr r0, [r7, #(PCB_PAGEDIR)] 451 452 /* Switch the memory to the new process */ 453 ldr r3, .Lcpufuncs 454 mov lr, pc 455 ldr pc, [r3, #CF_CONTEXT_SWITCH] 456 457 /* 458 * This can be optimised... We know we want to go from SVC32 459 * mode to UND32 mode 460 */ 461 mrs r3, cpsr 462 bic r2, r3, #(PSR_MODE) 463 orr r2, r2, #(PSR_UND32_MODE) 464 msr cpsr_c, r2 465 466 ldr sp, [r7, #(PCB_UND_SP)] 467 468 msr cpsr_c, r3 /* Restore the old mode */ 469 470 /* Restore the saved registers from the PCB */ 471 add r0, r7, #PCB_R11 472 ldmia r0, {r11-r13} 473 474 #ifdef ARMFPE 475 add r0, r1, #(USER_SIZE) & 0x00ff 476 add r0, r0, #(USER_SIZE) & 0xff00 477 bl _C_LABEL(arm_fpe_core_changecontext) 478 #endif 479 480 /* We can enable interrupts again */ 481 IRQenable 482 483 /* rem: r6 = new proc */ 484 /* rem: r7 = new PCB */ 485 486 /* 487 * Check for restartable atomic sequences (RAS). 488 */ 489 490 ldr r2, [r6, #(P_NRAS)] 491 ldr r4, [r7, #(PCB_TF)] /* r4 = trapframe (used below) */ 492 teq r2, #0 /* p->p_nras == 0? */ 493 bne .Lswitch_do_ras /* no, check for one */ 494 495 .Lswitch_return: 496 497 /* Get the spl level from the stack and update the current spl level */ 498 ldr r0, [sp], #0x0004 499 bl _C_LABEL(splx) 500 501 /* cpu_switch returns the proc it switched to. */ 502 mov r0, r6 503 504 /* 505 * Pull the registers that got pushed when either savectx() or 506 * cpu_switch() was called and return. 507 */ 508 ldmdb fp, {r4-r10, fp, sp, pc} 509 510 .Lswitch_do_ras: 511 ldr r1, [r4, #(TF_PC)] /* second ras_lookup() arg */ 512 mov r0, r6 /* first ras_lookup() arg */ 513 bl _C_LABEL(ras_lookup) 514 cmn r0, #1 /* -1 means "not in a RAS" */ 515 strne r0, [r4, #(TF_PC)] 516 b .Lswitch_return 517 518 .Lswitch_exited: 519 /* 520 * We skip the cache purge because switch_exit() already did 521 * it. Load up registers the way Lcs_cache_purge_skipped 522 * expects. Userspace access already blocked in switch_exit(). 523 */ 524 ldr r3, .Lblock_userspace_access 525 mov r2, #0x00000000 526 b .Lcs_cache_purge_skipped 527 528 /* 529 * void switch_exit(struct proc *p, struct proc *p0); 530 * Switch to proc0's saved context and deallocate the address space and kernel 531 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 532 */ 533 534 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 535 ENTRY(switch_exit) 536 /* Could create a stack frame, but we'll never return anyway. */ 537 538 mov r4, r0 /* r4 = p */ 539 mov r5, r1 /* r5 = p0 */ 540 541 /* In case we fault */ 542 ldr r0, .Lcurproc 543 mov r2, #0x00000000 544 str r2, [r0] 545 546 /* ldr r0, .Lcurpcb 547 str r2, [r0]*/ 548 549 /* 550 * Don't allow user space access between the purge and the switch. 551 */ 552 ldr r0, .Lblock_userspace_access 553 mov r2, #0x00000001 554 str r2, [r0] 555 556 /* Switch to proc0 context */ 557 558 ldr r0, .Lcpufuncs 559 mov lr, pc 560 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 561 562 IRQdisable 563 564 ldr r7, [r5, #(P_ADDR)] 565 ldr r0, [r7, #(PCB_PAGEDIR)] 566 567 /* Switch the memory to the new process */ 568 ldr r1, .Lcpufuncs 569 mov lr, pc 570 ldr pc, [r1, #CF_CONTEXT_SWITCH] 571 572 /* Restore all the save registers */ 573 add r0, r7, #PCB_R11 574 ldmia r0, {r11-r13} 575 576 /* This is not really needed ! */ 577 /* Yes it is for the su and fu routines */ 578 ldr r0, .Lcurpcb 579 str r2, [r0] 580 581 IRQenable 582 583 /* 584 * Schedule the vmspace and stack to be freed. 585 */ 586 mov r0, r4 /* exit2(p) */ 587 bl _C_LABEL(exit2) 588 589 /* Paranoia */ 590 ldr r1, .Lcurproc 591 mov r0, #0x00000000 592 str r0, [r1] 593 594 ldr r7, .Lwhichqs /* r7 = &whichqs */ 595 mov r8, #0x00000000 /* r8 = old proc = NULL */ 596 b .Lswitch_search 597 598 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 599 ENTRY(savectx) 600 /* 601 * r0 = pcb 602 */ 603 604 /* Push registers.*/ 605 mov ip, sp 606 stmfd sp!, {r4-r10, fp, ip, lr, pc} 607 sub fp, ip, #4 608 609 /* Store all the registers in the process's pcb */ 610 add r2, r0, #(PCB_R11) 611 stmia r2, {r11-r13} 612 613 /* Pull the regs of the stack */ 614 ldmdb fp, {r4-r10, fp, sp, pc} 615 616 ENTRY(proc_trampoline) 617 #ifdef MULTIPROCESSOR 618 bl _C_LABEL(proc_trampoline_mp) 619 #endif 620 mov r0, r5 621 mov r1, sp 622 mov lr, pc 623 mov pc, r4 624 625 /* Kill irq's */ 626 mrs r0, cpsr 627 orr r0, r0, #(I32_bit) 628 msr cpsr_c, r0 629 630 PULLFRAME 631 632 movs pc, lr /* Exit */ 633 634 .type .Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 635 .Lcpu_switch_ffs_table: 636 /* same as ffs table but all nums are -1 from that */ 637 /* 0 1 2 3 4 5 6 7 */ 638 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 639 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 640 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 641 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 642 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 643 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 644 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 645 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 646 647 /* End of cpuswitch.S */ 648
Indexes created Sat Oct 25 10:09:55 GMT 2025