cpuswitch.S revision 1.3.2.20
1 /* $NetBSD: cpuswitch.S,v 1.3.2.20 2002/08/19 21:39:00 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 48 #include "assym.h" 49 #include <machine/param.h> 50 #include <machine/cpu.h> 51 #include <machine/frame.h> 52 #include <machine/asm.h> 53 54 #undef IRQdisable 55 #undef IRQenable 56 57 /* 58 * New experimental definitions of IRQdisable and IRQenable 59 * These keep FIQ's enabled since FIQ's are special. 60 */ 61 62 #define IRQdisable \ 63 mrs r14, cpsr ; \ 64 orr r14, r14, #(I32_bit) ; \ 65 msr cpsr_c, r14 ; \ 66 67 #define IRQenable \ 68 mrs r14, cpsr ; \ 69 bic r14, r14, #(I32_bit) ; \ 70 msr cpsr_c, r14 ; \ 71 72 /* 73 * setrunqueue() and remrunqueue() 74 * 75 * Functions to add and remove a process for the run queue. 76 */ 77 78 .text 79 80 .Lwhichqs: 81 .word _C_LABEL(sched_whichqs) 82 83 .Lqs: 84 .word _C_LABEL(sched_qs) 85 86 /* 87 * On entry 88 * r0 = lwp 89 */ 90 91 ENTRY(setrunqueue) 92 /* 93 * Local register usage 94 * r0 = process 95 * r1 = queue 96 * r2 = &qs[queue] and temp 97 * r3 = temp 98 * r12 = whichqs 99 */ 100 #ifdef DIAGNOSTIC 101 ldr r1, [r0, #(L_BACK)] 102 teq r1, #0x00000000 103 bne .Lsetrunqueue_erg 104 105 ldr r1, [r0, #(L_WCHAN)] 106 teq r1, #0x00000000 107 bne .Lsetrunqueue_erg 108 #endif 109 110 /* Get the priority of the queue */ 111 ldrb r1, [r0, #(L_PRIORITY)] 112 113 /* Indicate that there is a process on this queue */ 114 ldr r12, .Lwhichqs 115 mov r1, r1, lsr #2 116 ldr r2, [r12] 117 mov r3, #0x00000001 118 mov r3, r3, lsl r1 119 orr r2, r2, r3 120 str r2, [r12] 121 122 /* Get the address of the queue */ 123 ldr r2, .Lqs 124 add r1, r2, r1, lsl # 3 125 126 /* Hook the process in */ 127 str r1, [r0, #(L_FORW)] 128 ldr r2, [r1, #(L_BACK)] 129 130 str r0, [r1, #(L_BACK)] 131 #ifdef DIAGNOSTIC 132 teq r2, #0x00000000 133 beq .Lsetrunqueue_erg 134 #endif 135 str r0, [r2, #(L_FORW)] 136 str r2, [r0, #(L_BACK)] 137 138 mov pc, lr 139 140 #ifdef DIAGNOSTIC 141 .Lsetrunqueue_erg: 142 mov r2, r1 143 mov r1, r0 144 add r0, pc, #Ltext1 - . - 8 145 bl _C_LABEL(printf) 146 147 ldr r2, .Lqs 148 ldr r1, [r2] 149 add r0, pc, #Ltext2 - . - 8 150 b _C_LABEL(panic) 151 152 Ltext1: 153 .asciz "setrunqueue : %08x %08x\n" 154 Ltext2: 155 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 156 .align 0 157 #endif 158 159 /* 160 * On entry 161 * r0 = lwp 162 */ 163 164 ENTRY(remrunqueue) 165 /* 166 * Local register usage 167 * r0 = oldproc 168 * r1 = queue 169 * r2 = &qs[queue] and scratch 170 * r3 = scratch 171 * r12 = whichqs 172 */ 173 174 /* Get the priority of the queue */ 175 ldrb r1, [r0, #(L_PRIORITY)] 176 mov r1, r1, lsr #2 177 178 /* Unhook the process */ 179 ldr r2, [r0, #(L_FORW)] 180 ldr r3, [r0, #(L_BACK)] 181 182 str r3, [r2, #(L_BACK)] 183 str r2, [r3, #(L_FORW)] 184 185 /* If the queue is now empty clear the queue not empty flag */ 186 teq r2, r3 187 188 /* This could be reworked to avoid the use of r4 */ 189 ldreq r12, .Lwhichqs 190 moveq r3, #0x00000001 191 ldreq r2, [r12] 192 moveq r3, r3, lsl r1 193 biceq r2, r2, r3 194 streq r2, [r12] 195 196 /* Remove the back pointer for the process */ 197 mov r1, #0x00000000 198 str r1, [r0, #(L_BACK)] 199 200 mov pc, lr 201 202 203 /* 204 * cpuswitch() 205 * 206 * preforms a process context switch. 207 * This function has several entry points 208 */ 209 210 .Lcurlwp: 211 .word _C_LABEL(curlwp) 212 213 .Lcurpcb: 214 .word _C_LABEL(curpcb) 215 216 .Lwant_resched: 217 .word _C_LABEL(want_resched) 218 219 .Lcpufuncs: 220 .word _C_LABEL(cpufuncs) 221 222 .data 223 .global _C_LABEL(curpcb) 224 _C_LABEL(curpcb): 225 .word 0x00000000 226 .text 227 228 .Lblock_userspace_access: 229 .word _C_LABEL(block_userspace_access) 230 231 .Lcpu_do_powersave: 232 .word _C_LABEL(cpu_do_powersave) 233 234 /* 235 * Idle loop, exercised while waiting for a process to wake up. 236 * 237 * NOTE: When we jump back to .Lswitch_search, we must have a 238 * pointer to whichqs in r7, which is what it is when we arrive 239 * here. 240 */ 241 /* LINTSTUB: Ignore */ 242 ASENTRY_NP(idle) 243 #if defined(LOCKDEBUG) 244 bl _C_LABEL(sched_unlock_idle) 245 #endif 246 ldr r3, .Lcpu_do_powersave 247 248 /* Enable interrupts */ 249 IRQenable 250 251 /* If we don't want to sleep, use a simpler loop. */ 252 ldr r3, [r3] /* r3 = cpu_do_powersave */ 253 teq r3, #0 254 bne 2f 255 256 /* Non-powersave idle. */ 257 1: /* should maybe do uvm pageidlezero stuff here */ 258 ldr r3, [r7] /* r3 = whichqs */ 259 teq r3, #0x00000000 260 bne .Lswitch_search 261 b 1b 262 263 2: /* Powersave idle. */ 264 ldr r4, .Lcpufuncs 265 3: ldr r3, [r7] /* r3 = whichqs */ 266 teq r3, #0x00000000 267 bne .Lswitch_search 268 269 /* if saving power, don't want to pageidlezero */ 270 mov r0, #0 271 add lr, pc, #3b - . - 8 272 ldr pc, [r4, #(CF_SLEEP)] 273 /* loops back around */ 274 275 276 /* 277 * Find a new lwp to run, save the current context and 278 * load the new context 279 * 280 * Arguments: 281 * r0 'struct lwp *' of the current LWP 282 */ 283 284 ENTRY(cpu_switch) 285 /* 286 * Local register usage. Some of these registers are out of date. 287 * r1 = oldlwp 288 * r2 = spl level 289 * r3 = whichqs 290 * r4 = queue 291 * r5 = &qs[queue] 292 * r6 = newlwp 293 * r7 = scratch 294 */ 295 stmfd sp!, {r4-r7, lr} 296 297 /* 298 * Get the current lwp and indicate that there is no longer 299 * a valid process (curlwp = 0). Zero the current PCB pointer 300 * while we're at it. 301 */ 302 ldr r7, .Lcurlwp 303 ldr r6, .Lcurpcb 304 mov r0, #0x00000000 305 ldr r1, [r7] /* r1 = curproc */ 306 str r0, [r7] /* curproc = NULL */ 307 str r0, [r6] /* curpcb = NULL */ 308 309 /* stash the old proc while we call functions */ 310 mov r5, r1 311 312 #if defined(LOCKDEBUG) 313 /* release the sched_lock before handling interrupts */ 314 bl _C_LABEL(sched_unlock_idle) 315 #endif 316 317 /* Lower the spl level to spl0 and get the current spl level. */ 318 #ifdef __NEWINTR 319 mov r0, #(IPL_NONE) 320 bl _C_LABEL(_spllower) 321 #else /* ! __NEWINTR */ 322 #ifdef spl0 323 mov r0, #(_SPL_0) 324 bl _C_LABEL(splx) 325 #else 326 bl _C_LABEL(spl0) 327 #endif /* spl0 */ 328 #endif /* __NEWINTR */ 329 330 /* Push the old spl level onto the stack */ 331 str r0, [sp, #-0x0004]! 332 333 /* First phase : find a new lwp */ 334 335 ldr r7, .Lwhichqs 336 337 /* rem: r5 = old lwp */ 338 /* rem: r7 = &whichqs */ 339 340 .Lswitch_search: 341 IRQdisable 342 #if defined(LOCKDEBUG) 343 bl _C_LABEL(sched_lock_idle) 344 #endif 345 346 /* Do we have any active queues */ 347 ldr r3, [r7] 348 349 /* If not we must idle until we do. */ 350 teq r3, #0x00000000 351 beq _ASM_LABEL(idle) 352 353 /* put old proc back in r1 */ 354 mov r1, r5 355 356 /* rem: r1 = old lwp */ 357 /* rem: r3 = whichqs */ 358 /* rem: interrupts are disabled */ 359 360 /* 361 * We have found an active queue. Currently we do not know which queue 362 * is active just that one of them is. 363 */ 364 /* this is the ffs algorithm devised by d.seal and posted to 365 * comp.sys.arm on 16 Feb 1994. 366 */ 367 rsb r5, r3, #0 368 ands r0, r3, r5 369 370 adr r5, .Lcpu_switch_ffs_table 371 372 /* X = R0 */ 373 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 374 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 375 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 376 377 /* used further down, saves SA stall */ 378 ldr r6, .Lqs 379 380 /* now lookup in table indexed on top 6 bits of a4 */ 381 ldrb r4, [ r5, r4, lsr #26 ] 382 383 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 384 /* rem: r1 = old lwp */ 385 /* rem: r3 = whichqs */ 386 /* rem: r4 = queue number */ 387 /* rem: interrupts are disabled */ 388 389 /* Get the address of the queue (&qs[queue]) */ 390 add r5, r6, r4, lsl #3 391 392 /* 393 * Get the lwp from the queue and place the next process in 394 * the queue at the head. This basically unlinks the lwp at 395 * the head of the queue. 396 */ 397 ldr r6, [r5, #(L_FORW)] 398 399 /* rem: r6 = new lwp */ 400 ldr r7, [r6, #(L_FORW)] 401 str r7, [r5, #(L_FORW)] 402 403 /* 404 * Test to see if the queue is now empty. If the head of the queue 405 * points to the queue itself then there are no more lwps in 406 * the queue. We can therefore clear the queue not empty flag held 407 * in r3. 408 */ 409 410 teq r5, r7 411 biceq r3, r3, r0 412 413 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 414 415 /* Fix the back pointer for the lwp now at the head of the queue. */ 416 ldr r0, [r6, #(L_BACK)] 417 str r0, [r7, #(L_BACK)] 418 419 /* Update the RAM copy of the queue not empty flags word. */ 420 ldr r7, .Lwhichqs 421 str r3, [r7] 422 423 /* rem: r1 = old lwp */ 424 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 425 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 426 /* rem: r6 = new lwp */ 427 /* rem: interrupts are disabled */ 428 429 /* Clear the want_resched flag */ 430 ldr r7, .Lwant_resched 431 mov r0, #0x00000000 432 str r0, [r7] 433 434 /* 435 * Clear the back pointer of the lwp we have removed from 436 * the head of the queue. The new lwp is isolated now. 437 */ 438 str r0, [r6, #(L_BACK)] 439 440 #if defined(LOCKDEBUG) 441 /* 442 * unlock the sched_lock, but leave interrupts off, for now. 443 */ 444 mov r7, r1 445 bl _C_LABEL(sched_unlock_idle) 446 mov r1, r7 447 #endif 448 449 .Lswitch_resume: 450 /* l->l_cpu initialized in fork1() for single-processor */ 451 452 /* Process is now on a processor. */ 453 mov r0, #LSONPROC /* l->l_stat = LSONPROC */ 454 str r0, [r6, #(L_STAT)] 455 456 /* We have a new curlwp now so make a note it */ 457 ldr r7, .Lcurlwp 458 str r6, [r7] 459 460 /* Hook in a new pcb */ 461 ldr r7, .Lcurpcb 462 ldr r0, [r6, #(L_ADDR)] 463 str r0, [r7] 464 465 /* At this point we can allow IRQ's again. */ 466 IRQenable 467 468 /* rem: r1 = old lwp */ 469 /* rem: r4 = return value */ 470 /* rem: r6 = new process */ 471 /* rem: interrupts are enabled */ 472 473 /* 474 * If the new process is the same as the process that called 475 * cpu_switch() then we do not need to save and restore any 476 * contexts. This means we can make a quick exit. 477 * The test is simple if curlwp on entry (now in r1) is the 478 * same as the proc removed from the queue we can jump to the exit. 479 */ 480 teq r1, r6 481 moveq r4, #0x00000000 /* default to "didn't switch" */ 482 beq .Lswitch_return 483 484 /* 485 * At this point, we are guaranteed to be switching to 486 * a new lwp. 487 */ 488 mov r4, #0x00000001 489 490 /* Remember the old lwp in r0 */ 491 mov r0, r1 492 493 /* 494 * If the old lwp on entry to cpu_switch was zero then the 495 * process that called it was exiting. This means that we do 496 * not need to save the current context. Instead we can jump 497 * straight to restoring the context for the new process. 498 */ 499 teq r0, #0x00000000 500 beq .Lswitch_exited 501 502 /* rem: r0 = old lwp */ 503 /* rem: r4 = return value */ 504 /* rem: r6 = new process */ 505 /* rem: interrupts are enabled */ 506 507 /* Stage two : Save old context */ 508 509 /* Get the user structure for the old lwp. */ 510 ldr r1, [r0, #(L_ADDR)] 511 512 /* Save all the registers in the old lwp's pcb */ 513 add r7, r1, #(PCB_R8) 514 stmia r7, {r8-r13} 515 516 /* 517 * This can be optimised... We know we want to go from SVC32 518 * mode to UND32 mode 519 */ 520 mrs r3, cpsr 521 bic r2, r3, #(PSR_MODE) 522 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 523 msr cpsr_c, r2 524 525 str sp, [r1, #(PCB_UND_SP)] 526 527 msr cpsr_c, r3 /* Restore the old mode */ 528 529 /* rem: r0 = old lwp */ 530 /* rem: r1 = old pcb */ 531 /* rem: r4 = return value */ 532 /* rem: r6 = new process */ 533 /* rem: interrupts are enabled */ 534 535 /* What else needs to be saved Only FPA stuff when that is supported */ 536 537 /* r1 now free! */ 538 539 /* Third phase : restore saved context */ 540 541 /* rem: r0 = old lwp */ 542 /* rem: r4 = return value */ 543 /* rem: r6 = new lwp */ 544 /* rem: interrupts are enabled */ 545 546 /* 547 * Don't allow user space access between the purge and the switch. 548 */ 549 ldr r3, .Lblock_userspace_access 550 mov r1, #0x00000001 551 mov r2, #0x00000000 552 str r1, [r3] 553 554 stmfd sp!, {r0-r3} 555 ldr r1, .Lcpufuncs 556 add lr, pc, #.Lcs_cache_purged - . - 8 557 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 558 559 .Lcs_cache_purged: 560 ldmfd sp!, {r0-r3} 561 562 .Lcs_cache_purge_skipped: 563 /* At this point we need to kill IRQ's again. */ 564 IRQdisable 565 566 /* 567 * Interrupts are disabled so we can allow user space accesses again 568 * as none will occur until interrupts are re-enabled after the 569 * switch. 570 */ 571 str r2, [r3] 572 573 /* Get the user structure for the new process in r1 */ 574 ldr r1, [r6, #(L_ADDR)] 575 576 /* Get the pagedir physical address for the process. */ 577 ldr r0, [r1, #(PCB_PAGEDIR)] 578 579 /* Switch the memory to the new process */ 580 ldr r3, .Lcpufuncs 581 add lr, pc, #.Lcs_context_switched - . - 8 582 ldr pc, [r3, #CF_CONTEXT_SWITCH] 583 584 .Lcs_context_switched: 585 /* 586 * This can be optimised... We know we want to go from SVC32 587 * mode to UND32 mode 588 */ 589 mrs r3, cpsr 590 bic r2, r3, #(PSR_MODE) 591 orr r2, r2, #(PSR_UND32_MODE) 592 msr cpsr_c, r2 593 594 ldr sp, [r1, #(PCB_UND_SP)] 595 596 msr cpsr_c, r3 /* Restore the old mode */ 597 598 /* Restore all the save registers */ 599 add r7, r1, #PCB_R8 600 ldmia r7, {r8-r13} 601 602 #ifdef ARMFPE 603 add r0, r1, #(USER_SIZE) & 0x00ff 604 add r0, r0, #(USER_SIZE) & 0xff00 605 bl _C_LABEL(arm_fpe_core_changecontext) 606 #endif 607 608 /* We can enable interrupts again */ 609 IRQenable 610 611 .Lswitch_return: 612 613 /* Get the spl level from the stack and update the current spl level */ 614 ldr r0, [sp], #0x0004 615 bl _C_LABEL(splx) 616 617 /* cpu_switch returns 1 == switched, 0 == didn't switch */ 618 mov r0, r4 619 620 /* 621 * Pull the registers that got pushed when either savectx() or 622 * cpu_switch() was called and return. 623 */ 624 ldmfd sp!, {r4-r7, pc} 625 626 .Lswitch_exited: 627 /* 628 * We skip the cache purge because switch_exit()/switch_lwp_exit() 629 * already did it. Load up registers the way .Lcs_cache_purge_skipped 630 * expects. Userpsace access already blocked by switch_exit()/ 631 * switch_lwp_exit(). 632 */ 633 ldr r3, .Lblock_userspace_access 634 mov r2, #0x00000000 635 b .Lcs_cache_purge_skipped 636 637 /* 638 * cpu_preempt(struct lwp *current, struct lwp *next) 639 * Switch to the specified next LWP 640 * Arguments: 641 * 642 * r0 'struct lwp *' of the current LWP 643 * r1 'struct lwp *' of the LWP to switch to 644 */ 645 ENTRY(cpu_preempt) 646 stmfd sp!, {r4-r7, lr} 647 648 /* Lower the spl level to spl0 and get the current spl level. */ 649 mov r6, r0 /* save old lwp */ 650 mov r5, r1 /* save new lwp */ 651 652 #if defined(LOCKDEBUG) 653 /* release the sched_lock before handling interrupts */ 654 bl _C_LABEL(sched_unlock_idle) 655 #endif 656 657 #ifdef __NEWINTR 658 mov r0, #(IPL_NONE) 659 bl _C_LABEL(_spllower) 660 #else /* ! __NEWINTR */ 661 #ifdef spl0 662 mov r0, #(_SPL_0) 663 bl _C_LABEL(splx) 664 #else 665 bl _C_LABEL(spl0) 666 #endif /* spl0 */ 667 #endif /* __NEWINTR */ 668 669 /* Push the old spl level onto the stack */ 670 str r0, [sp, #-0x0004]! 671 672 IRQdisable 673 #if defined(LOCKDEBUG) 674 bl _C_LABEL(sched_lock_idle) 675 #endif 676 677 /* Do we have any active queues? */ 678 ldr r7, .Lwhichqs 679 ldr r3, [r7] 680 681 /* If none, panic! */ 682 teq r3, #0x00000000 683 beq .Lpreempt_noqueues 684 685 mov r0, r6 /* restore old lwp */ 686 mov r1, r5 /* restore new lwp */ 687 688 /* rem: r0 = old lwp */ 689 /* rem: r1 = new lwp */ 690 /* rem: r3 = whichqs */ 691 /* rem: r7 = &whichqs */ 692 /* rem: interrupts are disabled */ 693 694 /* Compute the queue bit corresponding to the new lwp. */ 695 ldrb r4, [r1, #(L_PRIORITY)] 696 mov r2, #0x00000001 697 mov r4, r4, lsr #2 /* queue number */ 698 mov r2, r2, lsl r4 /* queue bit */ 699 700 /* rem: r0 = old lwp */ 701 /* rem: r1 = new lwp */ 702 /* rem: r2 = queue bit */ 703 /* rem: r3 = whichqs */ 704 /* rem: r4 = queue number */ 705 /* rem: r7 = &whichqs */ 706 707 /* 708 * Unlink the lwp from the queue. 709 */ 710 ldr r5, [r1, #(L_BACK)] /* r5 = l->l_back */ 711 mov r6, #0x00000000 712 str r6, [r1, #(L_BACK)] /* firewall: l->l_back = NULL */ 713 ldr r6, [r1, #(L_FORW)] /* r6 = l->l_forw */ 714 str r5, [r6, #(L_BACK)] /* r6->l_back = r5 */ 715 str r6, [r5, #(L_FORW)] /* r5->l_forw = r6 */ 716 717 teq r5, r6 /* see if queue is empty */ 718 biceq r3, r3, r2 /* clear bit if so */ 719 streq r3, [r7] /* store it back if so */ 720 721 /* rem: r2 (queue bit) now free */ 722 /* rem: r3 (whichqs) now free */ 723 /* rem: r7 (&whichqs) now free */ 724 725 /* 726 * Okay, set up registers the way cpu_switch() wants them, 727 * and jump into the middle of it (where we bring up the 728 * new process). 729 */ 730 mov r6, r1 /* r6 = new lwp */ 731 #if defined(LOCKDEBUG) 732 mov r5, r0 /* preserve old lwp */ 733 bl _C_LABEL(sched_unlock_idle) 734 mov r1, r5 /* r1 = old lwp */ 735 #else 736 mov r1, r0 /* r1 = old lwp */ 737 #endif 738 b .Lswitch_resume 739 740 .Lpreempt_noqueues: 741 add r0, pc, #.Lpreemptpanic - . - 8 742 bl _C_LABEL(panic) 743 744 .Lpreemptpanic: 745 .asciz "cpu_preempt: whichqs empty" 746 .align 0 747 748 /* 749 * void switch_exit(struct lwp *l, struct lwp *l0); 750 * Switch to lwp0's saved context and deallocate the address space and kernel 751 * stack for l. Then jump into cpu_switch(), as if we were in lwp0 all along. 752 */ 753 754 /* LINTSTUB: Func: void switch_exit(struct lwp *l, struct lwp *l0) */ 755 ENTRY(switch_exit) 756 /* 757 * r0 = lwp 758 * r1 = lwp0 759 */ 760 761 mov r3, r0 762 763 /* In case we fault */ 764 ldr r0, .Lcurlwp 765 mov r2, #0x00000000 766 str r2, [r0] 767 768 /* ldr r0, .Lcurpcb 769 str r2, [r0]*/ 770 771 /* 772 * Don't allow user space access between the purge and the switch. 773 */ 774 ldr r0, .Lblock_userspace_access 775 mov r2, #0x00000001 776 str r2, [r0] 777 778 /* Switch to lwp0 context */ 779 780 stmfd sp!, {r0-r3} 781 782 ldr r0, .Lcpufuncs 783 add lr, pc, #.Lse_cache_purged - . - 8 784 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 785 786 .Lse_cache_purged: 787 ldmfd sp!, {r0-r3} 788 789 IRQdisable 790 791 ldr r2, [r1, #(L_ADDR)] 792 ldr r0, [r2, #(PCB_PAGEDIR)] 793 794 /* Switch the memory to the new process */ 795 ldr r4, .Lcpufuncs 796 add lr, pc, #.Lse_context_switched - . - 8 797 ldr pc, [r4, #CF_CONTEXT_SWITCH] 798 799 .Lse_context_switched: 800 /* Restore all the save registers */ 801 add r7, r2, #PCB_R8 802 ldmia r7, {r8-r13} 803 804 /* This is not really needed ! */ 805 /* Yes it is for the su and fu routines */ 806 ldr r0, .Lcurpcb 807 str r2, [r0] 808 809 IRQenable 810 811 /* str r3, [sp, #-0x0004]!*/ 812 813 /* 814 * Schedule the vmspace and stack to be freed. 815 */ 816 mov r0, r3 /* exit2(l) */ 817 bl _C_LABEL(exit2) 818 819 /* Paranoia */ 820 mov r0, #0x00000000 821 ldr r1, .Lcurlwp 822 str r0, [r1] 823 824 ldr r7, .Lwhichqs /* r7 = &whichqs */ 825 mov r5, #0x00000000 /* r5 = old lwp = NULL */ 826 b .Lswitch_search 827 828 /* 829 * void switch_lwp_exit(struct lwp *l, struct lwp *l0); 830 * Switch to lwp0's saved context and deallocate the address space and kernel 831 * stack for l. Then jump into cpu_switch(), as if we were in lwp0 all along. 832 */ 833 834 /* LINTSTUB: Func: void switch_exit(struct lwp *l, struct lwp *l0) */ 835 ENTRY(switch_lwp_exit) 836 /* 837 * r0 = lwp 838 * r1 = lwp0 839 */ 840 841 mov r3, r0 842 843 /* In case we fault */ 844 mov r2, #0x00000000 845 ldr r0, .Lcurlwp 846 str r2, [r0] 847 848 /* ldr r0, .Lcurpcb 849 str r2, [r0]*/ 850 851 /* 852 * Don't allow user space access between the purge and the switch. 853 */ 854 ldr r0, .Lblock_userspace_access 855 mov r2, #0x00000001 856 str r2, [r0] 857 858 /* Switch to lwp0 context */ 859 860 stmfd sp!, {r0-r3} 861 862 ldr r0, .Lcpufuncs 863 add lr, pc, #.Lsle_cache_purged - . - 8 864 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 865 866 .Lsle_cache_purged: 867 ldmfd sp!, {r0-r3} 868 869 IRQdisable 870 871 ldr r2, [r1, #(L_ADDR)] 872 ldr r0, [r2, #(PCB_PAGEDIR)] 873 874 /* Switch the memory to the new process */ 875 ldr r4, .Lcpufuncs 876 add lr, pc, #.Lsle_context_switched - . - 8 877 ldr pc, [r4, #CF_CONTEXT_SWITCH] 878 879 .Lsle_context_switched: 880 /* Restore all the save registers */ 881 add r7, r2, #PCB_R8 882 ldmia r7, {r8-r13} 883 884 /* This is not really needed ! */ 885 /* Yes it is for the su and fu routines */ 886 ldr r0, .Lcurpcb 887 str r2, [r0] 888 889 IRQenable 890 891 /* str r3, [sp, #-0x0004]!*/ 892 893 /* 894 * Schedule the vmspace and stack to be freed. 895 */ 896 mov r0, r3 /* lwp_exit2(l) */ 897 bl _C_LABEL(lwp_exit2) 898 899 /* Paranoia */ 900 ldr r1, .Lcurlwp 901 mov r0, #0x00000000 902 str r0, [r1] 903 904 ldr r7, .Lwhichqs /* r7 = &whichqs */ 905 mov r5, #0x00000000 /* r5 = old lwp = NULL */ 906 b .Lswitch_search 907 908 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 909 ENTRY(savectx) 910 /* 911 * r0 = pcb 912 */ 913 914 /* Push registers.*/ 915 stmfd sp!, {r4-r7, lr} 916 917 /* Store all the registers in the process's pcb */ 918 add r2, r0, #(PCB_R8) 919 stmia r2, {r8-r13} 920 921 /* Pull the regs of the stack */ 922 ldmfd sp!, {r4-r7, pc} 923 924 ENTRY(proc_trampoline) 925 add lr, pc, #(.Ltrampoline_return - . - 8) 926 mov r0, r5 927 mov r1, sp 928 mov pc, r4 929 930 .Ltrampoline_return: 931 /* Kill irq's */ 932 mrs r0, cpsr 933 orr r0, r0, #(I32_bit) 934 msr cpsr_c, r0 935 936 PULLFRAME 937 938 movs pc, lr /* Exit */ 939 940 .type .Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 941 .Lcpu_switch_ffs_table: 942 /* same as ffs table but all nums are -1 from that */ 943 /* 0 1 2 3 4 5 6 7 */ 944 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 945 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 946 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 947 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 948 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 949 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 950 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 951 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 952
Indexes created Sat Oct 25 10:09:55 GMT 2025