cpuswitch.S revision 1.5
1 /* $NetBSD: cpuswitch.S,v 1.5 2001/11/29 17:14:02 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 48 #include "assym.h" 49 #include <machine/param.h> 50 #include <machine/cpu.h> 51 #include <machine/frame.h> 52 #include <machine/asm.h> 53 54 #undef IRQdisable 55 #undef IRQenable 56 57 /* 58 * New experimental definitions of IRQdisable and IRQenable 59 * These keep FIQ's enabled since FIQ's are special. 60 */ 61 62 #define IRQdisable \ 63 mrs r14, cpsr_all ; \ 64 orr r14, r14, #(I32_bit) ; \ 65 msr cpsr_all, r14 ; \ 66 67 #define IRQenable \ 68 mrs r14, cpsr_all ; \ 69 bic r14, r14, #(I32_bit) ; \ 70 msr cpsr_all, r14 ; \ 71 72 /* 73 * setrunqueue() and remrunqueue() 74 * 75 * Functions to add and remove a process for the run queue. 76 */ 77 78 .text 79 80 Lwhichqs: 81 .word _C_LABEL(sched_whichqs) 82 83 Lqs: 84 .word _C_LABEL(sched_qs) 85 86 /* 87 * On entry 88 * r0 = process 89 */ 90 91 ENTRY(setrunqueue) 92 /* 93 * Local register usage 94 * r0 = process 95 * r1 = queue 96 * r2 = &qs[queue] and temp 97 * r3 = temp 98 * r12 = whichqs 99 */ 100 #ifdef DIAGNOSTIC 101 ldr r1, [r0, #(P_BACK)] 102 teq r1, #0x00000000 103 bne Lsetrunqueue_erg 104 105 ldr r1, [r0, #(P_WCHAN)] 106 teq r1, #0x00000000 107 bne Lsetrunqueue_erg 108 #endif 109 110 /* Get the priority of the queue */ 111 ldrb r1, [r0, #(P_PRIORITY)] 112 mov r1, r1, lsr #2 113 114 /* Indicate that there is a process on this queue */ 115 ldr r12, Lwhichqs 116 ldr r2, [r12] 117 mov r3, #0x00000001 118 mov r3, r3, lsl r1 119 orr r2, r2, r3 120 str r2, [r12] 121 122 /* Get the address of the queue */ 123 ldr r2, Lqs 124 add r1, r2, r1, lsl # 3 125 126 /* Hook the process in */ 127 str r1, [r0, #(P_FORW)] 128 ldr r2, [r1, #(P_BACK)] 129 130 str r0, [r1, #(P_BACK)] 131 #ifdef DIAGNOSTIC 132 teq r2, #0x00000000 133 beq Lsetrunqueue_erg 134 #endif 135 str r0, [r2, #(P_FORW)] 136 str r2, [r0, #(P_BACK)] 137 138 mov pc, lr 139 140 #ifdef DIAGNOSTIC 141 Lsetrunqueue_erg: 142 mov r2, r1 143 mov r1, r0 144 add r0, pc, #Ltext1 - . - 8 145 bl _C_LABEL(printf) 146 147 ldr r2, Lqs 148 ldr r1, [r2] 149 add r0, pc, #Ltext2 - . - 8 150 b _C_LABEL(panic) 151 152 Ltext1: 153 .asciz "setrunqueue : %08x %08x\n" 154 Ltext2: 155 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 156 .align 0 157 #endif 158 159 /* 160 * On entry 161 * r0 = process 162 */ 163 164 ENTRY(remrunqueue) 165 /* 166 * Local register usage 167 * r0 = oldproc 168 * r1 = queue 169 * r2 = &qs[queue] and scratch 170 * r3 = scratch 171 * r12 = whichqs 172 */ 173 174 /* Get the priority of the queue */ 175 ldrb r1, [r0, #(P_PRIORITY)] 176 mov r1, r1, lsr #2 177 178 /* Unhook the process */ 179 ldr r2, [r0, #(P_FORW)] 180 ldr r3, [r0, #(P_BACK)] 181 182 str r3, [r2, #(P_BACK)] 183 str r2, [r3, #(P_FORW)] 184 185 /* If the queue is now empty clear the queue not empty flag */ 186 teq r2, r3 187 188 /* This could be reworked to avoid the use of r4 */ 189 ldreq r12, Lwhichqs 190 ldreq r2, [r12] 191 moveq r3, #0x00000001 192 moveq r3, r3, lsl r1 193 biceq r2, r2, r3 194 streq r2, [r12] 195 196 /* Remove the back pointer for the process */ 197 mov r1, #0x00000000 198 str r1, [r0, #(P_BACK)] 199 200 mov pc, lr 201 202 203 /* 204 * cpuswitch() 205 * 206 * preforms a process context switch. 207 * This function has several entry points 208 */ 209 210 Lcurproc: 211 .word _C_LABEL(curproc) 212 213 Lcurpcb: 214 .word _C_LABEL(curpcb) 215 216 Lwant_resched: 217 .word _C_LABEL(want_resched) 218 219 Lcpufuncs: 220 .word _C_LABEL(cpufuncs) 221 222 .data 223 .global _C_LABEL(curpcb) 224 _C_LABEL(curpcb): 225 .word 0x00000000 226 .text 227 228 Lblock_userspace_access: 229 .word _C_LABEL(block_userspace_access) 230 231 /* 232 * Idle loop, exercised while waiting for a process to wake up. 233 */ 234 ASENTRY_NP(idle) 235 /* Enable interrupts */ 236 IRQenable 237 238 /* XXX - r1 needs to be preserved for cpu_switch */ 239 mov r7, r1 240 ldr r3, Lcpufuncs 241 mov r0, #0 242 add lr, pc, #Lidle_slept - . - 8 243 ldr pc, [r3, #CF_SLEEP] 244 245 Lidle_slept: 246 mov r1, r7 247 248 /* Disable interrupts while we check for an active queue */ 249 IRQdisable 250 ldr r7, Lwhichqs 251 ldr r3, [r7] 252 teq r3, #0x00000000 253 bne sw1 254 255 /* All processes are still asleep so idle a while longer */ 256 b _ASM_LABEL(idle) 257 258 259 /* 260 * Find a new process to run, save the current context and 261 * load the new context 262 */ 263 264 ENTRY(cpu_switch) 265 /* 266 * Local register usage. Some of these registers are out of date. 267 * r1 = oldproc 268 * r2 = spl level 269 * r3 = whichqs 270 * r4 = queue 271 * r5 = &qs[queue] 272 * r6 = newproc 273 * r7 = scratch 274 */ 275 stmfd sp!, {r4-r7, lr} 276 277 /* 278 * Get the current process and indicate that there is no longer 279 * a valid process (curproc = 0) 280 */ 281 ldr r7, Lcurproc 282 ldr r1, [r7] 283 mov r0, #0x00000000 284 str r0, [r7] 285 286 /* Zero the pcb */ 287 ldr r7, Lcurpcb 288 str r0, [r7] 289 290 /* Lower the spl level to spl0 and get the current spl level. */ 291 mov r7, r1 292 293 #ifdef __NEWINTR 294 mov r0, #(IPL_NONE) 295 bl _C_LABEL(_spllower) 296 #else /* ! __NEWINTR */ 297 #ifdef spl0 298 mov r0, #(_SPL_0) 299 bl _C_LABEL(splx) 300 #else 301 bl _C_LABEL(spl0) 302 #endif /* spl0 */ 303 #endif /* __NEWINTR */ 304 305 /* Push the old spl level onto the stack */ 306 str r0, [sp, #-0x0004]! 307 308 mov r1, r7 309 310 /* First phase : find a new process */ 311 312 /* rem: r1 = old proc */ 313 314 switch_search: 315 IRQdisable 316 317 /* Do we have any active queues */ 318 ldr r7, Lwhichqs 319 ldr r3, [r7] 320 321 /* If not we must idle until we do. */ 322 teq r3, #0x00000000 323 beq _ASM_LABEL(idle) 324 325 sw1: 326 /* rem: r1 = old proc */ 327 /* rem: r3 = whichqs */ 328 /* rem: interrupts are disabled */ 329 330 /* 331 * We have found an active queue. Currently we do not know which queue 332 * is active just that one of them is. 333 */ 334 /* this is the ffs algorithm devised by d.seal and posted to 335 * comp.sys.arm on 16 Feb 1994. 336 */ 337 rsb r5, r3, #0 338 ands r0, r3, r5 339 340 adr r5, Lcpu_switch_ffs_table 341 342 /* X = R0 */ 343 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 344 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 345 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 346 347 /* used further down, saves SA stall */ 348 ldr r6, Lqs 349 350 /* now lookup in table indexed on top 6 bits of a4 */ 351 ldrb r4, [ r5, r4, lsr #26 ] 352 353 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 354 /* rem: r1 = old proc */ 355 /* rem: r3 = whichqs */ 356 /* rem: r4 = queue number */ 357 /* rem: interrupts are disabled */ 358 359 /* Get the address of the queue (&qs[queue]) */ 360 add r5, r6, r4, lsl #3 361 362 /* 363 * Get the process from the queue and place the next process in 364 * the queue at the head. This basically unlinks the process at 365 * the head of the queue. 366 */ 367 ldr r6, [r5, #(P_FORW)] 368 369 /* rem: r6 = new process */ 370 ldr r7, [r6, #(P_FORW)] 371 str r7, [r5, #(P_FORW)] 372 373 /* 374 * Test to see if the queue is now empty. If the head of the queue 375 * points to the queue itself then there are no more processes in 376 * the queue. We can therefore clear the queue not empty flag held 377 * in r3. 378 */ 379 380 teq r5, r7 381 biceq r3, r3, r0 382 383 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 384 385 /* Fix the back pointer for the process now at the head of the queue. */ 386 ldr r0, [r6, #(P_BACK)] 387 str r0, [r7, #(P_BACK)] 388 389 /* Update the RAM copy of the queue not empty flags word. */ 390 ldr r7, Lwhichqs 391 str r3, [r7] 392 393 /* rem: r1 = old proc */ 394 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 395 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 396 /* rem: r6 = new process */ 397 /* rem: interrupts are disabled */ 398 399 /* Clear the want_resched flag */ 400 ldr r7, Lwant_resched 401 mov r0, #0x00000000 402 str r0, [r7] 403 404 /* 405 * Clear the back pointer of the process we have removed from 406 * the head of the queue. The new process is isolated now. 407 */ 408 str r0, [r6, #(P_BACK)] 409 410 /* p->p_cpu initialized in fork1() for single-processor */ 411 412 /* Process is now on a processor. */ 413 mov r0, #SONPROC /* p->p_stat = SONPROC */ 414 strb r0, [r6, #(P_STAT)] 415 416 /* We have a new curproc now so make a note it */ 417 ldr r7, Lcurproc 418 str r6, [r7] 419 420 /* Hook in a new pcb */ 421 ldr r7, Lcurpcb 422 ldr r0, [r6, #(P_ADDR)] 423 str r0, [r7] 424 425 /* At this point we can allow IRQ's again. */ 426 IRQenable 427 428 /* rem: r1 = old proc */ 429 /* rem: r6 = new process */ 430 /* rem: interrupts are enabled */ 431 432 /* 433 * If the new process is the same as the process that called 434 * cpu_switch() then we do not need to save and restore any 435 * contexts. This means we can make a quick exit. 436 * The test is simple if curproc on entry (now in r1) is the 437 * same as the proc removed from the queue we can jump to the exit. 438 */ 439 teq r1, r6 440 beq switch_return 441 442 /* 443 * If the curproc on entry to cpu_switch was zero then the 444 * process that called it was exiting. This means that we do 445 * not need to save the current context. Instead we can jump 446 * straight to restoring the context for the new process. 447 */ 448 teq r1, #0x00000000 449 beq switch_exited 450 451 /* rem: r1 = old proc */ 452 /* rem: r6 = new process */ 453 /* rem: interrupts are enabled */ 454 455 /* Stage two : Save old context */ 456 457 /* Remember the old process in r0 */ 458 mov r0, r1 459 460 /* Get the user structure for the old process. */ 461 ldr r1, [r1, #(P_ADDR)] 462 463 /* Save all the registers in the old process's pcb */ 464 add r7, r1, #(PCB_R8) 465 stmia r7, {r8-r13} 466 467 /* 468 * This can be optimised... We know we want to go from SVC32 469 * mode to UND32 mode 470 */ 471 mrs r3, cpsr_all 472 bic r2, r3, #(PSR_MODE) 473 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 474 msr cpsr_all, r2 475 476 str sp, [r1, #(PCB_UND_SP)] 477 478 msr cpsr_all, r3 /* Restore the old mode */ 479 480 /* rem: r0 = old proc */ 481 /* rem: r1 = old pcb */ 482 /* rem: r6 = new process */ 483 /* rem: interrupts are enabled */ 484 485 /* What else needs to be saved Only FPA stuff when that is supported */ 486 487 /* Third phase : restore saved context */ 488 489 switch_exited: 490 /* Don't allow user space access beween the purge and the switch */ 491 ldr r3, Lblock_userspace_access 492 ldr r2, [r3] 493 orr r0, r2, #1 494 str r0, [r3] 495 496 stmfd sp!, {r0-r3} 497 ldr r0, Lcpufuncs 498 add lr, pc, #Lcs_cache_purged - . - 8 499 ldr pc, [r0, #CF_CACHE_PURGE_ID] 500 501 Lcs_cache_purged: 502 ldmfd sp!, {r0-r3} 503 504 /* At this point we need to kill IRQ's again. */ 505 IRQdisable 506 507 /* Interrupts are disabled so we can allow user space accesses again 508 * as none will occur until interrupts are re-enabled after the 509 * switch. 510 */ 511 str r2, [r3] 512 513 /* Get the user structure for the new process in r1 */ 514 ldr r1, [r6, #(P_ADDR)] 515 516 /* Get the pagedir physical address for the process. */ 517 ldr r0, [r1, #(PCB_PAGEDIR)] 518 519 /* Switch the memory to the new process */ 520 ldr r3, Lcpufuncs 521 add lr, pc, #Lcs_context_switched - . - 8 522 ldr pc, [r3, #CF_CONTEXT_SWITCH] 523 524 Lcs_context_switched: 525 /* 526 * This can be optimised... We know we want to go from SVC32 527 * mode to UND32 mode 528 */ 529 mrs r3, cpsr_all 530 bic r2, r3, #(PSR_MODE) 531 orr r2, r2, #(PSR_UND32_MODE) 532 msr cpsr_all, r2 533 534 ldr sp, [r1, #(PCB_UND_SP)] 535 536 msr cpsr_all, r3 /* Restore the old mode */ 537 538 /* Restore all the save registers */ 539 add r7, r1, #PCB_R8 540 ldmia r7, {r8-r13} 541 542 #ifdef ARMFPE 543 add r0, r1, #(USER_SIZE) & 0x00ff 544 add r0, r0, #(USER_SIZE) & 0xff00 545 bl _C_LABEL(arm_fpe_core_changecontext) 546 #endif 547 548 /* We can enable interrupts again */ 549 IRQenable 550 551 switch_return: 552 553 /* Get the spl level from the stack and update the current spl level */ 554 ldr r0, [sp], #0x0004 555 bl _C_LABEL(splx) 556 557 /* cpu_switch returns the proc it switched to. */ 558 mov r0, r6 559 560 /* 561 * Pull the registers that got pushed when either savectx() or 562 * cpu_switch() was called and return. 563 */ 564 ldmfd sp!, {r4-r7, pc} 565 566 Lproc0: 567 .word _C_LABEL(proc0) 568 569 Lkernel_map: 570 .word _C_LABEL(kernel_map) 571 572 573 ENTRY(switch_exit) 574 /* 575 * r0 = proc 576 * r1 = proc0 577 */ 578 579 mov r3, r0 580 ldr r1, Lproc0 581 582 /* In case we fault */ 583 ldr r0, Lcurproc 584 mov r2, #0x00000000 585 str r2, [r0] 586 587 /* ldr r0, Lcurpcb 588 str r2, [r0]*/ 589 590 /* Switch to proc0 context */ 591 592 stmfd sp!, {r0-r3} 593 594 ldr r0, Lcpufuncs 595 add lr, pc, #Lse_cache_purged - . - 8 596 ldr pc, [r0, #CF_CACHE_PURGE_ID] 597 598 Lse_cache_purged: 599 ldmfd sp!, {r0-r3} 600 601 IRQdisable 602 603 ldr r2, [r1, #(P_ADDR)] 604 ldr r0, [r2, #(PCB_PAGEDIR)] 605 606 /* Switch the memory to the new process */ 607 ldr r4, Lcpufuncs 608 add lr, pc, #Lse_context_switched - . - 8 609 ldr pc, [r4, #CF_CONTEXT_SWITCH] 610 611 Lse_context_switched: 612 /* Restore all the save registers */ 613 add r7, r2, #PCB_R8 614 ldmia r7, {r8-r13} 615 616 /* This is not really needed ! */ 617 /* Yes it is for the su and fu routines */ 618 ldr r0, Lcurpcb 619 str r2, [r0] 620 621 IRQenable 622 623 /* str r3, [sp, #-0x0004]!*/ 624 625 /* 626 * Schedule the vmspace and stack to be freed. 627 */ 628 mov r0, r3 /* exit2(p) */ 629 bl _C_LABEL(exit2) 630 631 /* Paranoia */ 632 ldr r1, Lcurproc 633 mov r0, #0x00000000 634 str r0, [r1] 635 636 ldr r1, Lproc0 637 b switch_search 638 639 ENTRY(savectx) 640 /* 641 * r0 = pcb 642 */ 643 644 /* Push registers.*/ 645 stmfd sp!, {r4-r7, lr} 646 647 /* Store all the registers in the process's pcb */ 648 add r2, r0, #(PCB_R8) 649 stmia r2, {r8-r13} 650 651 /* Pull the regs of the stack */ 652 ldmfd sp!, {r4-r7, pc} 653 654 ENTRY(proc_trampoline) 655 add lr, pc, #(trampoline_return - . - 8) 656 mov r0, r5 657 mov r1, sp 658 mov pc, r4 659 660 trampoline_return: 661 /* Kill irq's */ 662 mrs r0, cpsr_all 663 orr r0, r0, #(I32_bit) 664 msr cpsr_all, r0 665 666 PULLFRAME 667 668 movs pc, lr /* Exit */ 669 670 .type Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 671 Lcpu_switch_ffs_table: 672 /* same as ffs table but all nums are -1 from that */ 673 /* 0 1 2 3 4 5 6 7 */ 674 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 675 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 676 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 677 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 678 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 679 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 680 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 681 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 682 683 /* End of cpuswitch.S */ 684
Indexes created Wed Oct 22 13:09:56 GMT 2025