cpuswitch.S revision 1.9
1 /* $NetBSD: cpuswitch.S,v 1.9 2002/08/06 19:20:29 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 48 #include "assym.h" 49 #include <machine/param.h> 50 #include <machine/cpu.h> 51 #include <machine/frame.h> 52 #include <machine/asm.h> 53 54 #undef IRQdisable 55 #undef IRQenable 56 57 /* 58 * New experimental definitions of IRQdisable and IRQenable 59 * These keep FIQ's enabled since FIQ's are special. 60 */ 61 62 #define IRQdisable \ 63 mrs r14, cpsr_all ; \ 64 orr r14, r14, #(I32_bit) ; \ 65 msr cpsr_all, r14 ; \ 66 67 #define IRQenable \ 68 mrs r14, cpsr_all ; \ 69 bic r14, r14, #(I32_bit) ; \ 70 msr cpsr_all, r14 ; \ 71 72 /* 73 * setrunqueue() and remrunqueue() 74 * 75 * Functions to add and remove a process for the run queue. 76 */ 77 78 .text 79 80 Lwhichqs: 81 .word _C_LABEL(sched_whichqs) 82 83 Lqs: 84 .word _C_LABEL(sched_qs) 85 86 /* 87 * On entry 88 * r0 = process 89 */ 90 91 ENTRY(setrunqueue) 92 /* 93 * Local register usage 94 * r0 = process 95 * r1 = queue 96 * r2 = &qs[queue] and temp 97 * r3 = temp 98 * r12 = whichqs 99 */ 100 #ifdef DIAGNOSTIC 101 ldr r1, [r0, #(P_BACK)] 102 teq r1, #0x00000000 103 bne Lsetrunqueue_erg 104 105 ldr r1, [r0, #(P_WCHAN)] 106 teq r1, #0x00000000 107 bne Lsetrunqueue_erg 108 #endif 109 110 /* Get the priority of the queue */ 111 ldrb r1, [r0, #(P_PRIORITY)] 112 mov r1, r1, lsr #2 113 114 /* Indicate that there is a process on this queue */ 115 ldr r12, Lwhichqs 116 ldr r2, [r12] 117 mov r3, #0x00000001 118 mov r3, r3, lsl r1 119 orr r2, r2, r3 120 str r2, [r12] 121 122 /* Get the address of the queue */ 123 ldr r2, Lqs 124 add r1, r2, r1, lsl # 3 125 126 /* Hook the process in */ 127 str r1, [r0, #(P_FORW)] 128 ldr r2, [r1, #(P_BACK)] 129 130 str r0, [r1, #(P_BACK)] 131 #ifdef DIAGNOSTIC 132 teq r2, #0x00000000 133 beq Lsetrunqueue_erg 134 #endif 135 str r0, [r2, #(P_FORW)] 136 str r2, [r0, #(P_BACK)] 137 138 mov pc, lr 139 140 #ifdef DIAGNOSTIC 141 Lsetrunqueue_erg: 142 mov r2, r1 143 mov r1, r0 144 add r0, pc, #Ltext1 - . - 8 145 bl _C_LABEL(printf) 146 147 ldr r2, Lqs 148 ldr r1, [r2] 149 add r0, pc, #Ltext2 - . - 8 150 b _C_LABEL(panic) 151 152 Ltext1: 153 .asciz "setrunqueue : %08x %08x\n" 154 Ltext2: 155 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 156 .align 0 157 #endif 158 159 /* 160 * On entry 161 * r0 = process 162 */ 163 164 ENTRY(remrunqueue) 165 /* 166 * Local register usage 167 * r0 = oldproc 168 * r1 = queue 169 * r2 = &qs[queue] and scratch 170 * r3 = scratch 171 * r12 = whichqs 172 */ 173 174 /* Get the priority of the queue */ 175 ldrb r1, [r0, #(P_PRIORITY)] 176 mov r1, r1, lsr #2 177 178 /* Unhook the process */ 179 ldr r2, [r0, #(P_FORW)] 180 ldr r3, [r0, #(P_BACK)] 181 182 str r3, [r2, #(P_BACK)] 183 str r2, [r3, #(P_FORW)] 184 185 /* If the queue is now empty clear the queue not empty flag */ 186 teq r2, r3 187 188 /* This could be reworked to avoid the use of r4 */ 189 ldreq r12, Lwhichqs 190 ldreq r2, [r12] 191 moveq r3, #0x00000001 192 moveq r3, r3, lsl r1 193 biceq r2, r2, r3 194 streq r2, [r12] 195 196 /* Remove the back pointer for the process */ 197 mov r1, #0x00000000 198 str r1, [r0, #(P_BACK)] 199 200 mov pc, lr 201 202 203 /* 204 * cpuswitch() 205 * 206 * preforms a process context switch. 207 * This function has several entry points 208 */ 209 210 Lcurproc: 211 .word _C_LABEL(curproc) 212 213 Lcurpcb: 214 .word _C_LABEL(curpcb) 215 216 Lwant_resched: 217 .word _C_LABEL(want_resched) 218 219 Lcpufuncs: 220 .word _C_LABEL(cpufuncs) 221 222 .data 223 .global _C_LABEL(curpcb) 224 _C_LABEL(curpcb): 225 .word 0x00000000 226 .text 227 228 Lblock_userspace_access: 229 .word _C_LABEL(block_userspace_access) 230 231 /* 232 * Idle loop, exercised while waiting for a process to wake up. 233 */ 234 /* LINTSTUB: Ignore */ 235 ASENTRY_NP(idle) 236 237 #if defined(LOCKDEBUG) 238 bl _C_LABEL(sched_unlock_idle) 239 #endif 240 /* Enable interrupts */ 241 IRQenable 242 243 ldr r3, Lcpufuncs 244 mov r0, #0 245 add lr, pc, #Lidle_slept - . - 8 246 ldr pc, [r3, #CF_SLEEP] 247 248 /* should also call the uvm pageidlezero stuff */ 249 250 Lidle_slept: 251 252 /* Disable interrupts while we check for an active queue */ 253 IRQdisable 254 #if defined(LOCKDEBUG) 255 bl _C_LABEL(sched_lock_idle) 256 #endif 257 ldr r7, Lwhichqs 258 ldr r3, [r7] 259 teq r3, #0x00000000 260 261 beq _ASM_LABEL(idle) 262 b Lidle_ret 263 264 /* 265 * Find a new process to run, save the current context and 266 * load the new context 267 */ 268 269 ENTRY(cpu_switch) 270 /* 271 * Local register usage. Some of these registers are out of date. 272 * r1 = oldproc 273 * r2 = spl level 274 * r3 = whichqs 275 * r4 = queue 276 * r5 = &qs[queue] 277 * r6 = newproc 278 * r7 = scratch 279 */ 280 stmfd sp!, {r4-r7, lr} 281 282 /* 283 * Get the current process and indicate that there is no longer 284 * a valid process (curproc = 0) 285 */ 286 ldr r7, Lcurproc 287 ldr r1, [r7] 288 mov r0, #0x00000000 289 str r0, [r7] 290 291 /* Zero the pcb */ 292 ldr r7, Lcurpcb 293 str r0, [r7] 294 295 /* stash the old proc */ 296 mov r7, r1 297 298 #if defined(LOCKDEBUG) 299 /* release the sched_lock before handling interrupts */ 300 bl _C_LABEL(sched_unlock_idle) 301 #endif 302 303 /* Lower the spl level to spl0 and get the current spl level. */ 304 #ifdef __NEWINTR 305 mov r0, #(IPL_NONE) 306 bl _C_LABEL(_spllower) 307 #else /* ! __NEWINTR */ 308 #ifdef spl0 309 mov r0, #(_SPL_0) 310 bl _C_LABEL(splx) 311 #else 312 bl _C_LABEL(spl0) 313 #endif /* spl0 */ 314 #endif /* __NEWINTR */ 315 316 /* Push the old spl level onto the stack */ 317 str r0, [sp, #-0x0004]! 318 319 mov r5, r7 320 321 /* First phase : find a new process */ 322 323 /* rem: r5 = old proc */ 324 325 326 Lswitch_search: 327 IRQdisable 328 #if defined(LOCKDEBUG) 329 bl _C_LABEL(sched_lock_idle) 330 #endif 331 332 333 /* Do we have any active queues */ 334 ldr r7, Lwhichqs 335 ldr r3, [r7] 336 337 /* If not we must idle until we do. */ 338 teq r3, #0x00000000 339 beq _ASM_LABEL(idle) 340 Lidle_ret: 341 342 /* restore old proc */ 343 mov r1, r5 344 345 /* rem: r1 = old proc */ 346 /* rem: r3 = whichqs */ 347 /* rem: interrupts are disabled */ 348 349 /* 350 * We have found an active queue. Currently we do not know which queue 351 * is active just that one of them is. 352 */ 353 /* this is the ffs algorithm devised by d.seal and posted to 354 * comp.sys.arm on 16 Feb 1994. 355 */ 356 rsb r5, r3, #0 357 ands r0, r3, r5 358 359 adr r5, Lcpu_switch_ffs_table 360 361 /* X = R0 */ 362 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 363 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 364 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 365 366 /* used further down, saves SA stall */ 367 ldr r6, Lqs 368 369 /* now lookup in table indexed on top 6 bits of a4 */ 370 ldrb r4, [ r5, r4, lsr #26 ] 371 372 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 373 /* rem: r1 = old proc */ 374 /* rem: r3 = whichqs */ 375 /* rem: r4 = queue number */ 376 /* rem: interrupts are disabled */ 377 378 /* Get the address of the queue (&qs[queue]) */ 379 add r5, r6, r4, lsl #3 380 381 /* 382 * Get the process from the queue and place the next process in 383 * the queue at the head. This basically unlinks the process at 384 * the head of the queue. 385 */ 386 ldr r6, [r5, #(P_FORW)] 387 388 /* rem: r6 = new process */ 389 ldr r7, [r6, #(P_FORW)] 390 str r7, [r5, #(P_FORW)] 391 392 /* 393 * Test to see if the queue is now empty. If the head of the queue 394 * points to the queue itself then there are no more processes in 395 * the queue. We can therefore clear the queue not empty flag held 396 * in r3. 397 */ 398 399 teq r5, r7 400 biceq r3, r3, r0 401 402 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 403 404 /* Fix the back pointer for the process now at the head of the queue. */ 405 ldr r0, [r6, #(P_BACK)] 406 str r0, [r7, #(P_BACK)] 407 408 /* Update the RAM copy of the queue not empty flags word. */ 409 ldr r7, Lwhichqs 410 str r3, [r7] 411 412 /* rem: r1 = old proc */ 413 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 414 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 415 /* rem: r6 = new process */ 416 /* rem: interrupts are disabled */ 417 418 /* Clear the want_resched flag */ 419 ldr r7, Lwant_resched 420 mov r0, #0x00000000 421 str r0, [r7] 422 423 /* 424 * Clear the back pointer of the process we have removed from 425 * the head of the queue. The new process is isolated now. 426 */ 427 str r0, [r6, #(P_BACK)] 428 429 #if defined(LOCKDEBUG) 430 /* 431 * unlock the sched_lock, but leave interrupts off, for now. 432 */ 433 mov r7, r1 434 bl _C_LABEL(sched_unlock_idle) 435 mov r1, r7 436 #endif 437 438 /* p->p_cpu initialized in fork1() for single-processor */ 439 440 /* Process is now on a processor. */ 441 mov r0, #SONPROC /* p->p_stat = SONPROC */ 442 strb r0, [r6, #(P_STAT)] 443 444 /* We have a new curproc now so make a note it */ 445 ldr r7, Lcurproc 446 str r6, [r7] 447 448 /* Hook in a new pcb */ 449 ldr r7, Lcurpcb 450 ldr r0, [r6, #(P_ADDR)] 451 str r0, [r7] 452 453 /* At this point we can allow IRQ's again. */ 454 IRQenable 455 456 /* rem: r1 = old proc */ 457 /* rem: r6 = new process */ 458 /* rem: interrupts are enabled */ 459 460 /* 461 * If the new process is the same as the process that called 462 * cpu_switch() then we do not need to save and restore any 463 * contexts. This means we can make a quick exit. 464 * The test is simple if curproc on entry (now in r1) is the 465 * same as the proc removed from the queue we can jump to the exit. 466 */ 467 teq r1, r6 468 beq switch_return 469 470 /* Remember the old process in r0 */ 471 mov r0, r1 472 473 /* 474 * If the curproc on entry to cpu_switch was zero then the 475 * process that called it was exiting. This means that we do 476 * not need to save the current context. Instead we can jump 477 * straight to restoring the context for the new process. 478 */ 479 teq r0, #0x00000000 480 beq switch_exited 481 482 /* rem: r0 = old proc */ 483 /* rem: r6 = new process */ 484 /* rem: interrupts are enabled */ 485 486 /* Stage two : Save old context */ 487 488 /* Get the user structure for the old process. */ 489 ldr r1, [r0, #(P_ADDR)] 490 491 /* Save all the registers in the old process's pcb */ 492 add r7, r1, #(PCB_R8) 493 stmia r7, {r8-r13} 494 495 /* 496 * This can be optimised... We know we want to go from SVC32 497 * mode to UND32 mode 498 */ 499 mrs r3, cpsr_all 500 bic r2, r3, #(PSR_MODE) 501 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 502 msr cpsr_all, r2 503 504 str sp, [r1, #(PCB_UND_SP)] 505 506 msr cpsr_all, r3 /* Restore the old mode */ 507 508 /* rem: r0 = old proc */ 509 /* rem: r1 = old pcb */ 510 /* rem: r6 = new process */ 511 /* rem: interrupts are enabled */ 512 513 /* What else needs to be saved Only FPA stuff when that is supported */ 514 515 /* r1 now free! */ 516 517 /* Third phase : restore saved context */ 518 519 /* rem: r0 = old proc */ 520 /* rem: r6 = new process */ 521 /* rem: interrupts are enabled */ 522 523 /* 524 * Don't allow user space access between the purge and the switch. 525 */ 526 ldr r3, Lblock_userspace_access 527 mov r1, #0x00000001 528 mov r2, #0x00000000 529 str r1, [r3] 530 531 stmfd sp!, {r0-r3} 532 ldr r1, Lcpufuncs 533 add lr, pc, #Lcs_cache_purged - . - 8 534 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 535 536 Lcs_cache_purged: 537 ldmfd sp!, {r0-r3} 538 539 Lcs_cache_purge_skipped: 540 /* At this point we need to kill IRQ's again. */ 541 IRQdisable 542 543 /* 544 * Interrupts are disabled so we can allow user space accesses again 545 * as none will occur until interrupts are re-enabled after the 546 * switch. 547 */ 548 str r2, [r3] 549 550 /* Get the user structure for the new process in r1 */ 551 ldr r1, [r6, #(P_ADDR)] 552 553 /* Get the pagedir physical address for the process. */ 554 ldr r0, [r1, #(PCB_PAGEDIR)] 555 556 /* Switch the memory to the new process */ 557 ldr r3, Lcpufuncs 558 add lr, pc, #Lcs_context_switched - . - 8 559 ldr pc, [r3, #CF_CONTEXT_SWITCH] 560 561 Lcs_context_switched: 562 /* 563 * This can be optimised... We know we want to go from SVC32 564 * mode to UND32 mode 565 */ 566 mrs r3, cpsr_all 567 bic r2, r3, #(PSR_MODE) 568 orr r2, r2, #(PSR_UND32_MODE) 569 msr cpsr_all, r2 570 571 ldr sp, [r1, #(PCB_UND_SP)] 572 573 msr cpsr_all, r3 /* Restore the old mode */ 574 575 /* Restore all the save registers */ 576 add r7, r1, #PCB_R8 577 ldmia r7, {r8-r13} 578 579 #ifdef ARMFPE 580 add r0, r1, #(USER_SIZE) & 0x00ff 581 add r0, r0, #(USER_SIZE) & 0xff00 582 bl _C_LABEL(arm_fpe_core_changecontext) 583 #endif 584 585 /* We can enable interrupts again */ 586 IRQenable 587 588 switch_return: 589 590 /* Get the spl level from the stack and update the current spl level */ 591 ldr r0, [sp], #0x0004 592 bl _C_LABEL(splx) 593 594 /* cpu_switch returns the proc it switched to. */ 595 mov r0, r6 596 597 /* 598 * Pull the registers that got pushed when either savectx() or 599 * cpu_switch() was called and return. 600 */ 601 ldmfd sp!, {r4-r7, pc} 602 603 switch_exited: 604 /* 605 * We skip the cache purge because switch_exit() already did 606 * it. Load up registers the way Lcs_cache_purge_skipped 607 * expects. Userspace access already blocked in switch_exit(). 608 */ 609 ldr r3, Lblock_userspace_access 610 mov r2, #0x00000000 611 b Lcs_cache_purge_skipped 612 613 Lproc0: 614 .word _C_LABEL(proc0) 615 616 Lkernel_map: 617 .word _C_LABEL(kernel_map) 618 619 /* 620 * void switch_exit(struct proc *p, struct proc *p0); 621 * Switch to proc0's saved context and deallocate the address space and kernel 622 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 623 */ 624 625 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 626 ENTRY(switch_exit) 627 /* 628 * r0 = proc 629 * r1 = proc0 630 */ 631 632 mov r3, r0 633 634 /* In case we fault */ 635 ldr r0, Lcurproc 636 mov r2, #0x00000000 637 str r2, [r0] 638 639 /* ldr r0, Lcurpcb 640 str r2, [r0]*/ 641 642 /* 643 * Don't allow user space access between the purge and the switch. 644 */ 645 ldr r0, Lblock_userspace_access 646 mov r2, #0x00000001 647 str r2, [r0] 648 649 /* Switch to proc0 context */ 650 651 stmfd sp!, {r0-r3} 652 653 ldr r0, Lcpufuncs 654 add lr, pc, #Lse_cache_purged - . - 8 655 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 656 657 Lse_cache_purged: 658 ldmfd sp!, {r0-r3} 659 660 IRQdisable 661 662 ldr r2, [r1, #(P_ADDR)] 663 ldr r0, [r2, #(PCB_PAGEDIR)] 664 665 /* Switch the memory to the new process */ 666 ldr r4, Lcpufuncs 667 add lr, pc, #Lse_context_switched - . - 8 668 ldr pc, [r4, #CF_CONTEXT_SWITCH] 669 670 Lse_context_switched: 671 /* Restore all the save registers */ 672 add r7, r2, #PCB_R8 673 ldmia r7, {r8-r13} 674 675 /* This is not really needed ! */ 676 /* Yes it is for the su and fu routines */ 677 ldr r0, Lcurpcb 678 str r2, [r0] 679 680 IRQenable 681 682 /* str r3, [sp, #-0x0004]!*/ 683 684 /* 685 * Schedule the vmspace and stack to be freed. 686 */ 687 mov r0, r3 /* exit2(p) */ 688 bl _C_LABEL(exit2) 689 690 /* Paranoia */ 691 ldr r1, Lcurproc 692 mov r0, #0x00000000 693 str r0, [r1] 694 695 mov r5, #0x00000000 /* r5 = old proc = NULL */ 696 b Lswitch_search 697 698 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 699 ENTRY(savectx) 700 /* 701 * r0 = pcb 702 */ 703 704 /* Push registers.*/ 705 stmfd sp!, {r4-r7, lr} 706 707 /* Store all the registers in the process's pcb */ 708 add r2, r0, #(PCB_R8) 709 stmia r2, {r8-r13} 710 711 /* Pull the regs of the stack */ 712 ldmfd sp!, {r4-r7, pc} 713 714 ENTRY(proc_trampoline) 715 add lr, pc, #(trampoline_return - . - 8) 716 mov r0, r5 717 mov r1, sp 718 mov pc, r4 719 720 trampoline_return: 721 /* Kill irq's */ 722 mrs r0, cpsr_all 723 orr r0, r0, #(I32_bit) 724 msr cpsr_all, r0 725 726 PULLFRAME 727 728 movs pc, lr /* Exit */ 729 730 .type Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 731 Lcpu_switch_ffs_table: 732 /* same as ffs table but all nums are -1 from that */ 733 /* 0 1 2 3 4 5 6 7 */ 734 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 735 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 736 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 737 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 738 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 739 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 740 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 741 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 742 743 /* End of cpuswitch.S */ 744
Indexes created Mon Oct 27 08:10:08 GMT 2025