db_interface.c revision 1.11
1 /* $NetBSD: db_interface.c,v 1.11 2001/11/23 21:18:30 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Scott K. Stevens 5 * 6 * Mach Operating System 7 * Copyright (c) 1991,1990 Carnegie Mellon University 8 * All Rights Reserved. 9 * 10 * Permission to use, copy, modify and distribute this software and its 11 * documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 * 30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) 31 */ 32 33 /* 34 * Interface to new debugger. 35 */ 36 #include "opt_ddb.h" 37 38 #include <sys/param.h> 39 #include <sys/proc.h> 40 #include <sys/reboot.h> 41 #include <sys/systm.h> /* just for boothowto */ 42 #include <sys/exec.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/db_machdep.h> 47 #include <arm/arm32/katelib.h> 48 #include <arm/undefined.h> 49 #include <ddb/db_command.h> 50 #include <ddb/db_output.h> 51 #include <ddb/db_variables.h> 52 #include <ddb/db_sym.h> 53 #include <ddb/db_extern.h> 54 #include <ddb/db_interface.h> 55 #include <dev/cons.h> 56 57 static int nil; 58 59 int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int)); 60 int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int)); 61 int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int)); 62 u_int db_fetch_reg __P((int, db_regs_t *)); 63 64 const struct db_variable db_regs[] = { 65 { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, }, 66 { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, }, 67 { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, }, 68 { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, }, 69 { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, }, 70 { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, }, 71 { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, }, 72 { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, }, 73 { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, }, 74 { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, }, 75 { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, }, 76 { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, }, 77 { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, }, 78 { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, }, 79 { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, }, 80 { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, }, 81 { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, }, 82 { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, }, 83 { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, }, 84 { "und_sp", (long *)&nil, db_access_und_sp, }, 85 { "abt_sp", (long *)&nil, db_access_abt_sp, }, 86 { "irq_sp", (long *)&nil, db_access_irq_sp, }, 87 }; 88 89 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); 90 91 extern label_t *db_recover; 92 93 int db_active = 0; 94 95 int db_access_und_sp(vp, valp, rw) 96 const struct db_variable *vp; 97 db_expr_t *valp; 98 int rw; 99 { 100 if (rw == DB_VAR_GET) 101 *valp = get_stackptr(PSR_UND32_MODE); 102 return(0); 103 } 104 105 int db_access_abt_sp(vp, valp, rw) 106 const struct db_variable *vp; 107 db_expr_t *valp; 108 int rw; 109 { 110 if (rw == DB_VAR_GET) 111 *valp = get_stackptr(PSR_ABT32_MODE); 112 return(0); 113 } 114 115 int db_access_irq_sp(vp, valp, rw) 116 const struct db_variable *vp; 117 db_expr_t *valp; 118 int rw; 119 { 120 if (rw == DB_VAR_GET) 121 *valp = get_stackptr(PSR_IRQ32_MODE); 122 return(0); 123 } 124 125 /* 126 * kdb_trap - field a TRACE or BPT trap 127 */ 128 int 129 kdb_trap(type, regs) 130 int type; 131 db_regs_t *regs; 132 { 133 int s; 134 135 switch (type) { 136 case T_BREAKPOINT: /* breakpoint */ 137 case -1: /* keyboard interrupt */ 138 break; 139 default: 140 db_printf("kernel: trap"); 141 if (db_recover != 0) { 142 db_error("Faulted in DDB; continuing...\n"); 143 /*NOTREACHED*/ 144 } 145 } 146 147 /* Should switch to kdb`s own stack here. */ 148 149 ddb_regs = *regs; 150 151 s = splhigh(); 152 db_active++; 153 cnpollc(TRUE); 154 db_trap(type, 0/*code*/); 155 cnpollc(FALSE); 156 db_active--; 157 splx(s); 158 159 *regs = ddb_regs; 160 161 return (1); 162 } 163 164 165 /* 166 * Received keyboard interrupt sequence. 167 */ 168 void 169 kdb_kbd_trap(regs) 170 db_regs_t *regs; 171 { 172 if (db_active == 0 && (boothowto & RB_KDB)) { 173 printf("\n\nkernel: keyboard interrupt\n"); 174 kdb_trap(-1, regs); 175 } 176 } 177 178 179 static int 180 db_validate_address(addr) 181 vm_offset_t addr; 182 { 183 pt_entry_t *ptep; 184 pd_entry_t *pdep; 185 struct proc *p = curproc; 186 187 /* 188 * If we have a valid pmap for curproc, use it's page directory 189 * otherwise use the kernel pmap's page directory. 190 */ 191 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap) 192 pdep = pmap_kernel()->pm_pdir; 193 else 194 pdep = p->p_vmspace->vm_map.pmap->pm_pdir; 195 196 /* Make sure the address we are reading is valid */ 197 switch ((pdep[(addr >> 20) + 0] & L1_MASK)) { 198 case L1_SECTION: 199 break; 200 case L1_PAGE: 201 /* Check the L2 page table for validity */ 202 ptep = vtopte(addr); 203 if ((*ptep & L2_MASK) != L2_INVAL) 204 break; 205 /* FALLTHROUGH */ 206 default: 207 return 1; 208 } 209 210 return 0; 211 } 212 213 /* 214 * Read bytes from kernel address space for debugger. 215 */ 216 void 217 db_read_bytes(addr, size, data) 218 vm_offset_t addr; 219 int size; 220 char *data; 221 { 222 char *src; 223 224 src = (char *)addr; 225 while (--size >= 0) { 226 if (db_validate_address((u_int)src)) { 227 db_printf("address %p is invalid\n", src); 228 return; 229 } 230 *data++ = *src++; 231 } 232 } 233 234 static void 235 db_write_text(dst, ch) 236 unsigned char *dst; 237 int ch; 238 { 239 pt_entry_t *ptep, pteo; 240 vm_offset_t va; 241 242 va = (unsigned long)dst & (~PGOFSET); 243 ptep = vtopte(va); 244 245 if (db_validate_address((u_int)dst)) { 246 db_printf(" address %p not a valid page\n", dst); 247 return; 248 } 249 250 pteo = *ptep; 251 *ptep = pteo | PT_AP(AP_KRW); 252 cpu_tlb_flushD_SE(va); 253 254 *dst = (unsigned char)ch; 255 256 /* make sure the caches and memory are in sync */ 257 cpu_cache_syncI_rng((u_int)dst, 4); 258 259 *ptep = pteo; 260 cpu_tlb_flushD_SE(va); 261 } 262 263 /* 264 * Write bytes to kernel address space for debugger. 265 */ 266 void 267 db_write_bytes(addr, size, data) 268 vm_offset_t addr; 269 int size; 270 char *data; 271 { 272 extern char etext[]; 273 char *dst; 274 int loop; 275 276 dst = (char *)addr; 277 loop = size; 278 while (--loop >= 0) { 279 if ((dst >= (char *)KERNEL_TEXT_BASE) && (dst < etext)) 280 db_write_text(dst, *data); 281 else { 282 if (db_validate_address((u_int)dst)) { 283 db_printf("address %p is invalid\n", dst); 284 return; 285 } 286 *dst = *data; 287 } 288 dst++, data++; 289 } 290 /* make sure the caches and memory are in sync */ 291 cpu_cache_syncI_rng(addr, size); 292 293 /* In case the current page tables have been modified ... */ 294 cpu_tlb_flushID(); 295 } 296 297 void 298 cpu_Debugger() 299 { 300 asm(".word 0xe7ffffff"); 301 } 302 303 void db_show_intrchain_cmd __P((db_expr_t addr, int have_addr, db_expr_t count, char *modif)); 304 void db_show_panic_cmd __P((db_expr_t addr, int have_addr, db_expr_t count, char *modif)); 305 void db_show_frame_cmd __P((db_expr_t addr, int have_addr, db_expr_t count, char *modif)); 306 307 const struct db_command db_machine_command_table[] = { 308 { "frame", db_show_frame_cmd, 0, NULL }, 309 { "intrchain", db_show_intrchain_cmd, 0, NULL }, 310 { "panic", db_show_panic_cmd, 0, NULL }, 311 #ifdef ARM32_DB_COMMANDS 312 ARM32_DB_COMMANDS, 313 #endif 314 { NULL, NULL, 0, NULL } 315 }; 316 317 int 318 db_trapper(addr, inst, frame, fault_code) 319 u_int addr; 320 u_int inst; 321 trapframe_t *frame; 322 int fault_code; 323 { 324 if (fault_code == 0) { 325 if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK)) 326 kdb_trap(T_BREAKPOINT, frame); 327 else 328 kdb_trap(-1, frame); 329 } else 330 return (1); 331 return (0); 332 } 333 334 extern u_int esym; 335 extern u_int end; 336 337 static struct undefined_handler db_uh; 338 339 void 340 db_machine_init() 341 { 342 #ifndef __ELF__ 343 struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE; 344 int len; 345 346 /* 347 * The boot loader currently loads the kernel with the a.out 348 * header still attached. 349 */ 350 351 if (kernexec->a_syms == 0) { 352 printf("ddb: No symbol table\n"); 353 } else { 354 /* cover the symbols themselves (what is the int for?? XXX) */ 355 esym = (int)&end + kernexec->a_syms + sizeof(int); 356 357 /* 358 * and the string table. (int containing size of string 359 * table is included in string table size). 360 */ 361 len = *((u_int *)esym); 362 esym += (len + (sizeof(u_int) - 1)) & ~(sizeof(u_int) - 1); 363 } 364 #endif 365 366 /* 367 * We get called before malloc() is available, so supply a static 368 * struct undefined_handler. 369 */ 370 db_uh.uh_handler = db_trapper; 371 install_coproc_handler_static(0, &db_uh); 372 } 373 374 u_int 375 db_fetch_reg(reg, db_regs) 376 int reg; 377 db_regs_t *db_regs; 378 { 379 380 switch (reg) { 381 case 0: 382 return (db_regs->tf_r0); 383 case 1: 384 return (db_regs->tf_r1); 385 case 2: 386 return (db_regs->tf_r2); 387 case 3: 388 return (db_regs->tf_r3); 389 case 4: 390 return (db_regs->tf_r4); 391 case 5: 392 return (db_regs->tf_r5); 393 case 6: 394 return (db_regs->tf_r6); 395 case 7: 396 return (db_regs->tf_r7); 397 case 8: 398 return (db_regs->tf_r8); 399 case 9: 400 return (db_regs->tf_r9); 401 case 10: 402 return (db_regs->tf_r10); 403 case 11: 404 return (db_regs->tf_r11); 405 case 12: 406 return (db_regs->tf_r12); 407 case 13: 408 return (db_regs->tf_svc_sp); 409 case 14: 410 return (db_regs->tf_svc_lr); 411 case 15: 412 return (db_regs->tf_pc); 413 default: 414 panic("db_fetch_reg: botch"); 415 } 416 } 417 418 u_int 419 branch_taken(insn, pc, db_regs) 420 u_int insn; 421 u_int pc; 422 db_regs_t *db_regs; 423 { 424 u_int addr, nregs; 425 426 switch ((insn >> 24) & 0xf) { 427 case 0xa: /* b ... */ 428 case 0xb: /* bl ... */ 429 addr = ((insn << 2) & 0x03ffffff); 430 if (addr & 0x02000000) 431 addr |= 0xfc000000; 432 return (pc + 8 + addr); 433 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 434 addr = db_fetch_reg(insn & 0xf, db_regs); 435 addr = pc + 8 + (addr << 2); 436 db_read_bytes(addr, 4, (char *)&addr); 437 return (addr); 438 case 0x1: /* mov pc, reg */ 439 addr = db_fetch_reg(insn & 0xf, db_regs); 440 return (addr); 441 case 0x8: /* ldmxx reg, {..., pc} */ 442 case 0x9: 443 addr = db_fetch_reg((insn >> 16) & 0xf, db_regs); 444 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555); 445 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333); 446 nregs = (nregs + (nregs >> 4)) & 0x0f0f; 447 nregs = (nregs + (nregs >> 8)) & 0x001f; 448 switch ((insn >> 23) & 0x3) { 449 case 0x0: /* ldmda */ 450 addr = addr - 0; 451 break; 452 case 0x1: /* ldmia */ 453 addr = addr + 0 + ((nregs - 1) << 2); 454 break; 455 case 0x2: /* ldmdb */ 456 addr = addr - 4; 457 break; 458 case 0x3: /* ldmib */ 459 addr = addr + 4 + ((nregs - 1) << 2); 460 break; 461 } 462 db_read_bytes(addr, 4, (char *)&addr); 463 return (addr); 464 default: 465 panic("branch_taken: botch"); 466 } 467 } 468
Indexes created Mon Sep 29 21:09:56 GMT 2025