db_interface.c revision 1.13
1 /* $NetBSD: db_interface.c,v 1.13 2002/01/05 22:41:47 chris Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Scott K. Stevens 5 * 6 * Mach Operating System 7 * Copyright (c) 1991,1990 Carnegie Mellon University 8 * All Rights Reserved. 9 * 10 * Permission to use, copy, modify and distribute this software and its 11 * documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 * 30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) 31 */ 32 33 /* 34 * Interface to new debugger. 35 */ 36 #include "opt_ddb.h" 37 38 #include <sys/param.h> 39 #include <sys/proc.h> 40 #include <sys/reboot.h> 41 #include <sys/systm.h> /* just for boothowto */ 42 #include <sys/exec.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <arm/arm32/db_machdep.h> 47 #include <arm/arm32/katelib.h> 48 #include <arm/undefined.h> 49 #include <ddb/db_access.h> 50 #include <ddb/db_command.h> 51 #include <ddb/db_output.h> 52 #include <ddb/db_variables.h> 53 #include <ddb/db_sym.h> 54 #include <ddb/db_extern.h> 55 #include <ddb/db_interface.h> 56 #include <dev/cons.h> 57 58 static int nil; 59 60 int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int)); 61 int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int)); 62 int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int)); 63 u_int db_fetch_reg __P((int, db_regs_t *)); 64 65 static int db_validate_address __P((vm_offset_t)); 66 static void db_write_text __P((unsigned char *, int)); 67 int db_trapper __P((u_int, u_int, trapframe_t *, int)); 68 69 70 const struct db_variable db_regs[] = { 71 { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, }, 72 { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, }, 73 { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, }, 74 { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, }, 75 { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, }, 76 { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, }, 77 { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, }, 78 { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, }, 79 { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, }, 80 { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, }, 81 { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, }, 82 { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, }, 83 { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, }, 84 { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, }, 85 { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, }, 86 { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, }, 87 { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, }, 88 { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, }, 89 { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, }, 90 { "und_sp", (long *)&nil, db_access_und_sp, }, 91 { "abt_sp", (long *)&nil, db_access_abt_sp, }, 92 { "irq_sp", (long *)&nil, db_access_irq_sp, }, 93 }; 94 95 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); 96 97 extern label_t *db_recover; 98 99 int db_active = 0; 100 101 int db_access_und_sp(vp, valp, rw) 102 const struct db_variable *vp; 103 db_expr_t *valp; 104 int rw; 105 { 106 if (rw == DB_VAR_GET) 107 *valp = get_stackptr(PSR_UND32_MODE); 108 return(0); 109 } 110 111 int db_access_abt_sp(vp, valp, rw) 112 const struct db_variable *vp; 113 db_expr_t *valp; 114 int rw; 115 { 116 if (rw == DB_VAR_GET) 117 *valp = get_stackptr(PSR_ABT32_MODE); 118 return(0); 119 } 120 121 int db_access_irq_sp(vp, valp, rw) 122 const struct db_variable *vp; 123 db_expr_t *valp; 124 int rw; 125 { 126 if (rw == DB_VAR_GET) 127 *valp = get_stackptr(PSR_IRQ32_MODE); 128 return(0); 129 } 130 131 /* 132 * kdb_trap - field a TRACE or BPT trap 133 */ 134 int 135 kdb_trap(type, regs) 136 int type; 137 db_regs_t *regs; 138 { 139 int s; 140 141 switch (type) { 142 case T_BREAKPOINT: /* breakpoint */ 143 case -1: /* keyboard interrupt */ 144 break; 145 default: 146 db_printf("kernel: trap"); 147 if (db_recover != 0) { 148 db_error("Faulted in DDB; continuing...\n"); 149 /*NOTREACHED*/ 150 } 151 } 152 153 /* Should switch to kdb`s own stack here. */ 154 155 ddb_regs = *regs; 156 157 s = splhigh(); 158 db_active++; 159 cnpollc(TRUE); 160 db_trap(type, 0/*code*/); 161 cnpollc(FALSE); 162 db_active--; 163 splx(s); 164 165 *regs = ddb_regs; 166 167 return (1); 168 } 169 170 171 static int 172 db_validate_address(addr) 173 vm_offset_t addr; 174 { 175 pt_entry_t *ptep; 176 pd_entry_t *pdep; 177 struct proc *p = curproc; 178 179 /* 180 * If we have a valid pmap for curproc, use it's page directory 181 * otherwise use the kernel pmap's page directory. 182 */ 183 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap) 184 pdep = pmap_kernel()->pm_pdir; 185 else 186 pdep = p->p_vmspace->vm_map.pmap->pm_pdir; 187 188 /* Make sure the address we are reading is valid */ 189 switch ((pdep[(addr >> 20) + 0] & L1_MASK)) { 190 case L1_SECTION: 191 break; 192 case L1_PAGE: 193 /* Check the L2 page table for validity */ 194 ptep = vtopte(addr); 195 if ((*ptep & L2_MASK) != L2_INVAL) 196 break; 197 /* FALLTHROUGH */ 198 default: 199 return 1; 200 } 201 202 return 0; 203 } 204 205 /* 206 * Read bytes from kernel address space for debugger. 207 */ 208 void 209 db_read_bytes(addr, size, data) 210 vm_offset_t addr; 211 size_t size; 212 char *data; 213 { 214 char *src; 215 216 src = (char *)addr; 217 while (--size >= 0) { 218 if (db_validate_address((u_int)src)) { 219 db_printf("address %p is invalid\n", src); 220 return; 221 } 222 *data++ = *src++; 223 } 224 } 225 226 static void 227 db_write_text(dst, ch) 228 unsigned char *dst; 229 int ch; 230 { 231 pt_entry_t *ptep, pteo; 232 vm_offset_t va; 233 234 va = (unsigned long)dst & (~PGOFSET); 235 ptep = vtopte(va); 236 237 if (db_validate_address((u_int)dst)) { 238 db_printf(" address %p not a valid page\n", dst); 239 return; 240 } 241 242 pteo = *ptep; 243 *ptep = pteo | PT_AP(AP_KRW); 244 cpu_tlb_flushD_SE(va); 245 246 *dst = (unsigned char)ch; 247 248 /* make sure the caches and memory are in sync */ 249 cpu_cache_syncI_rng((u_int)dst, 4); 250 251 *ptep = pteo; 252 cpu_tlb_flushD_SE(va); 253 } 254 255 /* 256 * Write bytes to kernel address space for debugger. 257 */ 258 void 259 db_write_bytes(addr, size, data) 260 vm_offset_t addr; 261 size_t size; 262 char *data; 263 { 264 extern char etext[]; 265 char *dst; 266 int loop; 267 268 dst = (char *)addr; 269 loop = size; 270 while (--loop >= 0) { 271 if ((dst >= (char *)KERNEL_TEXT_BASE) && (dst < etext)) 272 db_write_text(dst, *data); 273 else { 274 if (db_validate_address((u_int)dst)) { 275 db_printf("address %p is invalid\n", dst); 276 return; 277 } 278 *dst = *data; 279 } 280 dst++, data++; 281 } 282 /* make sure the caches and memory are in sync */ 283 cpu_cache_syncI_rng(addr, size); 284 285 /* In case the current page tables have been modified ... */ 286 cpu_tlb_flushID(); 287 } 288 289 void 290 cpu_Debugger() 291 { 292 asm(".word 0xe7ffffff"); 293 } 294 295 const struct db_command db_machine_command_table[] = { 296 { "frame", db_show_frame_cmd, 0, NULL }, 297 { "panic", db_show_panic_cmd, 0, NULL }, 298 #ifdef ARM32_DB_COMMANDS 299 ARM32_DB_COMMANDS, 300 #endif 301 { NULL, NULL, 0, NULL } 302 }; 303 304 int 305 db_trapper(addr, inst, frame, fault_code) 306 u_int addr; 307 u_int inst; 308 trapframe_t *frame; 309 int fault_code; 310 { 311 if (fault_code == 0) { 312 if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK)) 313 kdb_trap(T_BREAKPOINT, frame); 314 else 315 kdb_trap(-1, frame); 316 } else 317 return (1); 318 return (0); 319 } 320 321 extern u_int esym; 322 extern u_int end; 323 324 static struct undefined_handler db_uh; 325 326 void 327 db_machine_init() 328 { 329 #ifndef __ELF__ 330 struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE; 331 int len; 332 333 /* 334 * The boot loader currently loads the kernel with the a.out 335 * header still attached. 336 */ 337 338 if (kernexec->a_syms == 0) { 339 printf("ddb: No symbol table\n"); 340 } else { 341 /* cover the symbols themselves (what is the int for?? XXX) */ 342 esym = (int)&end + kernexec->a_syms + sizeof(int); 343 344 /* 345 * and the string table. (int containing size of string 346 * table is included in string table size). 347 */ 348 len = *((u_int *)esym); 349 esym += (len + (sizeof(u_int) - 1)) & ~(sizeof(u_int) - 1); 350 } 351 #endif 352 353 /* 354 * We get called before malloc() is available, so supply a static 355 * struct undefined_handler. 356 */ 357 db_uh.uh_handler = db_trapper; 358 install_coproc_handler_static(0, &db_uh); 359 } 360 361 u_int 362 db_fetch_reg(reg, db_regs) 363 int reg; 364 db_regs_t *db_regs; 365 { 366 367 switch (reg) { 368 case 0: 369 return (db_regs->tf_r0); 370 case 1: 371 return (db_regs->tf_r1); 372 case 2: 373 return (db_regs->tf_r2); 374 case 3: 375 return (db_regs->tf_r3); 376 case 4: 377 return (db_regs->tf_r4); 378 case 5: 379 return (db_regs->tf_r5); 380 case 6: 381 return (db_regs->tf_r6); 382 case 7: 383 return (db_regs->tf_r7); 384 case 8: 385 return (db_regs->tf_r8); 386 case 9: 387 return (db_regs->tf_r9); 388 case 10: 389 return (db_regs->tf_r10); 390 case 11: 391 return (db_regs->tf_r11); 392 case 12: 393 return (db_regs->tf_r12); 394 case 13: 395 return (db_regs->tf_svc_sp); 396 case 14: 397 return (db_regs->tf_svc_lr); 398 case 15: 399 return (db_regs->tf_pc); 400 default: 401 panic("db_fetch_reg: botch"); 402 } 403 } 404 405 u_int 406 branch_taken(insn, pc, db_regs) 407 u_int insn; 408 u_int pc; 409 db_regs_t *db_regs; 410 { 411 u_int addr, nregs; 412 413 switch ((insn >> 24) & 0xf) { 414 case 0xa: /* b ... */ 415 case 0xb: /* bl ... */ 416 addr = ((insn << 2) & 0x03ffffff); 417 if (addr & 0x02000000) 418 addr |= 0xfc000000; 419 return (pc + 8 + addr); 420 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 421 addr = db_fetch_reg(insn & 0xf, db_regs); 422 addr = pc + 8 + (addr << 2); 423 db_read_bytes(addr, 4, (char *)&addr); 424 return (addr); 425 case 0x1: /* mov pc, reg */ 426 addr = db_fetch_reg(insn & 0xf, db_regs); 427 return (addr); 428 case 0x8: /* ldmxx reg, {..., pc} */ 429 case 0x9: 430 addr = db_fetch_reg((insn >> 16) & 0xf, db_regs); 431 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555); 432 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333); 433 nregs = (nregs + (nregs >> 4)) & 0x0f0f; 434 nregs = (nregs + (nregs >> 8)) & 0x001f; 435 switch ((insn >> 23) & 0x3) { 436 case 0x0: /* ldmda */ 437 addr = addr - 0; 438 break; 439 case 0x1: /* ldmia */ 440 addr = addr + 0 + ((nregs - 1) << 2); 441 break; 442 case 0x2: /* ldmdb */ 443 addr = addr - 4; 444 break; 445 case 0x3: /* ldmib */ 446 addr = addr + 4 + ((nregs - 1) << 2); 447 break; 448 } 449 db_read_bytes(addr, 4, (char *)&addr); 450 return (addr); 451 default: 452 panic("branch_taken: botch"); 453 } 454 } 455
Indexes created Tue Sep 30 11:09:46 GMT 2025