db_interface.c revision 1.14
1 /* $NetBSD: db_interface.c,v 1.14 2002/01/17 03:52:06 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Scott K. Stevens 5 * 6 * Mach Operating System 7 * Copyright (c) 1991,1990 Carnegie Mellon University 8 * All Rights Reserved. 9 * 10 * Permission to use, copy, modify and distribute this software and its 11 * documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 * 30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) 31 */ 32 33 /* 34 * Interface to new debugger. 35 */ 36 #include "opt_ddb.h" 37 38 #include <sys/param.h> 39 #include <sys/proc.h> 40 #include <sys/reboot.h> 41 #include <sys/systm.h> /* just for boothowto */ 42 #include <sys/exec.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <arm/arm32/db_machdep.h> 47 #include <arm/arm32/katelib.h> 48 #include <arm/undefined.h> 49 #include <ddb/db_access.h> 50 #include <ddb/db_command.h> 51 #include <ddb/db_output.h> 52 #include <ddb/db_variables.h> 53 #include <ddb/db_sym.h> 54 #include <ddb/db_extern.h> 55 #include <ddb/db_interface.h> 56 #include <dev/cons.h> 57 58 static int nil; 59 60 int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int)); 61 int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int)); 62 int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int)); 63 u_int db_fetch_reg __P((int, db_regs_t *)); 64 65 static int db_validate_address __P((vm_offset_t)); 66 static void db_write_text __P((unsigned char *, int)); 67 int db_trapper __P((u_int, u_int, trapframe_t *, int)); 68 69 70 const struct db_variable db_regs[] = { 71 { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, }, 72 { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, }, 73 { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, }, 74 { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, }, 75 { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, }, 76 { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, }, 77 { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, }, 78 { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, }, 79 { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, }, 80 { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, }, 81 { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, }, 82 { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, }, 83 { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, }, 84 { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, }, 85 { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, }, 86 { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, }, 87 { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, }, 88 { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, }, 89 { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, }, 90 { "und_sp", (long *)&nil, db_access_und_sp, }, 91 { "abt_sp", (long *)&nil, db_access_abt_sp, }, 92 { "irq_sp", (long *)&nil, db_access_irq_sp, }, 93 }; 94 95 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); 96 97 extern label_t *db_recover; 98 99 int db_active = 0; 100 101 int db_access_und_sp(vp, valp, rw) 102 const struct db_variable *vp; 103 db_expr_t *valp; 104 int rw; 105 { 106 if (rw == DB_VAR_GET) 107 *valp = get_stackptr(PSR_UND32_MODE); 108 return(0); 109 } 110 111 int db_access_abt_sp(vp, valp, rw) 112 const struct db_variable *vp; 113 db_expr_t *valp; 114 int rw; 115 { 116 if (rw == DB_VAR_GET) 117 *valp = get_stackptr(PSR_ABT32_MODE); 118 return(0); 119 } 120 121 int db_access_irq_sp(vp, valp, rw) 122 const struct db_variable *vp; 123 db_expr_t *valp; 124 int rw; 125 { 126 if (rw == DB_VAR_GET) 127 *valp = get_stackptr(PSR_IRQ32_MODE); 128 return(0); 129 } 130 131 /* 132 * kdb_trap - field a TRACE or BPT trap 133 */ 134 int 135 kdb_trap(type, regs) 136 int type; 137 db_regs_t *regs; 138 { 139 int s; 140 141 switch (type) { 142 case T_BREAKPOINT: /* breakpoint */ 143 case -1: /* keyboard interrupt */ 144 break; 145 default: 146 db_printf("kernel: trap"); 147 if (db_recover != 0) { 148 db_error("Faulted in DDB; continuing...\n"); 149 /*NOTREACHED*/ 150 } 151 } 152 153 /* Should switch to kdb`s own stack here. */ 154 155 ddb_regs = *regs; 156 157 s = splhigh(); 158 db_active++; 159 cnpollc(TRUE); 160 db_trap(type, 0/*code*/); 161 cnpollc(FALSE); 162 db_active--; 163 splx(s); 164 165 *regs = ddb_regs; 166 167 return (1); 168 } 169 170 171 static int 172 db_validate_address(addr) 173 vm_offset_t addr; 174 { 175 struct proc *p = curproc; 176 struct pmap *pmap; 177 178 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap) 179 pmap = pmap_kernel(); 180 else 181 pmap = p->p_vmspace->vm_map.pmap; 182 183 return (pmap_extract(pmap, addr, NULL) == FALSE); 184 } 185 186 /* 187 * Read bytes from kernel address space for debugger. 188 */ 189 void 190 db_read_bytes(addr, size, data) 191 vm_offset_t addr; 192 size_t size; 193 char *data; 194 { 195 char *src; 196 197 src = (char *)addr; 198 199 while (size-- > 0) { 200 if (db_validate_address((u_int)src)) { 201 db_printf("address %p is invalid\n", src); 202 return; 203 } 204 *data++ = *src++; 205 } 206 } 207 208 static void 209 db_write_text(dst, ch) 210 unsigned char *dst; 211 int ch; 212 { 213 pt_entry_t *ptep, pteo; 214 vm_offset_t va; 215 216 va = (unsigned long)dst & (~PGOFSET); 217 ptep = vtopte(va); 218 219 if (db_validate_address((u_int)dst)) { 220 db_printf(" address %p not a valid page\n", dst); 221 return; 222 } 223 224 pteo = *ptep; 225 *ptep = pteo | PT_AP(AP_KRW); 226 cpu_tlb_flushD_SE(va); 227 228 *dst = (unsigned char)ch; 229 230 /* make sure the caches and memory are in sync */ 231 cpu_cache_syncI_rng((u_int)dst, 4); 232 233 *ptep = pteo; 234 cpu_tlb_flushD_SE(va); 235 } 236 237 /* 238 * Write bytes to kernel address space for debugger. 239 */ 240 void 241 db_write_bytes(addr, size, data) 242 vm_offset_t addr; 243 size_t size; 244 char *data; 245 { 246 extern char etext[]; 247 char *dst; 248 size_t loop; 249 250 dst = (char *)addr; 251 loop = size; 252 while (loop-- > 0) { 253 if ((dst >= (char *)KERNEL_TEXT_BASE) && (dst < etext)) 254 db_write_text(dst, *data); 255 else { 256 if (db_validate_address((u_int)dst)) { 257 db_printf("address %p is invalid\n", dst); 258 return; 259 } 260 *dst = *data; 261 } 262 dst++, data++; 263 } 264 /* make sure the caches and memory are in sync */ 265 cpu_cache_syncI_rng(addr, size); 266 267 /* In case the current page tables have been modified ... */ 268 cpu_tlb_flushID(); 269 } 270 271 void 272 cpu_Debugger() 273 { 274 asm(".word 0xe7ffffff"); 275 } 276 277 const struct db_command db_machine_command_table[] = { 278 { "frame", db_show_frame_cmd, 0, NULL }, 279 { "panic", db_show_panic_cmd, 0, NULL }, 280 #ifdef ARM32_DB_COMMANDS 281 ARM32_DB_COMMANDS, 282 #endif 283 { NULL, NULL, 0, NULL } 284 }; 285 286 int 287 db_trapper(addr, inst, frame, fault_code) 288 u_int addr; 289 u_int inst; 290 trapframe_t *frame; 291 int fault_code; 292 { 293 if (fault_code == 0) { 294 if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK)) 295 kdb_trap(T_BREAKPOINT, frame); 296 else 297 kdb_trap(-1, frame); 298 } else 299 return (1); 300 return (0); 301 } 302 303 extern u_int esym; 304 extern u_int end; 305 306 static struct undefined_handler db_uh; 307 308 void 309 db_machine_init() 310 { 311 #ifndef __ELF__ 312 struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE; 313 int len; 314 315 /* 316 * The boot loader currently loads the kernel with the a.out 317 * header still attached. 318 */ 319 320 if (kernexec->a_syms == 0) { 321 printf("ddb: No symbol table\n"); 322 } else { 323 /* cover the symbols themselves (what is the int for?? XXX) */ 324 esym = (int)&end + kernexec->a_syms + sizeof(int); 325 326 /* 327 * and the string table. (int containing size of string 328 * table is included in string table size). 329 */ 330 len = *((u_int *)esym); 331 esym += (len + (sizeof(u_int) - 1)) & ~(sizeof(u_int) - 1); 332 } 333 #endif 334 335 /* 336 * We get called before malloc() is available, so supply a static 337 * struct undefined_handler. 338 */ 339 db_uh.uh_handler = db_trapper; 340 install_coproc_handler_static(0, &db_uh); 341 } 342 343 u_int 344 db_fetch_reg(reg, db_regs) 345 int reg; 346 db_regs_t *db_regs; 347 { 348 349 switch (reg) { 350 case 0: 351 return (db_regs->tf_r0); 352 case 1: 353 return (db_regs->tf_r1); 354 case 2: 355 return (db_regs->tf_r2); 356 case 3: 357 return (db_regs->tf_r3); 358 case 4: 359 return (db_regs->tf_r4); 360 case 5: 361 return (db_regs->tf_r5); 362 case 6: 363 return (db_regs->tf_r6); 364 case 7: 365 return (db_regs->tf_r7); 366 case 8: 367 return (db_regs->tf_r8); 368 case 9: 369 return (db_regs->tf_r9); 370 case 10: 371 return (db_regs->tf_r10); 372 case 11: 373 return (db_regs->tf_r11); 374 case 12: 375 return (db_regs->tf_r12); 376 case 13: 377 return (db_regs->tf_svc_sp); 378 case 14: 379 return (db_regs->tf_svc_lr); 380 case 15: 381 return (db_regs->tf_pc); 382 default: 383 panic("db_fetch_reg: botch"); 384 } 385 } 386 387 u_int 388 branch_taken(insn, pc, db_regs) 389 u_int insn; 390 u_int pc; 391 db_regs_t *db_regs; 392 { 393 u_int addr, nregs; 394 395 switch ((insn >> 24) & 0xf) { 396 case 0xa: /* b ... */ 397 case 0xb: /* bl ... */ 398 addr = ((insn << 2) & 0x03ffffff); 399 if (addr & 0x02000000) 400 addr |= 0xfc000000; 401 return (pc + 8 + addr); 402 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 403 addr = db_fetch_reg(insn & 0xf, db_regs); 404 addr = pc + 8 + (addr << 2); 405 db_read_bytes(addr, 4, (char *)&addr); 406 return (addr); 407 case 0x1: /* mov pc, reg */ 408 addr = db_fetch_reg(insn & 0xf, db_regs); 409 return (addr); 410 case 0x8: /* ldmxx reg, {..., pc} */ 411 case 0x9: 412 addr = db_fetch_reg((insn >> 16) & 0xf, db_regs); 413 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555); 414 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333); 415 nregs = (nregs + (nregs >> 4)) & 0x0f0f; 416 nregs = (nregs + (nregs >> 8)) & 0x001f; 417 switch ((insn >> 23) & 0x3) { 418 case 0x0: /* ldmda */ 419 addr = addr - 0; 420 break; 421 case 0x1: /* ldmia */ 422 addr = addr + 0 + ((nregs - 1) << 2); 423 break; 424 case 0x2: /* ldmdb */ 425 addr = addr - 4; 426 break; 427 case 0x3: /* ldmib */ 428 addr = addr + 4 + ((nregs - 1) << 2); 429 break; 430 } 431 db_read_bytes(addr, 4, (char *)&addr); 432 return (addr); 433 default: 434 panic("branch_taken: botch"); 435 } 436 } 437
Indexes created Tue Sep 30 07:10:03 GMT 2025