db_interface.c revision 1.15 1 /* $NetBSD: db_interface.c,v 1.15 2002/01/17 20:47:00 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1996 Scott K. Stevens
5 *
6 * Mach Operating System
7 * Copyright (c) 1991,1990 Carnegie Mellon University
8 * All Rights Reserved.
9 *
10 * Permission to use, copy, modify and distribute this software and its
11 * documentation is hereby granted, provided that both the copyright
12 * notice and this permission notice appear in all copies of the
13 * software, derivative works or modified versions, and any portions
14 * thereof, and that both notices appear in supporting documentation.
15 *
16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19 *
20 * Carnegie Mellon requests users of this software to return to
21 *
22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
23 * School of Computer Science
24 * Carnegie Mellon University
25 * Pittsburgh PA 15213-3890
26 *
27 * any improvements or extensions that they make and grant Carnegie the
28 * rights to redistribute these changes.
29 *
30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
31 */
32
33 /*
34 * Interface to new debugger.
35 */
36 #include "opt_ddb.h"
37
38 #include <sys/param.h>
39 #include <sys/proc.h>
40 #include <sys/reboot.h>
41 #include <sys/systm.h> /* just for boothowto */
42 #include <sys/exec.h>
43
44 #include <uvm/uvm_extern.h>
45
46 #include <arm/arm32/db_machdep.h>
47 #include <arm/arm32/katelib.h>
48 #include <arm/undefined.h>
49 #include <ddb/db_access.h>
50 #include <ddb/db_command.h>
51 #include <ddb/db_output.h>
52 #include <ddb/db_variables.h>
53 #include <ddb/db_sym.h>
54 #include <ddb/db_extern.h>
55 #include <ddb/db_interface.h>
56 #include <dev/cons.h>
57
58 static int nil;
59
60 int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int));
61 int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int));
62 int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int));
63 u_int db_fetch_reg __P((int, db_regs_t *));
64
65 int db_trapper __P((u_int, u_int, trapframe_t *, int));
66
67 const struct db_variable db_regs[] = {
68 { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, },
69 { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, },
70 { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, },
71 { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, },
72 { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, },
73 { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, },
74 { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, },
75 { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, },
76 { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, },
77 { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, },
78 { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, },
79 { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, },
80 { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, },
81 { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, },
82 { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, },
83 { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, },
84 { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, },
85 { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, },
86 { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, },
87 { "und_sp", (long *)&nil, db_access_und_sp, },
88 { "abt_sp", (long *)&nil, db_access_abt_sp, },
89 { "irq_sp", (long *)&nil, db_access_irq_sp, },
90 };
91
92 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
93
94 extern label_t *db_recover;
95
96 int db_active = 0;
97
98 int
99 db_access_und_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
100 {
101
102 if (rw == DB_VAR_GET)
103 *valp = get_stackptr(PSR_UND32_MODE);
104 return(0);
105 }
106
107 int
108 db_access_abt_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
109 {
110
111 if (rw == DB_VAR_GET)
112 *valp = get_stackptr(PSR_ABT32_MODE);
113 return(0);
114 }
115
116 int
117 db_access_irq_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
118 {
119
120 if (rw == DB_VAR_GET)
121 *valp = get_stackptr(PSR_IRQ32_MODE);
122 return(0);
123 }
124
125 /*
126 * kdb_trap - field a TRACE or BPT trap
127 */
128 int
129 kdb_trap(int type, db_regs_t *regs)
130 {
131 int s;
132
133 switch (type) {
134 case T_BREAKPOINT: /* breakpoint */
135 case -1: /* keyboard interrupt */
136 break;
137 default:
138 db_printf("kernel: trap");
139 if (db_recover != 0) {
140 db_error("Faulted in DDB; continuing...\n");
141 /*NOTREACHED*/
142 }
143 }
144
145 /* Should switch to kdb`s own stack here. */
146
147 ddb_regs = *regs;
148
149 s = splhigh();
150 db_active++;
151 cnpollc(TRUE);
152 db_trap(type, 0/*code*/);
153 cnpollc(FALSE);
154 db_active--;
155 splx(s);
156
157 *regs = ddb_regs;
158
159 return (1);
160 }
161
162
163 static int
164 db_validate_address(vaddr_t addr)
165 {
166 struct proc *p = curproc;
167 struct pmap *pmap;
168
169 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap)
170 pmap = pmap_kernel();
171 else
172 pmap = p->p_vmspace->vm_map.pmap;
173
174 return (pmap_extract(pmap, addr, NULL) == FALSE);
175 }
176
177 /*
178 * Read bytes from kernel address space for debugger.
179 */
180 void
181 db_read_bytes(addr, size, data)
182 vm_offset_t addr;
183 size_t size;
184 char *data;
185 {
186 char *src;
187
188 src = (char *)addr;
189
190 while (size-- > 0) {
191 if (db_validate_address((u_int)src)) {
192 db_printf("address %p is invalid\n", src);
193 return;
194 }
195 *data++ = *src++;
196 }
197 }
198
199 static void
200 db_write_text(vaddr_t addr, size_t size, char *data)
201 {
202 struct pmap *pmap = pmap_kernel();
203 pd_entry_t *pde, oldpde, tmppde;
204 pt_entry_t *pte, oldpte, tmppte;
205 vaddr_t pgva;
206 size_t limit, savesize;
207 char *dst;
208
209 if ((savesize = size) == 0)
210 return;
211
212 dst = (char *) addr;
213
214 do {
215 /* Get the PDE of the current VA. */
216 pde = pmap_pde(pmap, (vaddr_t) dst);
217 switch ((oldpde = *pde) & L1_MASK) {
218 case L1_SECTION:
219 pgva = (vaddr_t)dst & ~(L1_SEC_SIZE - 1);
220 limit = L1_SEC_SIZE -
221 ((vaddr_t)dst & (L1_SEC_SIZE - 1));
222
223 tmppde = oldpde | (AP_KRW << AP_SECTION_SHIFT);
224 *pde = tmppde;
225 break;
226
227 case L1_PAGE:
228 pgva = (vaddr_t)dst & ~PGOFSET;
229 limit = NBPG - ((vaddr_t)dst & PGOFSET);
230
231 pte = vtopte(pgva);
232 oldpte = *pte;
233 tmppte = oldpte | PT_AP(AP_KRW);
234 *pte = tmppte;
235 break;
236
237 default:
238 printf(" address 0x%08lx not a valid page\n",
239 (vaddr_t) dst);
240 return;
241 }
242 cpu_tlb_flushD_SE(pgva);
243
244 if (limit > size)
245 limit = size;
246 size -= limit;
247
248 /*
249 * Page is now writable. Do as much access as we
250 * can in this page.
251 */
252 for (; limit > 0; limit--)
253 *dst++ = *data++;
254
255 /*
256 * Restore old mapping permissions.
257 */
258 switch (oldpde & L1_MASK) {
259 case L1_SECTION:
260 *pde = oldpde;
261 break;
262
263 case L1_PAGE:
264 *pte = oldpte;
265 break;
266 }
267 cpu_tlb_flushD_SE(pgva);
268 } while (size != 0);
269
270 /* Sync the I-cache. */
271 cpu_cache_syncI_rng(addr, savesize);
272 }
273
274 /*
275 * Write bytes to kernel address space for debugger.
276 */
277 void
278 db_write_bytes(vaddr_t addr, size_t size, char *data)
279 {
280 extern char etext[];
281 char *dst;
282 size_t loop;
283
284 /* If any part is in kernel text, use db_write_text() */
285 if (addr >= KERNEL_TEXT_BASE && addr < (vaddr_t) etext) {
286 db_write_text(addr, size, data);
287 return;
288 }
289
290 dst = (char *)addr;
291 loop = size;
292 while (loop-- > 0) {
293 if (db_validate_address((u_int)dst)) {
294 db_printf("address %p is invalid\n", dst);
295 return;
296 }
297 *dst++ = *data++;
298 }
299 /* make sure the caches and memory are in sync */
300 cpu_cache_syncI_rng(addr, size);
301
302 /* In case the current page tables have been modified ... */
303 cpu_tlb_flushID();
304 }
305
306 void
307 cpu_Debugger(void)
308 {
309 asm(".word 0xe7ffffff");
310 }
311
312 const struct db_command db_machine_command_table[] = {
313 { "frame", db_show_frame_cmd, 0, NULL },
314 { "panic", db_show_panic_cmd, 0, NULL },
315 #ifdef ARM32_DB_COMMANDS
316 ARM32_DB_COMMANDS,
317 #endif
318 { NULL, NULL, 0, NULL }
319 };
320
321 int
322 db_trapper(u_int addr, u_int inst, trapframe_t *frame, int fault_code)
323 {
324
325 if (fault_code == 0) {
326 if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK))
327 kdb_trap(T_BREAKPOINT, frame);
328 else
329 kdb_trap(-1, frame);
330 } else
331 return (1);
332 return (0);
333 }
334
335 extern u_int esym;
336 extern u_int end;
337
338 static struct undefined_handler db_uh;
339
340 void
341 db_machine_init(void)
342 {
343 #ifndef __ELF__
344 struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE;
345 int len;
346
347 /*
348 * The boot loader currently loads the kernel with the a.out
349 * header still attached.
350 */
351
352 if (kernexec->a_syms == 0) {
353 printf("ddb: No symbol table\n");
354 } else {
355 /* cover the symbols themselves (what is the int for?? XXX) */
356 esym = (int)&end + kernexec->a_syms + sizeof(int);
357
358 /*
359 * and the string table. (int containing size of string
360 * table is included in string table size).
361 */
362 len = *((u_int *)esym);
363 esym += (len + (sizeof(u_int) - 1)) & ~(sizeof(u_int) - 1);
364 }
365 #endif
366
367 /*
368 * We get called before malloc() is available, so supply a static
369 * struct undefined_handler.
370 */
371 db_uh.uh_handler = db_trapper;
372 install_coproc_handler_static(0, &db_uh);
373 }
374
375 u_int
376 db_fetch_reg(int reg, db_regs_t *db_regs)
377 {
378
379 switch (reg) {
380 case 0:
381 return (db_regs->tf_r0);
382 case 1:
383 return (db_regs->tf_r1);
384 case 2:
385 return (db_regs->tf_r2);
386 case 3:
387 return (db_regs->tf_r3);
388 case 4:
389 return (db_regs->tf_r4);
390 case 5:
391 return (db_regs->tf_r5);
392 case 6:
393 return (db_regs->tf_r6);
394 case 7:
395 return (db_regs->tf_r7);
396 case 8:
397 return (db_regs->tf_r8);
398 case 9:
399 return (db_regs->tf_r9);
400 case 10:
401 return (db_regs->tf_r10);
402 case 11:
403 return (db_regs->tf_r11);
404 case 12:
405 return (db_regs->tf_r12);
406 case 13:
407 return (db_regs->tf_svc_sp);
408 case 14:
409 return (db_regs->tf_svc_lr);
410 case 15:
411 return (db_regs->tf_pc);
412 default:
413 panic("db_fetch_reg: botch");
414 }
415 }
416
417 u_int
418 branch_taken(u_int insn, u_int pc, db_regs_t *db_regs)
419 {
420 u_int addr, nregs;
421
422 switch ((insn >> 24) & 0xf) {
423 case 0xa: /* b ... */
424 case 0xb: /* bl ... */
425 addr = ((insn << 2) & 0x03ffffff);
426 if (addr & 0x02000000)
427 addr |= 0xfc000000;
428 return (pc + 8 + addr);
429 case 0x7: /* ldr pc, [pc, reg, lsl #2] */
430 addr = db_fetch_reg(insn & 0xf, db_regs);
431 addr = pc + 8 + (addr << 2);
432 db_read_bytes(addr, 4, (char *)&addr);
433 return (addr);
434 case 0x1: /* mov pc, reg */
435 addr = db_fetch_reg(insn & 0xf, db_regs);
436 return (addr);
437 case 0x8: /* ldmxx reg, {..., pc} */
438 case 0x9:
439 addr = db_fetch_reg((insn >> 16) & 0xf, db_regs);
440 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
441 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
442 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
443 nregs = (nregs + (nregs >> 8)) & 0x001f;
444 switch ((insn >> 23) & 0x3) {
445 case 0x0: /* ldmda */
446 addr = addr - 0;
447 break;
448 case 0x1: /* ldmia */
449 addr = addr + 0 + ((nregs - 1) << 2);
450 break;
451 case 0x2: /* ldmdb */
452 addr = addr - 4;
453 break;
454 case 0x3: /* ldmib */
455 addr = addr + 4 + ((nregs - 1) << 2);
456 break;
457 }
458 db_read_bytes(addr, 4, (char *)&addr);
459 return (addr);
460 default:
461 panic("branch_taken: botch");
462 }
463 }
464