db_machdep.c revision 1.12.20.1
1 /* $NetBSD: db_machdep.c,v 1.12.20.1 2012/11/28 22:40:18 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Mark Brinicombe 5 * 6 * Mach Operating System 7 * Copyright (c) 1991,1990 Carnegie Mellon University 8 * All Rights Reserved. 9 * 10 * Permission to use, copy, modify and distribute this software and its 11 * documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.12.20.1 2012/11/28 22:40:18 matt Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/proc.h> 36 #include <sys/vnode.h> 37 #include <sys/systm.h> 38 39 #include <arm/arm32/db_machdep.h> 40 #include <arm/cpufunc.h> 41 42 #include <ddb/db_access.h> 43 #include <ddb/db_sym.h> 44 #include <ddb/db_output.h> 45 #include <ddb/db_variables.h> 46 #include <ddb/db_command.h> 47 48 #ifdef _KERNEL 49 static long nil; 50 51 int db_access_und_sp(const struct db_variable *, db_expr_t *, int); 52 int db_access_abt_sp(const struct db_variable *, db_expr_t *, int); 53 int db_access_irq_sp(const struct db_variable *, db_expr_t *, int); 54 #endif 55 56 const struct db_variable db_regs[] = { 57 { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, NULL }, 58 { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, NULL }, 59 { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, NULL }, 60 { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, NULL }, 61 { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, NULL }, 62 { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, NULL }, 63 { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, NULL }, 64 { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, NULL }, 65 { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, NULL }, 66 { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, NULL }, 67 { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, NULL }, 68 { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, NULL }, 69 { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, NULL }, 70 { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, NULL }, 71 { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, NULL }, 72 { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, NULL }, 73 { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, NULL }, 74 { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, NULL }, 75 { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, NULL }, 76 #ifdef _KERNEL 77 { "und_sp", &nil, db_access_und_sp, NULL }, 78 { "abt_sp", &nil, db_access_abt_sp, NULL }, 79 { "irq_sp", &nil, db_access_irq_sp, NULL }, 80 #endif 81 }; 82 83 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); 84 85 const struct db_command db_machine_command_table[] = { 86 { DDB_ADD_CMD("frame", db_show_frame_cmd, 0, 87 "Displays the contents of a trapframe", 88 "[address]", 89 " address:\taddress of trapfame to display")}, 90 #ifdef _KERNEL 91 { DDB_ADD_CMD("panic", db_show_panic_cmd, 0, 92 "Displays the last panic string", 93 NULL,NULL) }, 94 { DDB_ADD_CMD("fault", db_show_fault_cmd, 0, 95 "Displays the fault registers", 96 NULL,NULL) }, 97 #endif 98 #ifdef ARM32_DB_COMMANDS 99 ARM32_DB_COMMANDS, 100 #endif 101 { DDB_ADD_CMD(NULL, NULL, 0,NULL,NULL,NULL) } 102 }; 103 104 #ifdef _KERNEL 105 int 106 db_access_und_sp(const struct db_variable *vp, db_expr_t *valp, int rw) 107 { 108 109 if (rw == DB_VAR_GET) 110 *valp = get_stackptr(PSR_UND32_MODE); 111 return(0); 112 } 113 114 int 115 db_access_abt_sp(const struct db_variable *vp, db_expr_t *valp, int rw) 116 { 117 118 if (rw == DB_VAR_GET) 119 *valp = get_stackptr(PSR_ABT32_MODE); 120 return(0); 121 } 122 123 int 124 db_access_irq_sp(const struct db_variable *vp, db_expr_t *valp, int rw) 125 { 126 127 if (rw == DB_VAR_GET) 128 *valp = get_stackptr(PSR_IRQ32_MODE); 129 return(0); 130 } 131 132 void 133 db_show_panic_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) 134 { 135 int s; 136 s = splhigh(); 137 138 db_printf("Panic string: %s\n", panicstr); 139 (void)splx(s); 140 } 141 142 void 143 db_show_fault_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) 144 { 145 db_printf("DFAR=%#x DFSR=%#x IFAR=%#x IFSR=%#x TTBR=%#x\n", 146 armreg_dfar_read(), armreg_dfsr_read(), 147 armreg_ifar_read(), armreg_ifsr_read(), 148 armreg_ttbr_read()); 149 } 150 #endif 151 152 153 void 154 db_show_frame_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) 155 { 156 struct trapframe *frame; 157 158 if (!have_addr) { 159 db_printf("frame address must be specified\n"); 160 return; 161 } 162 163 frame = (struct trapframe *)addr; 164 165 db_printf("frame address = %08x ", (u_int)frame); 166 db_printf("spsr=%08x\n", frame->tf_spsr); 167 db_printf("r0 =%08x r1 =%08x r2 =%08x r3 =%08x\n", 168 frame->tf_r0, frame->tf_r1, frame->tf_r2, frame->tf_r3); 169 db_printf("r4 =%08x r5 =%08x r6 =%08x r7 =%08x\n", 170 frame->tf_r4, frame->tf_r5, frame->tf_r6, frame->tf_r7); 171 db_printf("r8 =%08x r9 =%08x r10=%08x r11=%08x\n", 172 frame->tf_r8, frame->tf_r9, frame->tf_r10, frame->tf_r11); 173 db_printf("r12=%08x r13=%08x r14=%08x r15=%08x\n", 174 frame->tf_r12, frame->tf_usr_sp, frame->tf_usr_lr, frame->tf_pc); 175 db_printf("slr=%08x\n", frame->tf_svc_lr); 176 } 177
Indexes created Fri Oct 17 03:10:13 GMT 2025