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exception.S revision 1.16.18.1
      1  1.16.18.1     matt /*	$NetBSD: exception.S,v 1.16.18.1 2014/02/15 16:18:36 matt Exp $	*/
      2        1.1    chris 
      3        1.1    chris /*
      4        1.1    chris  * Copyright (c) 1994-1997 Mark Brinicombe.
      5        1.1    chris  * Copyright (c) 1994 Brini.
      6        1.1    chris  * All rights reserved.
      7        1.1    chris  *
      8        1.1    chris  * This code is derived from software written for Brini by Mark Brinicombe
      9        1.1    chris  *
     10        1.1    chris  * Redistribution and use in source and binary forms, with or without
     11        1.1    chris  * modification, are permitted provided that the following conditions
     12        1.1    chris  * are met:
     13        1.1    chris  * 1. Redistributions of source code must retain the above copyright
     14        1.1    chris  *    notice, this list of conditions and the following disclaimer.
     15        1.1    chris  * 2. Redistributions in binary form must reproduce the above copyright
     16        1.1    chris  *    notice, this list of conditions and the following disclaimer in the
     17        1.1    chris  *    documentation and/or other materials provided with the distribution.
     18        1.1    chris  * 3. All advertising materials mentioning features or use of this software
     19        1.1    chris  *    must display the following acknowledgement:
     20        1.1    chris  *	This product includes software developed by Brini.
     21        1.1    chris  * 4. The name of the company nor the name of the author may be used to
     22        1.1    chris  *    endorse or promote products derived from this software without specific
     23        1.1    chris  *    prior written permission.
     24        1.1    chris  *
     25        1.1    chris  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
     26        1.1    chris  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     27        1.1    chris  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28        1.1    chris  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     29        1.1    chris  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     30        1.1    chris  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     31        1.1    chris  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32        1.1    chris  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33        1.1    chris  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34        1.1    chris  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35        1.1    chris  * SUCH DAMAGE.
     36        1.1    chris  *
     37        1.1    chris  * RiscBSD kernel project
     38        1.1    chris  *
     39        1.1    chris  * exception.S
     40        1.1    chris  *
     41        1.1    chris  * Low level handlers for exception vectors
     42        1.1    chris  *
     43        1.1    chris  * Created      : 24/09/94
     44        1.1    chris  *
     45        1.1    chris  * Based on kate/display/abort.s
     46        1.1    chris  */
     47        1.1    chris 
     48       1.16     matt #include "assym.h"
     49       1.16     matt 
     50  1.16.18.1     matt #include <arm/asm.h>
     51  1.16.18.1     matt 
     52  1.16.18.1     matt #include <arm/locore.h>
     53  1.16.18.1     matt 
     54  1.16.18.1     matt 	RCSID("$NetBSD: exception.S,v 1.16.18.1 2014/02/15 16:18:36 matt Exp $")
     55        1.1    chris 
     56        1.1    chris 	.text
     57        1.1    chris 	.align	0
     58        1.1    chris 
     59       1.12      scw AST_ALIGNMENT_FAULT_LOCALS
     60        1.1    chris 
     61        1.1    chris /*
     62        1.3  thorpej  * reset_entry:
     63        1.3  thorpej  *
     64        1.3  thorpej  *	Handler for Reset exception.
     65        1.3  thorpej  */
     66  1.16.18.1     matt ARM_ASENTRY_NP(reset_entry)
     67  1.16.18.1     matt 	adr	r0, .Lreset_panicmsg
     68        1.3  thorpej 	mov	r1, lr
     69        1.3  thorpej 	bl	_C_LABEL(panic)
     70        1.3  thorpej 	/* NOTREACHED */
     71  1.16.18.1     matt .Lreset_panicmsg:
     72        1.3  thorpej 	.asciz	"Reset vector called, LR = 0x%08x"
     73        1.3  thorpej 	.balign	4
     74  1.16.18.1     matt ASEND(reset_entry)
     75        1.1    chris 
     76        1.3  thorpej /*
     77        1.3  thorpej  * swi_entry
     78        1.3  thorpej  *
     79        1.3  thorpej  *	Handler for the Software Interrupt exception.
     80        1.3  thorpej  */
     81  1.16.18.1     matt ARM_ASENTRY_NP(swi_entry)
     82        1.3  thorpej 	PUSHFRAME
     83        1.9      scw 	ENABLE_ALIGNMENT_FAULTS
     84        1.9      scw 
     85        1.3  thorpej 	mov	r0, sp			/* Pass the frame to any function */
     86        1.5    bjh21 	bl	_C_LABEL(swi_handler)	/* It's a SWI ! */
     87        1.1    chris 
     88       1.12      scw 	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
     89        1.3  thorpej 	PULLFRAME
     90        1.3  thorpej 	movs	pc, lr			/* Exit */
     91  1.16.18.1     matt ASEND(swi_entry)
     92        1.1    chris 
     93        1.3  thorpej /*
     94        1.3  thorpej  * prefetch_abort_entry:
     95        1.3  thorpej  *
     96        1.3  thorpej  *	Handler for the Prefetch Abort exception.
     97        1.3  thorpej  */
     98  1.16.18.1     matt ARM_ASENTRY_NP(prefetch_abort_entry)
     99       1.13      scw #ifdef __XSCALE__
    100       1.13      scw 	nop				/* Make absolutely sure any pending */
    101       1.13      scw 	nop				/* imprecise aborts have occurred. */
    102       1.13      scw #endif
    103        1.1    chris         sub     lr, lr, #0x00000004     /* Adjust the lr */
    104        1.1    chris 
    105        1.1    chris 	PUSHFRAMEINSVC
    106        1.9      scw 	ENABLE_ALIGNMENT_FAULTS
    107        1.9      scw 
    108  1.16.18.1     matt 	ldr	r1, .Lprefetch_abort_handler_address
    109  1.16.18.1     matt 	adr	lr, .Lexception_exit
    110        1.1    chris  	mov	r0, sp			/* pass the stack pointer as r0 */
    111       1.12      scw 	ldr	pc, [r1]
    112        1.1    chris 
    113  1.16.18.1     matt .Labortprefetch:
    114  1.16.18.1     matt         adr     r0, .Labortprefetchmsg
    115  1.16.18.1     matt 	b	_C_LABEL(panic)
    116  1.16.18.1     matt 
    117  1.16.18.1     matt .Lprefetch_abort_handler_address:
    118        1.1    chris 	.word	_C_LABEL(prefetch_abort_handler_address)
    119        1.1    chris 
    120  1.16.18.1     matt .Labortprefetchmsg:
    121  1.16.18.1     matt         .asciz  "abortprefetch"
    122  1.16.18.1     matt         .align  0
    123  1.16.18.1     matt ASEND(prefetch_abort_entry)
    124  1.16.18.1     matt 
    125        1.1    chris 	.data
    126  1.16.18.1     matt 	.p2align 2
    127        1.1    chris 	.global	_C_LABEL(prefetch_abort_handler_address)
    128        1.1    chris _C_LABEL(prefetch_abort_handler_address):
    129  1.16.18.1     matt 	.word	.Labortprefetch
    130        1.1    chris 
    131        1.1    chris /*
    132        1.3  thorpej  * data_abort_entry:
    133        1.1    chris  *
    134        1.3  thorpej  *	Handler for the Data Abort exception.
    135        1.1    chris  */
    136        1.3  thorpej ASENTRY_NP(data_abort_entry)
    137       1.13      scw #ifdef __XSCALE__
    138       1.13      scw 	nop				/* Make absolutely sure any pending */
    139       1.13      scw 	nop				/* imprecise aborts have occurred. */
    140       1.13      scw #endif
    141        1.3  thorpej         sub     lr, lr, #0x00000008     /* Adjust the lr */
    142        1.1    chris 
    143        1.3  thorpej 	PUSHFRAMEINSVC			/* Push trap frame and switch */
    144        1.3  thorpej 					/* to SVC32 mode */
    145        1.9      scw 	ENABLE_ALIGNMENT_FAULTS
    146        1.9      scw 
    147  1.16.18.1     matt 	ldr	r1, .Ldata_abort_handler_address
    148  1.16.18.1     matt 	adr	lr, .Lexception_exit
    149        1.3  thorpej 	mov	r0, sp			/* pass the stack pointer as r0 */
    150        1.3  thorpej 	ldr	pc, [r1]
    151        1.1    chris 
    152  1.16.18.1     matt .Ldata_abort_handler_address:
    153        1.3  thorpej 	.word	_C_LABEL(data_abort_handler_address)
    154        1.1    chris 
    155        1.3  thorpej 	.data
    156  1.16.18.1     matt 	.p2align 2
    157        1.3  thorpej 	.global	_C_LABEL(data_abort_handler_address)
    158        1.3  thorpej _C_LABEL(data_abort_handler_address):
    159  1.16.18.1     matt 	.word	.Labortdata
    160        1.1    chris 
    161        1.3  thorpej 	.text
    162  1.16.18.1     matt .Labortdata:
    163  1.16.18.1     matt         adr     r0, .Labortdatamsg
    164        1.3  thorpej 	b	_C_LABEL(panic)
    165        1.1    chris 
    166  1.16.18.1     matt .Labortdatamsg:
    167        1.3  thorpej         .asciz  "abortdata"
    168        1.3  thorpej         .align  0
    169  1.16.18.1     matt ASEND(data_abort_entry)
    170        1.1    chris 
    171        1.3  thorpej /*
    172        1.3  thorpej  * address_exception_entry:
    173        1.3  thorpej  *
    174        1.3  thorpej  *	Handler for the Address Exception exception.
    175        1.3  thorpej  *
    176        1.3  thorpej  *	NOTE: This exception isn't really used on arm32.  We
    177        1.3  thorpej  *	print a warning message to the console and then treat
    178        1.3  thorpej  *	it like a Data Abort.
    179        1.3  thorpej  */
    180        1.3  thorpej ASENTRY_NP(address_exception_entry)
    181  1.16.18.1     matt 	mrs	r1, cpsr
    182  1.16.18.1     matt 	mrs	r2, spsr
    183        1.3  thorpej 	mov	r3, lr
    184  1.16.18.1     matt 	adr	r0, .Laddress_exception_msg
    185        1.3  thorpej 	bl	_C_LABEL(printf)	/* XXX CLOBBERS LR!! */
    186  1.16.18.1     matt 	b	_ASM_LABEL(data_abort_entry)
    187  1.16.18.1     matt .Laddress_exception_msg:
    188        1.3  thorpej 	.asciz	"Address Exception CPSR=0x%08x SPSR=0x%08x LR=0x%08x\n"
    189        1.3  thorpej 	.balign	4
    190       1.13      scw 
    191       1.13      scw /*
    192       1.13      scw  * General exception exit handler
    193       1.13      scw  * (Placed here to be within range of all the references to it)
    194       1.13      scw  *
    195       1.13      scw  * It exits straight away if not returning to USR mode.
    196       1.13      scw  * This loops around delivering any pending ASTs.
    197       1.13      scw  * Interrupts are disabled at suitable points to avoid ASTs
    198       1.13      scw  * being posted between testing and exit to user mode.
    199       1.13      scw  *
    200       1.13      scw  * This function uses PULLFRAMEFROMSVCANDEXIT and
    201       1.13      scw  * DO_AST_AND_RESTORE_ALIGNMENT_FAULTS thus should
    202       1.13      scw  * only be called if the exception handler used PUSHFRAMEINSVC
    203       1.13      scw  * followed by ENABLE_ALIGNMENT_FAULTS.
    204       1.13      scw  */
    205       1.13      scw 
    206  1.16.18.1     matt .Lexception_exit:
    207       1.13      scw 	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
    208       1.13      scw 	PULLFRAMEFROMSVCANDEXIT
    209  1.16.18.1     matt ASEND(address_exception_entry)
    210        1.1    chris 
    211        1.1    chris /*
    212        1.3  thorpej  * undefined_entry:
    213        1.3  thorpej  *
    214        1.3  thorpej  *	Handler for the Undefined Instruction exception.
    215        1.3  thorpej  *
    216        1.3  thorpej  *	We indirect the undefined vector via the handler address
    217        1.3  thorpej  *	in the data area.  Entry to the undefined handler must
    218        1.3  thorpej  *	look like direct entry from the vector.
    219        1.1    chris  */
    220        1.1    chris ASENTRY_NP(undefined_entry)
    221        1.1    chris 	stmfd	sp!, {r0, r1}
    222  1.16.18.1     matt 	GET_CURCPU(r0)
    223        1.1    chris 	ldr	r1, [sp], #0x0004
    224  1.16.18.1     matt 	str	r1, [r0, #CI_UNDEFSAVE]!
    225        1.1    chris 	ldr	r1, [sp], #0x0004
    226        1.1    chris 	str	r1, [r0, #0x0004]
    227        1.1    chris 	ldmia	r0, {r0, r1, pc}
    228  1.16.18.1     matt ASEND(undefined_entry)
    229        1.1    chris 
    230        1.1    chris /*
    231        1.1    chris  * assembly bounce code for calling the kernel
    232        1.1    chris  * undefined instruction handler. This uses
    233        1.1    chris  * a standard trap frame and is called in SVC mode.
    234        1.1    chris  */
    235        1.1    chris 
    236        1.1    chris ENTRY_NP(undefinedinstruction_bounce)
    237        1.1    chris 	PUSHFRAMEINSVC
    238        1.9      scw 	ENABLE_ALIGNMENT_FAULTS
    239       1.12      scw 
    240        1.1    chris 	mov	r0, sp
    241  1.16.18.1     matt 	adr	lr, .Lexception_exit
    242       1.12      scw 	b	_C_LABEL(undefinedinstruction)
    243  1.16.18.1     matt END(undefinedinstruction_bounce)
    244  1.16.18.1     matt ASEND(undefined_entry)
    245