exception.S revision 1.19
1 /* $NetBSD: exception.S,v 1.19 2013/08/18 06:28:18 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1997 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * exception.S 40 * 41 * Low level handlers for exception vectors 42 * 43 * Created : 24/09/94 44 * 45 * Based on kate/display/abort.s 46 */ 47 48 #include "assym.h" 49 50 #include <arm/asm.h> 51 52 #include <arm/locore.h> 53 54 RCSID("$NetBSD: exception.S,v 1.19 2013/08/18 06:28:18 matt Exp $") 55 56 .text 57 .align 0 58 59 AST_ALIGNMENT_FAULT_LOCALS 60 61 /* 62 * reset_entry: 63 * 64 * Handler for Reset exception. 65 */ 66 ARM_ASENTRY_NP(reset_entry) 67 adr r0, .Lreset_panicmsg 68 mov r1, lr 69 bl _C_LABEL(panic) 70 /* NOTREACHED */ 71 .Lreset_panicmsg: 72 .asciz "Reset vector called, LR = 0x%08x" 73 .balign 4 74 ASEND(reset_entry) 75 76 /* 77 * swi_entry 78 * 79 * Handler for the Software Interrupt exception. 80 */ 81 ARM_ASENTRY_NP(swi_entry) 82 PUSHFRAME 83 ENABLE_ALIGNMENT_FAULTS 84 85 mov r0, sp /* Pass the frame to any function */ 86 bl _C_LABEL(swi_handler) /* It's a SWI ! */ 87 88 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 89 PULLFRAME 90 movs pc, lr /* Exit */ 91 ASEND(swi_entry) 92 93 /* 94 * prefetch_abort_entry: 95 * 96 * Handler for the Prefetch Abort exception. 97 */ 98 ARM_ASENTRY_NP(prefetch_abort_entry) 99 #ifdef __XSCALE__ 100 nop /* Make absolutely sure any pending */ 101 nop /* imprecise aborts have occurred. */ 102 #endif 103 sub lr, lr, #0x00000004 /* Adjust the lr */ 104 105 PUSHFRAMEINSVC 106 ENABLE_ALIGNMENT_FAULTS 107 108 ldr r1, .Lprefetch_abort_handler_address 109 adr lr, .Lexception_exit 110 mov r0, sp /* pass the stack pointer as r0 */ 111 ldr pc, [r1] 112 113 .Labortprefetch: 114 adr r0, .Labortprefetchmsg 115 b _C_LABEL(panic) 116 117 .Lprefetch_abort_handler_address: 118 .word _C_LABEL(prefetch_abort_handler_address) 119 120 .Labortprefetchmsg: 121 .asciz "abortprefetch" 122 .align 0 123 ASEND(prefetch_abort_entry) 124 125 .data 126 .p2align 2 127 .global _C_LABEL(prefetch_abort_handler_address) 128 _C_LABEL(prefetch_abort_handler_address): 129 .word .Labortprefetch 130 131 /* 132 * data_abort_entry: 133 * 134 * Handler for the Data Abort exception. 135 */ 136 ASENTRY_NP(data_abort_entry) 137 #ifdef __XSCALE__ 138 nop /* Make absolutely sure any pending */ 139 nop /* imprecise aborts have occurred. */ 140 #endif 141 sub lr, lr, #0x00000008 /* Adjust the lr */ 142 143 PUSHFRAMEINSVC /* Push trap frame and switch */ 144 /* to SVC32 mode */ 145 ENABLE_ALIGNMENT_FAULTS 146 147 ldr r1, .Ldata_abort_handler_address 148 adr lr, .Lexception_exit 149 mov r0, sp /* pass the stack pointer as r0 */ 150 ldr pc, [r1] 151 152 .Ldata_abort_handler_address: 153 .word _C_LABEL(data_abort_handler_address) 154 155 .data 156 .p2align 2 157 .global _C_LABEL(data_abort_handler_address) 158 _C_LABEL(data_abort_handler_address): 159 .word .Labortdata 160 161 .text 162 .Labortdata: 163 adr r0, .Labortdatamsg 164 b _C_LABEL(panic) 165 166 .Labortdatamsg: 167 .asciz "abortdata" 168 .align 0 169 ASEND(data_abort_entry) 170 171 /* 172 * address_exception_entry: 173 * 174 * Handler for the Address Exception exception. 175 * 176 * NOTE: This exception isn't really used on arm32. We 177 * print a warning message to the console and then treat 178 * it like a Data Abort. 179 */ 180 ASENTRY_NP(address_exception_entry) 181 mrs r1, cpsr_all 182 mrs r2, spsr_all 183 mov r3, lr 184 adr r0, .Laddress_exception_msg 185 bl _C_LABEL(printf) /* XXX CLOBBERS LR!! */ 186 b _ASM_LABEL(data_abort_entry) 187 .Laddress_exception_msg: 188 .asciz "Address Exception CPSR=0x%08x SPSR=0x%08x LR=0x%08x\n" 189 .balign 4 190 191 /* 192 * General exception exit handler 193 * (Placed here to be within range of all the references to it) 194 * 195 * It exits straight away if not returning to USR mode. 196 * This loops around delivering any pending ASTs. 197 * Interrupts are disabled at suitable points to avoid ASTs 198 * being posted between testing and exit to user mode. 199 * 200 * This function uses PULLFRAMEFROMSVCANDEXIT and 201 * DO_AST_AND_RESTORE_ALIGNMENT_FAULTS thus should 202 * only be called if the exception handler used PUSHFRAMEINSVC 203 * followed by ENABLE_ALIGNMENT_FAULTS. 204 */ 205 206 .Lexception_exit: 207 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 208 PULLFRAMEFROMSVCANDEXIT 209 ASEND(address_exception_entry) 210 211 /* 212 * undefined_entry: 213 * 214 * Handler for the Undefined Instruction exception. 215 * 216 * We indirect the undefined vector via the handler address 217 * in the data area. Entry to the undefined handler must 218 * look like direct entry from the vector. 219 */ 220 ASENTRY_NP(undefined_entry) 221 stmfd sp!, {r0, r1} 222 GET_CURCPU(r0) 223 ldr r1, [sp], #0x0004 224 str r1, [r0, #CI_UNDEFSAVE]! 225 ldr r1, [sp], #0x0004 226 str r1, [r0, #0x0004] 227 ldmia r0, {r0, r1, pc} 228 ASEND(undefined_entry) 229 230 /* 231 * assembly bounce code for calling the kernel 232 * undefined instruction handler. This uses 233 * a standard trap frame and is called in SVC mode. 234 */ 235 236 ENTRY_NP(undefinedinstruction_bounce) 237 PUSHFRAMEINSVC 238 ENABLE_ALIGNMENT_FAULTS 239 240 mov r0, sp 241 adr lr, .Lexception_exit 242 b _C_LABEL(undefinedinstruction) 243 END(undefinedinstruction_bounce) 244 ASEND(undefined_entry) 245
Indexes created Thu Oct 02 07:10:07 GMT 2025