fault.c revision 1.27 1 1.27 scw /* $NetBSD: fault.c,v 1.27 2003/04/18 11:08:25 scw Exp $ */
2 1.1 chris
3 1.1 chris /*
4 1.27 scw * Copyright 2003 Wasabi Systems, Inc.
5 1.27 scw * All rights reserved.
6 1.27 scw *
7 1.27 scw * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 1.27 scw *
9 1.27 scw * Redistribution and use in source and binary forms, with or without
10 1.27 scw * modification, are permitted provided that the following conditions
11 1.27 scw * are met:
12 1.27 scw * 1. Redistributions of source code must retain the above copyright
13 1.27 scw * notice, this list of conditions and the following disclaimer.
14 1.27 scw * 2. Redistributions in binary form must reproduce the above copyright
15 1.27 scw * notice, this list of conditions and the following disclaimer in the
16 1.27 scw * documentation and/or other materials provided with the distribution.
17 1.27 scw * 3. All advertising materials mentioning features or use of this software
18 1.27 scw * must display the following acknowledgement:
19 1.27 scw * This product includes software developed for the NetBSD Project by
20 1.27 scw * Wasabi Systems, Inc.
21 1.27 scw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.27 scw * or promote products derived from this software without specific prior
23 1.27 scw * written permission.
24 1.27 scw *
25 1.27 scw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.27 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.27 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.27 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.27 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.27 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.27 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.27 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.27 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.27 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.27 scw * POSSIBILITY OF SUCH DAMAGE.
36 1.27 scw */
37 1.27 scw /*
38 1.1 chris * Copyright (c) 1994-1997 Mark Brinicombe.
39 1.1 chris * Copyright (c) 1994 Brini.
40 1.1 chris * All rights reserved.
41 1.1 chris *
42 1.1 chris * This code is derived from software written for Brini by Mark Brinicombe
43 1.1 chris *
44 1.1 chris * Redistribution and use in source and binary forms, with or without
45 1.1 chris * modification, are permitted provided that the following conditions
46 1.1 chris * are met:
47 1.1 chris * 1. Redistributions of source code must retain the above copyright
48 1.1 chris * notice, this list of conditions and the following disclaimer.
49 1.1 chris * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 chris * notice, this list of conditions and the following disclaimer in the
51 1.1 chris * documentation and/or other materials provided with the distribution.
52 1.1 chris * 3. All advertising materials mentioning features or use of this software
53 1.1 chris * must display the following acknowledgement:
54 1.1 chris * This product includes software developed by Brini.
55 1.1 chris * 4. The name of the company nor the name of the author may be used to
56 1.1 chris * endorse or promote products derived from this software without specific
57 1.1 chris * prior written permission.
58 1.1 chris *
59 1.1 chris * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.1 chris * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.1 chris * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 chris * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.1 chris * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.1 chris * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.1 chris * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 chris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 chris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 chris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 chris * SUCH DAMAGE.
70 1.1 chris *
71 1.1 chris * RiscBSD kernel project
72 1.1 chris *
73 1.1 chris * fault.c
74 1.1 chris *
75 1.1 chris * Fault handlers
76 1.1 chris *
77 1.1 chris * Created : 28/11/94
78 1.1 chris */
79 1.1 chris
80 1.1 chris #include "opt_ddb.h"
81 1.1 chris #include "opt_pmap_debug.h"
82 1.1 chris
83 1.1 chris #include <sys/types.h>
84 1.27 scw __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.27 2003/04/18 11:08:25 scw Exp $");
85 1.21 bjh21
86 1.1 chris #include <sys/param.h>
87 1.1 chris #include <sys/systm.h>
88 1.1 chris #include <sys/proc.h>
89 1.1 chris #include <sys/user.h>
90 1.1 chris #include <sys/kernel.h>
91 1.1 chris
92 1.1 chris #include <uvm/uvm_extern.h>
93 1.18 thorpej
94 1.18 thorpej #include <arm/cpuconf.h>
95 1.1 chris
96 1.1 chris #include <machine/frame.h>
97 1.5 thorpej #include <arm/arm32/katelib.h>
98 1.1 chris #include <machine/cpu.h>
99 1.2 matt #include <machine/intr.h>
100 1.1 chris #ifdef DDB
101 1.1 chris #include <machine/db_machdep.h>
102 1.1 chris #endif
103 1.1 chris
104 1.1 chris #include <arch/arm/arm/disassem.h>
105 1.7 chris #include <arm/arm32/machdep.h>
106 1.7 chris
107 1.1 chris extern char fusubailout[];
108 1.1 chris
109 1.27 scw #ifdef DEBUG
110 1.27 scw int last_fault_code; /* For the benefit of pmap_fault_fixup() */
111 1.27 scw #endif
112 1.27 scw
113 1.7 chris static void report_abort __P((const char *, u_int, u_int, u_int));
114 1.7 chris
115 1.1 chris /* Abort code */
116 1.1 chris
117 1.1 chris /* Define text descriptions of the different aborts */
118 1.1 chris
119 1.1 chris static const char *aborts[16] = {
120 1.1 chris "Write buffer fault",
121 1.1 chris "Alignment fault",
122 1.1 chris "Write buffer fault",
123 1.1 chris "Alignment fault",
124 1.1 chris "Bus error (LF section)",
125 1.1 chris "Translation fault (section)",
126 1.1 chris "Bus error (page)",
127 1.1 chris "Translation fault (page)",
128 1.1 chris "Bus error (section)",
129 1.1 chris "Domain error (section)",
130 1.1 chris "Bus error (page)",
131 1.1 chris "Domain error (page)",
132 1.1 chris "Bus error trans (L1)",
133 1.1 chris "Permission error (section)",
134 1.1 chris "Bus error trans (L2)",
135 1.1 chris "Permission error (page)"
136 1.1 chris };
137 1.1 chris
138 1.7 chris static void
139 1.1 chris report_abort(prefix, fault_status, fault_address, fault_pc)
140 1.1 chris const char *prefix;
141 1.1 chris u_int fault_status;
142 1.1 chris u_int fault_address;
143 1.1 chris u_int fault_pc;
144 1.1 chris {
145 1.1 chris #ifndef DEBUG
146 1.1 chris if (prefix == NULL) {
147 1.1 chris #endif
148 1.1 chris if (prefix)
149 1.1 chris printf("%s ", prefix);
150 1.1 chris printf("Data abort: '%s' status=%03x address=%08x PC=%08x\n",
151 1.1 chris aborts[fault_status & FAULT_TYPE_MASK],
152 1.1 chris fault_status & 0xfff, fault_address, fault_pc);
153 1.1 chris #ifndef DEBUG
154 1.1 chris }
155 1.1 chris #endif
156 1.1 chris }
157 1.1 chris
158 1.3 thorpej static __volatile int data_abort_expected;
159 1.3 thorpej static __volatile int data_abort_received;
160 1.3 thorpej
161 1.3 thorpej int
162 1.3 thorpej badaddr_read(void *addr, size_t size, void *rptr)
163 1.3 thorpej {
164 1.3 thorpej u_long rcpt;
165 1.3 thorpej int rv;
166 1.3 thorpej
167 1.3 thorpej /* Tell the Data Abort handler that we're expecting one. */
168 1.3 thorpej data_abort_received = 0;
169 1.3 thorpej data_abort_expected = 1;
170 1.3 thorpej
171 1.3 thorpej cpu_drain_writebuf();
172 1.3 thorpej
173 1.3 thorpej /* Read from the test address. */
174 1.3 thorpej switch (size) {
175 1.3 thorpej case sizeof(uint8_t):
176 1.3 thorpej __asm __volatile("ldrb %0, [%1]"
177 1.3 thorpej : "=r" (rcpt)
178 1.3 thorpej : "r" (addr));
179 1.3 thorpej break;
180 1.3 thorpej
181 1.3 thorpej case sizeof(uint16_t):
182 1.3 thorpej __asm __volatile("ldrh %0, [%1]"
183 1.3 thorpej : "=r" (rcpt)
184 1.3 thorpej : "r" (addr));
185 1.3 thorpej break;
186 1.3 thorpej
187 1.3 thorpej case sizeof(uint32_t):
188 1.3 thorpej __asm __volatile("ldr %0, [%1]"
189 1.3 thorpej : "=r" (rcpt)
190 1.3 thorpej : "r" (addr));
191 1.3 thorpej break;
192 1.3 thorpej
193 1.3 thorpej default:
194 1.3 thorpej data_abort_expected = 0;
195 1.24 provos panic("badaddr: invalid size (%lu)", (u_long) size);
196 1.3 thorpej }
197 1.3 thorpej
198 1.3 thorpej /* Disallow further Data Aborts. */
199 1.3 thorpej data_abort_expected = 0;
200 1.3 thorpej
201 1.3 thorpej rv = data_abort_received;
202 1.3 thorpej data_abort_received = 0;
203 1.3 thorpej
204 1.3 thorpej /* Copy the data back if no fault occurred. */
205 1.3 thorpej if (rptr != NULL && rv == 0) {
206 1.3 thorpej switch (size) {
207 1.3 thorpej case sizeof(uint8_t):
208 1.3 thorpej *(uint8_t *) rptr = rcpt;
209 1.3 thorpej break;
210 1.3 thorpej
211 1.3 thorpej case sizeof(uint16_t):
212 1.3 thorpej *(uint16_t *) rptr = rcpt;
213 1.3 thorpej break;
214 1.3 thorpej
215 1.3 thorpej case sizeof(uint32_t):
216 1.3 thorpej *(uint32_t *) rptr = rcpt;
217 1.3 thorpej break;
218 1.3 thorpej }
219 1.3 thorpej }
220 1.3 thorpej
221 1.3 thorpej /* Return true if the address was invalid. */
222 1.3 thorpej return (rv);
223 1.3 thorpej }
224 1.3 thorpej
225 1.1 chris /*
226 1.1 chris * void data_abort_handler(trapframe_t *frame)
227 1.1 chris *
228 1.1 chris * Abort handler called when read/write occurs at an address of
229 1.1 chris * a non existent or restricted (access permissions) memory page.
230 1.1 chris * We first need to identify the type of page fault.
231 1.1 chris */
232 1.1 chris
233 1.1 chris #define TRAP_CODE ((fault_status & 0x0f) | (fault_address & 0xfffffff0))
234 1.1 chris
235 1.27 scw /* Determine if we can recover from a fault */
236 1.27 scw #ifdef ARM32_PMAP_NEW
237 1.27 scw #define IS_FATAL_FAULT(x) \
238 1.27 scw (((1 << (x)) & \
239 1.27 scw ((1 << FAULT_WRTBUF_0) | (1 << FAULT_WRTBUF_1) | \
240 1.27 scw (1 << FAULT_BUSERR_0) | (1 << FAULT_BUSERR_1) | \
241 1.27 scw (1 << FAULT_BUSERR_2) | (1 << FAULT_BUSERR_3) | \
242 1.27 scw (1 << FAULT_BUSTRNL1) | (1 << FAULT_BUSTRNL2) | \
243 1.27 scw (1 << FAULT_ALIGN_0) | (1 << FAULT_ALIGN_1))) != 0)
244 1.27 scw #else
245 1.27 scw #define IS_FATAL_FAULT(x) \
246 1.27 scw (((1 << (x)) & \
247 1.27 scw ((1 << FAULT_WRTBUF_0) | (1 << FAULT_WRTBUF_1) | \
248 1.27 scw (1 << FAULT_BUSERR_0) | (1 << FAULT_BUSERR_1) | \
249 1.27 scw (1 << FAULT_BUSERR_2) | (1 << FAULT_BUSERR_3) | \
250 1.27 scw (1 << FAULT_BUSTRNL1) | (1 << FAULT_BUSTRNL2) | \
251 1.27 scw (1 << FAULT_DOMAIN_S) | (1 << FAULT_DOMAIN_P) | \
252 1.27 scw (1 << FAULT_ALIGN_0) | (1 << FAULT_ALIGN_1))) != 0)
253 1.27 scw #endif
254 1.27 scw
255 1.1 chris void
256 1.1 chris data_abort_handler(frame)
257 1.1 chris trapframe_t *frame;
258 1.1 chris {
259 1.26 thorpej struct lwp *l;
260 1.1 chris struct proc *p;
261 1.1 chris struct pcb *pcb;
262 1.1 chris u_int fault_address;
263 1.1 chris u_int fault_status;
264 1.1 chris u_int fault_pc;
265 1.1 chris u_int fault_instruction;
266 1.27 scw int fault_code, fatal_fault;
267 1.1 chris int user;
268 1.1 chris int error;
269 1.27 scw int rv;
270 1.1 chris void *onfault;
271 1.27 scw vaddr_t va;
272 1.27 scw struct vmspace *vm;
273 1.27 scw struct vm_map *map;
274 1.27 scw vm_prot_t ftype;
275 1.27 scw extern struct vm_map *kernel_map;
276 1.3 thorpej
277 1.3 thorpej /*
278 1.3 thorpej * If we were expecting a Data Abort, signal that we got
279 1.3 thorpej * one, adjust the PC to skip the faulting insn, and
280 1.3 thorpej * return.
281 1.3 thorpej */
282 1.3 thorpej if (data_abort_expected) {
283 1.3 thorpej data_abort_received = 1;
284 1.3 thorpej frame->tf_pc += INSN_SIZE;
285 1.3 thorpej return;
286 1.3 thorpej }
287 1.1 chris
288 1.1 chris /*
289 1.1 chris * Must get fault address and status from the CPU before
290 1.1 chris * re-enabling interrupts. (Interrupt handlers may take
291 1.1 chris * R/M emulation faults.)
292 1.1 chris */
293 1.1 chris fault_address = cpu_faultaddress();
294 1.1 chris fault_status = cpu_faultstatus();
295 1.1 chris fault_pc = frame->tf_pc;
296 1.1 chris
297 1.1 chris /*
298 1.1 chris * Enable IRQ's (disabled by CPU on abort) if trapframe
299 1.1 chris * shows they were enabled.
300 1.1 chris */
301 1.1 chris if (!(frame->tf_spsr & I32_bit))
302 1.1 chris enable_interrupts(I32_bit);
303 1.1 chris
304 1.1 chris #ifdef DEBUG
305 1.1 chris if ((GetCPSR() & PSR_MODE) != PSR_SVC32_MODE)
306 1.1 chris panic("data_abort_handler: not in SVC32 mode");
307 1.1 chris #endif
308 1.1 chris
309 1.1 chris /* Update vmmeter statistics */
310 1.1 chris uvmexp.traps++;
311 1.1 chris
312 1.1 chris /* Extract the fault code from the fault status */
313 1.1 chris fault_code = fault_status & FAULT_TYPE_MASK;
314 1.27 scw fatal_fault = IS_FATAL_FAULT(fault_code);
315 1.1 chris
316 1.26 thorpej /* Get the current lwp structure or lwp0 if there is none */
317 1.26 thorpej l = curlwp == NULL ? &lwp0 : curlwp;
318 1.26 thorpej p = l->l_proc;
319 1.1 chris
320 1.1 chris /*
321 1.1 chris * can't use curpcb, as it might be NULL; and we have p in
322 1.1 chris * a register anyway
323 1.1 chris */
324 1.26 thorpej pcb = &l->l_addr->u_pcb;
325 1.1 chris
326 1.1 chris /* fusubailout is used by [fs]uswintr to avoid page faulting */
327 1.27 scw if (pcb->pcb_onfault &&
328 1.27 scw (fatal_fault || pcb->pcb_onfault == fusubailout)) {
329 1.1 chris
330 1.20 bjh21 frame->tf_r0 = EFAULT;
331 1.1 chris copyfault:
332 1.1 chris #ifdef DEBUG
333 1.26 thorpej printf("Using pcb_onfault=%p addr=%08x st=%08x l=%p\n",
334 1.26 thorpej pcb->pcb_onfault, fault_address, fault_status, l);
335 1.1 chris #endif
336 1.1 chris frame->tf_pc = (u_int)pcb->pcb_onfault;
337 1.1 chris if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
338 1.24 provos panic("Yikes pcb_onfault=%p during USR mode fault",
339 1.1 chris pcb->pcb_onfault);
340 1.1 chris return;
341 1.1 chris }
342 1.1 chris
343 1.1 chris /* More debug stuff */
344 1.1 chris
345 1.1 chris fault_instruction = ReadWord(fault_pc);
346 1.1 chris
347 1.1 chris #ifdef PMAP_DEBUG
348 1.1 chris if (pmap_debug_level >= 0) {
349 1.1 chris report_abort(NULL, fault_status, fault_address, fault_pc);
350 1.1 chris printf("Instruction @V%08x = %08x\n",
351 1.1 chris fault_pc, fault_instruction);
352 1.1 chris }
353 1.1 chris #endif
354 1.1 chris
355 1.1 chris /* Call the cpu specific abort fixup routine */
356 1.1 chris error = cpu_dataabt_fixup(frame);
357 1.1 chris if (error == ABORT_FIXUP_RETURN)
358 1.1 chris return;
359 1.1 chris if (error == ABORT_FIXUP_FAILED) {
360 1.11 reinoud printf("pc = 0x%08x, opcode 0x%08x, insn = ", fault_pc, *((u_int *)fault_pc));
361 1.1 chris disassemble(fault_pc);
362 1.11 reinoud printf("data abort handler: fixup failed for this instruction\n");
363 1.1 chris }
364 1.1 chris
365 1.1 chris #ifdef PMAP_DEBUG
366 1.1 chris if (pmap_debug_level >= 0)
367 1.1 chris printf("fault in process %p\n", p);
368 1.1 chris #endif
369 1.1 chris
370 1.1 chris #ifdef DEBUG
371 1.27 scw /* Is this needed ? (XXXSCW: yes. can happen during boot ...) */
372 1.27 scw if (!cold && pcb != curpcb) {
373 1.1 chris printf("data_abort: Alert ! pcb(%p) != curpcb(%p)\n",
374 1.1 chris pcb, curpcb);
375 1.26 thorpej printf("data_abort: Alert ! proc(%p), curlwp(%p)\n",
376 1.26 thorpej p, curlwp);
377 1.1 chris }
378 1.1 chris #endif /* DEBUG */
379 1.1 chris
380 1.1 chris /* Were we in user mode when the abort occurred ? */
381 1.1 chris if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
382 1.1 chris /*
383 1.1 chris * Note that the fault was from USR mode.
384 1.1 chris */
385 1.1 chris user = 1;
386 1.26 thorpej l->l_addr->u_pcb.pcb_tf = frame;
387 1.1 chris } else
388 1.1 chris user = 0;
389 1.11 reinoud
390 1.11 reinoud /* check if this was a failed fixup */
391 1.11 reinoud if (error == ABORT_FIXUP_FAILED) {
392 1.11 reinoud if (user) {
393 1.26 thorpej trapsignal(l, SIGSEGV, TRAP_CODE);
394 1.26 thorpej userret(l);
395 1.11 reinoud return;
396 1.11 reinoud };
397 1.24 provos panic("Data abort fixup failed in kernel - we're dead");
398 1.11 reinoud };
399 1.1 chris
400 1.1 chris /* Now act on the fault type */
401 1.27 scw if (fatal_fault) {
402 1.1 chris /*
403 1.27 scw * None of these faults should happen on a perfectly
404 1.27 scw * functioning system. They indicate either some gross
405 1.27 scw * problem with the kernel, or a hardware problem.
406 1.27 scw * In either case, stop.
407 1.1 chris */
408 1.1 chris report_abort(NULL, fault_status, fault_address, fault_pc);
409 1.1 chris
410 1.27 scw we_re_toast:
411 1.1 chris /*
412 1.1 chris * Were are dead, try and provide some debug
413 1.1 chris * information before dying.
414 1.1 chris */
415 1.1 chris #ifdef DDB
416 1.1 chris printf("Unhandled trap (frame = %p)\n", frame);
417 1.1 chris report_abort(NULL, fault_status, fault_address, fault_pc);
418 1.1 chris kdb_trap(-1, frame);
419 1.1 chris return;
420 1.1 chris #else
421 1.1 chris panic("Unhandled trap (frame = %p)", frame);
422 1.1 chris #endif /* DDB */
423 1.27 scw }
424 1.27 scw
425 1.1 chris /*
426 1.27 scw * At this point, we're dealing with one of the following faults:
427 1.27 scw *
428 1.27 scw * FAULT_TRANS_P Page Translation Fault
429 1.27 scw * FAULT_PERM_P Page Permission Fault
430 1.27 scw * FAULT_TRANS_S Section Translation Fault
431 1.27 scw * FAULT_PERM_S Section Permission Fault
432 1.27 scw *
433 1.27 scw * And if ARM32_PMAP_NEW is in effect:
434 1.27 scw *
435 1.27 scw * FAULT_DOMAIN_P Page Domain Error Fault
436 1.27 scw * FAULT_DOMAIN_S Section Domain Error Fault
437 1.27 scw *
438 1.1 chris * Page/section translation/permission fault -- need to fault in
439 1.27 scw * the page.
440 1.27 scw *
441 1.27 scw * Page/section domain fault -- need to see if the L1 entry can
442 1.27 scw * be fixed up.
443 1.1 chris */
444 1.27 scw vm = p->p_vmspace;
445 1.27 scw va = trunc_page((vaddr_t)fault_address);
446 1.1 chris
447 1.1 chris #ifdef PMAP_DEBUG
448 1.27 scw if (pmap_debug_level >= 0)
449 1.27 scw printf("page fault: addr=V%08lx ", va);
450 1.1 chris #endif
451 1.1 chris
452 1.27 scw /*
453 1.27 scw * It is only a kernel address space fault iff:
454 1.27 scw * 1. user == 0 and
455 1.27 scw * 2. pcb_onfault not set or
456 1.27 scw * 3. pcb_onfault set but supervisor space fault
457 1.27 scw * The last can occur during an exec() copyin where the
458 1.27 scw * argument space is lazy-allocated.
459 1.27 scw */
460 1.27 scw if (!user &&
461 1.27 scw (va >= VM_MIN_KERNEL_ADDRESS || va < VM_MIN_ADDRESS)) {
462 1.27 scw /* Was the fault due to the FPE/IPKDB ? */
463 1.27 scw if ((frame->tf_spsr & PSR_MODE) == PSR_UND32_MODE) {
464 1.27 scw report_abort("UND32", fault_status,
465 1.27 scw fault_address, fault_pc);
466 1.27 scw trapsignal(l, SIGSEGV, TRAP_CODE);
467 1.27 scw
468 1.27 scw /*
469 1.27 scw * Force exit via userret()
470 1.27 scw * This is necessary as the FPE is an extension
471 1.27 scw * to userland that actually runs in a
472 1.27 scw * priveledged mode but uses USR mode
473 1.27 scw * permissions for its accesses.
474 1.27 scw */
475 1.27 scw userret(l);
476 1.27 scw return;
477 1.27 scw }
478 1.27 scw map = kernel_map;
479 1.27 scw } else
480 1.27 scw map = &vm->vm_map;
481 1.1 chris
482 1.1 chris #ifdef PMAP_DEBUG
483 1.27 scw if (pmap_debug_level >= 0)
484 1.27 scw printf("vmmap=%p ", map);
485 1.1 chris #endif
486 1.1 chris
487 1.27 scw if (map == NULL)
488 1.27 scw printf("No map for fault address va = 0x%08lx", va);
489 1.1 chris
490 1.27 scw /*
491 1.27 scw * We need to know whether the page should be mapped
492 1.27 scw * as R or R/W. The MMU does not give us the info as
493 1.27 scw * to whether the fault was caused by a read or a write.
494 1.27 scw * This means we need to disassemble the instruction
495 1.27 scw * responsible and determine if it was a read or write
496 1.27 scw * instruction.
497 1.27 scw */
498 1.27 scw /* STR instruction ? */
499 1.27 scw if ((fault_instruction & 0x0c100000) == 0x04000000)
500 1.27 scw ftype = VM_PROT_WRITE;
501 1.27 scw /* STM or CDT instruction ? */
502 1.27 scw else if ((fault_instruction & 0x0a100000) == 0x08000000)
503 1.27 scw ftype = VM_PROT_WRITE;
504 1.27 scw /* STRH, STRSH or STRSB instruction ? */
505 1.27 scw else if ((fault_instruction & 0x0e100090) == 0x00000090)
506 1.27 scw ftype = VM_PROT_WRITE;
507 1.27 scw /* SWP instruction ? */
508 1.27 scw else if ((fault_instruction & 0x0fb00ff0) == 0x01000090)
509 1.27 scw ftype = VM_PROT_READ | VM_PROT_WRITE;
510 1.27 scw else
511 1.27 scw ftype = VM_PROT_READ;
512 1.1 chris
513 1.1 chris #ifdef PMAP_DEBUG
514 1.27 scw if (pmap_debug_level >= 0)
515 1.27 scw printf("fault protection = %d\n", ftype);
516 1.1 chris #endif
517 1.1 chris
518 1.27 scw #ifndef ARM32_PMAP_NEW
519 1.27 scw if ((ftype & VM_PROT_WRITE) ?
520 1.27 scw pmap_modified_emulation(map->pmap, va) :
521 1.27 scw pmap_handled_emulation(map->pmap, va))
522 1.27 scw goto out;
523 1.27 scw #else
524 1.27 scw if (pmap_fault_fixup(map->pmap, va, ftype))
525 1.27 scw goto out;
526 1.27 scw #endif
527 1.1 chris
528 1.27 scw if (current_intr_depth > 0) {
529 1.1 chris #ifdef DDB
530 1.27 scw printf("Non-emulated page fault with intr_depth > 0\n");
531 1.27 scw report_abort(NULL, fault_status, fault_address, fault_pc);
532 1.27 scw kdb_trap(-1, frame);
533 1.27 scw return;
534 1.1 chris #else
535 1.27 scw panic("Fault with intr_depth > 0");
536 1.1 chris #endif /* DDB */
537 1.27 scw }
538 1.1 chris
539 1.27 scw onfault = pcb->pcb_onfault;
540 1.27 scw pcb->pcb_onfault = NULL;
541 1.27 scw rv = uvm_fault(map, va, 0, ftype);
542 1.27 scw pcb->pcb_onfault = onfault;
543 1.27 scw if (rv == 0) {
544 1.27 scw if (user != 0) /* Record any stack growth... */
545 1.27 scw uvm_grow(p, trunc_page(va));
546 1.27 scw goto out;
547 1.27 scw }
548 1.27 scw if (user == 0) {
549 1.27 scw if (pcb->pcb_onfault) {
550 1.27 scw frame->tf_r0 = rv;
551 1.27 scw goto copyfault;
552 1.1 chris }
553 1.27 scw printf("[u]vm_fault(%p, %lx, %x, 0) -> %x\n", map, va, ftype,
554 1.27 scw rv);
555 1.27 scw goto we_re_toast;
556 1.27 scw }
557 1.1 chris
558 1.27 scw report_abort("", fault_status, fault_address, fault_pc);
559 1.27 scw if (rv == ENOMEM) {
560 1.27 scw printf("UVM: pid %d (%s), uid %d killed: "
561 1.27 scw "out of swap\n", p->p_pid, p->p_comm,
562 1.27 scw (p->p_cred && p->p_ucred) ? p->p_ucred->cr_uid : -1);
563 1.26 thorpej trapsignal(l, SIGKILL, TRAP_CODE);
564 1.27 scw } else
565 1.27 scw trapsignal(l, SIGSEGV, TRAP_CODE);
566 1.27 scw
567 1.27 scw out:
568 1.1 chris /* Call userret() if it was a USR mode fault */
569 1.1 chris if (user)
570 1.26 thorpej userret(l);
571 1.1 chris }
572 1.1 chris
573 1.1 chris
574 1.1 chris /*
575 1.1 chris * void prefetch_abort_handler(trapframe_t *frame)
576 1.1 chris *
577 1.1 chris * Abort handler called when instruction execution occurs at
578 1.1 chris * a non existent or restricted (access permissions) memory page.
579 1.1 chris * If the address is invalid and we were in SVC mode then panic as
580 1.1 chris * the kernel should never prefetch abort.
581 1.1 chris * If the address is invalid and the page is mapped then the user process
582 1.1 chris * does no have read permission so send it a signal.
583 1.1 chris * Otherwise fault the page in and try again.
584 1.1 chris */
585 1.1 chris
586 1.1 chris void
587 1.1 chris prefetch_abort_handler(frame)
588 1.1 chris trapframe_t *frame;
589 1.1 chris {
590 1.26 thorpej struct lwp *l;
591 1.14 thorpej struct proc *p;
592 1.14 thorpej struct vm_map *map;
593 1.14 thorpej vaddr_t fault_pc, va;
594 1.1 chris int error;
595 1.1 chris
596 1.1 chris /*
597 1.1 chris * Enable IRQ's (disabled by the abort) This always comes
598 1.1 chris * from user mode so we know interrupts were not disabled.
599 1.1 chris * But we check anyway.
600 1.1 chris */
601 1.1 chris if (!(frame->tf_spsr & I32_bit))
602 1.1 chris enable_interrupts(I32_bit);
603 1.1 chris
604 1.1 chris #ifdef DEBUG
605 1.1 chris if ((GetCPSR() & PSR_MODE) != PSR_SVC32_MODE)
606 1.1 chris panic("prefetch_abort_handler: not in SVC32 mode");
607 1.1 chris #endif
608 1.1 chris
609 1.1 chris /* Update vmmeter statistics */
610 1.1 chris uvmexp.traps++;
611 1.1 chris
612 1.1 chris /* Call the cpu specific abort fixup routine */
613 1.1 chris error = cpu_prefetchabt_fixup(frame);
614 1.1 chris if (error == ABORT_FIXUP_RETURN)
615 1.1 chris return;
616 1.1 chris if (error == ABORT_FIXUP_FAILED)
617 1.24 provos panic("prefetch abort fixup failed");
618 1.1 chris
619 1.1 chris /* Get the current proc structure or proc0 if there is none */
620 1.26 thorpej if ((l = curlwp) == NULL) {
621 1.26 thorpej l = &lwp0;
622 1.1 chris #ifdef DEBUG
623 1.26 thorpej printf("Prefetch abort with curlwp == 0\n");
624 1.1 chris #endif
625 1.1 chris }
626 1.26 thorpej p = l->l_proc;
627 1.1 chris
628 1.1 chris #ifdef PMAP_DEBUG
629 1.1 chris if (pmap_debug_level >= 0)
630 1.1 chris printf("prefetch fault in process %p %s\n", p, p->p_comm);
631 1.1 chris #endif
632 1.1 chris
633 1.4 thorpej /* Get fault address */
634 1.4 thorpej fault_pc = frame->tf_pc;
635 1.14 thorpej va = trunc_page(fault_pc);
636 1.4 thorpej
637 1.1 chris /* Was the prefectch abort from USR32 mode ? */
638 1.1 chris if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
639 1.26 thorpej l->l_addr->u_pcb.pcb_tf = frame;
640 1.1 chris } else {
641 1.1 chris /*
642 1.1 chris * All the kernel code pages are loaded at boot time
643 1.1 chris * and do not get paged
644 1.1 chris */
645 1.24 provos panic("Prefetch abort in non-USR mode (frame=%p PC=0x%08lx)",
646 1.4 thorpej frame, fault_pc);
647 1.1 chris }
648 1.1 chris
649 1.14 thorpej map = &p->p_vmspace->vm_map;
650 1.14 thorpej
651 1.1 chris #ifdef PMAP_DEBUG
652 1.1 chris if (pmap_debug_level >= 0)
653 1.16 thorpej printf("prefetch_abort: PC = %08lx\n", fault_pc);
654 1.1 chris #endif
655 1.1 chris /* Ok validate the address, can only execute in USER space */
656 1.1 chris if (fault_pc < VM_MIN_ADDRESS || fault_pc >= VM_MAXUSER_ADDRESS) {
657 1.1 chris #ifdef DEBUG
658 1.19 ichiro printf("prefetch: pc (%08lx) not in user process space\n",
659 1.1 chris fault_pc);
660 1.1 chris #endif
661 1.26 thorpej trapsignal(l, SIGSEGV, fault_pc);
662 1.26 thorpej userret(l);
663 1.1 chris return;
664 1.1 chris }
665 1.1 chris
666 1.27 scw #ifndef ARM32_PMAP_NEW
667 1.12 thorpej #ifdef CPU_SA110
668 1.12 thorpej /*
669 1.12 thorpej * There are bugs in the rev K SA110. This is a check for one
670 1.12 thorpej * of them.
671 1.12 thorpej */
672 1.25 bjh21 if (curcpu()->ci_arm_cputype == CPU_ID_SA110 &&
673 1.25 bjh21 curcpu()->ci_arm_cpurev < 3) {
674 1.12 thorpej /* Always current pmap */
675 1.12 thorpej pt_entry_t *pte = vtopte((vaddr_t) fault_pc);
676 1.12 thorpej struct pmap *pmap = p->p_vmspace->vm_map.pmap;
677 1.12 thorpej
678 1.12 thorpej if (pmap_pde_v(pmap_pde(pmap, (vaddr_t) fault_pc)) &&
679 1.12 thorpej pmap_pte_v(pte)) {
680 1.27 scw extern int kernel_debug;
681 1.12 thorpej if (kernel_debug & 1) {
682 1.12 thorpej printf("prefetch_abort: page is already "
683 1.12 thorpej "mapped - pte=%p *pte=%08x\n", pte, *pte);
684 1.14 thorpej printf("prefetch_abort: pc=%08lx proc=%p "
685 1.12 thorpej "process=%s\n", fault_pc, p, p->p_comm);
686 1.12 thorpej printf("prefetch_abort: far=%08x fs=%x\n",
687 1.12 thorpej cpu_faultaddress(), cpu_faultstatus());
688 1.12 thorpej printf("prefetch_abort: trapframe=%08x\n",
689 1.12 thorpej (u_int)frame);
690 1.12 thorpej }
691 1.12 thorpej #ifdef DDB
692 1.12 thorpej if (kernel_debug & 2)
693 1.12 thorpej Debugger();
694 1.17 skrll #endif
695 1.1 chris }
696 1.1 chris }
697 1.12 thorpej #endif /* CPU_SA110 */
698 1.12 thorpej
699 1.14 thorpej if (pmap_handled_emulation(map->pmap, va))
700 1.14 thorpej goto out;
701 1.14 thorpej
702 1.27 scw #else /* ARM32_PMAP_NEW */
703 1.27 scw
704 1.27 scw /*
705 1.27 scw * See if the pmap can handle this fault on its own...
706 1.27 scw */
707 1.27 scw if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ))
708 1.27 scw goto out;
709 1.27 scw #endif
710 1.27 scw
711 1.14 thorpej if (current_intr_depth > 0) {
712 1.14 thorpej #ifdef DDB
713 1.14 thorpej printf("Non-emulated prefetch abort with intr_depth > 0\n");
714 1.14 thorpej kdb_trap(-1, frame);
715 1.14 thorpej return;
716 1.14 thorpej #else
717 1.14 thorpej panic("Prefetch Abort with intr_depth > 0");
718 1.1 chris #endif
719 1.1 chris }
720 1.1 chris
721 1.14 thorpej error = uvm_fault(map, va, 0, VM_PROT_READ);
722 1.14 thorpej if (error == 0)
723 1.14 thorpej goto out;
724 1.14 thorpej
725 1.14 thorpej if (error == ENOMEM) {
726 1.14 thorpej printf("UVM: pid %d (%s), uid %d killed: "
727 1.14 thorpej "out of swap\n", p->p_pid, p->p_comm,
728 1.27 scw (p->p_cred && p->p_ucred) ? p->p_ucred->cr_uid : -1);
729 1.26 thorpej trapsignal(l, SIGKILL, fault_pc);
730 1.14 thorpej } else
731 1.26 thorpej trapsignal(l, SIGSEGV, fault_pc);
732 1.27 scw out:
733 1.26 thorpej userret(l);
734 1.1 chris }
735