fault.c revision 1.30.2.7 1 1.30.2.7 skrll /* $NetBSD: fault.c,v 1.30.2.7 2005/01/17 19:29:12 skrll Exp $ */
2 1.1 chris
3 1.1 chris /*
4 1.27 scw * Copyright 2003 Wasabi Systems, Inc.
5 1.27 scw * All rights reserved.
6 1.27 scw *
7 1.27 scw * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 1.27 scw *
9 1.27 scw * Redistribution and use in source and binary forms, with or without
10 1.27 scw * modification, are permitted provided that the following conditions
11 1.27 scw * are met:
12 1.27 scw * 1. Redistributions of source code must retain the above copyright
13 1.27 scw * notice, this list of conditions and the following disclaimer.
14 1.27 scw * 2. Redistributions in binary form must reproduce the above copyright
15 1.27 scw * notice, this list of conditions and the following disclaimer in the
16 1.27 scw * documentation and/or other materials provided with the distribution.
17 1.27 scw * 3. All advertising materials mentioning features or use of this software
18 1.27 scw * must display the following acknowledgement:
19 1.27 scw * This product includes software developed for the NetBSD Project by
20 1.27 scw * Wasabi Systems, Inc.
21 1.27 scw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.27 scw * or promote products derived from this software without specific prior
23 1.27 scw * written permission.
24 1.27 scw *
25 1.27 scw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.27 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.27 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.27 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.27 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.27 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.27 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.27 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.27 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.27 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.27 scw * POSSIBILITY OF SUCH DAMAGE.
36 1.27 scw */
37 1.27 scw /*
38 1.1 chris * Copyright (c) 1994-1997 Mark Brinicombe.
39 1.1 chris * Copyright (c) 1994 Brini.
40 1.1 chris * All rights reserved.
41 1.1 chris *
42 1.1 chris * This code is derived from software written for Brini by Mark Brinicombe
43 1.1 chris *
44 1.1 chris * Redistribution and use in source and binary forms, with or without
45 1.1 chris * modification, are permitted provided that the following conditions
46 1.1 chris * are met:
47 1.1 chris * 1. Redistributions of source code must retain the above copyright
48 1.1 chris * notice, this list of conditions and the following disclaimer.
49 1.1 chris * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 chris * notice, this list of conditions and the following disclaimer in the
51 1.1 chris * documentation and/or other materials provided with the distribution.
52 1.1 chris * 3. All advertising materials mentioning features or use of this software
53 1.1 chris * must display the following acknowledgement:
54 1.1 chris * This product includes software developed by Brini.
55 1.1 chris * 4. The name of the company nor the name of the author may be used to
56 1.1 chris * endorse or promote products derived from this software without specific
57 1.1 chris * prior written permission.
58 1.1 chris *
59 1.1 chris * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.1 chris * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.1 chris * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 chris * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.1 chris * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.1 chris * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.1 chris * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 chris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 chris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 chris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 chris * SUCH DAMAGE.
70 1.1 chris *
71 1.1 chris * RiscBSD kernel project
72 1.1 chris *
73 1.1 chris * fault.c
74 1.1 chris *
75 1.1 chris * Fault handlers
76 1.1 chris *
77 1.1 chris * Created : 28/11/94
78 1.1 chris */
79 1.1 chris
80 1.1 chris #include "opt_ddb.h"
81 1.28 briggs #include "opt_kgdb.h"
82 1.1 chris
83 1.1 chris #include <sys/types.h>
84 1.30.2.7 skrll __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.30.2.7 2005/01/17 19:29:12 skrll Exp $");
85 1.21 bjh21
86 1.1 chris #include <sys/param.h>
87 1.1 chris #include <sys/systm.h>
88 1.1 chris #include <sys/proc.h>
89 1.30.2.1 skrll #include <sys/savar.h>
90 1.1 chris #include <sys/user.h>
91 1.1 chris #include <sys/kernel.h>
92 1.1 chris
93 1.1 chris #include <uvm/uvm_extern.h>
94 1.30.2.2 skrll #include <uvm/uvm_stat.h>
95 1.30.2.2 skrll #ifdef UVMHIST
96 1.30.2.2 skrll #include <uvm/uvm.h>
97 1.30.2.2 skrll #endif
98 1.18 thorpej
99 1.18 thorpej #include <arm/cpuconf.h>
100 1.1 chris
101 1.1 chris #include <machine/frame.h>
102 1.5 thorpej #include <arm/arm32/katelib.h>
103 1.1 chris #include <machine/cpu.h>
104 1.2 matt #include <machine/intr.h>
105 1.28 briggs #if defined(DDB) || defined(KGDB)
106 1.1 chris #include <machine/db_machdep.h>
107 1.28 briggs #ifdef KGDB
108 1.28 briggs #include <sys/kgdb.h>
109 1.28 briggs #endif
110 1.28 briggs #if !defined(DDB)
111 1.28 briggs #define kdb_trap kgdb_trap
112 1.28 briggs #endif
113 1.1 chris #endif
114 1.1 chris
115 1.1 chris #include <arch/arm/arm/disassem.h>
116 1.7 chris #include <arm/arm32/machdep.h>
117 1.7 chris
118 1.1 chris extern char fusubailout[];
119 1.1 chris
120 1.27 scw #ifdef DEBUG
121 1.27 scw int last_fault_code; /* For the benefit of pmap_fault_fixup() */
122 1.27 scw #endif
123 1.27 scw
124 1.30.2.1 skrll #if defined(CPU_ARM3) || defined(CPU_ARM6) || \
125 1.30.2.1 skrll defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
126 1.30.2.1 skrll /* These CPUs may need data/prefetch abort fixups */
127 1.30.2.1 skrll #define CPU_ABORT_FIXUP_REQUIRED
128 1.30.2.1 skrll #endif
129 1.1 chris
130 1.30.2.1 skrll struct data_abort {
131 1.30.2.1 skrll int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 1.30.2.1 skrll const char *desc;
133 1.30.2.1 skrll };
134 1.1 chris
135 1.30.2.1 skrll static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
136 1.30.2.1 skrll static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
137 1.30.2.1 skrll static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
138 1.30.2.1 skrll
139 1.30.2.1 skrll static const struct data_abort data_aborts[] = {
140 1.30.2.1 skrll {dab_fatal, "Vector Exception"},
141 1.30.2.1 skrll {dab_align, "Alignment Fault 1"},
142 1.30.2.1 skrll {dab_fatal, "Terminal Exception"},
143 1.30.2.1 skrll {dab_align, "Alignment Fault 3"},
144 1.30.2.1 skrll {dab_buserr, "External Linefetch Abort (S)"},
145 1.30.2.1 skrll {NULL, "Translation Fault (S)"},
146 1.30.2.1 skrll {dab_buserr, "External Linefetch Abort (P)"},
147 1.30.2.1 skrll {NULL, "Translation Fault (P)"},
148 1.30.2.1 skrll {dab_buserr, "External Non-Linefetch Abort (S)"},
149 1.30.2.1 skrll {NULL, "Domain Fault (S)"},
150 1.30.2.1 skrll {dab_buserr, "External Non-Linefetch Abort (P)"},
151 1.30.2.1 skrll {NULL, "Domain Fault (P)"},
152 1.30.2.1 skrll {dab_buserr, "External Translation Abort (L1)"},
153 1.30.2.1 skrll {NULL, "Permission Fault (S)"},
154 1.30.2.1 skrll {dab_buserr, "External Translation Abort (L2)"},
155 1.30.2.1 skrll {NULL, "Permission Fault (P)"}
156 1.1 chris };
157 1.1 chris
158 1.30.2.1 skrll /* Determine if a fault came from user mode */
159 1.30.2.1 skrll #define TRAP_USERMODE(tf) ((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
160 1.1 chris
161 1.30.2.1 skrll /* Determine if 'x' is a permission fault */
162 1.30.2.1 skrll #define IS_PERMISSION_FAULT(x) \
163 1.30.2.1 skrll (((1 << ((x) & FAULT_TYPE_MASK)) & \
164 1.30.2.1 skrll ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
165 1.30.2.1 skrll
166 1.30.2.1 skrll #if 0
167 1.30.2.1 skrll /* maybe one day we'll do emulations */
168 1.30.2.1 skrll #define TRAPSIGNAL(l,k) (*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
169 1.30.2.1 skrll #else
170 1.30.2.1 skrll #define TRAPSIGNAL(l,k) trapsignal((l), (k))
171 1.30.2.1 skrll #endif
172 1.3 thorpej
173 1.30.2.1 skrll static __inline void
174 1.30.2.1 skrll call_trapsignal(struct lwp *l, ksiginfo_t *ksi)
175 1.3 thorpej {
176 1.3 thorpej
177 1.30.2.6 skrll KERNEL_PROC_LOCK(l);
178 1.30.2.1 skrll TRAPSIGNAL(l, ksi);
179 1.30.2.6 skrll KERNEL_PROC_UNLOCK(l);
180 1.30.2.1 skrll }
181 1.3 thorpej
182 1.30.2.1 skrll static __inline int
183 1.30.2.1 skrll data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
184 1.30.2.1 skrll {
185 1.30.2.1 skrll #ifdef CPU_ABORT_FIXUP_REQUIRED
186 1.30.2.1 skrll int error;
187 1.3 thorpej
188 1.30.2.1 skrll /* Call the CPU specific data abort fixup routine */
189 1.30.2.1 skrll error = cpu_dataabt_fixup(tf);
190 1.30.2.1 skrll if (__predict_true(error != ABORT_FIXUP_FAILED))
191 1.30.2.1 skrll return (error);
192 1.3 thorpej
193 1.30.2.1 skrll /*
194 1.30.2.1 skrll * Oops, couldn't fix up the instruction
195 1.30.2.1 skrll */
196 1.30.2.1 skrll printf("data_abort_fixup: fixup for %s mode data abort failed.\n",
197 1.30.2.1 skrll TRAP_USERMODE(tf) ? "user" : "kernel");
198 1.30.2.3 skrll #ifdef THUMB_CODE
199 1.30.2.3 skrll if (tf->tf_spsr & PSR_T_bit) {
200 1.30.2.3 skrll printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
201 1.30.2.3 skrll tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1),
202 1.30.2.3 skrll *((u_int16 *)((tf->tf_pc + 2) & ~1));
203 1.30.2.3 skrll }
204 1.30.2.3 skrll else
205 1.30.2.3 skrll #endif
206 1.30.2.3 skrll {
207 1.30.2.3 skrll printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
208 1.30.2.3 skrll *((u_int *)tf->tf_pc));
209 1.30.2.3 skrll }
210 1.30.2.1 skrll disassemble(tf->tf_pc);
211 1.30.2.1 skrll
212 1.30.2.1 skrll /* Die now if this happened in kernel mode */
213 1.30.2.1 skrll if (!TRAP_USERMODE(tf))
214 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
215 1.3 thorpej
216 1.30.2.1 skrll return (error);
217 1.30.2.1 skrll #else
218 1.30.2.1 skrll return (ABORT_FIXUP_OK);
219 1.30.2.1 skrll #endif /* CPU_ABORT_FIXUP_REQUIRED */
220 1.3 thorpej }
221 1.3 thorpej
222 1.1 chris void
223 1.30.2.1 skrll data_abort_handler(trapframe_t *tf)
224 1.1 chris {
225 1.30.2.1 skrll struct vm_map *map;
226 1.1 chris struct pcb *pcb;
227 1.30.2.1 skrll struct lwp *l;
228 1.30.2.1 skrll u_int user, far, fsr;
229 1.30.2.1 skrll vm_prot_t ftype;
230 1.1 chris void *onfault;
231 1.27 scw vaddr_t va;
232 1.30.2.1 skrll int error;
233 1.30.2.1 skrll ksiginfo_t ksi;
234 1.1 chris
235 1.30.2.2 skrll UVMHIST_FUNC("data_abort_handler");
236 1.30.2.2 skrll
237 1.30.2.1 skrll /* Grab FAR/FSR before enabling interrupts */
238 1.30.2.1 skrll far = cpu_faultaddress();
239 1.30.2.1 skrll fsr = cpu_faultstatus();
240 1.1 chris
241 1.30.2.2 skrll UVMHIST_CALLED(maphist);
242 1.1 chris /* Update vmmeter statistics */
243 1.1 chris uvmexp.traps++;
244 1.1 chris
245 1.30.2.1 skrll /* Re-enable interrupts if they were enabled previously */
246 1.30.2.1 skrll if (__predict_true((tf->tf_spsr & I32_bit) == 0))
247 1.30.2.1 skrll enable_interrupts(I32_bit);
248 1.1 chris
249 1.26 thorpej /* Get the current lwp structure or lwp0 if there is none */
250 1.30.2.1 skrll l = (curlwp != NULL) ? curlwp : &lwp0;
251 1.1 chris
252 1.30.2.2 skrll UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, far=0x%x, fsr=0x%x)",
253 1.30.2.2 skrll tf->tf_pc, l, far, fsr);
254 1.30.2.2 skrll
255 1.30.2.1 skrll /* Data abort came from user mode? */
256 1.30.2.1 skrll user = TRAP_USERMODE(tf);
257 1.1 chris
258 1.30.2.1 skrll /* Grab the current pcb */
259 1.30.2.1 skrll pcb = &l->l_addr->u_pcb;
260 1.1 chris
261 1.30.2.1 skrll /* Invoke the appropriate handler, if necessary */
262 1.30.2.1 skrll if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
263 1.30.2.1 skrll if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
264 1.30.2.1 skrll l, &ksi))
265 1.30.2.1 skrll goto do_trapsignal;
266 1.30.2.1 skrll goto out;
267 1.1 chris }
268 1.1 chris
269 1.30.2.1 skrll /*
270 1.30.2.1 skrll * At this point, we're dealing with one of the following data aborts:
271 1.30.2.1 skrll *
272 1.30.2.1 skrll * FAULT_TRANS_S - Translation -- Section
273 1.30.2.1 skrll * FAULT_TRANS_P - Translation -- Page
274 1.30.2.1 skrll * FAULT_DOMAIN_S - Domain -- Section
275 1.30.2.1 skrll * FAULT_DOMAIN_P - Domain -- Page
276 1.30.2.1 skrll * FAULT_PERM_S - Permission -- Section
277 1.30.2.1 skrll * FAULT_PERM_P - Permission -- Page
278 1.30.2.1 skrll *
279 1.30.2.1 skrll * These are the main virtual memory-related faults signalled by
280 1.30.2.1 skrll * the MMU.
281 1.30.2.1 skrll */
282 1.1 chris
283 1.30.2.1 skrll /* fusubailout is used by [fs]uswintr to avoid page faulting */
284 1.30.2.1 skrll if (__predict_false(pcb->pcb_onfault == fusubailout)) {
285 1.30.2.1 skrll tf->tf_r0 = EFAULT;
286 1.30.2.1 skrll tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
287 1.1 chris return;
288 1.1 chris }
289 1.1 chris
290 1.30.2.1 skrll if (user)
291 1.30.2.1 skrll l->l_addr->u_pcb.pcb_tf = tf;
292 1.11 reinoud
293 1.30.2.1 skrll /*
294 1.30.2.1 skrll * Make sure the Program Counter is sane. We could fall foul of
295 1.30.2.1 skrll * someone executing Thumb code, in which case the PC might not
296 1.30.2.1 skrll * be word-aligned. This would cause a kernel alignment fault
297 1.30.2.1 skrll * further down if we have to decode the current instruction.
298 1.30.2.1 skrll */
299 1.30.2.3 skrll #ifdef THUMB_CODE
300 1.30.2.3 skrll /*
301 1.30.2.3 skrll * XXX: It would be nice to be able to support Thumb in the kernel
302 1.30.2.3 skrll * at some point.
303 1.30.2.3 skrll */
304 1.30.2.3 skrll if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
305 1.30.2.3 skrll printf("\ndata_abort_fault: Misaligned Kernel-mode "
306 1.30.2.3 skrll "Program Counter\n");
307 1.30.2.3 skrll dab_fatal(tf, fsr, far, l, NULL);
308 1.30.2.3 skrll }
309 1.30.2.3 skrll #else
310 1.30.2.1 skrll if (__predict_false((tf->tf_pc & 3) != 0)) {
311 1.11 reinoud if (user) {
312 1.30.2.1 skrll /*
313 1.30.2.1 skrll * Give the user an illegal instruction signal.
314 1.30.2.1 skrll */
315 1.30.2.1 skrll /* Deliver a SIGILL to the process */
316 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
317 1.30.2.1 skrll ksi.ksi_signo = SIGILL;
318 1.30.2.1 skrll ksi.ksi_code = ILL_ILLOPC;
319 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
320 1.30.2.1 skrll ksi.ksi_trap = fsr;
321 1.30.2.1 skrll goto do_trapsignal;
322 1.30.2.1 skrll }
323 1.1 chris
324 1.1 chris /*
325 1.30.2.1 skrll * The kernel never executes Thumb code.
326 1.1 chris */
327 1.30.2.1 skrll printf("\ndata_abort_fault: Misaligned Kernel-mode "
328 1.30.2.1 skrll "Program Counter\n");
329 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
330 1.30.2.1 skrll }
331 1.30.2.3 skrll #endif
332 1.1 chris
333 1.30.2.1 skrll /* See if the CPU state needs to be fixed up */
334 1.30.2.1 skrll switch (data_abort_fixup(tf, fsr, far, l)) {
335 1.30.2.1 skrll case ABORT_FIXUP_RETURN:
336 1.1 chris return;
337 1.30.2.1 skrll case ABORT_FIXUP_FAILED:
338 1.30.2.1 skrll /* Deliver a SIGILL to the process */
339 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
340 1.30.2.1 skrll ksi.ksi_signo = SIGILL;
341 1.30.2.1 skrll ksi.ksi_code = ILL_ILLOPC;
342 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
343 1.30.2.1 skrll ksi.ksi_trap = fsr;
344 1.30.2.1 skrll goto do_trapsignal;
345 1.30.2.1 skrll default:
346 1.30.2.1 skrll break;
347 1.27 scw }
348 1.27 scw
349 1.30.2.1 skrll va = trunc_page((vaddr_t)far);
350 1.1 chris
351 1.27 scw /*
352 1.27 scw * It is only a kernel address space fault iff:
353 1.27 scw * 1. user == 0 and
354 1.27 scw * 2. pcb_onfault not set or
355 1.30.2.1 skrll * 3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
356 1.27 scw */
357 1.30.2.1 skrll if (user == 0 && (va >= VM_MIN_KERNEL_ADDRESS ||
358 1.30.2.1 skrll (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
359 1.30.2.1 skrll __predict_true((pcb->pcb_onfault == NULL ||
360 1.30.2.1 skrll (ReadWord(tf->tf_pc) & 0x05200000) != 0x04200000))) {
361 1.30.2.1 skrll map = kernel_map;
362 1.30.2.1 skrll
363 1.27 scw /* Was the fault due to the FPE/IPKDB ? */
364 1.30.2.1 skrll if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
365 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
366 1.30.2.1 skrll ksi.ksi_signo = SIGSEGV;
367 1.30.2.1 skrll ksi.ksi_code = SEGV_ACCERR;
368 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
369 1.30.2.1 skrll ksi.ksi_trap = fsr;
370 1.27 scw
371 1.27 scw /*
372 1.27 scw * Force exit via userret()
373 1.30.2.1 skrll * This is necessary as the FPE is an extension to
374 1.30.2.1 skrll * userland that actually runs in a priveledged mode
375 1.30.2.1 skrll * but uses USR mode permissions for its accesses.
376 1.27 scw */
377 1.30.2.1 skrll user = 1;
378 1.30.2.1 skrll goto do_trapsignal;
379 1.27 scw }
380 1.30.2.1 skrll } else {
381 1.30.2.1 skrll map = &l->l_proc->p_vmspace->vm_map;
382 1.30.2.1 skrll if (l->l_flag & L_SA) {
383 1.30.2.1 skrll l->l_savp->savp_faultaddr = (vaddr_t)far;
384 1.30.2.1 skrll l->l_flag |= L_SA_PAGEFAULT;
385 1.30.2.1 skrll }
386 1.30.2.1 skrll }
387 1.1 chris
388 1.27 scw /*
389 1.27 scw * We need to know whether the page should be mapped
390 1.27 scw * as R or R/W. The MMU does not give us the info as
391 1.27 scw * to whether the fault was caused by a read or a write.
392 1.30.2.1 skrll *
393 1.30.2.1 skrll * However, we know that a permission fault can only be
394 1.30.2.1 skrll * the result of a write to a read-only location, so
395 1.30.2.1 skrll * we can deal with those quickly.
396 1.30.2.1 skrll *
397 1.30.2.1 skrll * Otherwise we need to disassemble the instruction
398 1.30.2.1 skrll * responsible to determine if it was a write.
399 1.27 scw */
400 1.30.2.1 skrll if (IS_PERMISSION_FAULT(fsr))
401 1.27 scw ftype = VM_PROT_WRITE;
402 1.30.2.1 skrll else {
403 1.30.2.3 skrll #ifdef THUMB_CODE
404 1.30.2.3 skrll /* Fast track the ARM case. */
405 1.30.2.3 skrll if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
406 1.30.2.3 skrll u_int insn = fusword((void *)(tf->tf_pc & ~1));
407 1.30.2.3 skrll u_int insn_f8 = insn & 0xf800;
408 1.30.2.3 skrll u_int insn_fe = insn & 0xfe00;
409 1.30.2.3 skrll
410 1.30.2.3 skrll if (insn_f8 == 0x6000 || /* STR(1) */
411 1.30.2.3 skrll insn_f8 == 0x7000 || /* STRB(1) */
412 1.30.2.3 skrll insn_f8 == 0x8000 || /* STRH(1) */
413 1.30.2.3 skrll insn_f8 == 0x9000 || /* STR(3) */
414 1.30.2.3 skrll insn_f8 == 0xc000 || /* STM */
415 1.30.2.3 skrll insn_fe == 0x5000 || /* STR(2) */
416 1.30.2.3 skrll insn_fe == 0x5200 || /* STRH(2) */
417 1.30.2.3 skrll insn_fe == 0x5400) /* STRB(2) */
418 1.30.2.3 skrll ftype = VM_PROT_WRITE;
419 1.30.2.3 skrll else
420 1.30.2.3 skrll ftype = VM_PROT_READ;
421 1.30.2.3 skrll }
422 1.30.2.1 skrll else
423 1.30.2.3 skrll #endif
424 1.30.2.3 skrll {
425 1.30.2.3 skrll u_int insn = ReadWord(tf->tf_pc);
426 1.30.2.3 skrll
427 1.30.2.3 skrll if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
428 1.30.2.3 skrll ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
429 1.30.2.3 skrll ((insn & 0x0a100000) == 0x08000000)) /* STM/CDT*/
430 1.30.2.3 skrll ftype = VM_PROT_WRITE;
431 1.30.2.3 skrll else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
432 1.30.2.3 skrll ftype = VM_PROT_READ | VM_PROT_WRITE;
433 1.30.2.3 skrll else
434 1.30.2.3 skrll ftype = VM_PROT_READ;
435 1.30.2.3 skrll }
436 1.30.2.1 skrll }
437 1.30.2.1 skrll
438 1.30.2.1 skrll /*
439 1.30.2.1 skrll * See if the fault is as a result of ref/mod emulation,
440 1.30.2.1 skrll * or domain mismatch.
441 1.30.2.1 skrll */
442 1.30.2.1 skrll #ifdef DEBUG
443 1.30.2.1 skrll last_fault_code = fsr;
444 1.1 chris #endif
445 1.30.2.1 skrll if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
446 1.30.2.1 skrll if (map != kernel_map)
447 1.30.2.1 skrll l->l_flag &= ~L_SA_PAGEFAULT;
448 1.30.2.2 skrll UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
449 1.27 scw goto out;
450 1.30.2.1 skrll }
451 1.1 chris
452 1.30.2.1 skrll if (__predict_false(current_intr_depth > 0)) {
453 1.30.2.1 skrll if (pcb->pcb_onfault) {
454 1.30.2.1 skrll tf->tf_r0 = EINVAL;
455 1.30.2.1 skrll tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
456 1.30.2.1 skrll return;
457 1.30.2.1 skrll }
458 1.30.2.1 skrll printf("\nNon-emulated page fault with intr_depth > 0\n");
459 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
460 1.27 scw }
461 1.1 chris
462 1.27 scw onfault = pcb->pcb_onfault;
463 1.27 scw pcb->pcb_onfault = NULL;
464 1.30.2.1 skrll error = uvm_fault(map, va, 0, ftype);
465 1.27 scw pcb->pcb_onfault = onfault;
466 1.30.2.1 skrll
467 1.30.2.1 skrll if (map != kernel_map)
468 1.30.2.1 skrll l->l_flag &= ~L_SA_PAGEFAULT;
469 1.30.2.1 skrll
470 1.30.2.1 skrll if (__predict_true(error == 0)) {
471 1.30.2.1 skrll if (user)
472 1.30.2.1 skrll uvm_grow(l->l_proc, va); /* Record any stack growth */
473 1.30.2.2 skrll UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
474 1.27 scw goto out;
475 1.27 scw }
476 1.30.2.1 skrll
477 1.27 scw if (user == 0) {
478 1.27 scw if (pcb->pcb_onfault) {
479 1.30.2.1 skrll tf->tf_r0 = error;
480 1.30.2.1 skrll tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
481 1.30.2.1 skrll return;
482 1.1 chris }
483 1.30.2.1 skrll
484 1.30.2.1 skrll printf("\nuvm_fault(%p, %lx, %x, 0) -> %x\n", map, va, ftype,
485 1.30.2.1 skrll error);
486 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
487 1.27 scw }
488 1.1 chris
489 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
490 1.30.2.1 skrll
491 1.30.2.1 skrll if (error == ENOMEM) {
492 1.27 scw printf("UVM: pid %d (%s), uid %d killed: "
493 1.30.2.1 skrll "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
494 1.30.2.1 skrll (l->l_proc->p_cred && l->l_proc->p_ucred) ?
495 1.30.2.1 skrll l->l_proc->p_ucred->cr_uid : -1);
496 1.30.2.1 skrll ksi.ksi_signo = SIGKILL;
497 1.27 scw } else
498 1.30.2.1 skrll ksi.ksi_signo = SIGSEGV;
499 1.27 scw
500 1.30.2.1 skrll ksi.ksi_code = (error == EACCES) ? SEGV_ACCERR : SEGV_MAPERR;
501 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
502 1.30.2.1 skrll ksi.ksi_trap = fsr;
503 1.30.2.2 skrll UVMHIST_LOG(maphist, " <- erorr (%d)", error, 0, 0, 0);
504 1.30.2.1 skrll
505 1.30.2.1 skrll do_trapsignal:
506 1.30.2.1 skrll call_trapsignal(l, &ksi);
507 1.27 scw out:
508 1.30.2.1 skrll /* If returning to user mode, make sure to invoke userret() */
509 1.1 chris if (user)
510 1.26 thorpej userret(l);
511 1.1 chris }
512 1.1 chris
513 1.30.2.1 skrll /*
514 1.30.2.1 skrll * dab_fatal() handles the following data aborts:
515 1.30.2.1 skrll *
516 1.30.2.1 skrll * FAULT_WRTBUF_0 - Vector Exception
517 1.30.2.1 skrll * FAULT_WRTBUF_1 - Terminal Exception
518 1.30.2.1 skrll *
519 1.30.2.1 skrll * We should never see these on a properly functioning system.
520 1.30.2.1 skrll *
521 1.30.2.1 skrll * This function is also called by the other handlers if they
522 1.30.2.1 skrll * detect a fatal problem.
523 1.30.2.1 skrll *
524 1.30.2.1 skrll * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
525 1.30.2.1 skrll */
526 1.30.2.1 skrll static int
527 1.30.2.1 skrll dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
528 1.30.2.1 skrll {
529 1.30.2.1 skrll const char *mode;
530 1.30.2.1 skrll
531 1.30.2.1 skrll mode = TRAP_USERMODE(tf) ? "user" : "kernel";
532 1.30.2.1 skrll
533 1.30.2.1 skrll if (l != NULL) {
534 1.30.2.1 skrll printf("Fatal %s mode data abort: '%s'\n", mode,
535 1.30.2.1 skrll data_aborts[fsr & FAULT_TYPE_MASK].desc);
536 1.30.2.1 skrll printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
537 1.30.2.1 skrll if ((fsr & FAULT_IMPRECISE) == 0)
538 1.30.2.1 skrll printf("%08x, ", far);
539 1.30.2.1 skrll else
540 1.30.2.1 skrll printf("Invalid, ");
541 1.30.2.1 skrll printf("spsr=%08x\n", tf->tf_spsr);
542 1.30.2.1 skrll } else {
543 1.30.2.1 skrll printf("Fatal %s mode prefetch abort at 0x%08x\n",
544 1.30.2.1 skrll mode, tf->tf_pc);
545 1.30.2.1 skrll printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
546 1.30.2.1 skrll }
547 1.30.2.1 skrll
548 1.30.2.1 skrll printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
549 1.30.2.1 skrll tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
550 1.30.2.1 skrll printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
551 1.30.2.1 skrll tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
552 1.30.2.1 skrll printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
553 1.30.2.1 skrll tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
554 1.30.2.1 skrll printf("r12=%08x, ", tf->tf_r12);
555 1.30.2.1 skrll
556 1.30.2.1 skrll if (TRAP_USERMODE(tf))
557 1.30.2.1 skrll printf("usp=%08x, ulr=%08x",
558 1.30.2.1 skrll tf->tf_usr_sp, tf->tf_usr_lr);
559 1.30.2.1 skrll else
560 1.30.2.1 skrll printf("ssp=%08x, slr=%08x",
561 1.30.2.1 skrll tf->tf_svc_sp, tf->tf_svc_lr);
562 1.30.2.1 skrll printf(", pc =%08x\n\n", tf->tf_pc);
563 1.30.2.1 skrll
564 1.30.2.1 skrll #if defined(DDB) || defined(KGDB)
565 1.30.2.1 skrll kdb_trap(T_FAULT, tf);
566 1.30.2.1 skrll #endif
567 1.30.2.1 skrll panic("Fatal abort");
568 1.30.2.1 skrll /*NOTREACHED*/
569 1.30.2.1 skrll }
570 1.30.2.1 skrll
571 1.30.2.1 skrll /*
572 1.30.2.1 skrll * dab_align() handles the following data aborts:
573 1.30.2.1 skrll *
574 1.30.2.1 skrll * FAULT_ALIGN_0 - Alignment fault
575 1.30.2.1 skrll * FAULT_ALIGN_0 - Alignment fault
576 1.30.2.1 skrll *
577 1.30.2.1 skrll * These faults are fatal if they happen in kernel mode. Otherwise, we
578 1.30.2.1 skrll * deliver a bus error to the process.
579 1.30.2.1 skrll */
580 1.30.2.1 skrll static int
581 1.30.2.1 skrll dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
582 1.30.2.1 skrll {
583 1.30.2.1 skrll
584 1.30.2.1 skrll /* Alignment faults are always fatal if they occur in kernel mode */
585 1.30.2.1 skrll if (!TRAP_USERMODE(tf))
586 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
587 1.30.2.1 skrll
588 1.30.2.1 skrll /* pcb_onfault *must* be NULL at this point */
589 1.30.2.1 skrll KDASSERT(l->l_addr->u_pcb.pcb_onfault == NULL);
590 1.30.2.1 skrll
591 1.30.2.1 skrll /* See if the CPU state needs to be fixed up */
592 1.30.2.1 skrll (void) data_abort_fixup(tf, fsr, far, l);
593 1.30.2.1 skrll
594 1.30.2.1 skrll /* Deliver a bus error signal to the process */
595 1.30.2.1 skrll KSI_INIT_TRAP(ksi);
596 1.30.2.1 skrll ksi->ksi_signo = SIGBUS;
597 1.30.2.1 skrll ksi->ksi_code = BUS_ADRALN;
598 1.30.2.1 skrll ksi->ksi_addr = (u_int32_t *)(intptr_t)far;
599 1.30.2.1 skrll ksi->ksi_trap = fsr;
600 1.30.2.1 skrll
601 1.30.2.1 skrll l->l_addr->u_pcb.pcb_tf = tf;
602 1.30.2.1 skrll
603 1.30.2.1 skrll return (1);
604 1.30.2.1 skrll }
605 1.30.2.1 skrll
606 1.30.2.1 skrll /*
607 1.30.2.1 skrll * dab_buserr() handles the following data aborts:
608 1.30.2.1 skrll *
609 1.30.2.1 skrll * FAULT_BUSERR_0 - External Abort on Linefetch -- Section
610 1.30.2.1 skrll * FAULT_BUSERR_1 - External Abort on Linefetch -- Page
611 1.30.2.1 skrll * FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
612 1.30.2.1 skrll * FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
613 1.30.2.1 skrll * FAULT_BUSTRNL1 - External abort on Translation -- Level 1
614 1.30.2.1 skrll * FAULT_BUSTRNL2 - External abort on Translation -- Level 2
615 1.30.2.1 skrll *
616 1.30.2.1 skrll * If pcb_onfault is set, flag the fault and return to the handler.
617 1.30.2.1 skrll * If the fault occurred in user mode, give the process a SIGBUS.
618 1.30.2.1 skrll *
619 1.30.2.1 skrll * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
620 1.30.2.1 skrll * can be flagged as imprecise in the FSR. This causes a real headache
621 1.30.2.1 skrll * since some of the machine state is lost. In this case, tf->tf_pc
622 1.30.2.1 skrll * may not actually point to the offending instruction. In fact, if
623 1.30.2.1 skrll * we've taken a double abort fault, it generally points somewhere near
624 1.30.2.1 skrll * the top of "data_abort_entry" in exception.S.
625 1.30.2.1 skrll *
626 1.30.2.1 skrll * In all other cases, these data aborts are considered fatal.
627 1.30.2.1 skrll */
628 1.30.2.1 skrll static int
629 1.30.2.1 skrll dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
630 1.30.2.1 skrll ksiginfo_t *ksi)
631 1.30.2.1 skrll {
632 1.30.2.1 skrll struct pcb *pcb = &l->l_addr->u_pcb;
633 1.30.2.1 skrll
634 1.30.2.1 skrll #ifdef __XSCALE__
635 1.30.2.1 skrll if ((fsr & FAULT_IMPRECISE) != 0 &&
636 1.30.2.1 skrll (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
637 1.30.2.1 skrll /*
638 1.30.2.1 skrll * Oops, an imprecise, double abort fault. We've lost the
639 1.30.2.1 skrll * r14_abt/spsr_abt values corresponding to the original
640 1.30.2.1 skrll * abort, and the spsr saved in the trapframe indicates
641 1.30.2.1 skrll * ABT mode.
642 1.30.2.1 skrll */
643 1.30.2.1 skrll tf->tf_spsr &= ~PSR_MODE;
644 1.30.2.1 skrll
645 1.30.2.1 skrll /*
646 1.30.2.1 skrll * We use a simple heuristic to determine if the double abort
647 1.30.2.1 skrll * happened as a result of a kernel or user mode access.
648 1.30.2.1 skrll * If the current trapframe is at the top of the kernel stack,
649 1.30.2.1 skrll * the fault _must_ have come from user mode.
650 1.30.2.1 skrll */
651 1.30.2.1 skrll if (tf != ((trapframe_t *)pcb->pcb_un.un_32.pcb32_sp) - 1) {
652 1.30.2.1 skrll /*
653 1.30.2.1 skrll * Kernel mode. We're either about to die a
654 1.30.2.1 skrll * spectacular death, or pcb_onfault will come
655 1.30.2.1 skrll * to our rescue. Either way, the current value
656 1.30.2.1 skrll * of tf->tf_pc is irrelevant.
657 1.30.2.1 skrll */
658 1.30.2.1 skrll tf->tf_spsr |= PSR_SVC32_MODE;
659 1.30.2.1 skrll if (pcb->pcb_onfault == NULL)
660 1.30.2.1 skrll printf("\nKernel mode double abort!\n");
661 1.30.2.1 skrll } else {
662 1.30.2.1 skrll /*
663 1.30.2.1 skrll * User mode. We've lost the program counter at the
664 1.30.2.1 skrll * time of the fault (not that it was accurate anyway;
665 1.30.2.1 skrll * it's not called an imprecise fault for nothing).
666 1.30.2.1 skrll * About all we can do is copy r14_usr to tf_pc and
667 1.30.2.1 skrll * hope for the best. The process is about to get a
668 1.30.2.1 skrll * SIGBUS, so it's probably history anyway.
669 1.30.2.1 skrll */
670 1.30.2.1 skrll tf->tf_spsr |= PSR_USR32_MODE;
671 1.30.2.1 skrll tf->tf_pc = tf->tf_usr_lr;
672 1.30.2.3 skrll #ifdef THUMB_CODE
673 1.30.2.3 skrll tf->tf_spsr &= ~PSR_T_bit;
674 1.30.2.3 skrll if (tf->tf_usr_lr & 1)
675 1.30.2.3 skrll tf->tf_spsr |= PSR_T_bit;
676 1.30.2.3 skrll #endif
677 1.30.2.1 skrll }
678 1.30.2.1 skrll }
679 1.30.2.1 skrll
680 1.30.2.1 skrll /* FAR is invalid for imprecise exceptions */
681 1.30.2.1 skrll if ((fsr & FAULT_IMPRECISE) != 0)
682 1.30.2.1 skrll far = 0;
683 1.30.2.1 skrll #endif /* __XSCALE__ */
684 1.30.2.1 skrll
685 1.30.2.1 skrll if (pcb->pcb_onfault) {
686 1.30.2.1 skrll KDASSERT(TRAP_USERMODE(tf) == 0);
687 1.30.2.1 skrll tf->tf_r0 = EFAULT;
688 1.30.2.1 skrll tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
689 1.30.2.1 skrll return (0);
690 1.30.2.1 skrll }
691 1.30.2.1 skrll
692 1.30.2.1 skrll /* See if the CPU state needs to be fixed up */
693 1.30.2.1 skrll (void) data_abort_fixup(tf, fsr, far, l);
694 1.30.2.1 skrll
695 1.30.2.1 skrll /*
696 1.30.2.1 skrll * At this point, if the fault happened in kernel mode, we're toast
697 1.30.2.1 skrll */
698 1.30.2.1 skrll if (!TRAP_USERMODE(tf))
699 1.30.2.1 skrll dab_fatal(tf, fsr, far, l, NULL);
700 1.30.2.1 skrll
701 1.30.2.1 skrll /* Deliver a bus error signal to the process */
702 1.30.2.1 skrll KSI_INIT_TRAP(ksi);
703 1.30.2.1 skrll ksi->ksi_signo = SIGBUS;
704 1.30.2.1 skrll ksi->ksi_code = BUS_ADRERR;
705 1.30.2.1 skrll ksi->ksi_addr = (u_int32_t *)(intptr_t)far;
706 1.30.2.1 skrll ksi->ksi_trap = fsr;
707 1.30.2.1 skrll
708 1.30.2.1 skrll l->l_addr->u_pcb.pcb_tf = tf;
709 1.30.2.1 skrll
710 1.30.2.1 skrll return (1);
711 1.30.2.1 skrll }
712 1.30.2.1 skrll
713 1.30.2.1 skrll static __inline int
714 1.30.2.1 skrll prefetch_abort_fixup(trapframe_t *tf)
715 1.30.2.1 skrll {
716 1.30.2.1 skrll #ifdef CPU_ABORT_FIXUP_REQUIRED
717 1.30.2.1 skrll int error;
718 1.30.2.1 skrll
719 1.30.2.1 skrll /* Call the CPU specific prefetch abort fixup routine */
720 1.30.2.1 skrll error = cpu_prefetchabt_fixup(tf);
721 1.30.2.1 skrll if (__predict_true(error != ABORT_FIXUP_FAILED))
722 1.30.2.1 skrll return (error);
723 1.30.2.1 skrll
724 1.30.2.1 skrll /*
725 1.30.2.1 skrll * Oops, couldn't fix up the instruction
726 1.30.2.1 skrll */
727 1.30.2.1 skrll printf(
728 1.30.2.1 skrll "prefetch_abort_fixup: fixup for %s mode prefetch abort failed.\n",
729 1.30.2.1 skrll TRAP_USERMODE(tf) ? "user" : "kernel");
730 1.30.2.3 skrll #ifdef THUMB_CODE
731 1.30.2.3 skrll if (tf->tf_spsr & PSR_T_bit) {
732 1.30.2.3 skrll printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
733 1.30.2.3 skrll tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1),
734 1.30.2.3 skrll *((u_int16 *)((tf->tf_pc + 2) & ~1));
735 1.30.2.3 skrll }
736 1.30.2.3 skrll else
737 1.30.2.3 skrll #endif
738 1.30.2.3 skrll {
739 1.30.2.3 skrll printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
740 1.30.2.3 skrll *((u_int *)tf->tf_pc));
741 1.30.2.3 skrll }
742 1.30.2.1 skrll disassemble(tf->tf_pc);
743 1.30.2.1 skrll
744 1.30.2.1 skrll /* Die now if this happened in kernel mode */
745 1.30.2.1 skrll if (!TRAP_USERMODE(tf))
746 1.30.2.1 skrll dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
747 1.30.2.1 skrll
748 1.30.2.1 skrll return (error);
749 1.30.2.1 skrll #else
750 1.30.2.1 skrll return (ABORT_FIXUP_OK);
751 1.30.2.1 skrll #endif /* CPU_ABORT_FIXUP_REQUIRED */
752 1.30.2.1 skrll }
753 1.1 chris
754 1.1 chris /*
755 1.30.2.1 skrll * void prefetch_abort_handler(trapframe_t *tf)
756 1.1 chris *
757 1.1 chris * Abort handler called when instruction execution occurs at
758 1.1 chris * a non existent or restricted (access permissions) memory page.
759 1.1 chris * If the address is invalid and we were in SVC mode then panic as
760 1.1 chris * the kernel should never prefetch abort.
761 1.1 chris * If the address is invalid and the page is mapped then the user process
762 1.1 chris * does no have read permission so send it a signal.
763 1.1 chris * Otherwise fault the page in and try again.
764 1.1 chris */
765 1.1 chris void
766 1.30.2.1 skrll prefetch_abort_handler(trapframe_t *tf)
767 1.1 chris {
768 1.26 thorpej struct lwp *l;
769 1.14 thorpej struct vm_map *map;
770 1.14 thorpej vaddr_t fault_pc, va;
771 1.30.2.1 skrll ksiginfo_t ksi;
772 1.1 chris int error;
773 1.1 chris
774 1.30.2.2 skrll UVMHIST_FUNC("prefetch_abort_handler"); UVMHIST_CALLED(maphist);
775 1.30.2.2 skrll
776 1.30.2.1 skrll /* Update vmmeter statistics */
777 1.30.2.1 skrll uvmexp.traps++;
778 1.30.2.1 skrll
779 1.1 chris /*
780 1.1 chris * Enable IRQ's (disabled by the abort) This always comes
781 1.1 chris * from user mode so we know interrupts were not disabled.
782 1.1 chris * But we check anyway.
783 1.1 chris */
784 1.30.2.1 skrll if (__predict_true((tf->tf_spsr & I32_bit) == 0))
785 1.1 chris enable_interrupts(I32_bit);
786 1.1 chris
787 1.30.2.1 skrll /* See if the CPU state needs to be fixed up */
788 1.30.2.1 skrll switch (prefetch_abort_fixup(tf)) {
789 1.30.2.1 skrll case ABORT_FIXUP_RETURN:
790 1.1 chris return;
791 1.30.2.1 skrll case ABORT_FIXUP_FAILED:
792 1.30.2.1 skrll /* Deliver a SIGILL to the process */
793 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
794 1.30.2.1 skrll ksi.ksi_signo = SIGILL;
795 1.30.2.1 skrll ksi.ksi_code = ILL_ILLOPC;
796 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) tf->tf_pc;
797 1.30.2.1 skrll l = curlwp;
798 1.30.2.1 skrll l->l_addr->u_pcb.pcb_tf = tf;
799 1.30.2.1 skrll goto do_trapsignal;
800 1.30.2.1 skrll default:
801 1.30.2.1 skrll break;
802 1.1 chris }
803 1.1 chris
804 1.30.2.1 skrll /* Prefetch aborts cannot happen in kernel mode */
805 1.30.2.1 skrll if (__predict_false(!TRAP_USERMODE(tf)))
806 1.30.2.1 skrll dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
807 1.1 chris
808 1.4 thorpej /* Get fault address */
809 1.30.2.1 skrll fault_pc = tf->tf_pc;
810 1.30.2.1 skrll l = curlwp;
811 1.30.2.1 skrll l->l_addr->u_pcb.pcb_tf = tf;
812 1.30.2.2 skrll UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, tf=0x%x)", fault_pc, l, tf,
813 1.30.2.2 skrll 0);
814 1.4 thorpej
815 1.1 chris /* Ok validate the address, can only execute in USER space */
816 1.30.2.1 skrll if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
817 1.30.2.1 skrll (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
818 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
819 1.30.2.1 skrll ksi.ksi_signo = SIGSEGV;
820 1.30.2.1 skrll ksi.ksi_code = SEGV_ACCERR;
821 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
822 1.30.2.1 skrll ksi.ksi_trap = fault_pc;
823 1.30.2.1 skrll goto do_trapsignal;
824 1.1 chris }
825 1.1 chris
826 1.30.2.1 skrll map = &l->l_proc->p_vmspace->vm_map;
827 1.30.2.1 skrll va = trunc_page(fault_pc);
828 1.30.2.1 skrll
829 1.27 scw /*
830 1.27 scw * See if the pmap can handle this fault on its own...
831 1.27 scw */
832 1.30.2.1 skrll #ifdef DEBUG
833 1.30.2.1 skrll last_fault_code = -1;
834 1.30.2.1 skrll #endif
835 1.30.2.2 skrll if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ, 1)) {
836 1.30.2.2 skrll UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
837 1.27 scw goto out;
838 1.30.2.2 skrll }
839 1.27 scw
840 1.30.2.1 skrll #ifdef DIAGNOSTIC
841 1.30.2.1 skrll if (__predict_false(current_intr_depth > 0)) {
842 1.30.2.1 skrll printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
843 1.30.2.1 skrll dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
844 1.1 chris }
845 1.30.2.1 skrll #endif
846 1.30.2.7 skrll if (map != kernel_map && l->l_flag & L_SA) {
847 1.30.2.7 skrll l->l_savp->savp_faultaddr = fault_pc;
848 1.30.2.7 skrll l->l_flag |= L_SA_PAGEFAULT;
849 1.30.2.7 skrll }
850 1.1 chris
851 1.14 thorpej error = uvm_fault(map, va, 0, VM_PROT_READ);
852 1.30.2.7 skrll
853 1.30.2.7 skrll if (map != kernel_map)
854 1.30.2.7 skrll l->l_flag &= ~L_SA_PAGEFAULT;
855 1.30.2.7 skrll
856 1.30.2.2 skrll if (__predict_true(error == 0)) {
857 1.30.2.2 skrll UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
858 1.14 thorpej goto out;
859 1.30.2.2 skrll }
860 1.30.2.1 skrll KSI_INIT_TRAP(&ksi);
861 1.30.2.1 skrll
862 1.30.2.2 skrll UVMHIST_LOG (maphist, " <- fatal (%d)", error, 0, 0, 0);
863 1.14 thorpej if (error == ENOMEM) {
864 1.14 thorpej printf("UVM: pid %d (%s), uid %d killed: "
865 1.30.2.1 skrll "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
866 1.30.2.1 skrll (l->l_proc->p_cred && l->l_proc->p_ucred) ?
867 1.30.2.1 skrll l->l_proc->p_ucred->cr_uid : -1);
868 1.30.2.1 skrll ksi.ksi_signo = SIGKILL;
869 1.14 thorpej } else
870 1.30.2.1 skrll ksi.ksi_signo = SIGSEGV;
871 1.30.2.1 skrll
872 1.30.2.1 skrll ksi.ksi_code = SEGV_MAPERR;
873 1.30.2.1 skrll ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
874 1.30.2.1 skrll ksi.ksi_trap = fault_pc;
875 1.30.2.1 skrll
876 1.30.2.1 skrll do_trapsignal:
877 1.30.2.1 skrll call_trapsignal(l, &ksi);
878 1.30.2.1 skrll
879 1.27 scw out:
880 1.26 thorpej userret(l);
881 1.1 chris }
882 1.30.2.1 skrll
883 1.30.2.1 skrll /*
884 1.30.2.1 skrll * Tentatively read an 8, 16, or 32-bit value from 'addr'.
885 1.30.2.1 skrll * If the read succeeds, the value is written to 'rptr' and zero is returned.
886 1.30.2.1 skrll * Else, return EFAULT.
887 1.30.2.1 skrll */
888 1.30.2.1 skrll int
889 1.30.2.1 skrll badaddr_read(void *addr, size_t size, void *rptr)
890 1.30.2.1 skrll {
891 1.30.2.1 skrll extern int badaddr_read_1(const uint8_t *, uint8_t *);
892 1.30.2.1 skrll extern int badaddr_read_2(const uint16_t *, uint16_t *);
893 1.30.2.1 skrll extern int badaddr_read_4(const uint32_t *, uint32_t *);
894 1.30.2.1 skrll union {
895 1.30.2.1 skrll uint8_t v1;
896 1.30.2.1 skrll uint16_t v2;
897 1.30.2.1 skrll uint32_t v4;
898 1.30.2.1 skrll } u;
899 1.30.2.1 skrll struct pcb *curpcb_save;
900 1.30.2.1 skrll int rv, s;
901 1.30.2.1 skrll
902 1.30.2.1 skrll cpu_drain_writebuf();
903 1.30.2.1 skrll
904 1.30.2.1 skrll /*
905 1.30.2.1 skrll * We might be called at interrupt time, so arrange to steal
906 1.30.2.1 skrll * lwp0's PCB temporarily, if required, so that pcb_onfault
907 1.30.2.1 skrll * handling works correctly.
908 1.30.2.1 skrll */
909 1.30.2.1 skrll s = splhigh();
910 1.30.2.1 skrll if ((curpcb_save = curpcb) == NULL)
911 1.30.2.1 skrll curpcb = &lwp0.l_addr->u_pcb;
912 1.30.2.1 skrll
913 1.30.2.1 skrll /* Read from the test address. */
914 1.30.2.1 skrll switch (size) {
915 1.30.2.1 skrll case sizeof(uint8_t):
916 1.30.2.1 skrll rv = badaddr_read_1(addr, &u.v1);
917 1.30.2.1 skrll if (rv == 0 && rptr)
918 1.30.2.1 skrll *(uint8_t *) rptr = u.v1;
919 1.30.2.1 skrll break;
920 1.30.2.1 skrll
921 1.30.2.1 skrll case sizeof(uint16_t):
922 1.30.2.1 skrll rv = badaddr_read_2(addr, &u.v2);
923 1.30.2.1 skrll if (rv == 0 && rptr)
924 1.30.2.1 skrll *(uint16_t *) rptr = u.v2;
925 1.30.2.1 skrll break;
926 1.30.2.1 skrll
927 1.30.2.1 skrll case sizeof(uint32_t):
928 1.30.2.1 skrll rv = badaddr_read_4(addr, &u.v4);
929 1.30.2.1 skrll if (rv == 0 && rptr)
930 1.30.2.1 skrll *(uint32_t *) rptr = u.v4;
931 1.30.2.1 skrll break;
932 1.30.2.1 skrll
933 1.30.2.1 skrll default:
934 1.30.2.1 skrll curpcb = curpcb_save;
935 1.30.2.1 skrll panic("badaddr: invalid size (%lu)", (u_long) size);
936 1.30.2.1 skrll }
937 1.30.2.1 skrll
938 1.30.2.1 skrll /* Restore curpcb */
939 1.30.2.1 skrll curpcb = curpcb_save;
940 1.30.2.1 skrll splx(s);
941 1.30.2.1 skrll
942 1.30.2.1 skrll /* Return EFAULT if the address was invalid, else zero */
943 1.30.2.1 skrll return (rv);
944 1.30.2.1 skrll }
945