pmap.c revision 1.111
1 /* $NetBSD: pmap.c,v 1.111 2002/08/21 21:22:52 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.111 2002/08/21 21:22:52 thorpej Exp $"); 147 #ifdef PMAP_DEBUG 148 #define PDEBUG(_lev_,_stat_) \ 149 if (pmap_debug_level >= (_lev_)) \ 150 ((_stat_)) 151 int pmap_debug_level = -2; 152 void pmap_dump_pvlist(vaddr_t phys, char *m); 153 154 /* 155 * for switching to potentially finer grained debugging 156 */ 157 #define PDB_FOLLOW 0x0001 158 #define PDB_INIT 0x0002 159 #define PDB_ENTER 0x0004 160 #define PDB_REMOVE 0x0008 161 #define PDB_CREATE 0x0010 162 #define PDB_PTPAGE 0x0020 163 #define PDB_GROWKERN 0x0040 164 #define PDB_BITS 0x0080 165 #define PDB_COLLECT 0x0100 166 #define PDB_PROTECT 0x0200 167 #define PDB_MAP_L1 0x0400 168 #define PDB_BOOTSTRAP 0x1000 169 #define PDB_PARANOIA 0x2000 170 #define PDB_WIRING 0x4000 171 #define PDB_PVDUMP 0x8000 172 173 int debugmap = 0; 174 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 175 #define NPDEBUG(_lev_,_stat_) \ 176 if (pmapdebug & (_lev_)) \ 177 ((_stat_)) 178 179 #else /* PMAP_DEBUG */ 180 #define PDEBUG(_lev_,_stat_) /* Nothing */ 181 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 182 #endif /* PMAP_DEBUG */ 183 184 struct pmap kernel_pmap_store; 185 186 /* 187 * linked list of all non-kernel pmaps 188 */ 189 190 static LIST_HEAD(, pmap) pmaps; 191 192 /* 193 * pool that pmap structures are allocated from 194 */ 195 196 struct pool pmap_pmap_pool; 197 198 /* 199 * pool/cache that PT-PT's are allocated from 200 */ 201 202 struct pool pmap_ptpt_pool; 203 struct pool_cache pmap_ptpt_cache; 204 u_int pmap_ptpt_cache_generation; 205 206 static void *pmap_ptpt_page_alloc(struct pool *, int); 207 static void pmap_ptpt_page_free(struct pool *, void *); 208 209 struct pool_allocator pmap_ptpt_allocator = { 210 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 211 }; 212 213 static int pmap_ptpt_ctor(void *, void *, int); 214 215 static pt_entry_t *csrc_pte, *cdst_pte; 216 static vaddr_t csrcp, cdstp; 217 218 char *memhook; 219 extern caddr_t msgbufaddr; 220 221 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 222 /* 223 * locking data structures 224 */ 225 226 static struct lock pmap_main_lock; 227 static struct simplelock pvalloc_lock; 228 static struct simplelock pmaps_lock; 229 #ifdef LOCKDEBUG 230 #define PMAP_MAP_TO_HEAD_LOCK() \ 231 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 232 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 233 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 234 235 #define PMAP_HEAD_TO_MAP_LOCK() \ 236 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 237 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 238 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 239 #else 240 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 241 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 242 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 244 #endif /* LOCKDEBUG */ 245 246 /* 247 * pv_page management structures: locked by pvalloc_lock 248 */ 249 250 TAILQ_HEAD(pv_pagelist, pv_page); 251 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 252 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 253 static int pv_nfpvents; /* # of free pv entries */ 254 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 255 static vaddr_t pv_cachedva; /* cached VA for later use */ 256 257 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 258 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 259 /* high water mark */ 260 261 /* 262 * local prototypes 263 */ 264 265 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 266 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 267 #define ALLOCPV_NEED 0 /* need PV now */ 268 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 269 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 270 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 271 static void pmap_enter_pv __P((struct vm_page *, 272 struct pv_entry *, struct pmap *, 273 vaddr_t, struct vm_page *, int)); 274 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 275 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 276 static void pmap_free_pv_doit __P((struct pv_entry *)); 277 static void pmap_free_pvpage __P((void)); 278 static boolean_t pmap_is_curpmap __P((struct pmap *)); 279 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 280 vaddr_t)); 281 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 282 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 283 284 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 285 u_int, u_int)); 286 287 /* 288 * Structure that describes and L1 table. 289 */ 290 struct l1pt { 291 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 292 struct pglist pt_plist; /* Allocated page list */ 293 vaddr_t pt_va; /* Allocated virtual address */ 294 int pt_flags; /* Flags */ 295 }; 296 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 297 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 298 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 299 300 static void pmap_free_l1pt __P((struct l1pt *)); 301 static int pmap_allocpagedir __P((struct pmap *)); 302 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 303 static void pmap_remove_all __P((struct vm_page *)); 304 305 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 306 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 307 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 308 309 extern paddr_t physical_start; 310 extern paddr_t physical_end; 311 extern unsigned int free_pages; 312 extern int max_processes; 313 314 vaddr_t virtual_avail; 315 vaddr_t virtual_end; 316 vaddr_t pmap_curmaxkvaddr; 317 318 vaddr_t avail_start; 319 vaddr_t avail_end; 320 321 extern pv_addr_t systempage; 322 323 /* Variables used by the L1 page table queue code */ 324 SIMPLEQ_HEAD(l1pt_queue, l1pt); 325 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 326 static int l1pt_static_queue_count; /* items in the static l1 queue */ 327 static int l1pt_static_create_count; /* static l1 items created */ 328 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 329 static int l1pt_queue_count; /* items in the l1 queue */ 330 static int l1pt_create_count; /* stat - L1's create count */ 331 static int l1pt_reuse_count; /* stat - L1's reused count */ 332 333 /* Local function prototypes (not used outside this file) */ 334 void pmap_pinit __P((struct pmap *)); 335 void pmap_freepagedir __P((struct pmap *)); 336 337 /* Other function prototypes */ 338 extern void bzero_page __P((vaddr_t)); 339 extern void bcopy_page __P((vaddr_t, vaddr_t)); 340 341 struct l1pt *pmap_alloc_l1pt __P((void)); 342 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 343 vaddr_t l2pa, boolean_t)); 344 345 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 346 static void pmap_unmap_ptes __P((struct pmap *)); 347 348 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 349 pt_entry_t *, boolean_t)); 350 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 351 pt_entry_t *, boolean_t)); 352 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 353 pt_entry_t *, boolean_t)); 354 355 /* 356 * real definition of pv_entry. 357 */ 358 359 struct pv_entry { 360 struct pv_entry *pv_next; /* next pv_entry */ 361 struct pmap *pv_pmap; /* pmap where mapping lies */ 362 vaddr_t pv_va; /* virtual address for mapping */ 363 int pv_flags; /* flags */ 364 struct vm_page *pv_ptp; /* vm_page for the ptp */ 365 }; 366 367 /* 368 * pv_entrys are dynamically allocated in chunks from a single page. 369 * we keep track of how many pv_entrys are in use for each page and 370 * we can free pv_entry pages if needed. there is one lock for the 371 * entire allocation system. 372 */ 373 374 struct pv_page_info { 375 TAILQ_ENTRY(pv_page) pvpi_list; 376 struct pv_entry *pvpi_pvfree; 377 int pvpi_nfree; 378 }; 379 380 /* 381 * number of pv_entry's in a pv_page 382 * (note: won't work on systems where NPBG isn't a constant) 383 */ 384 385 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 386 sizeof(struct pv_entry)) 387 388 /* 389 * a pv_page: where pv_entrys are allocated from 390 */ 391 392 struct pv_page { 393 struct pv_page_info pvinfo; 394 struct pv_entry pvents[PVE_PER_PVPAGE]; 395 }; 396 397 #ifdef MYCROFT_HACK 398 int mycroft_hack = 0; 399 #endif 400 401 /* Function to set the debug level of the pmap code */ 402 403 #ifdef PMAP_DEBUG 404 void 405 pmap_debug(int level) 406 { 407 pmap_debug_level = level; 408 printf("pmap_debug: level=%d\n", pmap_debug_level); 409 } 410 #endif /* PMAP_DEBUG */ 411 412 __inline static boolean_t 413 pmap_is_curpmap(struct pmap *pmap) 414 { 415 416 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 417 pmap == pmap_kernel()) 418 return (TRUE); 419 420 return (FALSE); 421 } 422 423 /* 424 * p v _ e n t r y f u n c t i o n s 425 */ 426 427 /* 428 * pv_entry allocation functions: 429 * the main pv_entry allocation functions are: 430 * pmap_alloc_pv: allocate a pv_entry structure 431 * pmap_free_pv: free one pv_entry 432 * pmap_free_pvs: free a list of pv_entrys 433 * 434 * the rest are helper functions 435 */ 436 437 /* 438 * pmap_alloc_pv: inline function to allocate a pv_entry structure 439 * => we lock pvalloc_lock 440 * => if we fail, we call out to pmap_alloc_pvpage 441 * => 3 modes: 442 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 443 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 444 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 445 * one now 446 * 447 * "try" is for optional functions like pmap_copy(). 448 */ 449 450 __inline static struct pv_entry * 451 pmap_alloc_pv(struct pmap *pmap, int mode) 452 { 453 struct pv_page *pvpage; 454 struct pv_entry *pv; 455 456 simple_lock(&pvalloc_lock); 457 458 pvpage = TAILQ_FIRST(&pv_freepages); 459 460 if (pvpage != NULL) { 461 pvpage->pvinfo.pvpi_nfree--; 462 if (pvpage->pvinfo.pvpi_nfree == 0) { 463 /* nothing left in this one? */ 464 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 465 } 466 pv = pvpage->pvinfo.pvpi_pvfree; 467 KASSERT(pv); 468 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 469 pv_nfpvents--; /* took one from pool */ 470 } else { 471 pv = NULL; /* need more of them */ 472 } 473 474 /* 475 * if below low water mark or we didn't get a pv_entry we try and 476 * create more pv_entrys ... 477 */ 478 479 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 480 if (pv == NULL) 481 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 482 mode : ALLOCPV_NEED); 483 else 484 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 485 } 486 487 simple_unlock(&pvalloc_lock); 488 return(pv); 489 } 490 491 /* 492 * pmap_alloc_pvpage: maybe allocate a new pvpage 493 * 494 * if need_entry is false: try and allocate a new pv_page 495 * if need_entry is true: try and allocate a new pv_page and return a 496 * new pv_entry from it. if we are unable to allocate a pv_page 497 * we make a last ditch effort to steal a pv_page from some other 498 * mapping. if that fails, we panic... 499 * 500 * => we assume that the caller holds pvalloc_lock 501 */ 502 503 static struct pv_entry * 504 pmap_alloc_pvpage(struct pmap *pmap, int mode) 505 { 506 struct vm_page *pg; 507 struct pv_page *pvpage; 508 struct pv_entry *pv; 509 int s; 510 511 /* 512 * if we need_entry and we've got unused pv_pages, allocate from there 513 */ 514 515 pvpage = TAILQ_FIRST(&pv_unusedpgs); 516 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 517 518 /* move it to pv_freepages list */ 519 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 520 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 521 522 /* allocate a pv_entry */ 523 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 524 pv = pvpage->pvinfo.pvpi_pvfree; 525 KASSERT(pv); 526 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 527 528 pv_nfpvents--; /* took one from pool */ 529 return(pv); 530 } 531 532 /* 533 * see if we've got a cached unmapped VA that we can map a page in. 534 * if not, try to allocate one. 535 */ 536 537 538 if (pv_cachedva == 0) { 539 s = splvm(); 540 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 541 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 542 splx(s); 543 if (pv_cachedva == 0) { 544 return (NULL); 545 } 546 } 547 548 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 549 UVM_PGA_USERESERVE); 550 551 if (pg == NULL) 552 return (NULL); 553 pg->flags &= ~PG_BUSY; /* never busy */ 554 555 /* 556 * add a mapping for our new pv_page and free its entrys (save one!) 557 * 558 * NOTE: If we are allocating a PV page for the kernel pmap, the 559 * pmap is already locked! (...but entering the mapping is safe...) 560 */ 561 562 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 563 VM_PROT_READ|VM_PROT_WRITE); 564 pmap_update(pmap_kernel()); 565 pvpage = (struct pv_page *) pv_cachedva; 566 pv_cachedva = 0; 567 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 568 } 569 570 /* 571 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 572 * 573 * => caller must hold pvalloc_lock 574 * => if need_entry is true, we allocate and return one pv_entry 575 */ 576 577 static struct pv_entry * 578 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 579 { 580 int tofree, lcv; 581 582 /* do we need to return one? */ 583 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 584 585 pvp->pvinfo.pvpi_pvfree = NULL; 586 pvp->pvinfo.pvpi_nfree = tofree; 587 for (lcv = 0 ; lcv < tofree ; lcv++) { 588 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 589 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 590 } 591 if (need_entry) 592 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 593 else 594 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 595 pv_nfpvents += tofree; 596 return((need_entry) ? &pvp->pvents[lcv] : NULL); 597 } 598 599 /* 600 * pmap_free_pv_doit: actually free a pv_entry 601 * 602 * => do not call this directly! instead use either 603 * 1. pmap_free_pv ==> free a single pv_entry 604 * 2. pmap_free_pvs => free a list of pv_entrys 605 * => we must be holding pvalloc_lock 606 */ 607 608 __inline static void 609 pmap_free_pv_doit(struct pv_entry *pv) 610 { 611 struct pv_page *pvp; 612 613 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 614 pv_nfpvents++; 615 pvp->pvinfo.pvpi_nfree++; 616 617 /* nfree == 1 => fully allocated page just became partly allocated */ 618 if (pvp->pvinfo.pvpi_nfree == 1) { 619 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 620 } 621 622 /* free it */ 623 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 624 pvp->pvinfo.pvpi_pvfree = pv; 625 626 /* 627 * are all pv_page's pv_entry's free? move it to unused queue. 628 */ 629 630 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 631 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 632 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 633 } 634 } 635 636 /* 637 * pmap_free_pv: free a single pv_entry 638 * 639 * => we gain the pvalloc_lock 640 */ 641 642 __inline static void 643 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 644 { 645 simple_lock(&pvalloc_lock); 646 pmap_free_pv_doit(pv); 647 648 /* 649 * Can't free the PV page if the PV entries were associated with 650 * the kernel pmap; the pmap is already locked. 651 */ 652 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 653 pmap != pmap_kernel()) 654 pmap_free_pvpage(); 655 656 simple_unlock(&pvalloc_lock); 657 } 658 659 /* 660 * pmap_free_pvs: free a list of pv_entrys 661 * 662 * => we gain the pvalloc_lock 663 */ 664 665 __inline static void 666 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 667 { 668 struct pv_entry *nextpv; 669 670 simple_lock(&pvalloc_lock); 671 672 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 673 nextpv = pvs->pv_next; 674 pmap_free_pv_doit(pvs); 675 } 676 677 /* 678 * Can't free the PV page if the PV entries were associated with 679 * the kernel pmap; the pmap is already locked. 680 */ 681 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 682 pmap != pmap_kernel()) 683 pmap_free_pvpage(); 684 685 simple_unlock(&pvalloc_lock); 686 } 687 688 689 /* 690 * pmap_free_pvpage: try and free an unused pv_page structure 691 * 692 * => assume caller is holding the pvalloc_lock and that 693 * there is a page on the pv_unusedpgs list 694 * => if we can't get a lock on the kmem_map we try again later 695 */ 696 697 static void 698 pmap_free_pvpage(void) 699 { 700 int s; 701 struct vm_map *map; 702 struct vm_map_entry *dead_entries; 703 struct pv_page *pvp; 704 705 s = splvm(); /* protect kmem_map */ 706 707 pvp = TAILQ_FIRST(&pv_unusedpgs); 708 709 /* 710 * note: watch out for pv_initpage which is allocated out of 711 * kernel_map rather than kmem_map. 712 */ 713 if (pvp == pv_initpage) 714 map = kernel_map; 715 else 716 map = kmem_map; 717 if (vm_map_lock_try(map)) { 718 719 /* remove pvp from pv_unusedpgs */ 720 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 721 722 /* unmap the page */ 723 dead_entries = NULL; 724 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 725 &dead_entries); 726 vm_map_unlock(map); 727 728 if (dead_entries != NULL) 729 uvm_unmap_detach(dead_entries, 0); 730 731 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 732 } 733 if (pvp == pv_initpage) 734 /* no more initpage, we've freed it */ 735 pv_initpage = NULL; 736 737 splx(s); 738 } 739 740 /* 741 * main pv_entry manipulation functions: 742 * pmap_enter_pv: enter a mapping onto a vm_page list 743 * pmap_remove_pv: remove a mappiing from a vm_page list 744 * 745 * NOTE: pmap_enter_pv expects to lock the pvh itself 746 * pmap_remove_pv expects te caller to lock the pvh before calling 747 */ 748 749 /* 750 * pmap_enter_pv: enter a mapping onto a vm_page lst 751 * 752 * => caller should hold the proper lock on pmap_main_lock 753 * => caller should have pmap locked 754 * => we will gain the lock on the vm_page and allocate the new pv_entry 755 * => caller should adjust ptp's wire_count before calling 756 * => caller should not adjust pmap's wire_count 757 */ 758 759 __inline static void 760 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 761 vaddr_t va, struct vm_page *ptp, int flags) 762 { 763 pve->pv_pmap = pmap; 764 pve->pv_va = va; 765 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 766 pve->pv_flags = flags; 767 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 768 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 769 pg->mdpage.pvh_list = pve; /* ... locked list */ 770 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 771 if (pve->pv_flags & PVF_WIRED) 772 ++pmap->pm_stats.wired_count; 773 #ifdef PMAP_ALIAS_DEBUG 774 { 775 int s = splhigh(); 776 if (pve->pv_flags & PVF_WRITE) 777 pg->mdpage.rw_mappings++; 778 else 779 pg->mdpage.ro_mappings++; 780 if (pg->mdpage.rw_mappings != 0 && 781 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 782 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 783 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 784 pg->mdpage.krw_mappings); 785 } 786 splx(s); 787 } 788 #endif /* PMAP_ALIAS_DEBUG */ 789 } 790 791 /* 792 * pmap_remove_pv: try to remove a mapping from a pv_list 793 * 794 * => caller should hold proper lock on pmap_main_lock 795 * => pmap should be locked 796 * => caller should hold lock on vm_page [so that attrs can be adjusted] 797 * => caller should adjust ptp's wire_count and free PTP if needed 798 * => caller should NOT adjust pmap's wire_count 799 * => we return the removed pve 800 */ 801 802 __inline static struct pv_entry * 803 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 804 { 805 struct pv_entry *pve, **prevptr; 806 807 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 808 pve = *prevptr; 809 while (pve) { 810 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 811 *prevptr = pve->pv_next; /* remove it! */ 812 if (pve->pv_flags & PVF_WIRED) 813 --pmap->pm_stats.wired_count; 814 #ifdef PMAP_ALIAS_DEBUG 815 { 816 int s = splhigh(); 817 if (pve->pv_flags & PVF_WRITE) { 818 KASSERT(pg->mdpage.rw_mappings != 0); 819 pg->mdpage.rw_mappings--; 820 } else { 821 KASSERT(pg->mdpage.ro_mappings != 0); 822 pg->mdpage.ro_mappings--; 823 } 824 splx(s); 825 } 826 #endif /* PMAP_ALIAS_DEBUG */ 827 break; 828 } 829 prevptr = &pve->pv_next; /* previous pointer */ 830 pve = pve->pv_next; /* advance */ 831 } 832 return(pve); /* return removed pve */ 833 } 834 835 /* 836 * 837 * pmap_modify_pv: Update pv flags 838 * 839 * => caller should hold lock on vm_page [so that attrs can be adjusted] 840 * => caller should NOT adjust pmap's wire_count 841 * => caller must call pmap_vac_me_harder() if writable status of a page 842 * may have changed. 843 * => we return the old flags 844 * 845 * Modify a physical-virtual mapping in the pv table 846 */ 847 848 static /* __inline */ u_int 849 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 850 u_int bic_mask, u_int eor_mask) 851 { 852 struct pv_entry *npv; 853 u_int flags, oflags; 854 855 /* 856 * There is at least one VA mapping this page. 857 */ 858 859 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 860 if (pmap == npv->pv_pmap && va == npv->pv_va) { 861 oflags = npv->pv_flags; 862 npv->pv_flags = flags = 863 ((oflags & ~bic_mask) ^ eor_mask); 864 if ((flags ^ oflags) & PVF_WIRED) { 865 if (flags & PVF_WIRED) 866 ++pmap->pm_stats.wired_count; 867 else 868 --pmap->pm_stats.wired_count; 869 } 870 #ifdef PMAP_ALIAS_DEBUG 871 { 872 int s = splhigh(); 873 if ((flags ^ oflags) & PVF_WRITE) { 874 if (flags & PVF_WRITE) { 875 pg->mdpage.rw_mappings++; 876 pg->mdpage.ro_mappings--; 877 if (pg->mdpage.rw_mappings != 0 && 878 (pg->mdpage.kro_mappings != 0 || 879 pg->mdpage.krw_mappings != 0)) { 880 printf("pmap_modify_pv: rw %u, " 881 "kro %u, krw %u\n", 882 pg->mdpage.rw_mappings, 883 pg->mdpage.kro_mappings, 884 pg->mdpage.krw_mappings); 885 } 886 } else { 887 KASSERT(pg->mdpage.rw_mappings != 0); 888 pg->mdpage.rw_mappings--; 889 pg->mdpage.ro_mappings++; 890 } 891 } 892 splx(s); 893 } 894 #endif /* PMAP_ALIAS_DEBUG */ 895 return (oflags); 896 } 897 } 898 return (0); 899 } 900 901 /* 902 * Map the specified level 2 pagetable into the level 1 page table for 903 * the given pmap to cover a chunk of virtual address space starting from the 904 * address specified. 905 */ 906 static __inline void 907 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, boolean_t selfref) 908 { 909 vaddr_t ptva; 910 911 /* Calculate the index into the L1 page table. */ 912 ptva = (va >> L1_S_SHIFT) & ~3; 913 914 /* Map page table into the L1. */ 915 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 916 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 917 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 918 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 919 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 920 921 /* Map the page table into the page table area. */ 922 if (selfref) 923 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 924 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 925 } 926 927 #if 0 928 static __inline void 929 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 930 { 931 vaddr_t ptva; 932 933 /* Calculate the index into the L1 page table. */ 934 ptva = (va >> L1_S_SHIFT) & ~3; 935 936 /* Unmap page table from the L1. */ 937 pmap->pm_pdir[ptva + 0] = 0; 938 pmap->pm_pdir[ptva + 1] = 0; 939 pmap->pm_pdir[ptva + 2] = 0; 940 pmap->pm_pdir[ptva + 3] = 0; 941 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 942 943 /* Unmap the page table from the page table area. */ 944 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 945 } 946 #endif 947 948 /* 949 * Used to map a range of physical addresses into kernel 950 * virtual address space. 951 * 952 * For now, VM is already on, we only need to map the 953 * specified memory. 954 * 955 * XXX This routine should eventually go away; it's only used 956 * XXX by machine-dependent crash dump code. 957 */ 958 vaddr_t 959 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 960 { 961 pt_entry_t *pte; 962 963 while (spa < epa) { 964 pte = vtopte(va); 965 966 *pte = L2_S_PROTO | spa | 967 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 968 cpu_tlb_flushID_SE(va); 969 va += NBPG; 970 spa += NBPG; 971 } 972 pmap_update(pmap_kernel()); 973 return(va); 974 } 975 976 977 /* 978 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 979 * 980 * bootstrap the pmap system. This is called from initarm and allows 981 * the pmap system to initailise any structures it requires. 982 * 983 * Currently this sets up the kernel_pmap that is statically allocated 984 * and also allocated virtual addresses for certain page hooks. 985 * Currently the only one page hook is allocated that is used 986 * to zero physical pages of memory. 987 * It also initialises the start and end address of the kernel data space. 988 */ 989 990 char *boot_head; 991 992 void 993 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 994 { 995 pt_entry_t *pte; 996 997 pmap_kernel()->pm_pdir = kernel_l1pt; 998 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 999 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1000 simple_lock_init(&pmap_kernel()->pm_lock); 1001 pmap_kernel()->pm_obj.pgops = NULL; 1002 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1003 pmap_kernel()->pm_obj.uo_npages = 0; 1004 pmap_kernel()->pm_obj.uo_refs = 1; 1005 1006 virtual_avail = KERNEL_VM_BASE; 1007 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1008 1009 /* 1010 * now we allocate the "special" VAs which are used for tmp mappings 1011 * by the pmap (and other modules). we allocate the VAs by advancing 1012 * virtual_avail (note that there are no pages mapped at these VAs). 1013 * we find the PTE that maps the allocated VA via the linear PTE 1014 * mapping. 1015 */ 1016 1017 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1018 1019 csrcp = virtual_avail; csrc_pte = pte; 1020 virtual_avail += PAGE_SIZE; pte++; 1021 1022 cdstp = virtual_avail; cdst_pte = pte; 1023 virtual_avail += PAGE_SIZE; pte++; 1024 1025 memhook = (char *) virtual_avail; /* don't need pte */ 1026 virtual_avail += PAGE_SIZE; pte++; 1027 1028 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1029 virtual_avail += round_page(MSGBUFSIZE); 1030 pte += atop(round_page(MSGBUFSIZE)); 1031 1032 /* 1033 * init the static-global locks and global lists. 1034 */ 1035 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1036 simple_lock_init(&pvalloc_lock); 1037 simple_lock_init(&pmaps_lock); 1038 LIST_INIT(&pmaps); 1039 TAILQ_INIT(&pv_freepages); 1040 TAILQ_INIT(&pv_unusedpgs); 1041 1042 /* 1043 * initialize the pmap pool. 1044 */ 1045 1046 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1047 &pool_allocator_nointr); 1048 1049 /* 1050 * initialize the PT-PT pool and cache. 1051 */ 1052 1053 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1054 &pmap_ptpt_allocator); 1055 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1056 pmap_ptpt_ctor, NULL, NULL); 1057 1058 cpu_dcache_wbinv_all(); 1059 } 1060 1061 /* 1062 * void pmap_init(void) 1063 * 1064 * Initialize the pmap module. 1065 * Called by vm_init() in vm/vm_init.c in order to initialise 1066 * any structures that the pmap system needs to map virtual memory. 1067 */ 1068 1069 extern int physmem; 1070 1071 void 1072 pmap_init(void) 1073 { 1074 1075 /* 1076 * Set the available memory vars - These do not map to real memory 1077 * addresses and cannot as the physical memory is fragmented. 1078 * They are used by ps for %mem calculations. 1079 * One could argue whether this should be the entire memory or just 1080 * the memory that is useable in a user process. 1081 */ 1082 avail_start = 0; 1083 avail_end = physmem * NBPG; 1084 1085 /* 1086 * now we need to free enough pv_entry structures to allow us to get 1087 * the kmem_map/kmem_object allocated and inited (done after this 1088 * function is finished). to do this we allocate one bootstrap page out 1089 * of kernel_map and use it to provide an initial pool of pv_entry 1090 * structures. we never free this page. 1091 */ 1092 1093 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1094 if (pv_initpage == NULL) 1095 panic("pmap_init: pv_initpage"); 1096 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1097 pv_nfpvents = 0; 1098 (void) pmap_add_pvpage(pv_initpage, FALSE); 1099 1100 pmap_initialized = TRUE; 1101 1102 /* Initialise our L1 page table queues and counters */ 1103 SIMPLEQ_INIT(&l1pt_static_queue); 1104 l1pt_static_queue_count = 0; 1105 l1pt_static_create_count = 0; 1106 SIMPLEQ_INIT(&l1pt_queue); 1107 l1pt_queue_count = 0; 1108 l1pt_create_count = 0; 1109 l1pt_reuse_count = 0; 1110 } 1111 1112 /* 1113 * pmap_postinit() 1114 * 1115 * This routine is called after the vm and kmem subsystems have been 1116 * initialised. This allows the pmap code to perform any initialisation 1117 * that can only be done one the memory allocation is in place. 1118 */ 1119 1120 void 1121 pmap_postinit(void) 1122 { 1123 int loop; 1124 struct l1pt *pt; 1125 1126 #ifdef PMAP_STATIC_L1S 1127 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1128 #else /* PMAP_STATIC_L1S */ 1129 for (loop = 0; loop < max_processes; ++loop) { 1130 #endif /* PMAP_STATIC_L1S */ 1131 /* Allocate a L1 page table */ 1132 pt = pmap_alloc_l1pt(); 1133 if (!pt) 1134 panic("Cannot allocate static L1 page tables\n"); 1135 1136 /* Clean it */ 1137 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1138 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1139 /* Add the page table to the queue */ 1140 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1141 ++l1pt_static_queue_count; 1142 ++l1pt_static_create_count; 1143 } 1144 } 1145 1146 1147 /* 1148 * Create and return a physical map. 1149 * 1150 * If the size specified for the map is zero, the map is an actual physical 1151 * map, and may be referenced by the hardware. 1152 * 1153 * If the size specified is non-zero, the map will be used in software only, 1154 * and is bounded by that size. 1155 */ 1156 1157 pmap_t 1158 pmap_create(void) 1159 { 1160 struct pmap *pmap; 1161 1162 /* 1163 * Fetch pmap entry from the pool 1164 */ 1165 1166 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1167 /* XXX is this really needed! */ 1168 memset(pmap, 0, sizeof(*pmap)); 1169 1170 simple_lock_init(&pmap->pm_obj.vmobjlock); 1171 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1172 TAILQ_INIT(&pmap->pm_obj.memq); 1173 pmap->pm_obj.uo_npages = 0; 1174 pmap->pm_obj.uo_refs = 1; 1175 pmap->pm_stats.wired_count = 0; 1176 pmap->pm_stats.resident_count = 1; 1177 pmap->pm_ptphint = NULL; 1178 1179 /* Now init the machine part of the pmap */ 1180 pmap_pinit(pmap); 1181 return(pmap); 1182 } 1183 1184 /* 1185 * pmap_alloc_l1pt() 1186 * 1187 * This routine allocates physical and virtual memory for a L1 page table 1188 * and wires it. 1189 * A l1pt structure is returned to describe the allocated page table. 1190 * 1191 * This routine is allowed to fail if the required memory cannot be allocated. 1192 * In this case NULL is returned. 1193 */ 1194 1195 struct l1pt * 1196 pmap_alloc_l1pt(void) 1197 { 1198 paddr_t pa; 1199 vaddr_t va; 1200 struct l1pt *pt; 1201 int error; 1202 struct vm_page *m; 1203 1204 /* Allocate virtual address space for the L1 page table */ 1205 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1206 if (va == 0) { 1207 #ifdef DIAGNOSTIC 1208 PDEBUG(0, 1209 printf("pmap: Cannot allocate pageable memory for L1\n")); 1210 #endif /* DIAGNOSTIC */ 1211 return(NULL); 1212 } 1213 1214 /* Allocate memory for the l1pt structure */ 1215 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1216 1217 /* 1218 * Allocate pages from the VM system. 1219 */ 1220 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1221 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1222 if (error) { 1223 #ifdef DIAGNOSTIC 1224 PDEBUG(0, 1225 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1226 error)); 1227 #endif /* DIAGNOSTIC */ 1228 /* Release the resources we already have claimed */ 1229 free(pt, M_VMPMAP); 1230 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1231 return(NULL); 1232 } 1233 1234 /* Map our physical pages into our virtual space */ 1235 pt->pt_va = va; 1236 m = TAILQ_FIRST(&pt->pt_plist); 1237 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1238 pa = VM_PAGE_TO_PHYS(m); 1239 1240 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE); 1241 1242 va += NBPG; 1243 m = m->pageq.tqe_next; 1244 } 1245 1246 #ifdef DIAGNOSTIC 1247 if (m) 1248 panic("pmap_alloc_l1pt: pglist not empty\n"); 1249 #endif /* DIAGNOSTIC */ 1250 1251 pt->pt_flags = 0; 1252 return(pt); 1253 } 1254 1255 /* 1256 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1257 */ 1258 static void 1259 pmap_free_l1pt(struct l1pt *pt) 1260 { 1261 /* Separate the physical memory for the virtual space */ 1262 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1263 pmap_update(pmap_kernel()); 1264 1265 /* Return the physical memory */ 1266 uvm_pglistfree(&pt->pt_plist); 1267 1268 /* Free the virtual space */ 1269 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1270 1271 /* Free the l1pt structure */ 1272 free(pt, M_VMPMAP); 1273 } 1274 1275 /* 1276 * pmap_ptpt_page_alloc: 1277 * 1278 * Back-end page allocator for the PT-PT pool. 1279 */ 1280 static void * 1281 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1282 { 1283 struct vm_page *pg; 1284 pt_entry_t *pte; 1285 vaddr_t va; 1286 1287 /* XXX PR_WAITOK? */ 1288 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1289 if (va == 0) 1290 return (NULL); 1291 1292 for (;;) { 1293 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1294 if (pg != NULL) 1295 break; 1296 if ((flags & PR_WAITOK) == 0) { 1297 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1298 return (NULL); 1299 } 1300 uvm_wait("pmap_ptpt"); 1301 } 1302 1303 pte = vtopte(va); 1304 KDASSERT(pmap_pte_v(pte) == 0); 1305 1306 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1307 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1308 #ifdef PMAP_ALIAS_DEBUG 1309 { 1310 int s = splhigh(); 1311 pg->mdpage.krw_mappings++; 1312 splx(s); 1313 } 1314 #endif /* PMAP_ALIAS_DEBUG */ 1315 1316 return ((void *) va); 1317 } 1318 1319 /* 1320 * pmap_ptpt_page_free: 1321 * 1322 * Back-end page free'er for the PT-PT pool. 1323 */ 1324 static void 1325 pmap_ptpt_page_free(struct pool *pp, void *v) 1326 { 1327 vaddr_t va = (vaddr_t) v; 1328 paddr_t pa; 1329 1330 pa = vtophys(va); 1331 1332 pmap_kremove(va, L2_TABLE_SIZE); 1333 pmap_update(pmap_kernel()); 1334 1335 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1336 1337 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1338 } 1339 1340 /* 1341 * pmap_ptpt_ctor: 1342 * 1343 * Constructor for the PT-PT cache. 1344 */ 1345 static int 1346 pmap_ptpt_ctor(void *arg, void *object, int flags) 1347 { 1348 caddr_t vptpt = object; 1349 1350 /* Page is already zero'd. */ 1351 1352 /* 1353 * Map in kernel PTs. 1354 * 1355 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1356 */ 1357 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1358 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1359 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1360 (KERNEL_PD_SIZE >> 2)); 1361 1362 return (0); 1363 } 1364 1365 /* 1366 * Allocate a page directory. 1367 * This routine will either allocate a new page directory from the pool 1368 * of L1 page tables currently held by the kernel or it will allocate 1369 * a new one via pmap_alloc_l1pt(). 1370 * It will then initialise the l1 page table for use. 1371 */ 1372 static int 1373 pmap_allocpagedir(struct pmap *pmap) 1374 { 1375 vaddr_t vptpt; 1376 paddr_t pa; 1377 struct l1pt *pt; 1378 u_int gen; 1379 1380 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1381 1382 /* Do we have any spare L1's lying around ? */ 1383 if (l1pt_static_queue_count) { 1384 --l1pt_static_queue_count; 1385 pt = SIMPLEQ_FIRST(&l1pt_static_queue); 1386 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt_queue); 1387 } else if (l1pt_queue_count) { 1388 --l1pt_queue_count; 1389 pt = SIMPLEQ_FIRST(&l1pt_queue); 1390 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt_queue); 1391 ++l1pt_reuse_count; 1392 } else { 1393 pt = pmap_alloc_l1pt(); 1394 if (!pt) 1395 return(ENOMEM); 1396 ++l1pt_create_count; 1397 } 1398 1399 /* Store the pointer to the l1 descriptor in the pmap. */ 1400 pmap->pm_l1pt = pt; 1401 1402 /* Get the physical address of the start of the l1 */ 1403 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1404 1405 /* Store the virtual address of the l1 in the pmap. */ 1406 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1407 1408 /* Clean the L1 if it is dirty */ 1409 if (!(pt->pt_flags & PTFLAG_CLEAN)) { 1410 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1411 cpu_dcache_wb_range((vaddr_t) pmap->pm_pdir, 1412 (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1413 } 1414 1415 /* Allocate a page table to map all the page tables for this pmap */ 1416 KASSERT(pmap->pm_vptpt == 0); 1417 1418 try_again: 1419 gen = pmap_ptpt_cache_generation; 1420 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1421 if (vptpt == NULL) { 1422 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1423 pmap_freepagedir(pmap); 1424 return (ENOMEM); 1425 } 1426 1427 /* need to lock this all up for growkernel */ 1428 simple_lock(&pmaps_lock); 1429 1430 if (gen != pmap_ptpt_cache_generation) { 1431 simple_unlock(&pmaps_lock); 1432 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1433 goto try_again; 1434 } 1435 1436 pmap->pm_vptpt = vptpt; 1437 pmap->pm_pptpt = vtophys(vptpt); 1438 1439 /* Duplicate the kernel mappings. */ 1440 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1441 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1442 KERNEL_PD_SIZE); 1443 cpu_dcache_wb_range((vaddr_t)pmap->pm_pdir + 1444 (L1_TABLE_SIZE - KERNEL_PD_SIZE), KERNEL_PD_SIZE); 1445 1446 /* Wire in this page table */ 1447 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, TRUE); 1448 1449 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1450 1451 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1452 simple_unlock(&pmaps_lock); 1453 1454 return(0); 1455 } 1456 1457 1458 /* 1459 * Initialize a preallocated and zeroed pmap structure, 1460 * such as one in a vmspace structure. 1461 */ 1462 1463 void 1464 pmap_pinit(struct pmap *pmap) 1465 { 1466 int backoff = 6; 1467 int retry = 10; 1468 1469 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1470 1471 /* Keep looping until we succeed in allocating a page directory */ 1472 while (pmap_allocpagedir(pmap) != 0) { 1473 /* 1474 * Ok we failed to allocate a suitable block of memory for an 1475 * L1 page table. This means that either: 1476 * 1. 16KB of virtual address space could not be allocated 1477 * 2. 16KB of physically contiguous memory on a 16KB boundary 1478 * could not be allocated. 1479 * 1480 * Since we cannot fail we will sleep for a while and try 1481 * again. 1482 * 1483 * Searching for a suitable L1 PT is expensive: 1484 * to avoid hogging the system when memory is really 1485 * scarce, use an exponential back-off so that 1486 * eventually we won't retry more than once every 8 1487 * seconds. This should allow other processes to run 1488 * to completion and free up resources. 1489 */ 1490 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1491 NULL); 1492 if (--retry == 0) { 1493 retry = 10; 1494 if (backoff) 1495 --backoff; 1496 } 1497 } 1498 1499 if (vector_page < KERNEL_BASE) { 1500 /* 1501 * Map the vector page. This will also allocate and map 1502 * an L2 table for it. 1503 */ 1504 pmap_enter(pmap, vector_page, systempage.pv_pa, 1505 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1506 pmap_update(pmap); 1507 } 1508 } 1509 1510 void 1511 pmap_freepagedir(struct pmap *pmap) 1512 { 1513 /* Free the memory used for the page table mapping */ 1514 if (pmap->pm_vptpt != 0) { 1515 /* 1516 * XXX Objects freed to a pool cache must be in constructed 1517 * XXX form when freed, but we don't free page tables as we 1518 * XXX go, so we need to zap the mappings here. 1519 * 1520 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1521 */ 1522 memset((caddr_t) pmap->pm_vptpt, 0, 1523 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1524 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1525 } 1526 1527 /* junk the L1 page table */ 1528 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1529 /* Add the page table to the queue */ 1530 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1531 pmap->pm_l1pt, pt_queue); 1532 ++l1pt_static_queue_count; 1533 } else if (l1pt_queue_count < 8) { 1534 /* Add the page table to the queue */ 1535 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1536 ++l1pt_queue_count; 1537 } else 1538 pmap_free_l1pt(pmap->pm_l1pt); 1539 } 1540 1541 /* 1542 * Retire the given physical map from service. 1543 * Should only be called if the map contains no valid mappings. 1544 */ 1545 1546 void 1547 pmap_destroy(struct pmap *pmap) 1548 { 1549 struct vm_page *page; 1550 int count; 1551 1552 if (pmap == NULL) 1553 return; 1554 1555 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1556 1557 /* 1558 * Drop reference count 1559 */ 1560 simple_lock(&pmap->pm_obj.vmobjlock); 1561 count = --pmap->pm_obj.uo_refs; 1562 simple_unlock(&pmap->pm_obj.vmobjlock); 1563 if (count > 0) { 1564 return; 1565 } 1566 1567 /* 1568 * reference count is zero, free pmap resources and then free pmap. 1569 */ 1570 1571 /* 1572 * remove it from global list of pmaps 1573 */ 1574 1575 simple_lock(&pmaps_lock); 1576 LIST_REMOVE(pmap, pm_list); 1577 simple_unlock(&pmaps_lock); 1578 1579 if (vector_page < KERNEL_BASE) { 1580 /* Remove the vector page mapping */ 1581 pmap_remove(pmap, vector_page, vector_page + NBPG); 1582 pmap_update(pmap); 1583 } 1584 1585 /* 1586 * Free any page tables still mapped 1587 * This is only temporay until pmap_enter can count the number 1588 * of mappings made in a page table. Then pmap_remove() can 1589 * reduce the count and free the pagetable when the count 1590 * reaches zero. Note that entries in this list should match the 1591 * contents of the ptpt, however this is faster than walking a 1024 1592 * entries looking for pt's 1593 * taken from i386 pmap.c 1594 */ 1595 /* 1596 * vmobjlock must be held while freeing pages 1597 */ 1598 simple_lock(&pmap->pm_obj.vmobjlock); 1599 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1600 KASSERT((page->flags & PG_BUSY) == 0); 1601 page->wire_count = 0; 1602 uvm_pagefree(page); 1603 } 1604 simple_unlock(&pmap->pm_obj.vmobjlock); 1605 1606 /* Free the page dir */ 1607 pmap_freepagedir(pmap); 1608 1609 /* return the pmap to the pool */ 1610 pool_put(&pmap_pmap_pool, pmap); 1611 } 1612 1613 1614 /* 1615 * void pmap_reference(struct pmap *pmap) 1616 * 1617 * Add a reference to the specified pmap. 1618 */ 1619 1620 void 1621 pmap_reference(struct pmap *pmap) 1622 { 1623 if (pmap == NULL) 1624 return; 1625 1626 simple_lock(&pmap->pm_lock); 1627 pmap->pm_obj.uo_refs++; 1628 simple_unlock(&pmap->pm_lock); 1629 } 1630 1631 /* 1632 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1633 * 1634 * Return the start and end addresses of the kernel's virtual space. 1635 * These values are setup in pmap_bootstrap and are updated as pages 1636 * are allocated. 1637 */ 1638 1639 void 1640 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1641 { 1642 *start = virtual_avail; 1643 *end = virtual_end; 1644 } 1645 1646 /* 1647 * Activate the address space for the specified process. If the process 1648 * is the current process, load the new MMU context. 1649 */ 1650 void 1651 pmap_activate(struct proc *p) 1652 { 1653 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1654 struct pcb *pcb = &p->p_addr->u_pcb; 1655 1656 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1657 (paddr_t *)&pcb->pcb_pagedir); 1658 1659 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1660 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1661 1662 if (p == curproc) { 1663 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1664 setttb((u_int)pcb->pcb_pagedir); 1665 } 1666 } 1667 1668 /* 1669 * Deactivate the address space of the specified process. 1670 */ 1671 void 1672 pmap_deactivate(struct proc *p) 1673 { 1674 } 1675 1676 /* 1677 * Perform any deferred pmap operations. 1678 */ 1679 void 1680 pmap_update(struct pmap *pmap) 1681 { 1682 1683 /* 1684 * We haven't deferred any pmap operations, but we do need to 1685 * make sure TLB/cache operations have completed. 1686 */ 1687 cpu_cpwait(); 1688 } 1689 1690 /* 1691 * pmap_clean_page() 1692 * 1693 * This is a local function used to work out the best strategy to clean 1694 * a single page referenced by its entry in the PV table. It's used by 1695 * pmap_copy_page, pmap_zero page and maybe some others later on. 1696 * 1697 * Its policy is effectively: 1698 * o If there are no mappings, we don't bother doing anything with the cache. 1699 * o If there is one mapping, we clean just that page. 1700 * o If there are multiple mappings, we clean the entire cache. 1701 * 1702 * So that some functions can be further optimised, it returns 0 if it didn't 1703 * clean the entire cache, or 1 if it did. 1704 * 1705 * XXX One bug in this routine is that if the pv_entry has a single page 1706 * mapped at 0x00000000 a whole cache clean will be performed rather than 1707 * just the 1 page. Since this should not occur in everyday use and if it does 1708 * it will just result in not the most efficient clean for the page. 1709 */ 1710 static int 1711 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1712 { 1713 struct pmap *pmap; 1714 struct pv_entry *npv; 1715 int cache_needs_cleaning = 0; 1716 vaddr_t page_to_clean = 0; 1717 1718 if (pv == NULL) { 1719 /* nothing mapped in so nothing to flush */ 1720 return (0); 1721 } 1722 1723 /* 1724 * Since we flush the cache each time we change curproc, we 1725 * only need to flush the page if it is in the current pmap. 1726 */ 1727 if (curproc) 1728 pmap = curproc->p_vmspace->vm_map.pmap; 1729 else 1730 pmap = pmap_kernel(); 1731 1732 for (npv = pv; npv; npv = npv->pv_next) { 1733 if (npv->pv_pmap == pmap) { 1734 /* 1735 * The page is mapped non-cacheable in 1736 * this map. No need to flush the cache. 1737 */ 1738 if (npv->pv_flags & PVF_NC) { 1739 #ifdef DIAGNOSTIC 1740 if (cache_needs_cleaning) 1741 panic("pmap_clean_page: " 1742 "cache inconsistency"); 1743 #endif 1744 break; 1745 } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1746 continue; 1747 if (cache_needs_cleaning) { 1748 page_to_clean = 0; 1749 break; 1750 } else 1751 page_to_clean = npv->pv_va; 1752 cache_needs_cleaning = 1; 1753 } 1754 } 1755 1756 if (page_to_clean) { 1757 /* 1758 * XXX If is_src, we really only need to write-back, 1759 * XXX not invalidate, too. Investigate further. 1760 * XXX --thorpej (at) netbsd.org 1761 */ 1762 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1763 } else if (cache_needs_cleaning) { 1764 cpu_idcache_wbinv_all(); 1765 return (1); 1766 } 1767 return (0); 1768 } 1769 1770 /* 1771 * pmap_zero_page() 1772 * 1773 * Zero a given physical page by mapping it at a page hook point. 1774 * In doing the zero page op, the page we zero is mapped cachable, as with 1775 * StrongARM accesses to non-cached pages are non-burst making writing 1776 * _any_ bulk data very slow. 1777 */ 1778 #if ARM_MMU_GENERIC == 1 1779 void 1780 pmap_zero_page_generic(paddr_t phys) 1781 { 1782 #ifdef DEBUG 1783 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1784 1785 if (pg->mdpage.pvh_list != NULL) 1786 panic("pmap_zero_page: page has mappings"); 1787 #endif 1788 1789 KDASSERT((phys & PGOFSET) == 0); 1790 1791 /* 1792 * Hook in the page, zero it, and purge the cache for that 1793 * zeroed page. Invalidate the TLB as needed. 1794 */ 1795 *cdst_pte = L2_S_PROTO | phys | 1796 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1797 cpu_tlb_flushD_SE(cdstp); 1798 cpu_cpwait(); 1799 bzero_page(cdstp); 1800 cpu_dcache_wbinv_range(cdstp, NBPG); 1801 } 1802 #endif /* ARM_MMU_GENERIC == 1 */ 1803 1804 #if ARM_MMU_XSCALE == 1 1805 void 1806 pmap_zero_page_xscale(paddr_t phys) 1807 { 1808 #ifdef DEBUG 1809 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1810 1811 if (pg->mdpage.pvh_list != NULL) 1812 panic("pmap_zero_page: page has mappings"); 1813 #endif 1814 1815 KDASSERT((phys & PGOFSET) == 0); 1816 1817 /* 1818 * Hook in the page, zero it, and purge the cache for that 1819 * zeroed page. Invalidate the TLB as needed. 1820 */ 1821 *cdst_pte = L2_S_PROTO | phys | 1822 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1823 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1824 cpu_tlb_flushD_SE(cdstp); 1825 cpu_cpwait(); 1826 bzero_page(cdstp); 1827 xscale_cache_clean_minidata(); 1828 } 1829 #endif /* ARM_MMU_XSCALE == 1 */ 1830 1831 /* pmap_pageidlezero() 1832 * 1833 * The same as above, except that we assume that the page is not 1834 * mapped. This means we never have to flush the cache first. Called 1835 * from the idle loop. 1836 */ 1837 boolean_t 1838 pmap_pageidlezero(paddr_t phys) 1839 { 1840 int i, *ptr; 1841 boolean_t rv = TRUE; 1842 #ifdef DEBUG 1843 struct vm_page *pg; 1844 1845 pg = PHYS_TO_VM_PAGE(phys); 1846 if (pg->mdpage.pvh_list != NULL) 1847 panic("pmap_pageidlezero: page has mappings"); 1848 #endif 1849 1850 KDASSERT((phys & PGOFSET) == 0); 1851 1852 /* 1853 * Hook in the page, zero it, and purge the cache for that 1854 * zeroed page. Invalidate the TLB as needed. 1855 */ 1856 *cdst_pte = L2_S_PROTO | phys | 1857 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1858 cpu_tlb_flushD_SE(cdstp); 1859 cpu_cpwait(); 1860 1861 for (i = 0, ptr = (int *)cdstp; 1862 i < (NBPG / sizeof(int)); i++) { 1863 if (sched_whichqs != 0) { 1864 /* 1865 * A process has become ready. Abort now, 1866 * so we don't keep it waiting while we 1867 * do slow memory access to finish this 1868 * page. 1869 */ 1870 rv = FALSE; 1871 break; 1872 } 1873 *ptr++ = 0; 1874 } 1875 1876 if (rv) 1877 /* 1878 * if we aborted we'll rezero this page again later so don't 1879 * purge it unless we finished it 1880 */ 1881 cpu_dcache_wbinv_range(cdstp, NBPG); 1882 return (rv); 1883 } 1884 1885 /* 1886 * pmap_copy_page() 1887 * 1888 * Copy one physical page into another, by mapping the pages into 1889 * hook points. The same comment regarding cachability as in 1890 * pmap_zero_page also applies here. 1891 */ 1892 #if ARM_MMU_GENERIC == 1 1893 void 1894 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1895 { 1896 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1897 #ifdef DEBUG 1898 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1899 1900 if (dst_pg->mdpage.pvh_list != NULL) 1901 panic("pmap_copy_page: dst page has mappings"); 1902 #endif 1903 1904 KDASSERT((src & PGOFSET) == 0); 1905 KDASSERT((dst & PGOFSET) == 0); 1906 1907 /* 1908 * Clean the source page. Hold the source page's lock for 1909 * the duration of the copy so that no other mappings can 1910 * be created while we have a potentially aliased mapping. 1911 */ 1912 simple_lock(&src_pg->mdpage.pvh_slock); 1913 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1914 1915 /* 1916 * Map the pages into the page hook points, copy them, and purge 1917 * the cache for the appropriate page. Invalidate the TLB 1918 * as required. 1919 */ 1920 *csrc_pte = L2_S_PROTO | src | 1921 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1922 *cdst_pte = L2_S_PROTO | dst | 1923 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1924 cpu_tlb_flushD_SE(csrcp); 1925 cpu_tlb_flushD_SE(cdstp); 1926 cpu_cpwait(); 1927 bcopy_page(csrcp, cdstp); 1928 cpu_dcache_inv_range(csrcp, NBPG); 1929 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1930 cpu_dcache_wbinv_range(cdstp, NBPG); 1931 } 1932 #endif /* ARM_MMU_GENERIC == 1 */ 1933 1934 #if ARM_MMU_XSCALE == 1 1935 void 1936 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1937 { 1938 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1939 #ifdef DEBUG 1940 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1941 1942 if (dst_pg->mdpage.pvh_list != NULL) 1943 panic("pmap_copy_page: dst page has mappings"); 1944 #endif 1945 1946 KDASSERT((src & PGOFSET) == 0); 1947 KDASSERT((dst & PGOFSET) == 0); 1948 1949 /* 1950 * Clean the source page. Hold the source page's lock for 1951 * the duration of the copy so that no other mappings can 1952 * be created while we have a potentially aliased mapping. 1953 */ 1954 simple_lock(&src_pg->mdpage.pvh_slock); 1955 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1956 1957 /* 1958 * Map the pages into the page hook points, copy them, and purge 1959 * the cache for the appropriate page. Invalidate the TLB 1960 * as required. 1961 */ 1962 *csrc_pte = L2_S_PROTO | src | 1963 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 1964 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1965 *cdst_pte = L2_S_PROTO | dst | 1966 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1967 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1968 cpu_tlb_flushD_SE(csrcp); 1969 cpu_tlb_flushD_SE(cdstp); 1970 cpu_cpwait(); 1971 bcopy_page(csrcp, cdstp); 1972 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1973 xscale_cache_clean_minidata(); 1974 } 1975 #endif /* ARM_MMU_XSCALE == 1 */ 1976 1977 #if 0 1978 void 1979 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 1980 { 1981 pd_entry_t *pde; 1982 paddr_t pa; 1983 struct vm_page *m; 1984 1985 if (pmap == pmap_kernel()) 1986 return; 1987 1988 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 1989 pa = pmap_pte_pa(pde); 1990 m = PHYS_TO_VM_PAGE(pa); 1991 ++m->wire_count; 1992 #ifdef MYCROFT_HACK 1993 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 1994 pmap, va, pde, pa, m, m->wire_count); 1995 #endif 1996 } 1997 1998 void 1999 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2000 { 2001 pd_entry_t *pde; 2002 paddr_t pa; 2003 struct vm_page *m; 2004 2005 if (pmap == pmap_kernel()) 2006 return; 2007 2008 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2009 pa = pmap_pte_pa(pde); 2010 m = PHYS_TO_VM_PAGE(pa); 2011 --m->wire_count; 2012 #ifdef MYCROFT_HACK 2013 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2014 pmap, va, pde, pa, m, m->wire_count); 2015 #endif 2016 if (m->wire_count == 0) { 2017 #ifdef MYCROFT_HACK 2018 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2019 pmap, va, pde, pa, m); 2020 #endif 2021 pmap_unmap_in_l1(pmap, va); 2022 uvm_pagefree(m); 2023 --pmap->pm_stats.resident_count; 2024 } 2025 } 2026 #else 2027 #define pmap_pte_addref(pmap, va) 2028 #define pmap_pte_delref(pmap, va) 2029 #endif 2030 2031 /* 2032 * Since we have a virtually indexed cache, we may need to inhibit caching if 2033 * there is more than one mapping and at least one of them is writable. 2034 * Since we purge the cache on every context switch, we only need to check for 2035 * other mappings within the same pmap, or kernel_pmap. 2036 * This function is also called when a page is unmapped, to possibly reenable 2037 * caching on any remaining mappings. 2038 * 2039 * The code implements the following logic, where: 2040 * 2041 * KW = # of kernel read/write pages 2042 * KR = # of kernel read only pages 2043 * UW = # of user read/write pages 2044 * UR = # of user read only pages 2045 * OW = # of user read/write pages in another pmap, then 2046 * 2047 * KC = kernel mapping is cacheable 2048 * UC = user mapping is cacheable 2049 * 2050 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2051 * +--------------------------------------------- 2052 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2053 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2054 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2055 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2056 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2057 * 2058 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2059 */ 2060 __inline static void 2061 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2062 boolean_t clear_cache) 2063 { 2064 if (pmap == pmap_kernel()) 2065 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2066 else 2067 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2068 } 2069 2070 static void 2071 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2072 boolean_t clear_cache) 2073 { 2074 int user_entries = 0; 2075 int user_writable = 0; 2076 int user_cacheable = 0; 2077 int kernel_entries = 0; 2078 int kernel_writable = 0; 2079 int kernel_cacheable = 0; 2080 struct pv_entry *pv; 2081 struct pmap *last_pmap = pmap; 2082 2083 #ifdef DIAGNOSTIC 2084 if (pmap != pmap_kernel()) 2085 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2086 #endif 2087 2088 /* 2089 * Pass one, see if there are both kernel and user pmaps for 2090 * this page. Calculate whether there are user-writable or 2091 * kernel-writable pages. 2092 */ 2093 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2094 if (pv->pv_pmap != pmap) { 2095 user_entries++; 2096 if (pv->pv_flags & PVF_WRITE) 2097 user_writable++; 2098 if ((pv->pv_flags & PVF_NC) == 0) 2099 user_cacheable++; 2100 } else { 2101 kernel_entries++; 2102 if (pv->pv_flags & PVF_WRITE) 2103 kernel_writable++; 2104 if ((pv->pv_flags & PVF_NC) == 0) 2105 kernel_cacheable++; 2106 } 2107 } 2108 2109 /* 2110 * We know we have just been updating a kernel entry, so if 2111 * all user pages are already cacheable, then there is nothing 2112 * further to do. 2113 */ 2114 if (kernel_entries == 0 && 2115 user_cacheable == user_entries) 2116 return; 2117 2118 if (user_entries) { 2119 /* 2120 * Scan over the list again, for each entry, if it 2121 * might not be set correctly, call pmap_vac_me_user 2122 * to recalculate the settings. 2123 */ 2124 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2125 /* 2126 * We know kernel mappings will get set 2127 * correctly in other calls. We also know 2128 * that if the pmap is the same as last_pmap 2129 * then we've just handled this entry. 2130 */ 2131 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2132 continue; 2133 /* 2134 * If there are kernel entries and this page 2135 * is writable but non-cacheable, then we can 2136 * skip this entry also. 2137 */ 2138 if (kernel_entries > 0 && 2139 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2140 (PVF_NC | PVF_WRITE)) 2141 continue; 2142 /* 2143 * Similarly if there are no kernel-writable 2144 * entries and the page is already 2145 * read-only/cacheable. 2146 */ 2147 if (kernel_writable == 0 && 2148 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2149 continue; 2150 /* 2151 * For some of the remaining cases, we know 2152 * that we must recalculate, but for others we 2153 * can't tell if they are correct or not, so 2154 * we recalculate anyway. 2155 */ 2156 pmap_unmap_ptes(last_pmap); 2157 last_pmap = pv->pv_pmap; 2158 ptes = pmap_map_ptes(last_pmap); 2159 pmap_vac_me_user(last_pmap, pg, ptes, 2160 pmap_is_curpmap(last_pmap)); 2161 } 2162 /* Restore the pte mapping that was passed to us. */ 2163 if (last_pmap != pmap) { 2164 pmap_unmap_ptes(last_pmap); 2165 ptes = pmap_map_ptes(pmap); 2166 } 2167 if (kernel_entries == 0) 2168 return; 2169 } 2170 2171 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2172 return; 2173 } 2174 2175 static void 2176 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2177 boolean_t clear_cache) 2178 { 2179 struct pmap *kpmap = pmap_kernel(); 2180 struct pv_entry *pv, *npv; 2181 int entries = 0; 2182 int writable = 0; 2183 int cacheable_entries = 0; 2184 int kern_cacheable = 0; 2185 int other_writable = 0; 2186 2187 pv = pg->mdpage.pvh_list; 2188 KASSERT(ptes != NULL); 2189 2190 /* 2191 * Count mappings and writable mappings in this pmap. 2192 * Include kernel mappings as part of our own. 2193 * Keep a pointer to the first one. 2194 */ 2195 for (npv = pv; npv; npv = npv->pv_next) { 2196 /* Count mappings in the same pmap */ 2197 if (pmap == npv->pv_pmap || 2198 kpmap == npv->pv_pmap) { 2199 if (entries++ == 0) 2200 pv = npv; 2201 /* Cacheable mappings */ 2202 if ((npv->pv_flags & PVF_NC) == 0) { 2203 cacheable_entries++; 2204 if (kpmap == npv->pv_pmap) 2205 kern_cacheable++; 2206 } 2207 /* Writable mappings */ 2208 if (npv->pv_flags & PVF_WRITE) 2209 ++writable; 2210 } else if (npv->pv_flags & PVF_WRITE) 2211 other_writable = 1; 2212 } 2213 2214 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2215 "writable %d cacheable %d %s\n", pmap, entries, writable, 2216 cacheable_entries, clear_cache ? "clean" : "no clean")); 2217 2218 /* 2219 * Enable or disable caching as necessary. 2220 * Note: the first entry might be part of the kernel pmap, 2221 * so we can't assume this is indicative of the state of the 2222 * other (maybe non-kpmap) entries. 2223 */ 2224 if ((entries > 1 && writable) || 2225 (entries > 0 && pmap == kpmap && other_writable)) { 2226 if (cacheable_entries == 0) 2227 return; 2228 for (npv = pv; npv; npv = npv->pv_next) { 2229 if ((pmap == npv->pv_pmap 2230 || kpmap == npv->pv_pmap) && 2231 (npv->pv_flags & PVF_NC) == 0) { 2232 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2233 npv->pv_flags |= PVF_NC; 2234 /* 2235 * If this page needs flushing from the 2236 * cache, and we aren't going to do it 2237 * below, do it now. 2238 */ 2239 if ((cacheable_entries < 4 && 2240 (clear_cache || npv->pv_pmap == kpmap)) || 2241 (npv->pv_pmap == kpmap && 2242 !clear_cache && kern_cacheable < 4)) { 2243 cpu_idcache_wbinv_range(npv->pv_va, 2244 NBPG); 2245 cpu_tlb_flushID_SE(npv->pv_va); 2246 } 2247 } 2248 } 2249 if ((clear_cache && cacheable_entries >= 4) || 2250 kern_cacheable >= 4) { 2251 cpu_idcache_wbinv_all(); 2252 cpu_tlb_flushID(); 2253 } 2254 cpu_cpwait(); 2255 } else if (entries > 0) { 2256 /* 2257 * Turn cacheing back on for some pages. If it is a kernel 2258 * page, only do so if there are no other writable pages. 2259 */ 2260 for (npv = pv; npv; npv = npv->pv_next) { 2261 if ((pmap == npv->pv_pmap || 2262 (kpmap == npv->pv_pmap && other_writable == 0)) && 2263 (npv->pv_flags & PVF_NC)) { 2264 ptes[arm_btop(npv->pv_va)] |= 2265 pte_l2_s_cache_mode; 2266 npv->pv_flags &= ~PVF_NC; 2267 } 2268 } 2269 } 2270 } 2271 2272 /* 2273 * pmap_remove() 2274 * 2275 * pmap_remove is responsible for nuking a number of mappings for a range 2276 * of virtual address space in the current pmap. To do this efficiently 2277 * is interesting, because in a number of cases a wide virtual address 2278 * range may be supplied that contains few actual mappings. So, the 2279 * optimisations are: 2280 * 1. Try and skip over hunks of address space for which an L1 entry 2281 * does not exist. 2282 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2283 * maybe do just a partial cache clean. This path of execution is 2284 * complicated by the fact that the cache must be flushed _before_ 2285 * the PTE is nuked, being a VAC :-) 2286 * 3. Maybe later fast-case a single page, but I don't think this is 2287 * going to make _that_ much difference overall. 2288 */ 2289 2290 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2291 2292 void 2293 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2294 { 2295 int cleanlist_idx = 0; 2296 struct pagelist { 2297 vaddr_t va; 2298 pt_entry_t *pte; 2299 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2300 pt_entry_t *pte = 0, *ptes; 2301 paddr_t pa; 2302 int pmap_active; 2303 struct vm_page *pg; 2304 2305 /* Exit quick if there is no pmap */ 2306 if (!pmap) 2307 return; 2308 2309 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2310 pmap, sva, eva)); 2311 2312 /* 2313 * we lock in the pmap => vm_page direction 2314 */ 2315 PMAP_MAP_TO_HEAD_LOCK(); 2316 2317 ptes = pmap_map_ptes(pmap); 2318 /* Get a page table pointer */ 2319 while (sva < eva) { 2320 if (pmap_pde_page(pmap_pde(pmap, sva))) 2321 break; 2322 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2323 } 2324 2325 pte = &ptes[arm_btop(sva)]; 2326 /* Note if the pmap is active thus require cache and tlb cleans */ 2327 pmap_active = pmap_is_curpmap(pmap); 2328 2329 /* Now loop along */ 2330 while (sva < eva) { 2331 /* Check if we can move to the next PDE (l1 chunk) */ 2332 if (!(sva & L2_ADDR_BITS)) 2333 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2334 sva += L1_S_SIZE; 2335 pte += arm_btop(L1_S_SIZE); 2336 continue; 2337 } 2338 2339 /* We've found a valid PTE, so this page of PTEs has to go. */ 2340 if (pmap_pte_v(pte)) { 2341 /* Update statistics */ 2342 --pmap->pm_stats.resident_count; 2343 2344 /* 2345 * Add this page to our cache remove list, if we can. 2346 * If, however the cache remove list is totally full, 2347 * then do a complete cache invalidation taking note 2348 * to backtrack the PTE table beforehand, and ignore 2349 * the lists in future because there's no longer any 2350 * point in bothering with them (we've paid the 2351 * penalty, so will carry on unhindered). Otherwise, 2352 * when we fall out, we just clean the list. 2353 */ 2354 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2355 pa = pmap_pte_pa(pte); 2356 2357 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2358 /* Add to the clean list. */ 2359 cleanlist[cleanlist_idx].pte = pte; 2360 cleanlist[cleanlist_idx].va = sva; 2361 cleanlist_idx++; 2362 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2363 int cnt; 2364 2365 /* Nuke everything if needed. */ 2366 if (pmap_active) { 2367 cpu_idcache_wbinv_all(); 2368 cpu_tlb_flushID(); 2369 } 2370 2371 /* 2372 * Roll back the previous PTE list, 2373 * and zero out the current PTE. 2374 */ 2375 for (cnt = 0; cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) { 2376 *cleanlist[cnt].pte = 0; 2377 pmap_pte_delref(pmap, cleanlist[cnt].va); 2378 } 2379 *pte = 0; 2380 pmap_pte_delref(pmap, sva); 2381 cleanlist_idx++; 2382 } else { 2383 /* 2384 * We've already nuked the cache and 2385 * TLB, so just carry on regardless, 2386 * and we won't need to do it again 2387 */ 2388 *pte = 0; 2389 pmap_pte_delref(pmap, sva); 2390 } 2391 2392 /* 2393 * Update flags. In a number of circumstances, 2394 * we could cluster a lot of these and do a 2395 * number of sequential pages in one go. 2396 */ 2397 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2398 struct pv_entry *pve; 2399 simple_lock(&pg->mdpage.pvh_slock); 2400 pve = pmap_remove_pv(pg, pmap, sva); 2401 pmap_free_pv(pmap, pve); 2402 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2403 simple_unlock(&pg->mdpage.pvh_slock); 2404 } 2405 } 2406 sva += NBPG; 2407 pte++; 2408 } 2409 2410 /* 2411 * Now, if we've fallen through down to here, chances are that there 2412 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2413 */ 2414 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2415 u_int cnt; 2416 2417 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2418 if (pmap_active) { 2419 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2420 NBPG); 2421 *cleanlist[cnt].pte = 0; 2422 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2423 } else 2424 *cleanlist[cnt].pte = 0; 2425 pmap_pte_delref(pmap, cleanlist[cnt].va); 2426 } 2427 } 2428 2429 pmap_unmap_ptes(pmap); 2430 2431 PMAP_MAP_TO_HEAD_UNLOCK(); 2432 } 2433 2434 /* 2435 * Routine: pmap_remove_all 2436 * Function: 2437 * Removes this physical page from 2438 * all physical maps in which it resides. 2439 * Reflects back modify bits to the pager. 2440 */ 2441 2442 static void 2443 pmap_remove_all(struct vm_page *pg) 2444 { 2445 struct pv_entry *pv, *npv; 2446 struct pmap *pmap; 2447 pt_entry_t *pte, *ptes; 2448 2449 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2450 2451 /* set vm_page => pmap locking */ 2452 PMAP_HEAD_TO_MAP_LOCK(); 2453 2454 simple_lock(&pg->mdpage.pvh_slock); 2455 2456 pv = pg->mdpage.pvh_list; 2457 if (pv == NULL) { 2458 PDEBUG(0, printf("free page\n")); 2459 simple_unlock(&pg->mdpage.pvh_slock); 2460 PMAP_HEAD_TO_MAP_UNLOCK(); 2461 return; 2462 } 2463 pmap_clean_page(pv, FALSE); 2464 2465 while (pv) { 2466 pmap = pv->pv_pmap; 2467 ptes = pmap_map_ptes(pmap); 2468 pte = &ptes[arm_btop(pv->pv_va)]; 2469 2470 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2471 pv->pv_va, pv->pv_flags)); 2472 #ifdef DEBUG 2473 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2474 pmap_pte_v(pte) == 0 || 2475 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2476 panic("pmap_remove_all: bad mapping"); 2477 #endif /* DEBUG */ 2478 2479 /* 2480 * Update statistics 2481 */ 2482 --pmap->pm_stats.resident_count; 2483 2484 /* Wired bit */ 2485 if (pv->pv_flags & PVF_WIRED) 2486 --pmap->pm_stats.wired_count; 2487 2488 /* 2489 * Invalidate the PTEs. 2490 * XXX: should cluster them up and invalidate as many 2491 * as possible at once. 2492 */ 2493 2494 #ifdef needednotdone 2495 reduce wiring count on page table pages as references drop 2496 #endif 2497 2498 *pte = 0; 2499 pmap_pte_delref(pmap, pv->pv_va); 2500 2501 npv = pv->pv_next; 2502 pmap_free_pv(pmap, pv); 2503 pv = npv; 2504 pmap_unmap_ptes(pmap); 2505 } 2506 pg->mdpage.pvh_list = NULL; 2507 simple_unlock(&pg->mdpage.pvh_slock); 2508 PMAP_HEAD_TO_MAP_UNLOCK(); 2509 2510 PDEBUG(0, printf("done\n")); 2511 cpu_tlb_flushID(); 2512 cpu_cpwait(); 2513 } 2514 2515 2516 /* 2517 * Set the physical protection on the specified range of this map as requested. 2518 */ 2519 2520 void 2521 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2522 { 2523 pt_entry_t *pte = NULL, *ptes; 2524 struct vm_page *pg; 2525 int flush = 0; 2526 2527 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2528 pmap, sva, eva, prot)); 2529 2530 if (~prot & VM_PROT_READ) { 2531 /* 2532 * Just remove the mappings. pmap_update() is not required 2533 * here since the caller should do it. 2534 */ 2535 pmap_remove(pmap, sva, eva); 2536 return; 2537 } 2538 if (prot & VM_PROT_WRITE) { 2539 /* 2540 * If this is a read->write transition, just ignore it and let 2541 * uvm_fault() take care of it later. 2542 */ 2543 return; 2544 } 2545 2546 /* Need to lock map->head */ 2547 PMAP_MAP_TO_HEAD_LOCK(); 2548 2549 ptes = pmap_map_ptes(pmap); 2550 2551 /* 2552 * OK, at this point, we know we're doing write-protect operation. 2553 * If the pmap is active, write-back the range. 2554 */ 2555 if (pmap_is_curpmap(pmap)) 2556 cpu_dcache_wb_range(sva, eva - sva); 2557 2558 /* 2559 * We need to acquire a pointer to a page table page before entering 2560 * the following loop. 2561 */ 2562 while (sva < eva) { 2563 if (pmap_pde_page(pmap_pde(pmap, sva))) 2564 break; 2565 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2566 } 2567 2568 pte = &ptes[arm_btop(sva)]; 2569 2570 while (sva < eva) { 2571 /* only check once in a while */ 2572 if ((sva & L2_ADDR_BITS) == 0) { 2573 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2574 /* We can race ahead here, to the next pde. */ 2575 sva += L1_S_SIZE; 2576 pte += arm_btop(L1_S_SIZE); 2577 continue; 2578 } 2579 } 2580 2581 if (!pmap_pte_v(pte)) 2582 goto next; 2583 2584 flush = 1; 2585 2586 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2587 2588 /* Clear write flag */ 2589 if ((pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte))) != NULL) { 2590 simple_lock(&pg->mdpage.pvh_slock); 2591 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2592 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2593 simple_unlock(&pg->mdpage.pvh_slock); 2594 } 2595 2596 next: 2597 sva += NBPG; 2598 pte++; 2599 } 2600 pmap_unmap_ptes(pmap); 2601 PMAP_MAP_TO_HEAD_UNLOCK(); 2602 if (flush) 2603 cpu_tlb_flushID(); 2604 } 2605 2606 /* 2607 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2608 * int flags) 2609 * 2610 * Insert the given physical page (p) at 2611 * the specified virtual address (v) in the 2612 * target physical map with the protection requested. 2613 * 2614 * If specified, the page will be wired down, meaning 2615 * that the related pte can not be reclaimed. 2616 * 2617 * NB: This is the only routine which MAY NOT lazy-evaluate 2618 * or lose information. That is, this routine must actually 2619 * insert this page into the given map NOW. 2620 */ 2621 2622 int 2623 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2624 int flags) 2625 { 2626 pt_entry_t *ptes, opte, npte; 2627 paddr_t opa; 2628 boolean_t wired = (flags & PMAP_WIRED) != 0; 2629 struct vm_page *pg; 2630 struct pv_entry *pve; 2631 int error, nflags; 2632 2633 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2634 va, pa, pmap, prot, wired)); 2635 2636 #ifdef DIAGNOSTIC 2637 /* Valid address ? */ 2638 if (va >= (pmap_curmaxkvaddr)) 2639 panic("pmap_enter: too big"); 2640 if (pmap != pmap_kernel() && va != 0) { 2641 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2642 panic("pmap_enter: kernel page in user map"); 2643 } else { 2644 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2645 panic("pmap_enter: user page in kernel map"); 2646 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2647 panic("pmap_enter: entering PT page"); 2648 } 2649 #endif 2650 2651 KDASSERT(((va | pa) & PGOFSET) == 0); 2652 2653 /* 2654 * Get a pointer to the page. Later on in this function, we 2655 * test for a managed page by checking pg != NULL. 2656 */ 2657 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2658 2659 /* get lock */ 2660 PMAP_MAP_TO_HEAD_LOCK(); 2661 2662 /* 2663 * map the ptes. If there's not already an L2 table for this 2664 * address, allocate one. 2665 */ 2666 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2667 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2668 struct vm_page *ptp; 2669 2670 /* kernel should be pre-grown */ 2671 KASSERT(pmap != pmap_kernel()); 2672 2673 /* if failure is allowed then don't try too hard */ 2674 ptp = pmap_get_ptp(pmap, va & L1_S_FRAME); 2675 if (ptp == NULL) { 2676 if (flags & PMAP_CANFAIL) { 2677 error = ENOMEM; 2678 goto out; 2679 } 2680 panic("pmap_enter: get ptp failed"); 2681 } 2682 } 2683 opte = ptes[arm_btop(va)]; 2684 2685 nflags = 0; 2686 if (prot & VM_PROT_WRITE) 2687 nflags |= PVF_WRITE; 2688 if (wired) 2689 nflags |= PVF_WIRED; 2690 2691 /* Is the pte valid ? If so then this page is already mapped */ 2692 if (l2pte_valid(opte)) { 2693 /* Get the physical address of the current page mapped */ 2694 opa = l2pte_pa(opte); 2695 2696 /* Are we mapping the same page ? */ 2697 if (opa == pa) { 2698 /* Check to see if we're doing rw->ro. */ 2699 if ((opte & L2_S_PROT_W) != 0 && 2700 (prot & VM_PROT_WRITE) == 0) { 2701 /* Yup, flush the cache if current pmap. */ 2702 if (pmap_is_curpmap(pmap)) 2703 cpu_dcache_wb_range(va, NBPG); 2704 } 2705 2706 /* Has the wiring changed ? */ 2707 if (pg != NULL) { 2708 simple_lock(&pg->mdpage.pvh_slock); 2709 (void) pmap_modify_pv(pmap, va, pg, 2710 PVF_WRITE | PVF_WIRED, nflags); 2711 simple_unlock(&pg->mdpage.pvh_slock); 2712 } 2713 } else { 2714 struct vm_page *opg; 2715 2716 /* We are replacing the page with a new one. */ 2717 cpu_idcache_wbinv_range(va, NBPG); 2718 2719 /* 2720 * If it is part of our managed memory then we 2721 * must remove it from the PV list 2722 */ 2723 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2724 simple_lock(&opg->mdpage.pvh_slock); 2725 pve = pmap_remove_pv(opg, pmap, va); 2726 simple_unlock(&opg->mdpage.pvh_slock); 2727 } else { 2728 pve = NULL; 2729 } 2730 2731 goto enter; 2732 } 2733 } else { 2734 opa = 0; 2735 pve = NULL; 2736 pmap_pte_addref(pmap, va); 2737 2738 /* pte is not valid so we must be hooking in a new page */ 2739 ++pmap->pm_stats.resident_count; 2740 2741 enter: 2742 /* 2743 * Enter on the PV list if part of our managed memory 2744 */ 2745 if (pg != NULL) { 2746 if (pve == NULL) { 2747 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2748 if (pve == NULL) { 2749 if (flags & PMAP_CANFAIL) { 2750 error = ENOMEM; 2751 goto out; 2752 } 2753 panic("pmap_enter: no pv entries " 2754 "available"); 2755 } 2756 } 2757 /* enter_pv locks pvh when adding */ 2758 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2759 } else { 2760 if (pve != NULL) 2761 pmap_free_pv(pmap, pve); 2762 } 2763 } 2764 2765 /* Construct the pte, giving the correct access. */ 2766 npte = pa; 2767 2768 /* VA 0 is magic. */ 2769 if (pmap != pmap_kernel() && va != vector_page) 2770 npte |= L2_S_PROT_U; 2771 2772 if (pg != NULL) { 2773 #ifdef DIAGNOSTIC 2774 if ((flags & VM_PROT_ALL) & ~prot) 2775 panic("pmap_enter: access_type exceeds prot"); 2776 #endif 2777 npte |= pte_l2_s_cache_mode; 2778 if (flags & VM_PROT_WRITE) { 2779 npte |= L2_S_PROTO | L2_S_PROT_W; 2780 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2781 } else if (flags & VM_PROT_ALL) { 2782 npte |= L2_S_PROTO; 2783 pg->mdpage.pvh_attrs |= PVF_REF; 2784 } else 2785 npte |= L2_TYPE_INV; 2786 } else { 2787 if (prot & VM_PROT_WRITE) 2788 npte |= L2_S_PROTO | L2_S_PROT_W; 2789 else if (prot & VM_PROT_ALL) 2790 npte |= L2_S_PROTO; 2791 else 2792 npte |= L2_TYPE_INV; 2793 } 2794 2795 #if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE) 2796 #if ARM_NMMUS > 1 2797 # error "XXX Unable to use read/write-allocate and configure non-XScale" 2798 #endif 2799 /* 2800 * XXX BRUTAL HACK! This allows us to limp along with 2801 * XXX the read/write-allocate cache mode. 2802 */ 2803 if (pmap == pmap_kernel()) 2804 npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X); 2805 #endif 2806 ptes[arm_btop(va)] = npte; 2807 2808 if (pg != NULL) { 2809 simple_lock(&pg->mdpage.pvh_slock); 2810 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2811 simple_unlock(&pg->mdpage.pvh_slock); 2812 } 2813 2814 /* Better flush the TLB ... */ 2815 cpu_tlb_flushID_SE(va); 2816 error = 0; 2817 out: 2818 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2819 PMAP_MAP_TO_HEAD_UNLOCK(); 2820 2821 return error; 2822 } 2823 2824 /* 2825 * pmap_kenter_pa: enter a kernel mapping 2826 * 2827 * => no need to lock anything assume va is already allocated 2828 * => should be faster than normal pmap enter function 2829 */ 2830 void 2831 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2832 { 2833 pt_entry_t *pte; 2834 2835 pte = vtopte(va); 2836 KASSERT(!pmap_pte_v(pte)); 2837 2838 #ifdef PMAP_ALIAS_DEBUG 2839 { 2840 struct vm_page *pg; 2841 int s; 2842 2843 pg = PHYS_TO_VM_PAGE(pa); 2844 if (pg != NULL) { 2845 s = splhigh(); 2846 if (pg->mdpage.ro_mappings == 0 && 2847 pg->mdpage.rw_mappings == 0 && 2848 pg->mdpage.kro_mappings == 0 && 2849 pg->mdpage.krw_mappings == 0) { 2850 /* This case is okay. */ 2851 } else if (pg->mdpage.rw_mappings == 0 && 2852 pg->mdpage.krw_mappings == 0 && 2853 (prot & VM_PROT_WRITE) == 0) { 2854 /* This case is okay. */ 2855 } else { 2856 /* Something is awry. */ 2857 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2858 "prot 0x%x\n", pg->mdpage.ro_mappings, 2859 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2860 pg->mdpage.krw_mappings, prot); 2861 Debugger(); 2862 } 2863 if (prot & VM_PROT_WRITE) 2864 pg->mdpage.krw_mappings++; 2865 else 2866 pg->mdpage.kro_mappings++; 2867 splx(s); 2868 } 2869 } 2870 #endif /* PMAP_ALIAS_DEBUG */ 2871 2872 *pte = L2_S_PROTO | pa | 2873 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2874 } 2875 2876 void 2877 pmap_kremove(vaddr_t va, vsize_t len) 2878 { 2879 pt_entry_t *pte; 2880 2881 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2882 2883 /* 2884 * We assume that we will only be called with small 2885 * regions of memory. 2886 */ 2887 2888 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2889 pte = vtopte(va); 2890 #ifdef PMAP_ALIAS_DEBUG 2891 { 2892 struct vm_page *pg; 2893 int s; 2894 2895 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 2896 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 2897 s = splhigh(); 2898 if (*pte & L2_S_PROT_W) { 2899 KASSERT(pg->mdpage.krw_mappings != 0); 2900 pg->mdpage.krw_mappings--; 2901 } else { 2902 KASSERT(pg->mdpage.kro_mappings != 0); 2903 pg->mdpage.kro_mappings--; 2904 } 2905 splx(s); 2906 } 2907 } 2908 #endif /* PMAP_ALIAS_DEBUG */ 2909 cpu_idcache_wbinv_range(va, PAGE_SIZE); 2910 *pte = 0; 2911 cpu_tlb_flushID_SE(va); 2912 } 2913 } 2914 2915 /* 2916 * pmap_page_protect: 2917 * 2918 * Lower the permission for all mappings to a given page. 2919 */ 2920 2921 void 2922 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2923 { 2924 2925 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 2926 VM_PAGE_TO_PHYS(pg), prot)); 2927 2928 switch(prot) { 2929 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 2930 case VM_PROT_READ|VM_PROT_WRITE: 2931 return; 2932 2933 case VM_PROT_READ: 2934 case VM_PROT_READ|VM_PROT_EXECUTE: 2935 pmap_clearbit(pg, PVF_WRITE); 2936 break; 2937 2938 default: 2939 pmap_remove_all(pg); 2940 break; 2941 } 2942 } 2943 2944 2945 /* 2946 * Routine: pmap_unwire 2947 * Function: Clear the wired attribute for a map/virtual-address 2948 * pair. 2949 * In/out conditions: 2950 * The mapping must already exist in the pmap. 2951 */ 2952 2953 void 2954 pmap_unwire(struct pmap *pmap, vaddr_t va) 2955 { 2956 pt_entry_t *ptes; 2957 struct vm_page *pg; 2958 paddr_t pa; 2959 2960 PMAP_MAP_TO_HEAD_LOCK(); 2961 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2962 2963 if (pmap_pde_v(pmap_pde(pmap, va))) { 2964 #ifdef DIAGNOSTIC 2965 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 2966 panic("pmap_unwire: invalid L2 PTE"); 2967 #endif 2968 /* Extract the physical address of the page */ 2969 pa = l2pte_pa(ptes[arm_btop(va)]); 2970 2971 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 2972 goto out; 2973 2974 /* Update the wired bit in the pv entry for this page. */ 2975 simple_lock(&pg->mdpage.pvh_slock); 2976 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 2977 simple_unlock(&pg->mdpage.pvh_slock); 2978 } 2979 #ifdef DIAGNOSTIC 2980 else { 2981 panic("pmap_unwire: invalid L1 PTE"); 2982 } 2983 #endif 2984 out: 2985 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2986 PMAP_MAP_TO_HEAD_UNLOCK(); 2987 } 2988 2989 /* 2990 * Routine: pmap_extract 2991 * Function: 2992 * Extract the physical page address associated 2993 * with the given map/virtual_address pair. 2994 */ 2995 boolean_t 2996 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 2997 { 2998 pd_entry_t *pde; 2999 pt_entry_t *pte, *ptes; 3000 paddr_t pa; 3001 3002 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3003 3004 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3005 3006 pde = pmap_pde(pmap, va); 3007 pte = &ptes[arm_btop(va)]; 3008 3009 if (pmap_pde_section(pde)) { 3010 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3011 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3012 goto out; 3013 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3014 PDEBUG(5, printf("no mapping\n")); 3015 goto failed; 3016 } 3017 3018 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3019 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3020 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3021 goto out; 3022 } 3023 3024 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3025 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3026 3027 out: 3028 if (pap != NULL) 3029 *pap = pa; 3030 3031 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3032 return (TRUE); 3033 3034 failed: 3035 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3036 return (FALSE); 3037 } 3038 3039 3040 /* 3041 * pmap_copy: 3042 * 3043 * Copy the range specified by src_addr/len from the source map to the 3044 * range dst_addr/len in the destination map. 3045 * 3046 * This routine is only advisory and need not do anything. 3047 */ 3048 /* Call deleted in <arm/arm32/pmap.h> */ 3049 3050 #if defined(PMAP_DEBUG) 3051 void 3052 pmap_dump_pvlist(phys, m) 3053 vaddr_t phys; 3054 char *m; 3055 { 3056 struct vm_page *pg; 3057 struct pv_entry *pv; 3058 3059 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3060 printf("INVALID PA\n"); 3061 return; 3062 } 3063 simple_lock(&pg->mdpage.pvh_slock); 3064 printf("%s %08lx:", m, phys); 3065 if (pg->mdpage.pvh_list == NULL) { 3066 simple_unlock(&pg->mdpage.pvh_slock); 3067 printf(" no mappings\n"); 3068 return; 3069 } 3070 3071 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3072 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3073 pv->pv_va, pv->pv_flags); 3074 3075 printf("\n"); 3076 simple_unlock(&pg->mdpage.pvh_slock); 3077 } 3078 3079 #endif /* PMAP_DEBUG */ 3080 3081 static pt_entry_t * 3082 pmap_map_ptes(struct pmap *pmap) 3083 { 3084 struct proc *p; 3085 3086 /* the kernel's pmap is always accessible */ 3087 if (pmap == pmap_kernel()) { 3088 return (pt_entry_t *)PTE_BASE; 3089 } 3090 3091 if (pmap_is_curpmap(pmap)) { 3092 simple_lock(&pmap->pm_obj.vmobjlock); 3093 return (pt_entry_t *)PTE_BASE; 3094 } 3095 3096 p = curproc; 3097 KDASSERT(p != NULL); 3098 3099 /* need to lock both curpmap and pmap: use ordered locking */ 3100 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3101 simple_lock(&pmap->pm_obj.vmobjlock); 3102 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3103 } else { 3104 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3105 simple_lock(&pmap->pm_obj.vmobjlock); 3106 } 3107 3108 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, pmap->pm_pptpt, 3109 FALSE); 3110 cpu_tlb_flushD(); 3111 cpu_cpwait(); 3112 return (pt_entry_t *)APTE_BASE; 3113 } 3114 3115 /* 3116 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3117 */ 3118 3119 static void 3120 pmap_unmap_ptes(struct pmap *pmap) 3121 { 3122 3123 if (pmap == pmap_kernel()) { 3124 return; 3125 } 3126 if (pmap_is_curpmap(pmap)) { 3127 simple_unlock(&pmap->pm_obj.vmobjlock); 3128 } else { 3129 KDASSERT(curproc != NULL); 3130 simple_unlock(&pmap->pm_obj.vmobjlock); 3131 simple_unlock( 3132 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3133 } 3134 } 3135 3136 /* 3137 * Modify pte bits for all ptes corresponding to the given physical address. 3138 * We use `maskbits' rather than `clearbits' because we're always passing 3139 * constants and the latter would require an extra inversion at run-time. 3140 */ 3141 3142 static void 3143 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3144 { 3145 struct pv_entry *pv; 3146 pt_entry_t *ptes, npte, opte; 3147 vaddr_t va; 3148 int tlbentry; 3149 3150 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3151 VM_PAGE_TO_PHYS(pg), maskbits)); 3152 3153 tlbentry = 0; 3154 3155 PMAP_HEAD_TO_MAP_LOCK(); 3156 simple_lock(&pg->mdpage.pvh_slock); 3157 3158 /* 3159 * Clear saved attributes (modify, reference) 3160 */ 3161 pg->mdpage.pvh_attrs &= ~maskbits; 3162 3163 if (pg->mdpage.pvh_list == NULL) { 3164 simple_unlock(&pg->mdpage.pvh_slock); 3165 PMAP_HEAD_TO_MAP_UNLOCK(); 3166 return; 3167 } 3168 3169 /* 3170 * Loop over all current mappings setting/clearing as appropos 3171 */ 3172 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3173 #ifdef PMAP_ALIAS_DEBUG 3174 { 3175 int s = splhigh(); 3176 if ((maskbits & PVF_WRITE) != 0 && 3177 (pv->pv_flags & PVF_WRITE) != 0) { 3178 KASSERT(pg->mdpage.rw_mappings != 0); 3179 pg->mdpage.rw_mappings--; 3180 pg->mdpage.ro_mappings++; 3181 } 3182 splx(s); 3183 } 3184 #endif /* PMAP_ALIAS_DEBUG */ 3185 va = pv->pv_va; 3186 pv->pv_flags &= ~maskbits; 3187 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3188 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3189 npte = opte = ptes[arm_btop(va)]; 3190 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3191 if ((pv->pv_flags & PVF_NC)) { 3192 /* 3193 * Entry is not cacheable: reenable 3194 * the cache, nothing to flush 3195 * 3196 * Don't turn caching on again if this 3197 * is a modified emulation. This 3198 * would be inconsitent with the 3199 * settings created by 3200 * pmap_vac_me_harder(). 3201 * 3202 * There's no need to call 3203 * pmap_vac_me_harder() here: all 3204 * pages are loosing their write 3205 * permission. 3206 * 3207 */ 3208 if (maskbits & PVF_WRITE) { 3209 npte |= pte_l2_s_cache_mode; 3210 pv->pv_flags &= ~PVF_NC; 3211 } 3212 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3213 /* 3214 * Entry is cacheable: check if pmap is 3215 * current if it is flush it, 3216 * otherwise it won't be in the cache 3217 */ 3218 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3219 } 3220 3221 /* make the pte read only */ 3222 npte &= ~L2_S_PROT_W; 3223 } 3224 3225 if (maskbits & PVF_REF) { 3226 if (pmap_is_curpmap(pv->pv_pmap) && 3227 (pv->pv_flags & PVF_NC) == 0) { 3228 /* 3229 * Check npte here; we may have already 3230 * done the wbinv above, and the validity 3231 * of the PTE is the same for opte and 3232 * npte. 3233 */ 3234 if (npte & L2_S_PROT_W) { 3235 cpu_idcache_wbinv_range(pv->pv_va, 3236 NBPG); 3237 } else if ((npte & L2_TYPE_MASK) 3238 != L2_TYPE_INV) { 3239 /* XXXJRT need idcache_inv_range */ 3240 cpu_idcache_wbinv_range(pv->pv_va, 3241 NBPG); 3242 } 3243 } 3244 3245 /* make the pte invalid */ 3246 npte = (npte & ~L2_TYPE_MASK) | L2_TYPE_INV; 3247 } 3248 3249 if (npte != opte) { 3250 ptes[arm_btop(va)] = npte; 3251 /* Flush the TLB entry if a current pmap. */ 3252 if (pmap_is_curpmap(pv->pv_pmap)) 3253 cpu_tlb_flushID_SE(pv->pv_va); 3254 } 3255 3256 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3257 } 3258 cpu_cpwait(); 3259 3260 simple_unlock(&pg->mdpage.pvh_slock); 3261 PMAP_HEAD_TO_MAP_UNLOCK(); 3262 } 3263 3264 /* 3265 * pmap_clear_modify: 3266 * 3267 * Clear the "modified" attribute for a page. 3268 */ 3269 boolean_t 3270 pmap_clear_modify(struct vm_page *pg) 3271 { 3272 boolean_t rv; 3273 3274 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3275 rv = TRUE; 3276 pmap_clearbit(pg, PVF_MOD); 3277 } else 3278 rv = FALSE; 3279 3280 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3281 VM_PAGE_TO_PHYS(pg), rv)); 3282 3283 return (rv); 3284 } 3285 3286 /* 3287 * pmap_clear_reference: 3288 * 3289 * Clear the "referenced" attribute for a page. 3290 */ 3291 boolean_t 3292 pmap_clear_reference(struct vm_page *pg) 3293 { 3294 boolean_t rv; 3295 3296 if (pg->mdpage.pvh_attrs & PVF_REF) { 3297 rv = TRUE; 3298 pmap_clearbit(pg, PVF_REF); 3299 } else 3300 rv = FALSE; 3301 3302 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3303 VM_PAGE_TO_PHYS(pg), rv)); 3304 3305 return (rv); 3306 } 3307 3308 /* 3309 * pmap_is_modified: 3310 * 3311 * Test if a page has the "modified" attribute. 3312 */ 3313 /* See <arm/arm32/pmap.h> */ 3314 3315 /* 3316 * pmap_is_referenced: 3317 * 3318 * Test if a page has the "referenced" attribute. 3319 */ 3320 /* See <arm/arm32/pmap.h> */ 3321 3322 int 3323 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3324 { 3325 pt_entry_t *ptes; 3326 struct vm_page *pg; 3327 paddr_t pa; 3328 u_int flags; 3329 int rv = 0; 3330 3331 PDEBUG(2, printf("pmap_modified_emulation\n")); 3332 3333 PMAP_MAP_TO_HEAD_LOCK(); 3334 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3335 3336 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3337 PDEBUG(2, printf("L1 PTE invalid\n")); 3338 goto out; 3339 } 3340 3341 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3342 3343 /* Check for a invalid pte */ 3344 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3345 goto out; 3346 3347 /* This can happen if user code tries to access kernel memory. */ 3348 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3349 goto out; 3350 3351 /* Extract the physical address of the page */ 3352 pa = l2pte_pa(ptes[arm_btop(va)]); 3353 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3354 goto out; 3355 3356 /* Get the current flags for this page. */ 3357 simple_lock(&pg->mdpage.pvh_slock); 3358 3359 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3360 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3361 3362 /* 3363 * Do the flags say this page is writable ? If not then it is a 3364 * genuine write fault. If yes then the write fault is our fault 3365 * as we did not reflect the write access in the PTE. Now we know 3366 * a write has occurred we can correct this and also set the 3367 * modified bit 3368 */ 3369 if (~flags & PVF_WRITE) { 3370 simple_unlock(&pg->mdpage.pvh_slock); 3371 goto out; 3372 } 3373 3374 PDEBUG(0, 3375 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3376 va, ptes[arm_btop(va)])); 3377 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3378 3379 /* 3380 * Re-enable write permissions for the page. No need to call 3381 * pmap_vac_me_harder(), since this is just a 3382 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3383 * We've already set the cacheable bits based on the assumption 3384 * that we can write to this page. 3385 */ 3386 ptes[arm_btop(va)] = 3387 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3388 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3389 3390 simple_unlock(&pg->mdpage.pvh_slock); 3391 3392 cpu_tlb_flushID_SE(va); 3393 cpu_cpwait(); 3394 rv = 1; 3395 out: 3396 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3397 PMAP_MAP_TO_HEAD_UNLOCK(); 3398 return (rv); 3399 } 3400 3401 int 3402 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3403 { 3404 pt_entry_t *ptes; 3405 struct vm_page *pg; 3406 paddr_t pa; 3407 int rv = 0; 3408 3409 PDEBUG(2, printf("pmap_handled_emulation\n")); 3410 3411 PMAP_MAP_TO_HEAD_LOCK(); 3412 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3413 3414 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3415 PDEBUG(2, printf("L1 PTE invalid\n")); 3416 goto out; 3417 } 3418 3419 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3420 3421 /* Check for invalid pte */ 3422 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3423 goto out; 3424 3425 /* This can happen if user code tries to access kernel memory. */ 3426 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3427 goto out; 3428 3429 /* Extract the physical address of the page */ 3430 pa = l2pte_pa(ptes[arm_btop(va)]); 3431 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3432 goto out; 3433 3434 simple_lock(&pg->mdpage.pvh_slock); 3435 3436 /* 3437 * Ok we just enable the pte and mark the attibs as handled 3438 * XXX Should we traverse the PV list and enable all PTEs? 3439 */ 3440 PDEBUG(0, 3441 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3442 va, ptes[arm_btop(va)])); 3443 pg->mdpage.pvh_attrs |= PVF_REF; 3444 3445 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3446 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3447 3448 simple_unlock(&pg->mdpage.pvh_slock); 3449 3450 cpu_tlb_flushID_SE(va); 3451 cpu_cpwait(); 3452 rv = 1; 3453 out: 3454 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3455 PMAP_MAP_TO_HEAD_UNLOCK(); 3456 return (rv); 3457 } 3458 3459 /* 3460 * pmap_collect: free resources held by a pmap 3461 * 3462 * => optional function. 3463 * => called when a process is swapped out to free memory. 3464 */ 3465 3466 void 3467 pmap_collect(struct pmap *pmap) 3468 { 3469 } 3470 3471 /* 3472 * Routine: pmap_procwr 3473 * 3474 * Function: 3475 * Synchronize caches corresponding to [addr, addr+len) in p. 3476 * 3477 */ 3478 void 3479 pmap_procwr(struct proc *p, vaddr_t va, int len) 3480 { 3481 /* We only need to do anything if it is the current process. */ 3482 if (p == curproc) 3483 cpu_icache_sync_range(va, len); 3484 } 3485 /* 3486 * PTP functions 3487 */ 3488 3489 /* 3490 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3491 * 3492 * => pmap should NOT be pmap_kernel() 3493 * => pmap should be locked 3494 */ 3495 3496 static struct vm_page * 3497 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3498 { 3499 struct vm_page *ptp; 3500 3501 if (pmap_pde_page(pmap_pde(pmap, va))) { 3502 3503 /* valid... check hint (saves us a PA->PG lookup) */ 3504 if (pmap->pm_ptphint && 3505 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3506 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3507 return (pmap->pm_ptphint); 3508 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3509 #ifdef DIAGNOSTIC 3510 if (ptp == NULL) 3511 panic("pmap_get_ptp: unmanaged user PTP"); 3512 #endif 3513 pmap->pm_ptphint = ptp; 3514 return(ptp); 3515 } 3516 3517 /* allocate a new PTP (updates ptphint) */ 3518 return(pmap_alloc_ptp(pmap, va)); 3519 } 3520 3521 /* 3522 * pmap_alloc_ptp: allocate a PTP for a PMAP 3523 * 3524 * => pmap should already be locked by caller 3525 * => we use the ptp's wire_count to count the number of active mappings 3526 * in the PTP (we start it at one to prevent any chance this PTP 3527 * will ever leak onto the active/inactive queues) 3528 */ 3529 3530 /*__inline */ static struct vm_page * 3531 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3532 { 3533 struct vm_page *ptp; 3534 3535 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3536 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3537 if (ptp == NULL) 3538 return (NULL); 3539 3540 /* got one! */ 3541 ptp->flags &= ~PG_BUSY; /* never busy */ 3542 ptp->wire_count = 1; /* no mappings yet */ 3543 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), TRUE); 3544 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3545 pmap->pm_ptphint = ptp; 3546 return (ptp); 3547 } 3548 3549 vaddr_t 3550 pmap_growkernel(vaddr_t maxkvaddr) 3551 { 3552 struct pmap *kpm = pmap_kernel(), *pm; 3553 int s; 3554 paddr_t ptaddr; 3555 struct vm_page *ptp; 3556 3557 if (maxkvaddr <= pmap_curmaxkvaddr) 3558 goto out; /* we are OK */ 3559 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3560 pmap_curmaxkvaddr, maxkvaddr)); 3561 3562 /* 3563 * whoops! we need to add kernel PTPs 3564 */ 3565 3566 s = splhigh(); /* to be safe */ 3567 simple_lock(&kpm->pm_obj.vmobjlock); 3568 /* due to the way the arm pmap works we map 4MB at a time */ 3569 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3570 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3571 3572 if (uvm.page_init_done == FALSE) { 3573 3574 /* 3575 * we're growing the kernel pmap early (from 3576 * uvm_pageboot_alloc()). this case must be 3577 * handled a little differently. 3578 */ 3579 3580 if (uvm_page_physget(&ptaddr) == FALSE) 3581 panic("pmap_growkernel: out of memory"); 3582 pmap_zero_page(ptaddr); 3583 3584 /* map this page in */ 3585 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, TRUE); 3586 3587 /* count PTP as resident */ 3588 kpm->pm_stats.resident_count++; 3589 continue; 3590 } 3591 3592 /* 3593 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3594 * pmap_initialized == FALSE CASE! WE MAY BE 3595 * INVOKED WHILE pmap_init() IS RUNNING! 3596 */ 3597 3598 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3599 panic("pmap_growkernel: alloc ptp failed"); 3600 3601 /* distribute new kernel PTP to all active pmaps */ 3602 simple_lock(&pmaps_lock); 3603 LIST_FOREACH(pm, &pmaps, pm_list) { 3604 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3605 VM_PAGE_TO_PHYS(ptp), TRUE); 3606 } 3607 3608 /* Invalidate the PTPT cache. */ 3609 pool_cache_invalidate(&pmap_ptpt_cache); 3610 pmap_ptpt_cache_generation++; 3611 3612 simple_unlock(&pmaps_lock); 3613 } 3614 3615 /* 3616 * flush out the cache, expensive but growkernel will happen so 3617 * rarely 3618 */ 3619 cpu_tlb_flushD(); 3620 cpu_cpwait(); 3621 3622 simple_unlock(&kpm->pm_obj.vmobjlock); 3623 splx(s); 3624 3625 out: 3626 return (pmap_curmaxkvaddr); 3627 } 3628 3629 /************************ Utility routines ****************************/ 3630 3631 /* 3632 * vector_page_setprot: 3633 * 3634 * Manipulate the protection of the vector page. 3635 */ 3636 void 3637 vector_page_setprot(int prot) 3638 { 3639 pt_entry_t *pte; 3640 3641 pte = vtopte(vector_page); 3642 3643 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3644 cpu_tlb_flushD_SE(vector_page); 3645 cpu_cpwait(); 3646 } 3647 3648 /************************ Bootstrapping routines ****************************/ 3649 3650 /* 3651 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3652 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3653 * find them as necessary. 3654 * 3655 * Note that the data on this list is not valid after initarm() returns. 3656 */ 3657 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3658 3659 static vaddr_t 3660 kernel_pt_lookup(paddr_t pa) 3661 { 3662 pv_addr_t *pv; 3663 3664 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3665 if (pv->pv_pa == pa) 3666 return (pv->pv_va); 3667 } 3668 return (0); 3669 } 3670 3671 /* 3672 * pmap_map_section: 3673 * 3674 * Create a single section mapping. 3675 */ 3676 void 3677 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3678 { 3679 pd_entry_t *pde = (pd_entry_t *) l1pt; 3680 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3681 3682 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3683 3684 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3685 L1_S_PROT(PTE_KERNEL, prot) | fl; 3686 } 3687 3688 /* 3689 * pmap_map_entry: 3690 * 3691 * Create a single page mapping. 3692 */ 3693 void 3694 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3695 { 3696 pd_entry_t *pde = (pd_entry_t *) l1pt; 3697 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3698 pt_entry_t *pte; 3699 3700 KASSERT(((va | pa) & PGOFSET) == 0); 3701 3702 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3703 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3704 3705 pte = (pt_entry_t *) 3706 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3707 if (pte == NULL) 3708 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3709 3710 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3711 L2_S_PROT(PTE_KERNEL, prot) | fl; 3712 } 3713 3714 /* 3715 * pmap_link_l2pt: 3716 * 3717 * Link the L2 page table specified by "pa" into the L1 3718 * page table at the slot for "va". 3719 */ 3720 void 3721 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3722 { 3723 pd_entry_t *pde = (pd_entry_t *) l1pt; 3724 u_int slot = va >> L1_S_SHIFT; 3725 3726 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3727 3728 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3729 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3730 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3731 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3732 3733 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3734 } 3735 3736 /* 3737 * pmap_map_chunk: 3738 * 3739 * Map a chunk of memory using the most efficient mappings 3740 * possible (section, large page, small page) into the 3741 * provided L1 and L2 tables at the specified virtual address. 3742 */ 3743 vsize_t 3744 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3745 int prot, int cache) 3746 { 3747 pd_entry_t *pde = (pd_entry_t *) l1pt; 3748 pt_entry_t *pte, fl; 3749 vsize_t resid; 3750 int i; 3751 3752 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3753 3754 if (l1pt == 0) 3755 panic("pmap_map_chunk: no L1 table provided"); 3756 3757 #ifdef VERBOSE_INIT_ARM 3758 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3759 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3760 #endif 3761 3762 size = resid; 3763 3764 while (resid > 0) { 3765 /* See if we can use a section mapping. */ 3766 if (((pa | va) & L1_S_OFFSET) == 0 && 3767 resid >= L1_S_SIZE) { 3768 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3769 #ifdef VERBOSE_INIT_ARM 3770 printf("S"); 3771 #endif 3772 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3773 L1_S_PROT(PTE_KERNEL, prot) | fl; 3774 va += L1_S_SIZE; 3775 pa += L1_S_SIZE; 3776 resid -= L1_S_SIZE; 3777 continue; 3778 } 3779 3780 /* 3781 * Ok, we're going to use an L2 table. Make sure 3782 * one is actually in the corresponding L1 slot 3783 * for the current VA. 3784 */ 3785 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3786 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3787 3788 pte = (pt_entry_t *) 3789 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3790 if (pte == NULL) 3791 panic("pmap_map_chunk: can't find L2 table for VA" 3792 "0x%08lx", va); 3793 3794 /* See if we can use a L2 large page mapping. */ 3795 if (((pa | va) & L2_L_OFFSET) == 0 && 3796 resid >= L2_L_SIZE) { 3797 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3798 #ifdef VERBOSE_INIT_ARM 3799 printf("L"); 3800 #endif 3801 for (i = 0; i < 16; i++) { 3802 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3803 L2_L_PROTO | pa | 3804 L2_L_PROT(PTE_KERNEL, prot) | fl; 3805 } 3806 va += L2_L_SIZE; 3807 pa += L2_L_SIZE; 3808 resid -= L2_L_SIZE; 3809 continue; 3810 } 3811 3812 /* Use a small page mapping. */ 3813 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3814 #ifdef VERBOSE_INIT_ARM 3815 printf("P"); 3816 #endif 3817 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3818 L2_S_PROT(PTE_KERNEL, prot) | fl; 3819 va += NBPG; 3820 pa += NBPG; 3821 resid -= NBPG; 3822 } 3823 #ifdef VERBOSE_INIT_ARM 3824 printf("\n"); 3825 #endif 3826 return (size); 3827 } 3828 3829 /********************** PTE initialization routines **************************/ 3830 3831 /* 3832 * These routines are called when the CPU type is identified to set up 3833 * the PTE prototypes, cache modes, etc. 3834 * 3835 * The variables are always here, just in case LKMs need to reference 3836 * them (though, they shouldn't). 3837 */ 3838 3839 pt_entry_t pte_l1_s_cache_mode; 3840 pt_entry_t pte_l1_s_cache_mask; 3841 3842 pt_entry_t pte_l2_l_cache_mode; 3843 pt_entry_t pte_l2_l_cache_mask; 3844 3845 pt_entry_t pte_l2_s_cache_mode; 3846 pt_entry_t pte_l2_s_cache_mask; 3847 3848 pt_entry_t pte_l2_s_prot_u; 3849 pt_entry_t pte_l2_s_prot_w; 3850 pt_entry_t pte_l2_s_prot_mask; 3851 3852 pt_entry_t pte_l1_s_proto; 3853 pt_entry_t pte_l1_c_proto; 3854 pt_entry_t pte_l2_s_proto; 3855 3856 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3857 void (*pmap_zero_page_func)(paddr_t); 3858 3859 #if ARM_MMU_GENERIC == 1 3860 void 3861 pmap_pte_init_generic(void) 3862 { 3863 3864 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3865 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3866 3867 pte_l2_l_cache_mode = L2_B|L2_C; 3868 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3869 3870 pte_l2_s_cache_mode = L2_B|L2_C; 3871 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3872 3873 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3874 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3875 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3876 3877 pte_l1_s_proto = L1_S_PROTO_generic; 3878 pte_l1_c_proto = L1_C_PROTO_generic; 3879 pte_l2_s_proto = L2_S_PROTO_generic; 3880 3881 pmap_copy_page_func = pmap_copy_page_generic; 3882 pmap_zero_page_func = pmap_zero_page_generic; 3883 } 3884 3885 #if defined(CPU_ARM9) 3886 void 3887 pmap_pte_init_arm9(void) 3888 { 3889 3890 /* 3891 * ARM9 is compatible with generic, but we want to use 3892 * write-through caching for now. 3893 */ 3894 pmap_pte_init_generic(); 3895 3896 pte_l1_s_cache_mode = L1_S_C; 3897 pte_l2_l_cache_mode = L2_C; 3898 pte_l2_s_cache_mode = L2_C; 3899 } 3900 #endif /* CPU_ARM9 */ 3901 #endif /* ARM_MMU_GENERIC == 1 */ 3902 3903 #if ARM_MMU_XSCALE == 1 3904 void 3905 pmap_pte_init_xscale(void) 3906 { 3907 uint32_t auxctl; 3908 3909 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3910 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 3911 3912 pte_l2_l_cache_mode = L2_B|L2_C; 3913 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 3914 3915 pte_l2_s_cache_mode = L2_B|L2_C; 3916 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 3917 3918 #ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE 3919 /* 3920 * The XScale core has an enhanced mode where writes that 3921 * miss the cache cause a cache line to be allocated. This 3922 * is significantly faster than the traditional, write-through 3923 * behavior of this case. 3924 * 3925 * However, there is a bug lurking in this pmap module, or in 3926 * other parts of the VM system, or both, which causes corruption 3927 * of NFS-backed files when this cache mode is used. We have 3928 * an ugly work-around for this problem (disable r/w-allocate 3929 * for managed kernel mappings), but the bug is still evil enough 3930 * to consider this cache mode "experimental". 3931 */ 3932 pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X); 3933 pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X); 3934 pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X); 3935 #endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */ 3936 3937 #ifdef XSCALE_CACHE_WRITE_THROUGH 3938 /* 3939 * Some versions of the XScale core have various bugs in 3940 * their cache units, the work-around for which is to run 3941 * the cache in write-through mode. Unfortunately, this 3942 * has a major (negative) impact on performance. So, we 3943 * go ahead and run fast-and-loose, in the hopes that we 3944 * don't line up the planets in a way that will trip the 3945 * bugs. 3946 * 3947 * However, we give you the option to be slow-but-correct. 3948 */ 3949 pte_l1_s_cache_mode = L1_S_C; 3950 pte_l2_l_cache_mode = L2_C; 3951 pte_l2_s_cache_mode = L2_C; 3952 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 3953 3954 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 3955 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 3956 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 3957 3958 pte_l1_s_proto = L1_S_PROTO_xscale; 3959 pte_l1_c_proto = L1_C_PROTO_xscale; 3960 pte_l2_s_proto = L2_S_PROTO_xscale; 3961 3962 pmap_copy_page_func = pmap_copy_page_xscale; 3963 pmap_zero_page_func = pmap_zero_page_xscale; 3964 3965 /* 3966 * Disable ECC protection of page table access, for now. 3967 */ 3968 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 3969 : "=r" (auxctl)); 3970 auxctl &= ~XSCALE_AUXCTL_P; 3971 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 3972 : 3973 : "r" (auxctl)); 3974 } 3975 3976 /* 3977 * xscale_setup_minidata: 3978 * 3979 * Set up the mini-data cache clean area. We require the 3980 * caller to allocate the right amount of physically and 3981 * virtually contiguous space. 3982 */ 3983 void 3984 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 3985 { 3986 extern vaddr_t xscale_minidata_clean_addr; 3987 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 3988 pd_entry_t *pde = (pd_entry_t *) l1pt; 3989 pt_entry_t *pte; 3990 vsize_t size; 3991 uint32_t auxctl; 3992 3993 xscale_minidata_clean_addr = va; 3994 3995 /* Round it to page size. */ 3996 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 3997 3998 for (; size != 0; 3999 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4000 pte = (pt_entry_t *) 4001 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4002 if (pte == NULL) 4003 panic("xscale_setup_minidata: can't find L2 table for " 4004 "VA 0x%08lx", va); 4005 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4006 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4007 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4008 } 4009 4010 /* 4011 * Configure the mini-data cache for write-back with 4012 * read/write-allocate. 4013 * 4014 * NOTE: In order to reconfigure the mini-data cache, we must 4015 * make sure it contains no valid data! In order to do that, 4016 * we must issue a global data cache invalidate command! 4017 * 4018 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4019 * THIS IS VERY IMPORTANT! 4020 */ 4021 4022 /* Invalidate data and mini-data. */ 4023 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4024 : 4025 : "r" (auxctl)); 4026 4027 4028 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4029 : "=r" (auxctl)); 4030 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4031 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4032 : 4033 : "r" (auxctl)); 4034 } 4035 #endif /* ARM_MMU_XSCALE == 1 */ 4036
Indexes created Fri Sep 26 08:10:20 GMT 2025