pmap.c revision 1.114
1 /* $NetBSD: pmap.c,v 1.114 2002/08/24 02:50:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.114 2002/08/24 02:50:53 thorpej Exp $"); 147 #ifdef PMAP_DEBUG 148 #define PDEBUG(_lev_,_stat_) \ 149 if (pmap_debug_level >= (_lev_)) \ 150 ((_stat_)) 151 int pmap_debug_level = -2; 152 void pmap_dump_pvlist(vaddr_t phys, char *m); 153 154 /* 155 * for switching to potentially finer grained debugging 156 */ 157 #define PDB_FOLLOW 0x0001 158 #define PDB_INIT 0x0002 159 #define PDB_ENTER 0x0004 160 #define PDB_REMOVE 0x0008 161 #define PDB_CREATE 0x0010 162 #define PDB_PTPAGE 0x0020 163 #define PDB_GROWKERN 0x0040 164 #define PDB_BITS 0x0080 165 #define PDB_COLLECT 0x0100 166 #define PDB_PROTECT 0x0200 167 #define PDB_MAP_L1 0x0400 168 #define PDB_BOOTSTRAP 0x1000 169 #define PDB_PARANOIA 0x2000 170 #define PDB_WIRING 0x4000 171 #define PDB_PVDUMP 0x8000 172 173 int debugmap = 0; 174 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 175 #define NPDEBUG(_lev_,_stat_) \ 176 if (pmapdebug & (_lev_)) \ 177 ((_stat_)) 178 179 #else /* PMAP_DEBUG */ 180 #define PDEBUG(_lev_,_stat_) /* Nothing */ 181 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 182 #endif /* PMAP_DEBUG */ 183 184 struct pmap kernel_pmap_store; 185 186 /* 187 * linked list of all non-kernel pmaps 188 */ 189 190 static LIST_HEAD(, pmap) pmaps; 191 192 /* 193 * pool that pmap structures are allocated from 194 */ 195 196 struct pool pmap_pmap_pool; 197 198 /* 199 * pool/cache that PT-PT's are allocated from 200 */ 201 202 struct pool pmap_ptpt_pool; 203 struct pool_cache pmap_ptpt_cache; 204 u_int pmap_ptpt_cache_generation; 205 206 static void *pmap_ptpt_page_alloc(struct pool *, int); 207 static void pmap_ptpt_page_free(struct pool *, void *); 208 209 struct pool_allocator pmap_ptpt_allocator = { 210 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 211 }; 212 213 static int pmap_ptpt_ctor(void *, void *, int); 214 215 static pt_entry_t *csrc_pte, *cdst_pte; 216 static vaddr_t csrcp, cdstp; 217 218 char *memhook; 219 extern caddr_t msgbufaddr; 220 221 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 222 /* 223 * locking data structures 224 */ 225 226 static struct lock pmap_main_lock; 227 static struct simplelock pvalloc_lock; 228 static struct simplelock pmaps_lock; 229 #ifdef LOCKDEBUG 230 #define PMAP_MAP_TO_HEAD_LOCK() \ 231 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 232 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 233 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 234 235 #define PMAP_HEAD_TO_MAP_LOCK() \ 236 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 237 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 238 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 239 #else 240 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 241 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 242 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 244 #endif /* LOCKDEBUG */ 245 246 /* 247 * pv_page management structures: locked by pvalloc_lock 248 */ 249 250 TAILQ_HEAD(pv_pagelist, pv_page); 251 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 252 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 253 static int pv_nfpvents; /* # of free pv entries */ 254 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 255 static vaddr_t pv_cachedva; /* cached VA for later use */ 256 257 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 258 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 259 /* high water mark */ 260 261 /* 262 * local prototypes 263 */ 264 265 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 266 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 267 #define ALLOCPV_NEED 0 /* need PV now */ 268 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 269 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 270 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 271 static void pmap_enter_pv __P((struct vm_page *, 272 struct pv_entry *, struct pmap *, 273 vaddr_t, struct vm_page *, int)); 274 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 275 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 276 static void pmap_free_pv_doit __P((struct pv_entry *)); 277 static void pmap_free_pvpage __P((void)); 278 static boolean_t pmap_is_curpmap __P((struct pmap *)); 279 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 280 vaddr_t)); 281 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 282 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 283 284 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 285 u_int, u_int)); 286 287 /* 288 * Structure that describes and L1 table. 289 */ 290 struct l1pt { 291 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 292 struct pglist pt_plist; /* Allocated page list */ 293 vaddr_t pt_va; /* Allocated virtual address */ 294 int pt_flags; /* Flags */ 295 }; 296 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 297 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 298 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 299 300 static void pmap_free_l1pt __P((struct l1pt *)); 301 static int pmap_allocpagedir __P((struct pmap *)); 302 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 303 static void pmap_remove_all __P((struct vm_page *)); 304 305 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 306 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 307 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 308 309 extern paddr_t physical_start; 310 extern paddr_t physical_end; 311 extern unsigned int free_pages; 312 extern int max_processes; 313 314 vaddr_t virtual_avail; 315 vaddr_t virtual_end; 316 vaddr_t pmap_curmaxkvaddr; 317 318 vaddr_t avail_start; 319 vaddr_t avail_end; 320 321 extern pv_addr_t systempage; 322 323 /* Variables used by the L1 page table queue code */ 324 SIMPLEQ_HEAD(l1pt_queue, l1pt); 325 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 326 static int l1pt_static_queue_count; /* items in the static l1 queue */ 327 static int l1pt_static_create_count; /* static l1 items created */ 328 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 329 static int l1pt_queue_count; /* items in the l1 queue */ 330 static int l1pt_create_count; /* stat - L1's create count */ 331 static int l1pt_reuse_count; /* stat - L1's reused count */ 332 333 /* Local function prototypes (not used outside this file) */ 334 void pmap_pinit __P((struct pmap *)); 335 void pmap_freepagedir __P((struct pmap *)); 336 337 /* Other function prototypes */ 338 extern void bzero_page __P((vaddr_t)); 339 extern void bcopy_page __P((vaddr_t, vaddr_t)); 340 341 struct l1pt *pmap_alloc_l1pt __P((void)); 342 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 343 vaddr_t l2pa, int)); 344 345 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 346 static void pmap_unmap_ptes __P((struct pmap *)); 347 348 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 349 pt_entry_t *, boolean_t)); 350 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 351 pt_entry_t *, boolean_t)); 352 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 353 pt_entry_t *, boolean_t)); 354 355 /* 356 * real definition of pv_entry. 357 */ 358 359 struct pv_entry { 360 struct pv_entry *pv_next; /* next pv_entry */ 361 struct pmap *pv_pmap; /* pmap where mapping lies */ 362 vaddr_t pv_va; /* virtual address for mapping */ 363 int pv_flags; /* flags */ 364 struct vm_page *pv_ptp; /* vm_page for the ptp */ 365 }; 366 367 /* 368 * pv_entrys are dynamically allocated in chunks from a single page. 369 * we keep track of how many pv_entrys are in use for each page and 370 * we can free pv_entry pages if needed. there is one lock for the 371 * entire allocation system. 372 */ 373 374 struct pv_page_info { 375 TAILQ_ENTRY(pv_page) pvpi_list; 376 struct pv_entry *pvpi_pvfree; 377 int pvpi_nfree; 378 }; 379 380 /* 381 * number of pv_entry's in a pv_page 382 * (note: won't work on systems where NPBG isn't a constant) 383 */ 384 385 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 386 sizeof(struct pv_entry)) 387 388 /* 389 * a pv_page: where pv_entrys are allocated from 390 */ 391 392 struct pv_page { 393 struct pv_page_info pvinfo; 394 struct pv_entry pvents[PVE_PER_PVPAGE]; 395 }; 396 397 #ifdef MYCROFT_HACK 398 int mycroft_hack = 0; 399 #endif 400 401 /* Function to set the debug level of the pmap code */ 402 403 #ifdef PMAP_DEBUG 404 void 405 pmap_debug(int level) 406 { 407 pmap_debug_level = level; 408 printf("pmap_debug: level=%d\n", pmap_debug_level); 409 } 410 #endif /* PMAP_DEBUG */ 411 412 __inline static boolean_t 413 pmap_is_curpmap(struct pmap *pmap) 414 { 415 416 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 417 pmap == pmap_kernel()) 418 return (TRUE); 419 420 return (FALSE); 421 } 422 423 /* 424 * PTE_SYNC_CURRENT: 425 * 426 * Make sure the pte is flushed to RAM. If the pmap is 427 * not the current pmap, then also evict the pte from 428 * any cache lines. 429 */ 430 #define PTE_SYNC_CURRENT(pmap, pte) \ 431 do { \ 432 if (pmap_is_curpmap(pmap)) \ 433 PTE_SYNC(pte); \ 434 else \ 435 PTE_FLUSH(pte); \ 436 } while (/*CONSTCOND*/0) 437 438 /* 439 * PTE_FLUSH_ALT: 440 * 441 * Make sure the pte is not in any cache lines. We expect 442 * this to be used only when a pte has not been modified. 443 */ 444 #define PTE_FLUSH_ALT(pmap, pte) \ 445 do { \ 446 if (pmap_is_curpmap(pmap) == 0) \ 447 PTE_FLUSH(pte); \ 448 } while (/*CONSTCOND*/0) 449 450 /* 451 * p v _ e n t r y f u n c t i o n s 452 */ 453 454 /* 455 * pv_entry allocation functions: 456 * the main pv_entry allocation functions are: 457 * pmap_alloc_pv: allocate a pv_entry structure 458 * pmap_free_pv: free one pv_entry 459 * pmap_free_pvs: free a list of pv_entrys 460 * 461 * the rest are helper functions 462 */ 463 464 /* 465 * pmap_alloc_pv: inline function to allocate a pv_entry structure 466 * => we lock pvalloc_lock 467 * => if we fail, we call out to pmap_alloc_pvpage 468 * => 3 modes: 469 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 470 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 471 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 472 * one now 473 * 474 * "try" is for optional functions like pmap_copy(). 475 */ 476 477 __inline static struct pv_entry * 478 pmap_alloc_pv(struct pmap *pmap, int mode) 479 { 480 struct pv_page *pvpage; 481 struct pv_entry *pv; 482 483 simple_lock(&pvalloc_lock); 484 485 pvpage = TAILQ_FIRST(&pv_freepages); 486 487 if (pvpage != NULL) { 488 pvpage->pvinfo.pvpi_nfree--; 489 if (pvpage->pvinfo.pvpi_nfree == 0) { 490 /* nothing left in this one? */ 491 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 492 } 493 pv = pvpage->pvinfo.pvpi_pvfree; 494 KASSERT(pv); 495 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 496 pv_nfpvents--; /* took one from pool */ 497 } else { 498 pv = NULL; /* need more of them */ 499 } 500 501 /* 502 * if below low water mark or we didn't get a pv_entry we try and 503 * create more pv_entrys ... 504 */ 505 506 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 507 if (pv == NULL) 508 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 509 mode : ALLOCPV_NEED); 510 else 511 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 512 } 513 514 simple_unlock(&pvalloc_lock); 515 return(pv); 516 } 517 518 /* 519 * pmap_alloc_pvpage: maybe allocate a new pvpage 520 * 521 * if need_entry is false: try and allocate a new pv_page 522 * if need_entry is true: try and allocate a new pv_page and return a 523 * new pv_entry from it. if we are unable to allocate a pv_page 524 * we make a last ditch effort to steal a pv_page from some other 525 * mapping. if that fails, we panic... 526 * 527 * => we assume that the caller holds pvalloc_lock 528 */ 529 530 static struct pv_entry * 531 pmap_alloc_pvpage(struct pmap *pmap, int mode) 532 { 533 struct vm_page *pg; 534 struct pv_page *pvpage; 535 struct pv_entry *pv; 536 int s; 537 538 /* 539 * if we need_entry and we've got unused pv_pages, allocate from there 540 */ 541 542 pvpage = TAILQ_FIRST(&pv_unusedpgs); 543 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 544 545 /* move it to pv_freepages list */ 546 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 547 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 548 549 /* allocate a pv_entry */ 550 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 551 pv = pvpage->pvinfo.pvpi_pvfree; 552 KASSERT(pv); 553 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 554 555 pv_nfpvents--; /* took one from pool */ 556 return(pv); 557 } 558 559 /* 560 * see if we've got a cached unmapped VA that we can map a page in. 561 * if not, try to allocate one. 562 */ 563 564 565 if (pv_cachedva == 0) { 566 s = splvm(); 567 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 568 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 569 splx(s); 570 if (pv_cachedva == 0) { 571 return (NULL); 572 } 573 } 574 575 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 576 UVM_PGA_USERESERVE); 577 578 if (pg == NULL) 579 return (NULL); 580 pg->flags &= ~PG_BUSY; /* never busy */ 581 582 /* 583 * add a mapping for our new pv_page and free its entrys (save one!) 584 * 585 * NOTE: If we are allocating a PV page for the kernel pmap, the 586 * pmap is already locked! (...but entering the mapping is safe...) 587 */ 588 589 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 590 VM_PROT_READ|VM_PROT_WRITE); 591 pmap_update(pmap_kernel()); 592 pvpage = (struct pv_page *) pv_cachedva; 593 pv_cachedva = 0; 594 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 595 } 596 597 /* 598 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 599 * 600 * => caller must hold pvalloc_lock 601 * => if need_entry is true, we allocate and return one pv_entry 602 */ 603 604 static struct pv_entry * 605 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 606 { 607 int tofree, lcv; 608 609 /* do we need to return one? */ 610 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 611 612 pvp->pvinfo.pvpi_pvfree = NULL; 613 pvp->pvinfo.pvpi_nfree = tofree; 614 for (lcv = 0 ; lcv < tofree ; lcv++) { 615 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 616 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 617 } 618 if (need_entry) 619 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 620 else 621 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 622 pv_nfpvents += tofree; 623 return((need_entry) ? &pvp->pvents[lcv] : NULL); 624 } 625 626 /* 627 * pmap_free_pv_doit: actually free a pv_entry 628 * 629 * => do not call this directly! instead use either 630 * 1. pmap_free_pv ==> free a single pv_entry 631 * 2. pmap_free_pvs => free a list of pv_entrys 632 * => we must be holding pvalloc_lock 633 */ 634 635 __inline static void 636 pmap_free_pv_doit(struct pv_entry *pv) 637 { 638 struct pv_page *pvp; 639 640 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 641 pv_nfpvents++; 642 pvp->pvinfo.pvpi_nfree++; 643 644 /* nfree == 1 => fully allocated page just became partly allocated */ 645 if (pvp->pvinfo.pvpi_nfree == 1) { 646 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 647 } 648 649 /* free it */ 650 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 651 pvp->pvinfo.pvpi_pvfree = pv; 652 653 /* 654 * are all pv_page's pv_entry's free? move it to unused queue. 655 */ 656 657 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 658 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 659 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 660 } 661 } 662 663 /* 664 * pmap_free_pv: free a single pv_entry 665 * 666 * => we gain the pvalloc_lock 667 */ 668 669 __inline static void 670 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 671 { 672 simple_lock(&pvalloc_lock); 673 pmap_free_pv_doit(pv); 674 675 /* 676 * Can't free the PV page if the PV entries were associated with 677 * the kernel pmap; the pmap is already locked. 678 */ 679 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 680 pmap != pmap_kernel()) 681 pmap_free_pvpage(); 682 683 simple_unlock(&pvalloc_lock); 684 } 685 686 /* 687 * pmap_free_pvs: free a list of pv_entrys 688 * 689 * => we gain the pvalloc_lock 690 */ 691 692 __inline static void 693 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 694 { 695 struct pv_entry *nextpv; 696 697 simple_lock(&pvalloc_lock); 698 699 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 700 nextpv = pvs->pv_next; 701 pmap_free_pv_doit(pvs); 702 } 703 704 /* 705 * Can't free the PV page if the PV entries were associated with 706 * the kernel pmap; the pmap is already locked. 707 */ 708 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 709 pmap != pmap_kernel()) 710 pmap_free_pvpage(); 711 712 simple_unlock(&pvalloc_lock); 713 } 714 715 716 /* 717 * pmap_free_pvpage: try and free an unused pv_page structure 718 * 719 * => assume caller is holding the pvalloc_lock and that 720 * there is a page on the pv_unusedpgs list 721 * => if we can't get a lock on the kmem_map we try again later 722 */ 723 724 static void 725 pmap_free_pvpage(void) 726 { 727 int s; 728 struct vm_map *map; 729 struct vm_map_entry *dead_entries; 730 struct pv_page *pvp; 731 732 s = splvm(); /* protect kmem_map */ 733 734 pvp = TAILQ_FIRST(&pv_unusedpgs); 735 736 /* 737 * note: watch out for pv_initpage which is allocated out of 738 * kernel_map rather than kmem_map. 739 */ 740 if (pvp == pv_initpage) 741 map = kernel_map; 742 else 743 map = kmem_map; 744 if (vm_map_lock_try(map)) { 745 746 /* remove pvp from pv_unusedpgs */ 747 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 748 749 /* unmap the page */ 750 dead_entries = NULL; 751 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 752 &dead_entries); 753 vm_map_unlock(map); 754 755 if (dead_entries != NULL) 756 uvm_unmap_detach(dead_entries, 0); 757 758 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 759 } 760 if (pvp == pv_initpage) 761 /* no more initpage, we've freed it */ 762 pv_initpage = NULL; 763 764 splx(s); 765 } 766 767 /* 768 * main pv_entry manipulation functions: 769 * pmap_enter_pv: enter a mapping onto a vm_page list 770 * pmap_remove_pv: remove a mappiing from a vm_page list 771 * 772 * NOTE: pmap_enter_pv expects to lock the pvh itself 773 * pmap_remove_pv expects te caller to lock the pvh before calling 774 */ 775 776 /* 777 * pmap_enter_pv: enter a mapping onto a vm_page lst 778 * 779 * => caller should hold the proper lock on pmap_main_lock 780 * => caller should have pmap locked 781 * => we will gain the lock on the vm_page and allocate the new pv_entry 782 * => caller should adjust ptp's wire_count before calling 783 * => caller should not adjust pmap's wire_count 784 */ 785 786 __inline static void 787 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 788 vaddr_t va, struct vm_page *ptp, int flags) 789 { 790 pve->pv_pmap = pmap; 791 pve->pv_va = va; 792 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 793 pve->pv_flags = flags; 794 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 795 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 796 pg->mdpage.pvh_list = pve; /* ... locked list */ 797 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 798 if (pve->pv_flags & PVF_WIRED) 799 ++pmap->pm_stats.wired_count; 800 #ifdef PMAP_ALIAS_DEBUG 801 { 802 int s = splhigh(); 803 if (pve->pv_flags & PVF_WRITE) 804 pg->mdpage.rw_mappings++; 805 else 806 pg->mdpage.ro_mappings++; 807 if (pg->mdpage.rw_mappings != 0 && 808 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 809 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 810 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 811 pg->mdpage.krw_mappings); 812 } 813 splx(s); 814 } 815 #endif /* PMAP_ALIAS_DEBUG */ 816 } 817 818 /* 819 * pmap_remove_pv: try to remove a mapping from a pv_list 820 * 821 * => caller should hold proper lock on pmap_main_lock 822 * => pmap should be locked 823 * => caller should hold lock on vm_page [so that attrs can be adjusted] 824 * => caller should adjust ptp's wire_count and free PTP if needed 825 * => caller should NOT adjust pmap's wire_count 826 * => we return the removed pve 827 */ 828 829 __inline static struct pv_entry * 830 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 831 { 832 struct pv_entry *pve, **prevptr; 833 834 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 835 pve = *prevptr; 836 while (pve) { 837 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 838 *prevptr = pve->pv_next; /* remove it! */ 839 if (pve->pv_flags & PVF_WIRED) 840 --pmap->pm_stats.wired_count; 841 #ifdef PMAP_ALIAS_DEBUG 842 { 843 int s = splhigh(); 844 if (pve->pv_flags & PVF_WRITE) { 845 KASSERT(pg->mdpage.rw_mappings != 0); 846 pg->mdpage.rw_mappings--; 847 } else { 848 KASSERT(pg->mdpage.ro_mappings != 0); 849 pg->mdpage.ro_mappings--; 850 } 851 splx(s); 852 } 853 #endif /* PMAP_ALIAS_DEBUG */ 854 break; 855 } 856 prevptr = &pve->pv_next; /* previous pointer */ 857 pve = pve->pv_next; /* advance */ 858 } 859 return(pve); /* return removed pve */ 860 } 861 862 /* 863 * 864 * pmap_modify_pv: Update pv flags 865 * 866 * => caller should hold lock on vm_page [so that attrs can be adjusted] 867 * => caller should NOT adjust pmap's wire_count 868 * => caller must call pmap_vac_me_harder() if writable status of a page 869 * may have changed. 870 * => we return the old flags 871 * 872 * Modify a physical-virtual mapping in the pv table 873 */ 874 875 static /* __inline */ u_int 876 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 877 u_int bic_mask, u_int eor_mask) 878 { 879 struct pv_entry *npv; 880 u_int flags, oflags; 881 882 /* 883 * There is at least one VA mapping this page. 884 */ 885 886 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 887 if (pmap == npv->pv_pmap && va == npv->pv_va) { 888 oflags = npv->pv_flags; 889 npv->pv_flags = flags = 890 ((oflags & ~bic_mask) ^ eor_mask); 891 if ((flags ^ oflags) & PVF_WIRED) { 892 if (flags & PVF_WIRED) 893 ++pmap->pm_stats.wired_count; 894 else 895 --pmap->pm_stats.wired_count; 896 } 897 #ifdef PMAP_ALIAS_DEBUG 898 { 899 int s = splhigh(); 900 if ((flags ^ oflags) & PVF_WRITE) { 901 if (flags & PVF_WRITE) { 902 pg->mdpage.rw_mappings++; 903 pg->mdpage.ro_mappings--; 904 if (pg->mdpage.rw_mappings != 0 && 905 (pg->mdpage.kro_mappings != 0 || 906 pg->mdpage.krw_mappings != 0)) { 907 printf("pmap_modify_pv: rw %u, " 908 "kro %u, krw %u\n", 909 pg->mdpage.rw_mappings, 910 pg->mdpage.kro_mappings, 911 pg->mdpage.krw_mappings); 912 } 913 } else { 914 KASSERT(pg->mdpage.rw_mappings != 0); 915 pg->mdpage.rw_mappings--; 916 pg->mdpage.ro_mappings++; 917 } 918 } 919 splx(s); 920 } 921 #endif /* PMAP_ALIAS_DEBUG */ 922 return (oflags); 923 } 924 } 925 return (0); 926 } 927 928 /* 929 * Map the specified level 2 pagetable into the level 1 page table for 930 * the given pmap to cover a chunk of virtual address space starting from the 931 * address specified. 932 */ 933 #define PMAP_PTP_SELFREF 0x01 934 #define PMAP_PTP_CACHEABLE 0x02 935 936 static __inline void 937 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, int flags) 938 { 939 vaddr_t ptva; 940 941 /* Calculate the index into the L1 page table. */ 942 ptva = (va >> L1_S_SHIFT) & ~3; 943 944 /* Map page table into the L1. */ 945 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 946 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 947 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 948 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 949 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 950 951 /* Map the page table into the page table area. */ 952 if (flags & PMAP_PTP_SELFREF) { 953 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 954 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE) | 955 ((flags & PMAP_PTP_CACHEABLE) ? pte_l2_s_cache_mode : 0); 956 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 957 } 958 } 959 960 #if 0 961 static __inline void 962 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 963 { 964 vaddr_t ptva; 965 966 /* Calculate the index into the L1 page table. */ 967 ptva = (va >> L1_S_SHIFT) & ~3; 968 969 /* Unmap page table from the L1. */ 970 pmap->pm_pdir[ptva + 0] = 0; 971 pmap->pm_pdir[ptva + 1] = 0; 972 pmap->pm_pdir[ptva + 2] = 0; 973 pmap->pm_pdir[ptva + 3] = 0; 974 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 975 976 /* Unmap the page table from the page table area. */ 977 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 978 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 979 } 980 #endif 981 982 /* 983 * Used to map a range of physical addresses into kernel 984 * virtual address space. 985 * 986 * For now, VM is already on, we only need to map the 987 * specified memory. 988 * 989 * XXX This routine should eventually go away; it's only used 990 * XXX by machine-dependent crash dump code. 991 */ 992 vaddr_t 993 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 994 { 995 pt_entry_t *pte; 996 997 while (spa < epa) { 998 pte = vtopte(va); 999 1000 *pte = L2_S_PROTO | spa | 1001 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 1002 PTE_SYNC(pte); 1003 cpu_tlb_flushID_SE(va); 1004 va += NBPG; 1005 spa += NBPG; 1006 } 1007 pmap_update(pmap_kernel()); 1008 return(va); 1009 } 1010 1011 1012 /* 1013 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1014 * 1015 * bootstrap the pmap system. This is called from initarm and allows 1016 * the pmap system to initailise any structures it requires. 1017 * 1018 * Currently this sets up the kernel_pmap that is statically allocated 1019 * and also allocated virtual addresses for certain page hooks. 1020 * Currently the only one page hook is allocated that is used 1021 * to zero physical pages of memory. 1022 * It also initialises the start and end address of the kernel data space. 1023 */ 1024 1025 char *boot_head; 1026 1027 void 1028 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1029 { 1030 pt_entry_t *pte; 1031 1032 pmap_kernel()->pm_pdir = kernel_l1pt; 1033 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 1034 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1035 simple_lock_init(&pmap_kernel()->pm_lock); 1036 pmap_kernel()->pm_obj.pgops = NULL; 1037 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1038 pmap_kernel()->pm_obj.uo_npages = 0; 1039 pmap_kernel()->pm_obj.uo_refs = 1; 1040 1041 virtual_avail = KERNEL_VM_BASE; 1042 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1043 1044 /* 1045 * now we allocate the "special" VAs which are used for tmp mappings 1046 * by the pmap (and other modules). we allocate the VAs by advancing 1047 * virtual_avail (note that there are no pages mapped at these VAs). 1048 * we find the PTE that maps the allocated VA via the linear PTE 1049 * mapping. 1050 */ 1051 1052 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1053 1054 csrcp = virtual_avail; csrc_pte = pte; 1055 virtual_avail += PAGE_SIZE; pte++; 1056 1057 cdstp = virtual_avail; cdst_pte = pte; 1058 virtual_avail += PAGE_SIZE; pte++; 1059 1060 memhook = (char *) virtual_avail; /* don't need pte */ 1061 virtual_avail += PAGE_SIZE; pte++; 1062 1063 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1064 virtual_avail += round_page(MSGBUFSIZE); 1065 pte += atop(round_page(MSGBUFSIZE)); 1066 1067 /* 1068 * init the static-global locks and global lists. 1069 */ 1070 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1071 simple_lock_init(&pvalloc_lock); 1072 simple_lock_init(&pmaps_lock); 1073 LIST_INIT(&pmaps); 1074 TAILQ_INIT(&pv_freepages); 1075 TAILQ_INIT(&pv_unusedpgs); 1076 1077 /* 1078 * initialize the pmap pool. 1079 */ 1080 1081 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1082 &pool_allocator_nointr); 1083 1084 /* 1085 * initialize the PT-PT pool and cache. 1086 */ 1087 1088 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1089 &pmap_ptpt_allocator); 1090 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1091 pmap_ptpt_ctor, NULL, NULL); 1092 1093 cpu_dcache_wbinv_all(); 1094 } 1095 1096 /* 1097 * void pmap_init(void) 1098 * 1099 * Initialize the pmap module. 1100 * Called by vm_init() in vm/vm_init.c in order to initialise 1101 * any structures that the pmap system needs to map virtual memory. 1102 */ 1103 1104 extern int physmem; 1105 1106 void 1107 pmap_init(void) 1108 { 1109 1110 /* 1111 * Set the available memory vars - These do not map to real memory 1112 * addresses and cannot as the physical memory is fragmented. 1113 * They are used by ps for %mem calculations. 1114 * One could argue whether this should be the entire memory or just 1115 * the memory that is useable in a user process. 1116 */ 1117 avail_start = 0; 1118 avail_end = physmem * NBPG; 1119 1120 /* 1121 * now we need to free enough pv_entry structures to allow us to get 1122 * the kmem_map/kmem_object allocated and inited (done after this 1123 * function is finished). to do this we allocate one bootstrap page out 1124 * of kernel_map and use it to provide an initial pool of pv_entry 1125 * structures. we never free this page. 1126 */ 1127 1128 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1129 if (pv_initpage == NULL) 1130 panic("pmap_init: pv_initpage"); 1131 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1132 pv_nfpvents = 0; 1133 (void) pmap_add_pvpage(pv_initpage, FALSE); 1134 1135 pmap_initialized = TRUE; 1136 1137 /* Initialise our L1 page table queues and counters */ 1138 SIMPLEQ_INIT(&l1pt_static_queue); 1139 l1pt_static_queue_count = 0; 1140 l1pt_static_create_count = 0; 1141 SIMPLEQ_INIT(&l1pt_queue); 1142 l1pt_queue_count = 0; 1143 l1pt_create_count = 0; 1144 l1pt_reuse_count = 0; 1145 } 1146 1147 /* 1148 * pmap_postinit() 1149 * 1150 * This routine is called after the vm and kmem subsystems have been 1151 * initialised. This allows the pmap code to perform any initialisation 1152 * that can only be done one the memory allocation is in place. 1153 */ 1154 1155 void 1156 pmap_postinit(void) 1157 { 1158 int loop; 1159 struct l1pt *pt; 1160 1161 #ifdef PMAP_STATIC_L1S 1162 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1163 #else /* PMAP_STATIC_L1S */ 1164 for (loop = 0; loop < max_processes; ++loop) { 1165 #endif /* PMAP_STATIC_L1S */ 1166 /* Allocate a L1 page table */ 1167 pt = pmap_alloc_l1pt(); 1168 if (!pt) 1169 panic("Cannot allocate static L1 page tables\n"); 1170 1171 /* Clean it */ 1172 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1173 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1174 /* Add the page table to the queue */ 1175 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1176 ++l1pt_static_queue_count; 1177 ++l1pt_static_create_count; 1178 } 1179 } 1180 1181 1182 /* 1183 * Create and return a physical map. 1184 * 1185 * If the size specified for the map is zero, the map is an actual physical 1186 * map, and may be referenced by the hardware. 1187 * 1188 * If the size specified is non-zero, the map will be used in software only, 1189 * and is bounded by that size. 1190 */ 1191 1192 pmap_t 1193 pmap_create(void) 1194 { 1195 struct pmap *pmap; 1196 1197 /* 1198 * Fetch pmap entry from the pool 1199 */ 1200 1201 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1202 /* XXX is this really needed! */ 1203 memset(pmap, 0, sizeof(*pmap)); 1204 1205 simple_lock_init(&pmap->pm_obj.vmobjlock); 1206 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1207 TAILQ_INIT(&pmap->pm_obj.memq); 1208 pmap->pm_obj.uo_npages = 0; 1209 pmap->pm_obj.uo_refs = 1; 1210 pmap->pm_stats.wired_count = 0; 1211 pmap->pm_stats.resident_count = 1; 1212 pmap->pm_ptphint = NULL; 1213 1214 /* Now init the machine part of the pmap */ 1215 pmap_pinit(pmap); 1216 return(pmap); 1217 } 1218 1219 /* 1220 * pmap_alloc_l1pt() 1221 * 1222 * This routine allocates physical and virtual memory for a L1 page table 1223 * and wires it. 1224 * A l1pt structure is returned to describe the allocated page table. 1225 * 1226 * This routine is allowed to fail if the required memory cannot be allocated. 1227 * In this case NULL is returned. 1228 */ 1229 1230 struct l1pt * 1231 pmap_alloc_l1pt(void) 1232 { 1233 paddr_t pa; 1234 vaddr_t va; 1235 struct l1pt *pt; 1236 int error; 1237 struct vm_page *m; 1238 1239 /* Allocate virtual address space for the L1 page table */ 1240 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1241 if (va == 0) { 1242 #ifdef DIAGNOSTIC 1243 PDEBUG(0, 1244 printf("pmap: Cannot allocate pageable memory for L1\n")); 1245 #endif /* DIAGNOSTIC */ 1246 return(NULL); 1247 } 1248 1249 /* Allocate memory for the l1pt structure */ 1250 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1251 1252 /* 1253 * Allocate pages from the VM system. 1254 */ 1255 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1256 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1257 if (error) { 1258 #ifdef DIAGNOSTIC 1259 PDEBUG(0, 1260 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1261 error)); 1262 #endif /* DIAGNOSTIC */ 1263 /* Release the resources we already have claimed */ 1264 free(pt, M_VMPMAP); 1265 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1266 return(NULL); 1267 } 1268 1269 /* Map our physical pages into our virtual space */ 1270 pt->pt_va = va; 1271 m = TAILQ_FIRST(&pt->pt_plist); 1272 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1273 pa = VM_PAGE_TO_PHYS(m); 1274 1275 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE); 1276 1277 va += NBPG; 1278 m = m->pageq.tqe_next; 1279 } 1280 1281 #ifdef DIAGNOSTIC 1282 if (m) 1283 panic("pmap_alloc_l1pt: pglist not empty\n"); 1284 #endif /* DIAGNOSTIC */ 1285 1286 pt->pt_flags = 0; 1287 return(pt); 1288 } 1289 1290 /* 1291 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1292 */ 1293 static void 1294 pmap_free_l1pt(struct l1pt *pt) 1295 { 1296 /* Separate the physical memory for the virtual space */ 1297 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1298 pmap_update(pmap_kernel()); 1299 1300 /* Return the physical memory */ 1301 uvm_pglistfree(&pt->pt_plist); 1302 1303 /* Free the virtual space */ 1304 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1305 1306 /* Free the l1pt structure */ 1307 free(pt, M_VMPMAP); 1308 } 1309 1310 /* 1311 * pmap_ptpt_page_alloc: 1312 * 1313 * Back-end page allocator for the PT-PT pool. 1314 */ 1315 static void * 1316 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1317 { 1318 struct vm_page *pg; 1319 pt_entry_t *pte; 1320 vaddr_t va; 1321 1322 /* XXX PR_WAITOK? */ 1323 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1324 if (va == 0) 1325 return (NULL); 1326 1327 for (;;) { 1328 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1329 if (pg != NULL) 1330 break; 1331 if ((flags & PR_WAITOK) == 0) { 1332 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1333 return (NULL); 1334 } 1335 uvm_wait("pmap_ptpt"); 1336 } 1337 1338 pte = vtopte(va); 1339 KDASSERT(pmap_pte_v(pte) == 0); 1340 1341 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1342 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1343 PTE_SYNC(pte); 1344 #ifdef PMAP_ALIAS_DEBUG 1345 { 1346 int s = splhigh(); 1347 pg->mdpage.krw_mappings++; 1348 splx(s); 1349 } 1350 #endif /* PMAP_ALIAS_DEBUG */ 1351 1352 return ((void *) va); 1353 } 1354 1355 /* 1356 * pmap_ptpt_page_free: 1357 * 1358 * Back-end page free'er for the PT-PT pool. 1359 */ 1360 static void 1361 pmap_ptpt_page_free(struct pool *pp, void *v) 1362 { 1363 vaddr_t va = (vaddr_t) v; 1364 paddr_t pa; 1365 1366 pa = vtophys(va); 1367 1368 pmap_kremove(va, L2_TABLE_SIZE); 1369 pmap_update(pmap_kernel()); 1370 1371 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1372 1373 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1374 } 1375 1376 /* 1377 * pmap_ptpt_ctor: 1378 * 1379 * Constructor for the PT-PT cache. 1380 */ 1381 static int 1382 pmap_ptpt_ctor(void *arg, void *object, int flags) 1383 { 1384 caddr_t vptpt = object; 1385 1386 /* Page is already zero'd. */ 1387 1388 /* 1389 * Map in kernel PTs. 1390 * 1391 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1392 */ 1393 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1394 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1395 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1396 (KERNEL_PD_SIZE >> 2)); 1397 1398 return (0); 1399 } 1400 1401 /* 1402 * Allocate a page directory. 1403 * This routine will either allocate a new page directory from the pool 1404 * of L1 page tables currently held by the kernel or it will allocate 1405 * a new one via pmap_alloc_l1pt(). 1406 * It will then initialise the l1 page table for use. 1407 */ 1408 static int 1409 pmap_allocpagedir(struct pmap *pmap) 1410 { 1411 vaddr_t vptpt; 1412 paddr_t pa; 1413 struct l1pt *pt; 1414 u_int gen; 1415 1416 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1417 1418 /* Do we have any spare L1's lying around ? */ 1419 if (l1pt_static_queue_count) { 1420 --l1pt_static_queue_count; 1421 pt = SIMPLEQ_FIRST(&l1pt_static_queue); 1422 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt_queue); 1423 } else if (l1pt_queue_count) { 1424 --l1pt_queue_count; 1425 pt = SIMPLEQ_FIRST(&l1pt_queue); 1426 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt_queue); 1427 ++l1pt_reuse_count; 1428 } else { 1429 pt = pmap_alloc_l1pt(); 1430 if (!pt) 1431 return(ENOMEM); 1432 ++l1pt_create_count; 1433 } 1434 1435 /* Store the pointer to the l1 descriptor in the pmap. */ 1436 pmap->pm_l1pt = pt; 1437 1438 /* Get the physical address of the start of the l1 */ 1439 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1440 1441 /* Store the virtual address of the l1 in the pmap. */ 1442 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1443 1444 /* Clean the L1 if it is dirty */ 1445 if (!(pt->pt_flags & PTFLAG_CLEAN)) { 1446 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1447 cpu_dcache_wb_range((vaddr_t) pmap->pm_pdir, 1448 (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1449 } 1450 1451 /* Allocate a page table to map all the page tables for this pmap */ 1452 KASSERT(pmap->pm_vptpt == 0); 1453 1454 try_again: 1455 gen = pmap_ptpt_cache_generation; 1456 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1457 if (vptpt == NULL) { 1458 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1459 pmap_freepagedir(pmap); 1460 return (ENOMEM); 1461 } 1462 1463 /* need to lock this all up for growkernel */ 1464 simple_lock(&pmaps_lock); 1465 1466 if (gen != pmap_ptpt_cache_generation) { 1467 simple_unlock(&pmaps_lock); 1468 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1469 goto try_again; 1470 } 1471 1472 pmap->pm_vptpt = vptpt; 1473 pmap->pm_pptpt = vtophys(vptpt); 1474 1475 /* Duplicate the kernel mappings. */ 1476 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1477 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1478 KERNEL_PD_SIZE); 1479 cpu_dcache_wb_range((vaddr_t)pmap->pm_pdir + 1480 (L1_TABLE_SIZE - KERNEL_PD_SIZE), KERNEL_PD_SIZE); 1481 1482 /* Wire in this page table */ 1483 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, PMAP_PTP_SELFREF); 1484 1485 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1486 1487 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1488 simple_unlock(&pmaps_lock); 1489 1490 return(0); 1491 } 1492 1493 1494 /* 1495 * Initialize a preallocated and zeroed pmap structure, 1496 * such as one in a vmspace structure. 1497 */ 1498 1499 void 1500 pmap_pinit(struct pmap *pmap) 1501 { 1502 int backoff = 6; 1503 int retry = 10; 1504 1505 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1506 1507 /* Keep looping until we succeed in allocating a page directory */ 1508 while (pmap_allocpagedir(pmap) != 0) { 1509 /* 1510 * Ok we failed to allocate a suitable block of memory for an 1511 * L1 page table. This means that either: 1512 * 1. 16KB of virtual address space could not be allocated 1513 * 2. 16KB of physically contiguous memory on a 16KB boundary 1514 * could not be allocated. 1515 * 1516 * Since we cannot fail we will sleep for a while and try 1517 * again. 1518 * 1519 * Searching for a suitable L1 PT is expensive: 1520 * to avoid hogging the system when memory is really 1521 * scarce, use an exponential back-off so that 1522 * eventually we won't retry more than once every 8 1523 * seconds. This should allow other processes to run 1524 * to completion and free up resources. 1525 */ 1526 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1527 NULL); 1528 if (--retry == 0) { 1529 retry = 10; 1530 if (backoff) 1531 --backoff; 1532 } 1533 } 1534 1535 if (vector_page < KERNEL_BASE) { 1536 /* 1537 * Map the vector page. This will also allocate and map 1538 * an L2 table for it. 1539 */ 1540 pmap_enter(pmap, vector_page, systempage.pv_pa, 1541 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1542 pmap_update(pmap); 1543 } 1544 } 1545 1546 void 1547 pmap_freepagedir(struct pmap *pmap) 1548 { 1549 /* Free the memory used for the page table mapping */ 1550 if (pmap->pm_vptpt != 0) { 1551 /* 1552 * XXX Objects freed to a pool cache must be in constructed 1553 * XXX form when freed, but we don't free page tables as we 1554 * XXX go, so we need to zap the mappings here. 1555 * 1556 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1557 */ 1558 memset((caddr_t) pmap->pm_vptpt, 0, 1559 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1560 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1561 } 1562 1563 /* junk the L1 page table */ 1564 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1565 /* Add the page table to the queue */ 1566 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1567 pmap->pm_l1pt, pt_queue); 1568 ++l1pt_static_queue_count; 1569 } else if (l1pt_queue_count < 8) { 1570 /* Add the page table to the queue */ 1571 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1572 ++l1pt_queue_count; 1573 } else 1574 pmap_free_l1pt(pmap->pm_l1pt); 1575 } 1576 1577 /* 1578 * Retire the given physical map from service. 1579 * Should only be called if the map contains no valid mappings. 1580 */ 1581 1582 void 1583 pmap_destroy(struct pmap *pmap) 1584 { 1585 struct vm_page *page; 1586 int count; 1587 1588 if (pmap == NULL) 1589 return; 1590 1591 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1592 1593 /* 1594 * Drop reference count 1595 */ 1596 simple_lock(&pmap->pm_obj.vmobjlock); 1597 count = --pmap->pm_obj.uo_refs; 1598 simple_unlock(&pmap->pm_obj.vmobjlock); 1599 if (count > 0) { 1600 return; 1601 } 1602 1603 /* 1604 * reference count is zero, free pmap resources and then free pmap. 1605 */ 1606 1607 /* 1608 * remove it from global list of pmaps 1609 */ 1610 1611 simple_lock(&pmaps_lock); 1612 LIST_REMOVE(pmap, pm_list); 1613 simple_unlock(&pmaps_lock); 1614 1615 if (vector_page < KERNEL_BASE) { 1616 /* Remove the vector page mapping */ 1617 pmap_remove(pmap, vector_page, vector_page + NBPG); 1618 pmap_update(pmap); 1619 } 1620 1621 /* 1622 * Free any page tables still mapped 1623 * This is only temporay until pmap_enter can count the number 1624 * of mappings made in a page table. Then pmap_remove() can 1625 * reduce the count and free the pagetable when the count 1626 * reaches zero. Note that entries in this list should match the 1627 * contents of the ptpt, however this is faster than walking a 1024 1628 * entries looking for pt's 1629 * taken from i386 pmap.c 1630 */ 1631 /* 1632 * vmobjlock must be held while freeing pages 1633 */ 1634 simple_lock(&pmap->pm_obj.vmobjlock); 1635 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1636 KASSERT((page->flags & PG_BUSY) == 0); 1637 1638 /* Freeing a PT page? The contents are a throw-away. */ 1639 KASSERT((page->offset & PD_OFFSET) == 0);/* XXX KDASSERT */ 1640 cpu_dcache_inv_range((vaddr_t)vtopte(page->offset), PAGE_SIZE); 1641 1642 page->wire_count = 0; 1643 uvm_pagefree(page); 1644 } 1645 simple_unlock(&pmap->pm_obj.vmobjlock); 1646 1647 /* Free the page dir */ 1648 pmap_freepagedir(pmap); 1649 1650 /* return the pmap to the pool */ 1651 pool_put(&pmap_pmap_pool, pmap); 1652 } 1653 1654 1655 /* 1656 * void pmap_reference(struct pmap *pmap) 1657 * 1658 * Add a reference to the specified pmap. 1659 */ 1660 1661 void 1662 pmap_reference(struct pmap *pmap) 1663 { 1664 if (pmap == NULL) 1665 return; 1666 1667 simple_lock(&pmap->pm_lock); 1668 pmap->pm_obj.uo_refs++; 1669 simple_unlock(&pmap->pm_lock); 1670 } 1671 1672 /* 1673 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1674 * 1675 * Return the start and end addresses of the kernel's virtual space. 1676 * These values are setup in pmap_bootstrap and are updated as pages 1677 * are allocated. 1678 */ 1679 1680 void 1681 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1682 { 1683 *start = virtual_avail; 1684 *end = virtual_end; 1685 } 1686 1687 /* 1688 * Activate the address space for the specified process. If the process 1689 * is the current process, load the new MMU context. 1690 */ 1691 void 1692 pmap_activate(struct proc *p) 1693 { 1694 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1695 struct pcb *pcb = &p->p_addr->u_pcb; 1696 1697 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1698 (paddr_t *)&pcb->pcb_pagedir); 1699 1700 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1701 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1702 1703 if (p == curproc) { 1704 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1705 setttb((u_int)pcb->pcb_pagedir); 1706 } 1707 } 1708 1709 /* 1710 * Deactivate the address space of the specified process. 1711 */ 1712 void 1713 pmap_deactivate(struct proc *p) 1714 { 1715 } 1716 1717 /* 1718 * Perform any deferred pmap operations. 1719 */ 1720 void 1721 pmap_update(struct pmap *pmap) 1722 { 1723 1724 /* 1725 * We haven't deferred any pmap operations, but we do need to 1726 * make sure TLB/cache operations have completed. 1727 */ 1728 cpu_cpwait(); 1729 } 1730 1731 /* 1732 * pmap_clean_page() 1733 * 1734 * This is a local function used to work out the best strategy to clean 1735 * a single page referenced by its entry in the PV table. It's used by 1736 * pmap_copy_page, pmap_zero page and maybe some others later on. 1737 * 1738 * Its policy is effectively: 1739 * o If there are no mappings, we don't bother doing anything with the cache. 1740 * o If there is one mapping, we clean just that page. 1741 * o If there are multiple mappings, we clean the entire cache. 1742 * 1743 * So that some functions can be further optimised, it returns 0 if it didn't 1744 * clean the entire cache, or 1 if it did. 1745 * 1746 * XXX One bug in this routine is that if the pv_entry has a single page 1747 * mapped at 0x00000000 a whole cache clean will be performed rather than 1748 * just the 1 page. Since this should not occur in everyday use and if it does 1749 * it will just result in not the most efficient clean for the page. 1750 */ 1751 static int 1752 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1753 { 1754 struct pmap *pmap; 1755 struct pv_entry *npv; 1756 int cache_needs_cleaning = 0; 1757 vaddr_t page_to_clean = 0; 1758 1759 if (pv == NULL) { 1760 /* nothing mapped in so nothing to flush */ 1761 return (0); 1762 } 1763 1764 /* 1765 * Since we flush the cache each time we change curproc, we 1766 * only need to flush the page if it is in the current pmap. 1767 */ 1768 if (curproc) 1769 pmap = curproc->p_vmspace->vm_map.pmap; 1770 else 1771 pmap = pmap_kernel(); 1772 1773 for (npv = pv; npv; npv = npv->pv_next) { 1774 if (npv->pv_pmap == pmap) { 1775 /* 1776 * The page is mapped non-cacheable in 1777 * this map. No need to flush the cache. 1778 */ 1779 if (npv->pv_flags & PVF_NC) { 1780 #ifdef DIAGNOSTIC 1781 if (cache_needs_cleaning) 1782 panic("pmap_clean_page: " 1783 "cache inconsistency"); 1784 #endif 1785 break; 1786 } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1787 continue; 1788 if (cache_needs_cleaning) { 1789 page_to_clean = 0; 1790 break; 1791 } else 1792 page_to_clean = npv->pv_va; 1793 cache_needs_cleaning = 1; 1794 } 1795 } 1796 1797 if (page_to_clean) { 1798 /* 1799 * XXX If is_src, we really only need to write-back, 1800 * XXX not invalidate, too. Investigate further. 1801 * XXX --thorpej (at) netbsd.org 1802 */ 1803 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1804 } else if (cache_needs_cleaning) { 1805 cpu_idcache_wbinv_all(); 1806 return (1); 1807 } 1808 return (0); 1809 } 1810 1811 /* 1812 * pmap_zero_page() 1813 * 1814 * Zero a given physical page by mapping it at a page hook point. 1815 * In doing the zero page op, the page we zero is mapped cachable, as with 1816 * StrongARM accesses to non-cached pages are non-burst making writing 1817 * _any_ bulk data very slow. 1818 */ 1819 #if ARM_MMU_GENERIC == 1 1820 void 1821 pmap_zero_page_generic(paddr_t phys) 1822 { 1823 #ifdef DEBUG 1824 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1825 1826 if (pg->mdpage.pvh_list != NULL) 1827 panic("pmap_zero_page: page has mappings"); 1828 #endif 1829 1830 KDASSERT((phys & PGOFSET) == 0); 1831 1832 /* 1833 * Hook in the page, zero it, and purge the cache for that 1834 * zeroed page. Invalidate the TLB as needed. 1835 */ 1836 *cdst_pte = L2_S_PROTO | phys | 1837 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1838 PTE_SYNC(cdst_pte); 1839 cpu_tlb_flushD_SE(cdstp); 1840 cpu_cpwait(); 1841 bzero_page(cdstp); 1842 cpu_dcache_wbinv_range(cdstp, NBPG); 1843 } 1844 #endif /* ARM_MMU_GENERIC == 1 */ 1845 1846 #if ARM_MMU_XSCALE == 1 1847 void 1848 pmap_zero_page_xscale(paddr_t phys) 1849 { 1850 #ifdef DEBUG 1851 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1852 1853 if (pg->mdpage.pvh_list != NULL) 1854 panic("pmap_zero_page: page has mappings"); 1855 #endif 1856 1857 KDASSERT((phys & PGOFSET) == 0); 1858 1859 /* 1860 * Hook in the page, zero it, and purge the cache for that 1861 * zeroed page. Invalidate the TLB as needed. 1862 */ 1863 *cdst_pte = L2_S_PROTO | phys | 1864 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1865 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1866 PTE_SYNC(cdst_pte); 1867 cpu_tlb_flushD_SE(cdstp); 1868 cpu_cpwait(); 1869 bzero_page(cdstp); 1870 xscale_cache_clean_minidata(); 1871 } 1872 #endif /* ARM_MMU_XSCALE == 1 */ 1873 1874 /* pmap_pageidlezero() 1875 * 1876 * The same as above, except that we assume that the page is not 1877 * mapped. This means we never have to flush the cache first. Called 1878 * from the idle loop. 1879 */ 1880 boolean_t 1881 pmap_pageidlezero(paddr_t phys) 1882 { 1883 int i, *ptr; 1884 boolean_t rv = TRUE; 1885 #ifdef DEBUG 1886 struct vm_page *pg; 1887 1888 pg = PHYS_TO_VM_PAGE(phys); 1889 if (pg->mdpage.pvh_list != NULL) 1890 panic("pmap_pageidlezero: page has mappings"); 1891 #endif 1892 1893 KDASSERT((phys & PGOFSET) == 0); 1894 1895 /* 1896 * Hook in the page, zero it, and purge the cache for that 1897 * zeroed page. Invalidate the TLB as needed. 1898 */ 1899 *cdst_pte = L2_S_PROTO | phys | 1900 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1901 PTE_SYNC(cdst_pte); 1902 cpu_tlb_flushD_SE(cdstp); 1903 cpu_cpwait(); 1904 1905 for (i = 0, ptr = (int *)cdstp; 1906 i < (NBPG / sizeof(int)); i++) { 1907 if (sched_whichqs != 0) { 1908 /* 1909 * A process has become ready. Abort now, 1910 * so we don't keep it waiting while we 1911 * do slow memory access to finish this 1912 * page. 1913 */ 1914 rv = FALSE; 1915 break; 1916 } 1917 *ptr++ = 0; 1918 } 1919 1920 if (rv) 1921 /* 1922 * if we aborted we'll rezero this page again later so don't 1923 * purge it unless we finished it 1924 */ 1925 cpu_dcache_wbinv_range(cdstp, NBPG); 1926 return (rv); 1927 } 1928 1929 /* 1930 * pmap_copy_page() 1931 * 1932 * Copy one physical page into another, by mapping the pages into 1933 * hook points. The same comment regarding cachability as in 1934 * pmap_zero_page also applies here. 1935 */ 1936 #if ARM_MMU_GENERIC == 1 1937 void 1938 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1939 { 1940 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1941 #ifdef DEBUG 1942 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1943 1944 if (dst_pg->mdpage.pvh_list != NULL) 1945 panic("pmap_copy_page: dst page has mappings"); 1946 #endif 1947 1948 KDASSERT((src & PGOFSET) == 0); 1949 KDASSERT((dst & PGOFSET) == 0); 1950 1951 /* 1952 * Clean the source page. Hold the source page's lock for 1953 * the duration of the copy so that no other mappings can 1954 * be created while we have a potentially aliased mapping. 1955 */ 1956 simple_lock(&src_pg->mdpage.pvh_slock); 1957 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1958 1959 /* 1960 * Map the pages into the page hook points, copy them, and purge 1961 * the cache for the appropriate page. Invalidate the TLB 1962 * as required. 1963 */ 1964 *csrc_pte = L2_S_PROTO | src | 1965 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1966 PTE_SYNC(csrc_pte); 1967 *cdst_pte = L2_S_PROTO | dst | 1968 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1969 PTE_SYNC(cdst_pte); 1970 cpu_tlb_flushD_SE(csrcp); 1971 cpu_tlb_flushD_SE(cdstp); 1972 cpu_cpwait(); 1973 bcopy_page(csrcp, cdstp); 1974 cpu_dcache_inv_range(csrcp, NBPG); 1975 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1976 cpu_dcache_wbinv_range(cdstp, NBPG); 1977 } 1978 #endif /* ARM_MMU_GENERIC == 1 */ 1979 1980 #if ARM_MMU_XSCALE == 1 1981 void 1982 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1983 { 1984 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1985 #ifdef DEBUG 1986 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1987 1988 if (dst_pg->mdpage.pvh_list != NULL) 1989 panic("pmap_copy_page: dst page has mappings"); 1990 #endif 1991 1992 KDASSERT((src & PGOFSET) == 0); 1993 KDASSERT((dst & PGOFSET) == 0); 1994 1995 /* 1996 * Clean the source page. Hold the source page's lock for 1997 * the duration of the copy so that no other mappings can 1998 * be created while we have a potentially aliased mapping. 1999 */ 2000 simple_lock(&src_pg->mdpage.pvh_slock); 2001 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2002 2003 /* 2004 * Map the pages into the page hook points, copy them, and purge 2005 * the cache for the appropriate page. Invalidate the TLB 2006 * as required. 2007 */ 2008 *csrc_pte = L2_S_PROTO | src | 2009 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 2010 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2011 PTE_SYNC(csrc_pte); 2012 *cdst_pte = L2_S_PROTO | dst | 2013 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 2014 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2015 PTE_SYNC(cdst_pte); 2016 cpu_tlb_flushD_SE(csrcp); 2017 cpu_tlb_flushD_SE(cdstp); 2018 cpu_cpwait(); 2019 bcopy_page(csrcp, cdstp); 2020 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2021 xscale_cache_clean_minidata(); 2022 } 2023 #endif /* ARM_MMU_XSCALE == 1 */ 2024 2025 #if 0 2026 void 2027 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 2028 { 2029 pd_entry_t *pde; 2030 paddr_t pa; 2031 struct vm_page *m; 2032 2033 if (pmap == pmap_kernel()) 2034 return; 2035 2036 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2037 pa = pmap_pte_pa(pde); 2038 m = PHYS_TO_VM_PAGE(pa); 2039 ++m->wire_count; 2040 #ifdef MYCROFT_HACK 2041 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2042 pmap, va, pde, pa, m, m->wire_count); 2043 #endif 2044 } 2045 2046 void 2047 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2048 { 2049 pd_entry_t *pde; 2050 paddr_t pa; 2051 struct vm_page *m; 2052 2053 if (pmap == pmap_kernel()) 2054 return; 2055 2056 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2057 pa = pmap_pte_pa(pde); 2058 m = PHYS_TO_VM_PAGE(pa); 2059 --m->wire_count; 2060 #ifdef MYCROFT_HACK 2061 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2062 pmap, va, pde, pa, m, m->wire_count); 2063 #endif 2064 if (m->wire_count == 0) { 2065 #ifdef MYCROFT_HACK 2066 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2067 pmap, va, pde, pa, m); 2068 #endif 2069 pmap_unmap_in_l1(pmap, va); 2070 uvm_pagefree(m); 2071 --pmap->pm_stats.resident_count; 2072 } 2073 } 2074 #else 2075 #define pmap_pte_addref(pmap, va) 2076 #define pmap_pte_delref(pmap, va) 2077 #endif 2078 2079 /* 2080 * Since we have a virtually indexed cache, we may need to inhibit caching if 2081 * there is more than one mapping and at least one of them is writable. 2082 * Since we purge the cache on every context switch, we only need to check for 2083 * other mappings within the same pmap, or kernel_pmap. 2084 * This function is also called when a page is unmapped, to possibly reenable 2085 * caching on any remaining mappings. 2086 * 2087 * The code implements the following logic, where: 2088 * 2089 * KW = # of kernel read/write pages 2090 * KR = # of kernel read only pages 2091 * UW = # of user read/write pages 2092 * UR = # of user read only pages 2093 * OW = # of user read/write pages in another pmap, then 2094 * 2095 * KC = kernel mapping is cacheable 2096 * UC = user mapping is cacheable 2097 * 2098 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2099 * +--------------------------------------------- 2100 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2101 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2102 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2103 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2104 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2105 * 2106 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2107 */ 2108 __inline static void 2109 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2110 boolean_t clear_cache) 2111 { 2112 if (pmap == pmap_kernel()) 2113 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2114 else 2115 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2116 } 2117 2118 static void 2119 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2120 boolean_t clear_cache) 2121 { 2122 int user_entries = 0; 2123 int user_writable = 0; 2124 int user_cacheable = 0; 2125 int kernel_entries = 0; 2126 int kernel_writable = 0; 2127 int kernel_cacheable = 0; 2128 struct pv_entry *pv; 2129 struct pmap *last_pmap = pmap; 2130 2131 #ifdef DIAGNOSTIC 2132 if (pmap != pmap_kernel()) 2133 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2134 #endif 2135 2136 /* 2137 * Pass one, see if there are both kernel and user pmaps for 2138 * this page. Calculate whether there are user-writable or 2139 * kernel-writable pages. 2140 */ 2141 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2142 if (pv->pv_pmap != pmap) { 2143 user_entries++; 2144 if (pv->pv_flags & PVF_WRITE) 2145 user_writable++; 2146 if ((pv->pv_flags & PVF_NC) == 0) 2147 user_cacheable++; 2148 } else { 2149 kernel_entries++; 2150 if (pv->pv_flags & PVF_WRITE) 2151 kernel_writable++; 2152 if ((pv->pv_flags & PVF_NC) == 0) 2153 kernel_cacheable++; 2154 } 2155 } 2156 2157 /* 2158 * We know we have just been updating a kernel entry, so if 2159 * all user pages are already cacheable, then there is nothing 2160 * further to do. 2161 */ 2162 if (kernel_entries == 0 && 2163 user_cacheable == user_entries) 2164 return; 2165 2166 if (user_entries) { 2167 /* 2168 * Scan over the list again, for each entry, if it 2169 * might not be set correctly, call pmap_vac_me_user 2170 * to recalculate the settings. 2171 */ 2172 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2173 /* 2174 * We know kernel mappings will get set 2175 * correctly in other calls. We also know 2176 * that if the pmap is the same as last_pmap 2177 * then we've just handled this entry. 2178 */ 2179 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2180 continue; 2181 /* 2182 * If there are kernel entries and this page 2183 * is writable but non-cacheable, then we can 2184 * skip this entry also. 2185 */ 2186 if (kernel_entries > 0 && 2187 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2188 (PVF_NC | PVF_WRITE)) 2189 continue; 2190 /* 2191 * Similarly if there are no kernel-writable 2192 * entries and the page is already 2193 * read-only/cacheable. 2194 */ 2195 if (kernel_writable == 0 && 2196 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2197 continue; 2198 /* 2199 * For some of the remaining cases, we know 2200 * that we must recalculate, but for others we 2201 * can't tell if they are correct or not, so 2202 * we recalculate anyway. 2203 */ 2204 pmap_unmap_ptes(last_pmap); 2205 last_pmap = pv->pv_pmap; 2206 ptes = pmap_map_ptes(last_pmap); 2207 pmap_vac_me_user(last_pmap, pg, ptes, 2208 pmap_is_curpmap(last_pmap)); 2209 } 2210 /* Restore the pte mapping that was passed to us. */ 2211 if (last_pmap != pmap) { 2212 pmap_unmap_ptes(last_pmap); 2213 ptes = pmap_map_ptes(pmap); 2214 } 2215 if (kernel_entries == 0) 2216 return; 2217 } 2218 2219 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2220 return; 2221 } 2222 2223 static void 2224 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2225 boolean_t clear_cache) 2226 { 2227 struct pmap *kpmap = pmap_kernel(); 2228 struct pv_entry *pv, *npv; 2229 int entries = 0; 2230 int writable = 0; 2231 int cacheable_entries = 0; 2232 int kern_cacheable = 0; 2233 int other_writable = 0; 2234 2235 pv = pg->mdpage.pvh_list; 2236 KASSERT(ptes != NULL); 2237 2238 /* 2239 * Count mappings and writable mappings in this pmap. 2240 * Include kernel mappings as part of our own. 2241 * Keep a pointer to the first one. 2242 */ 2243 for (npv = pv; npv; npv = npv->pv_next) { 2244 /* Count mappings in the same pmap */ 2245 if (pmap == npv->pv_pmap || 2246 kpmap == npv->pv_pmap) { 2247 if (entries++ == 0) 2248 pv = npv; 2249 /* Cacheable mappings */ 2250 if ((npv->pv_flags & PVF_NC) == 0) { 2251 cacheable_entries++; 2252 if (kpmap == npv->pv_pmap) 2253 kern_cacheable++; 2254 } 2255 /* Writable mappings */ 2256 if (npv->pv_flags & PVF_WRITE) 2257 ++writable; 2258 } else if (npv->pv_flags & PVF_WRITE) 2259 other_writable = 1; 2260 } 2261 2262 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2263 "writable %d cacheable %d %s\n", pmap, entries, writable, 2264 cacheable_entries, clear_cache ? "clean" : "no clean")); 2265 2266 /* 2267 * Enable or disable caching as necessary. 2268 * Note: the first entry might be part of the kernel pmap, 2269 * so we can't assume this is indicative of the state of the 2270 * other (maybe non-kpmap) entries. 2271 */ 2272 if ((entries > 1 && writable) || 2273 (entries > 0 && pmap == kpmap && other_writable)) { 2274 if (cacheable_entries == 0) 2275 return; 2276 for (npv = pv; npv; npv = npv->pv_next) { 2277 if ((pmap == npv->pv_pmap 2278 || kpmap == npv->pv_pmap) && 2279 (npv->pv_flags & PVF_NC) == 0) { 2280 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2281 PTE_SYNC_CURRENT(pmap, 2282 &ptes[arm_btop(npv->pv_va)]); 2283 npv->pv_flags |= PVF_NC; 2284 /* 2285 * If this page needs flushing from the 2286 * cache, and we aren't going to do it 2287 * below, do it now. 2288 */ 2289 if ((cacheable_entries < 4 && 2290 (clear_cache || npv->pv_pmap == kpmap)) || 2291 (npv->pv_pmap == kpmap && 2292 !clear_cache && kern_cacheable < 4)) { 2293 cpu_idcache_wbinv_range(npv->pv_va, 2294 NBPG); 2295 cpu_tlb_flushID_SE(npv->pv_va); 2296 } 2297 } 2298 } 2299 if ((clear_cache && cacheable_entries >= 4) || 2300 kern_cacheable >= 4) { 2301 cpu_idcache_wbinv_all(); 2302 cpu_tlb_flushID(); 2303 } 2304 cpu_cpwait(); 2305 } else if (entries > 0) { 2306 /* 2307 * Turn cacheing back on for some pages. If it is a kernel 2308 * page, only do so if there are no other writable pages. 2309 */ 2310 for (npv = pv; npv; npv = npv->pv_next) { 2311 if ((pmap == npv->pv_pmap || 2312 (kpmap == npv->pv_pmap && other_writable == 0)) && 2313 (npv->pv_flags & PVF_NC)) { 2314 ptes[arm_btop(npv->pv_va)] |= 2315 pte_l2_s_cache_mode; 2316 PTE_SYNC_CURRENT(pmap, 2317 &ptes[arm_btop(npv->pv_va)]); 2318 npv->pv_flags &= ~PVF_NC; 2319 } 2320 } 2321 } 2322 } 2323 2324 /* 2325 * pmap_remove() 2326 * 2327 * pmap_remove is responsible for nuking a number of mappings for a range 2328 * of virtual address space in the current pmap. To do this efficiently 2329 * is interesting, because in a number of cases a wide virtual address 2330 * range may be supplied that contains few actual mappings. So, the 2331 * optimisations are: 2332 * 1. Try and skip over hunks of address space for which an L1 entry 2333 * does not exist. 2334 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2335 * maybe do just a partial cache clean. This path of execution is 2336 * complicated by the fact that the cache must be flushed _before_ 2337 * the PTE is nuked, being a VAC :-) 2338 * 3. Maybe later fast-case a single page, but I don't think this is 2339 * going to make _that_ much difference overall. 2340 */ 2341 2342 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2343 2344 void 2345 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2346 { 2347 int cleanlist_idx = 0; 2348 struct pagelist { 2349 vaddr_t va; 2350 pt_entry_t *pte; 2351 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2352 pt_entry_t *pte = 0, *ptes; 2353 paddr_t pa; 2354 int pmap_active; 2355 struct vm_page *pg; 2356 2357 /* Exit quick if there is no pmap */ 2358 if (!pmap) 2359 return; 2360 2361 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2362 pmap, sva, eva)); 2363 2364 /* 2365 * we lock in the pmap => vm_page direction 2366 */ 2367 PMAP_MAP_TO_HEAD_LOCK(); 2368 2369 ptes = pmap_map_ptes(pmap); 2370 /* Get a page table pointer */ 2371 while (sva < eva) { 2372 if (pmap_pde_page(pmap_pde(pmap, sva))) 2373 break; 2374 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2375 } 2376 2377 pte = &ptes[arm_btop(sva)]; 2378 /* Note if the pmap is active thus require cache and tlb cleans */ 2379 pmap_active = pmap_is_curpmap(pmap); 2380 2381 /* Now loop along */ 2382 while (sva < eva) { 2383 /* Check if we can move to the next PDE (l1 chunk) */ 2384 if ((sva & L2_ADDR_BITS) == 0) { 2385 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2386 sva += L1_S_SIZE; 2387 pte += arm_btop(L1_S_SIZE); 2388 continue; 2389 } 2390 } 2391 2392 /* We've found a valid PTE, so this page of PTEs has to go. */ 2393 if (pmap_pte_v(pte)) { 2394 /* Update statistics */ 2395 --pmap->pm_stats.resident_count; 2396 2397 /* 2398 * Add this page to our cache remove list, if we can. 2399 * If, however the cache remove list is totally full, 2400 * then do a complete cache invalidation taking note 2401 * to backtrack the PTE table beforehand, and ignore 2402 * the lists in future because there's no longer any 2403 * point in bothering with them (we've paid the 2404 * penalty, so will carry on unhindered). Otherwise, 2405 * when we fall out, we just clean the list. 2406 */ 2407 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2408 pa = pmap_pte_pa(pte); 2409 2410 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2411 /* Add to the clean list. */ 2412 cleanlist[cleanlist_idx].pte = pte; 2413 cleanlist[cleanlist_idx].va = sva; 2414 cleanlist_idx++; 2415 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2416 int cnt; 2417 2418 /* Nuke everything if needed. */ 2419 if (pmap_active) { 2420 cpu_idcache_wbinv_all(); 2421 cpu_tlb_flushID(); 2422 } 2423 2424 /* 2425 * Roll back the previous PTE list, 2426 * and zero out the current PTE. 2427 */ 2428 for (cnt = 0; 2429 cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; 2430 cnt++) { 2431 *cleanlist[cnt].pte = 0; 2432 if (pmap_active) 2433 PTE_SYNC(cleanlist[cnt].pte); 2434 else 2435 PTE_FLUSH(cleanlist[cnt].pte); 2436 pmap_pte_delref(pmap, 2437 cleanlist[cnt].va); 2438 } 2439 *pte = 0; 2440 if (pmap_active) 2441 PTE_SYNC(pte); 2442 else 2443 PTE_FLUSH(pte); 2444 pmap_pte_delref(pmap, sva); 2445 cleanlist_idx++; 2446 } else { 2447 /* 2448 * We've already nuked the cache and 2449 * TLB, so just carry on regardless, 2450 * and we won't need to do it again 2451 */ 2452 *pte = 0; 2453 if (pmap_active) 2454 PTE_SYNC(pte); 2455 else 2456 PTE_FLUSH(pte); 2457 pmap_pte_delref(pmap, sva); 2458 } 2459 2460 /* 2461 * Update flags. In a number of circumstances, 2462 * we could cluster a lot of these and do a 2463 * number of sequential pages in one go. 2464 */ 2465 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2466 struct pv_entry *pve; 2467 simple_lock(&pg->mdpage.pvh_slock); 2468 pve = pmap_remove_pv(pg, pmap, sva); 2469 pmap_free_pv(pmap, pve); 2470 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2471 simple_unlock(&pg->mdpage.pvh_slock); 2472 } 2473 } else if (pmap_active == 0) 2474 PTE_FLUSH(pte); 2475 sva += NBPG; 2476 pte++; 2477 } 2478 2479 /* 2480 * Now, if we've fallen through down to here, chances are that there 2481 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2482 */ 2483 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2484 u_int cnt; 2485 2486 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2487 if (pmap_active) { 2488 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2489 NBPG); 2490 *cleanlist[cnt].pte = 0; 2491 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2492 PTE_SYNC(cleanlist[cnt].pte); 2493 } else { 2494 *cleanlist[cnt].pte = 0; 2495 PTE_FLUSH(cleanlist[cnt].pte); 2496 } 2497 pmap_pte_delref(pmap, cleanlist[cnt].va); 2498 } 2499 } 2500 2501 pmap_unmap_ptes(pmap); 2502 2503 PMAP_MAP_TO_HEAD_UNLOCK(); 2504 } 2505 2506 /* 2507 * Routine: pmap_remove_all 2508 * Function: 2509 * Removes this physical page from 2510 * all physical maps in which it resides. 2511 * Reflects back modify bits to the pager. 2512 */ 2513 2514 static void 2515 pmap_remove_all(struct vm_page *pg) 2516 { 2517 struct pv_entry *pv, *npv; 2518 struct pmap *pmap; 2519 pt_entry_t *pte, *ptes; 2520 2521 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2522 2523 /* set vm_page => pmap locking */ 2524 PMAP_HEAD_TO_MAP_LOCK(); 2525 2526 simple_lock(&pg->mdpage.pvh_slock); 2527 2528 pv = pg->mdpage.pvh_list; 2529 if (pv == NULL) { 2530 PDEBUG(0, printf("free page\n")); 2531 simple_unlock(&pg->mdpage.pvh_slock); 2532 PMAP_HEAD_TO_MAP_UNLOCK(); 2533 return; 2534 } 2535 pmap_clean_page(pv, FALSE); 2536 2537 while (pv) { 2538 pmap = pv->pv_pmap; 2539 ptes = pmap_map_ptes(pmap); 2540 pte = &ptes[arm_btop(pv->pv_va)]; 2541 2542 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2543 pv->pv_va, pv->pv_flags)); 2544 #ifdef DEBUG 2545 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2546 pmap_pte_v(pte) == 0 || 2547 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2548 panic("pmap_remove_all: bad mapping"); 2549 #endif /* DEBUG */ 2550 2551 /* 2552 * Update statistics 2553 */ 2554 --pmap->pm_stats.resident_count; 2555 2556 /* Wired bit */ 2557 if (pv->pv_flags & PVF_WIRED) 2558 --pmap->pm_stats.wired_count; 2559 2560 /* 2561 * Invalidate the PTEs. 2562 * XXX: should cluster them up and invalidate as many 2563 * as possible at once. 2564 */ 2565 2566 #ifdef needednotdone 2567 reduce wiring count on page table pages as references drop 2568 #endif 2569 2570 *pte = 0; 2571 PTE_SYNC_CURRENT(pmap, pte); 2572 pmap_pte_delref(pmap, pv->pv_va); 2573 2574 npv = pv->pv_next; 2575 pmap_free_pv(pmap, pv); 2576 pv = npv; 2577 pmap_unmap_ptes(pmap); 2578 } 2579 pg->mdpage.pvh_list = NULL; 2580 simple_unlock(&pg->mdpage.pvh_slock); 2581 PMAP_HEAD_TO_MAP_UNLOCK(); 2582 2583 PDEBUG(0, printf("done\n")); 2584 cpu_tlb_flushID(); 2585 cpu_cpwait(); 2586 } 2587 2588 2589 /* 2590 * Set the physical protection on the specified range of this map as requested. 2591 */ 2592 2593 void 2594 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2595 { 2596 pt_entry_t *pte = NULL, *ptes; 2597 struct vm_page *pg; 2598 int flush = 0; 2599 2600 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2601 pmap, sva, eva, prot)); 2602 2603 if (~prot & VM_PROT_READ) { 2604 /* 2605 * Just remove the mappings. pmap_update() is not required 2606 * here since the caller should do it. 2607 */ 2608 pmap_remove(pmap, sva, eva); 2609 return; 2610 } 2611 if (prot & VM_PROT_WRITE) { 2612 /* 2613 * If this is a read->write transition, just ignore it and let 2614 * uvm_fault() take care of it later. 2615 */ 2616 return; 2617 } 2618 2619 /* Need to lock map->head */ 2620 PMAP_MAP_TO_HEAD_LOCK(); 2621 2622 ptes = pmap_map_ptes(pmap); 2623 2624 /* 2625 * OK, at this point, we know we're doing write-protect operation. 2626 * If the pmap is active, write-back the range. 2627 */ 2628 if (pmap_is_curpmap(pmap)) 2629 cpu_dcache_wb_range(sva, eva - sva); 2630 2631 /* 2632 * We need to acquire a pointer to a page table page before entering 2633 * the following loop. 2634 */ 2635 while (sva < eva) { 2636 if (pmap_pde_page(pmap_pde(pmap, sva))) 2637 break; 2638 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2639 } 2640 2641 pte = &ptes[arm_btop(sva)]; 2642 2643 while (sva < eva) { 2644 /* only check once in a while */ 2645 if ((sva & L2_ADDR_BITS) == 0) { 2646 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2647 /* We can race ahead here, to the next pde. */ 2648 sva += L1_S_SIZE; 2649 pte += arm_btop(L1_S_SIZE); 2650 continue; 2651 } 2652 } 2653 2654 if (!pmap_pte_v(pte)) { 2655 PTE_FLUSH_ALT(pmap, pte); 2656 goto next; 2657 } 2658 2659 flush = 1; 2660 2661 pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte)); 2662 2663 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2664 PTE_SYNC_CURRENT(pmap, pte); /* XXXJRT optimize */ 2665 2666 /* Clear write flag */ 2667 if (pg != NULL) { 2668 simple_lock(&pg->mdpage.pvh_slock); 2669 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2670 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2671 simple_unlock(&pg->mdpage.pvh_slock); 2672 } 2673 2674 next: 2675 sva += NBPG; 2676 pte++; 2677 } 2678 pmap_unmap_ptes(pmap); 2679 PMAP_MAP_TO_HEAD_UNLOCK(); 2680 if (flush) 2681 cpu_tlb_flushID(); 2682 } 2683 2684 /* 2685 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2686 * int flags) 2687 * 2688 * Insert the given physical page (p) at 2689 * the specified virtual address (v) in the 2690 * target physical map with the protection requested. 2691 * 2692 * If specified, the page will be wired down, meaning 2693 * that the related pte can not be reclaimed. 2694 * 2695 * NB: This is the only routine which MAY NOT lazy-evaluate 2696 * or lose information. That is, this routine must actually 2697 * insert this page into the given map NOW. 2698 */ 2699 2700 int 2701 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2702 int flags) 2703 { 2704 pt_entry_t *ptes, opte, npte; 2705 paddr_t opa; 2706 boolean_t wired = (flags & PMAP_WIRED) != 0; 2707 struct vm_page *pg; 2708 struct pv_entry *pve; 2709 int error, nflags; 2710 2711 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2712 va, pa, pmap, prot, wired)); 2713 2714 #ifdef DIAGNOSTIC 2715 /* Valid address ? */ 2716 if (va >= (pmap_curmaxkvaddr)) 2717 panic("pmap_enter: too big"); 2718 if (pmap != pmap_kernel() && va != 0) { 2719 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2720 panic("pmap_enter: kernel page in user map"); 2721 } else { 2722 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2723 panic("pmap_enter: user page in kernel map"); 2724 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2725 panic("pmap_enter: entering PT page"); 2726 } 2727 #endif 2728 2729 KDASSERT(((va | pa) & PGOFSET) == 0); 2730 2731 /* 2732 * Get a pointer to the page. Later on in this function, we 2733 * test for a managed page by checking pg != NULL. 2734 */ 2735 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2736 2737 /* get lock */ 2738 PMAP_MAP_TO_HEAD_LOCK(); 2739 2740 /* 2741 * map the ptes. If there's not already an L2 table for this 2742 * address, allocate one. 2743 */ 2744 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2745 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2746 struct vm_page *ptp; 2747 2748 /* kernel should be pre-grown */ 2749 KASSERT(pmap != pmap_kernel()); 2750 2751 /* if failure is allowed then don't try too hard */ 2752 ptp = pmap_get_ptp(pmap, va & PD_FRAME); 2753 if (ptp == NULL) { 2754 if (flags & PMAP_CANFAIL) { 2755 error = ENOMEM; 2756 goto out; 2757 } 2758 panic("pmap_enter: get ptp failed"); 2759 } 2760 } 2761 opte = ptes[arm_btop(va)]; 2762 2763 nflags = 0; 2764 if (prot & VM_PROT_WRITE) 2765 nflags |= PVF_WRITE; 2766 if (wired) 2767 nflags |= PVF_WIRED; 2768 2769 /* Is the pte valid ? If so then this page is already mapped */ 2770 if (l2pte_valid(opte)) { 2771 /* Get the physical address of the current page mapped */ 2772 opa = l2pte_pa(opte); 2773 2774 /* Are we mapping the same page ? */ 2775 if (opa == pa) { 2776 /* Check to see if we're doing rw->ro. */ 2777 if ((opte & L2_S_PROT_W) != 0 && 2778 (prot & VM_PROT_WRITE) == 0) { 2779 /* Yup, flush the cache if current pmap. */ 2780 if (pmap_is_curpmap(pmap)) 2781 cpu_dcache_wb_range(va, NBPG); 2782 } 2783 2784 /* Has the wiring changed ? */ 2785 if (pg != NULL) { 2786 simple_lock(&pg->mdpage.pvh_slock); 2787 (void) pmap_modify_pv(pmap, va, pg, 2788 PVF_WRITE | PVF_WIRED, nflags); 2789 simple_unlock(&pg->mdpage.pvh_slock); 2790 } 2791 } else { 2792 struct vm_page *opg; 2793 2794 /* We are replacing the page with a new one. */ 2795 cpu_idcache_wbinv_range(va, NBPG); 2796 2797 /* 2798 * If it is part of our managed memory then we 2799 * must remove it from the PV list 2800 */ 2801 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2802 simple_lock(&opg->mdpage.pvh_slock); 2803 pve = pmap_remove_pv(opg, pmap, va); 2804 simple_unlock(&opg->mdpage.pvh_slock); 2805 } else { 2806 pve = NULL; 2807 } 2808 2809 goto enter; 2810 } 2811 } else { 2812 opa = 0; 2813 pve = NULL; 2814 pmap_pte_addref(pmap, va); 2815 2816 /* pte is not valid so we must be hooking in a new page */ 2817 ++pmap->pm_stats.resident_count; 2818 2819 enter: 2820 /* 2821 * Enter on the PV list if part of our managed memory 2822 */ 2823 if (pg != NULL) { 2824 if (pve == NULL) { 2825 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2826 if (pve == NULL) { 2827 if (flags & PMAP_CANFAIL) { 2828 PTE_FLUSH_ALT(pmap, 2829 ptes[arm_btop(va)]); 2830 error = ENOMEM; 2831 goto out; 2832 } 2833 panic("pmap_enter: no pv entries " 2834 "available"); 2835 } 2836 } 2837 /* enter_pv locks pvh when adding */ 2838 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2839 } else { 2840 if (pve != NULL) 2841 pmap_free_pv(pmap, pve); 2842 } 2843 } 2844 2845 /* Construct the pte, giving the correct access. */ 2846 npte = pa; 2847 2848 /* VA 0 is magic. */ 2849 if (pmap != pmap_kernel() && va != vector_page) 2850 npte |= L2_S_PROT_U; 2851 2852 if (pg != NULL) { 2853 #ifdef DIAGNOSTIC 2854 if ((flags & VM_PROT_ALL) & ~prot) 2855 panic("pmap_enter: access_type exceeds prot"); 2856 #endif 2857 npte |= pte_l2_s_cache_mode; 2858 if (flags & VM_PROT_WRITE) { 2859 npte |= L2_S_PROTO | L2_S_PROT_W; 2860 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2861 } else if (flags & VM_PROT_ALL) { 2862 npte |= L2_S_PROTO; 2863 pg->mdpage.pvh_attrs |= PVF_REF; 2864 } else 2865 npte |= L2_TYPE_INV; 2866 } else { 2867 if (prot & VM_PROT_WRITE) 2868 npte |= L2_S_PROTO | L2_S_PROT_W; 2869 else if (prot & VM_PROT_ALL) 2870 npte |= L2_S_PROTO; 2871 else 2872 npte |= L2_TYPE_INV; 2873 } 2874 2875 #if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE) 2876 #if ARM_NMMUS > 1 2877 # error "XXX Unable to use read/write-allocate and configure non-XScale" 2878 #endif 2879 /* 2880 * XXX BRUTAL HACK! This allows us to limp along with 2881 * XXX the read/write-allocate cache mode. 2882 */ 2883 if (pmap == pmap_kernel()) 2884 npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X); 2885 #endif 2886 ptes[arm_btop(va)] = npte; 2887 PTE_SYNC_CURRENT(pmap, &ptes[arm_btop(va)]); 2888 2889 if (pg != NULL) { 2890 simple_lock(&pg->mdpage.pvh_slock); 2891 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2892 simple_unlock(&pg->mdpage.pvh_slock); 2893 } 2894 2895 /* Better flush the TLB ... */ 2896 cpu_tlb_flushID_SE(va); 2897 error = 0; 2898 out: 2899 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2900 PMAP_MAP_TO_HEAD_UNLOCK(); 2901 2902 return error; 2903 } 2904 2905 /* 2906 * pmap_kenter_pa: enter a kernel mapping 2907 * 2908 * => no need to lock anything assume va is already allocated 2909 * => should be faster than normal pmap enter function 2910 */ 2911 void 2912 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2913 { 2914 pt_entry_t *pte; 2915 2916 pte = vtopte(va); 2917 KASSERT(!pmap_pte_v(pte)); 2918 2919 #ifdef PMAP_ALIAS_DEBUG 2920 { 2921 struct vm_page *pg; 2922 int s; 2923 2924 pg = PHYS_TO_VM_PAGE(pa); 2925 if (pg != NULL) { 2926 s = splhigh(); 2927 if (pg->mdpage.ro_mappings == 0 && 2928 pg->mdpage.rw_mappings == 0 && 2929 pg->mdpage.kro_mappings == 0 && 2930 pg->mdpage.krw_mappings == 0) { 2931 /* This case is okay. */ 2932 } else if (pg->mdpage.rw_mappings == 0 && 2933 pg->mdpage.krw_mappings == 0 && 2934 (prot & VM_PROT_WRITE) == 0) { 2935 /* This case is okay. */ 2936 } else { 2937 /* Something is awry. */ 2938 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2939 "prot 0x%x\n", pg->mdpage.ro_mappings, 2940 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2941 pg->mdpage.krw_mappings, prot); 2942 Debugger(); 2943 } 2944 if (prot & VM_PROT_WRITE) 2945 pg->mdpage.krw_mappings++; 2946 else 2947 pg->mdpage.kro_mappings++; 2948 splx(s); 2949 } 2950 } 2951 #endif /* PMAP_ALIAS_DEBUG */ 2952 2953 *pte = L2_S_PROTO | pa | 2954 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2955 PTE_SYNC(pte); 2956 } 2957 2958 void 2959 pmap_kremove(vaddr_t va, vsize_t len) 2960 { 2961 pt_entry_t *pte; 2962 vaddr_t ova = va; 2963 vaddr_t olen = len; 2964 2965 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2966 2967 /* 2968 * We assume that we will only be called with small 2969 * regions of memory. 2970 */ 2971 2972 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2973 pte = vtopte(va); 2974 #ifdef PMAP_ALIAS_DEBUG 2975 { 2976 struct vm_page *pg; 2977 int s; 2978 2979 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 2980 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 2981 s = splhigh(); 2982 if (*pte & L2_S_PROT_W) { 2983 KASSERT(pg->mdpage.krw_mappings != 0); 2984 pg->mdpage.krw_mappings--; 2985 } else { 2986 KASSERT(pg->mdpage.kro_mappings != 0); 2987 pg->mdpage.kro_mappings--; 2988 } 2989 splx(s); 2990 } 2991 } 2992 #endif /* PMAP_ALIAS_DEBUG */ 2993 cpu_idcache_wbinv_range(va, PAGE_SIZE); 2994 *pte = 0; 2995 cpu_tlb_flushID_SE(va); 2996 } 2997 PTE_SYNC_RANGE(vtopte(ova), olen >> PAGE_SHIFT); 2998 } 2999 3000 /* 3001 * pmap_page_protect: 3002 * 3003 * Lower the permission for all mappings to a given page. 3004 */ 3005 3006 void 3007 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 3008 { 3009 3010 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 3011 VM_PAGE_TO_PHYS(pg), prot)); 3012 3013 switch(prot) { 3014 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 3015 case VM_PROT_READ|VM_PROT_WRITE: 3016 return; 3017 3018 case VM_PROT_READ: 3019 case VM_PROT_READ|VM_PROT_EXECUTE: 3020 pmap_clearbit(pg, PVF_WRITE); 3021 break; 3022 3023 default: 3024 pmap_remove_all(pg); 3025 break; 3026 } 3027 } 3028 3029 3030 /* 3031 * Routine: pmap_unwire 3032 * Function: Clear the wired attribute for a map/virtual-address 3033 * pair. 3034 * In/out conditions: 3035 * The mapping must already exist in the pmap. 3036 */ 3037 3038 void 3039 pmap_unwire(struct pmap *pmap, vaddr_t va) 3040 { 3041 pt_entry_t *ptes; 3042 struct vm_page *pg; 3043 paddr_t pa; 3044 3045 PMAP_MAP_TO_HEAD_LOCK(); 3046 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3047 3048 if (pmap_pde_v(pmap_pde(pmap, va))) { 3049 #ifdef DIAGNOSTIC 3050 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3051 panic("pmap_unwire: invalid L2 PTE"); 3052 #endif 3053 /* Extract the physical address of the page */ 3054 pa = l2pte_pa(ptes[arm_btop(va)]); 3055 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3056 3057 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3058 goto out; 3059 3060 /* Update the wired bit in the pv entry for this page. */ 3061 simple_lock(&pg->mdpage.pvh_slock); 3062 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 3063 simple_unlock(&pg->mdpage.pvh_slock); 3064 } 3065 #ifdef DIAGNOSTIC 3066 else { 3067 panic("pmap_unwire: invalid L1 PTE"); 3068 } 3069 #endif 3070 out: 3071 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3072 PMAP_MAP_TO_HEAD_UNLOCK(); 3073 } 3074 3075 /* 3076 * Routine: pmap_extract 3077 * Function: 3078 * Extract the physical page address associated 3079 * with the given map/virtual_address pair. 3080 */ 3081 boolean_t 3082 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 3083 { 3084 pd_entry_t *pde; 3085 pt_entry_t *pte, *ptes; 3086 paddr_t pa; 3087 3088 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3089 3090 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3091 3092 pde = pmap_pde(pmap, va); 3093 pte = &ptes[arm_btop(va)]; 3094 3095 if (pmap_pde_section(pde)) { 3096 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3097 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3098 goto out; 3099 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3100 PDEBUG(5, printf("no mapping\n")); 3101 goto failed; 3102 } 3103 3104 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3105 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3106 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3107 goto out; 3108 } 3109 3110 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3111 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3112 3113 out: 3114 if (pap != NULL) 3115 *pap = pa; 3116 3117 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3118 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3119 return (TRUE); 3120 3121 failed: 3122 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3123 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3124 return (FALSE); 3125 } 3126 3127 3128 /* 3129 * pmap_copy: 3130 * 3131 * Copy the range specified by src_addr/len from the source map to the 3132 * range dst_addr/len in the destination map. 3133 * 3134 * This routine is only advisory and need not do anything. 3135 */ 3136 /* Call deleted in <arm/arm32/pmap.h> */ 3137 3138 #if defined(PMAP_DEBUG) 3139 void 3140 pmap_dump_pvlist(phys, m) 3141 vaddr_t phys; 3142 char *m; 3143 { 3144 struct vm_page *pg; 3145 struct pv_entry *pv; 3146 3147 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3148 printf("INVALID PA\n"); 3149 return; 3150 } 3151 simple_lock(&pg->mdpage.pvh_slock); 3152 printf("%s %08lx:", m, phys); 3153 if (pg->mdpage.pvh_list == NULL) { 3154 simple_unlock(&pg->mdpage.pvh_slock); 3155 printf(" no mappings\n"); 3156 return; 3157 } 3158 3159 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3160 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3161 pv->pv_va, pv->pv_flags); 3162 3163 printf("\n"); 3164 simple_unlock(&pg->mdpage.pvh_slock); 3165 } 3166 3167 #endif /* PMAP_DEBUG */ 3168 3169 static pt_entry_t * 3170 pmap_map_ptes(struct pmap *pmap) 3171 { 3172 struct proc *p; 3173 3174 /* the kernel's pmap is always accessible */ 3175 if (pmap == pmap_kernel()) { 3176 return (pt_entry_t *)PTE_BASE; 3177 } 3178 3179 if (pmap_is_curpmap(pmap)) { 3180 simple_lock(&pmap->pm_obj.vmobjlock); 3181 return (pt_entry_t *)PTE_BASE; 3182 } 3183 3184 p = curproc; 3185 KDASSERT(p != NULL); 3186 3187 /* need to lock both curpmap and pmap: use ordered locking */ 3188 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3189 simple_lock(&pmap->pm_obj.vmobjlock); 3190 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3191 } else { 3192 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3193 simple_lock(&pmap->pm_obj.vmobjlock); 3194 } 3195 3196 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, 3197 pmap->pm_pptpt, 0); 3198 cpu_tlb_flushD(); 3199 cpu_cpwait(); 3200 return (pt_entry_t *)APTE_BASE; 3201 } 3202 3203 /* 3204 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3205 */ 3206 3207 static void 3208 pmap_unmap_ptes(struct pmap *pmap) 3209 { 3210 3211 if (pmap == pmap_kernel()) { 3212 return; 3213 } 3214 if (pmap_is_curpmap(pmap)) { 3215 simple_unlock(&pmap->pm_obj.vmobjlock); 3216 } else { 3217 KDASSERT(curproc != NULL); 3218 simple_unlock(&pmap->pm_obj.vmobjlock); 3219 simple_unlock( 3220 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3221 } 3222 } 3223 3224 /* 3225 * Modify pte bits for all ptes corresponding to the given physical address. 3226 * We use `maskbits' rather than `clearbits' because we're always passing 3227 * constants and the latter would require an extra inversion at run-time. 3228 */ 3229 3230 static void 3231 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3232 { 3233 struct pv_entry *pv; 3234 pt_entry_t *ptes, npte, opte; 3235 vaddr_t va; 3236 3237 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3238 VM_PAGE_TO_PHYS(pg), maskbits)); 3239 3240 PMAP_HEAD_TO_MAP_LOCK(); 3241 simple_lock(&pg->mdpage.pvh_slock); 3242 3243 /* 3244 * Clear saved attributes (modify, reference) 3245 */ 3246 pg->mdpage.pvh_attrs &= ~maskbits; 3247 3248 if (pg->mdpage.pvh_list == NULL) { 3249 simple_unlock(&pg->mdpage.pvh_slock); 3250 PMAP_HEAD_TO_MAP_UNLOCK(); 3251 return; 3252 } 3253 3254 /* 3255 * Loop over all current mappings setting/clearing as appropos 3256 */ 3257 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3258 #ifdef PMAP_ALIAS_DEBUG 3259 { 3260 int s = splhigh(); 3261 if ((maskbits & PVF_WRITE) != 0 && 3262 (pv->pv_flags & PVF_WRITE) != 0) { 3263 KASSERT(pg->mdpage.rw_mappings != 0); 3264 pg->mdpage.rw_mappings--; 3265 pg->mdpage.ro_mappings++; 3266 } 3267 splx(s); 3268 } 3269 #endif /* PMAP_ALIAS_DEBUG */ 3270 va = pv->pv_va; 3271 pv->pv_flags &= ~maskbits; 3272 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3273 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3274 npte = opte = ptes[arm_btop(va)]; 3275 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3276 if ((pv->pv_flags & PVF_NC)) { 3277 /* 3278 * Entry is not cacheable: reenable 3279 * the cache, nothing to flush 3280 * 3281 * Don't turn caching on again if this 3282 * is a modified emulation. This 3283 * would be inconsitent with the 3284 * settings created by 3285 * pmap_vac_me_harder(). 3286 * 3287 * There's no need to call 3288 * pmap_vac_me_harder() here: all 3289 * pages are loosing their write 3290 * permission. 3291 * 3292 */ 3293 if (maskbits & PVF_WRITE) { 3294 npte |= pte_l2_s_cache_mode; 3295 pv->pv_flags &= ~PVF_NC; 3296 } 3297 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3298 /* 3299 * Entry is cacheable: check if pmap is 3300 * current if it is flush it, 3301 * otherwise it won't be in the cache 3302 */ 3303 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3304 } 3305 3306 /* make the pte read only */ 3307 npte &= ~L2_S_PROT_W; 3308 } 3309 3310 if (maskbits & PVF_REF) { 3311 if (pmap_is_curpmap(pv->pv_pmap) && 3312 (pv->pv_flags & PVF_NC) == 0) { 3313 /* 3314 * Check npte here; we may have already 3315 * done the wbinv above, and the validity 3316 * of the PTE is the same for opte and 3317 * npte. 3318 */ 3319 if (npte & L2_S_PROT_W) { 3320 cpu_idcache_wbinv_range(pv->pv_va, 3321 NBPG); 3322 } else if ((npte & L2_TYPE_MASK) 3323 != L2_TYPE_INV) { 3324 /* XXXJRT need idcache_inv_range */ 3325 cpu_idcache_wbinv_range(pv->pv_va, 3326 NBPG); 3327 } 3328 } 3329 3330 /* make the pte invalid */ 3331 npte = (npte & ~L2_TYPE_MASK) | L2_TYPE_INV; 3332 } 3333 3334 if (npte != opte) { 3335 ptes[arm_btop(va)] = npte; 3336 PTE_SYNC_CURRENT(pv->pv_pmap, &ptes[arm_btop(va)]); 3337 /* Flush the TLB entry if a current pmap. */ 3338 if (pmap_is_curpmap(pv->pv_pmap)) 3339 cpu_tlb_flushID_SE(pv->pv_va); 3340 } else 3341 PTE_FLUSH_ALT(pv->pv_pmap, &ptes[arm_btop(va)]); 3342 3343 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3344 } 3345 cpu_cpwait(); 3346 3347 simple_unlock(&pg->mdpage.pvh_slock); 3348 PMAP_HEAD_TO_MAP_UNLOCK(); 3349 } 3350 3351 /* 3352 * pmap_clear_modify: 3353 * 3354 * Clear the "modified" attribute for a page. 3355 */ 3356 boolean_t 3357 pmap_clear_modify(struct vm_page *pg) 3358 { 3359 boolean_t rv; 3360 3361 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3362 rv = TRUE; 3363 pmap_clearbit(pg, PVF_MOD); 3364 } else 3365 rv = FALSE; 3366 3367 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3368 VM_PAGE_TO_PHYS(pg), rv)); 3369 3370 return (rv); 3371 } 3372 3373 /* 3374 * pmap_clear_reference: 3375 * 3376 * Clear the "referenced" attribute for a page. 3377 */ 3378 boolean_t 3379 pmap_clear_reference(struct vm_page *pg) 3380 { 3381 boolean_t rv; 3382 3383 if (pg->mdpage.pvh_attrs & PVF_REF) { 3384 rv = TRUE; 3385 pmap_clearbit(pg, PVF_REF); 3386 } else 3387 rv = FALSE; 3388 3389 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3390 VM_PAGE_TO_PHYS(pg), rv)); 3391 3392 return (rv); 3393 } 3394 3395 /* 3396 * pmap_is_modified: 3397 * 3398 * Test if a page has the "modified" attribute. 3399 */ 3400 /* See <arm/arm32/pmap.h> */ 3401 3402 /* 3403 * pmap_is_referenced: 3404 * 3405 * Test if a page has the "referenced" attribute. 3406 */ 3407 /* See <arm/arm32/pmap.h> */ 3408 3409 int 3410 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3411 { 3412 pt_entry_t *ptes; 3413 struct vm_page *pg; 3414 paddr_t pa; 3415 u_int flags; 3416 int rv = 0; 3417 3418 PDEBUG(2, printf("pmap_modified_emulation\n")); 3419 3420 PMAP_MAP_TO_HEAD_LOCK(); 3421 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3422 3423 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3424 PDEBUG(2, printf("L1 PTE invalid\n")); 3425 goto out; 3426 } 3427 3428 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3429 3430 /* 3431 * Don't need to PTE_FLUSH_ALT() here; this is always done 3432 * with the current pmap. 3433 */ 3434 3435 /* Check for a invalid pte */ 3436 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3437 goto out; 3438 3439 /* This can happen if user code tries to access kernel memory. */ 3440 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3441 goto out; 3442 3443 /* Extract the physical address of the page */ 3444 pa = l2pte_pa(ptes[arm_btop(va)]); 3445 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3446 goto out; 3447 3448 /* Get the current flags for this page. */ 3449 simple_lock(&pg->mdpage.pvh_slock); 3450 3451 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3452 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3453 3454 /* 3455 * Do the flags say this page is writable ? If not then it is a 3456 * genuine write fault. If yes then the write fault is our fault 3457 * as we did not reflect the write access in the PTE. Now we know 3458 * a write has occurred we can correct this and also set the 3459 * modified bit 3460 */ 3461 if (~flags & PVF_WRITE) { 3462 simple_unlock(&pg->mdpage.pvh_slock); 3463 goto out; 3464 } 3465 3466 PDEBUG(0, 3467 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3468 va, ptes[arm_btop(va)])); 3469 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3470 3471 /* 3472 * Re-enable write permissions for the page. No need to call 3473 * pmap_vac_me_harder(), since this is just a 3474 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3475 * We've already set the cacheable bits based on the assumption 3476 * that we can write to this page. 3477 */ 3478 ptes[arm_btop(va)] = 3479 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3480 PTE_SYNC(&ptes[arm_btop(va)]); 3481 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3482 3483 simple_unlock(&pg->mdpage.pvh_slock); 3484 3485 cpu_tlb_flushID_SE(va); 3486 cpu_cpwait(); 3487 rv = 1; 3488 out: 3489 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3490 PMAP_MAP_TO_HEAD_UNLOCK(); 3491 return (rv); 3492 } 3493 3494 int 3495 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3496 { 3497 pt_entry_t *ptes; 3498 struct vm_page *pg; 3499 paddr_t pa; 3500 int rv = 0; 3501 3502 PDEBUG(2, printf("pmap_handled_emulation\n")); 3503 3504 PMAP_MAP_TO_HEAD_LOCK(); 3505 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3506 3507 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3508 PDEBUG(2, printf("L1 PTE invalid\n")); 3509 goto out; 3510 } 3511 3512 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3513 3514 /* 3515 * Don't need to PTE_FLUSH_ALT() here; this is always done 3516 * with the current pmap. 3517 */ 3518 3519 /* Check for invalid pte */ 3520 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3521 goto out; 3522 3523 /* This can happen if user code tries to access kernel memory. */ 3524 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3525 goto out; 3526 3527 /* Extract the physical address of the page */ 3528 pa = l2pte_pa(ptes[arm_btop(va)]); 3529 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3530 goto out; 3531 3532 simple_lock(&pg->mdpage.pvh_slock); 3533 3534 /* 3535 * Ok we just enable the pte and mark the attibs as handled 3536 * XXX Should we traverse the PV list and enable all PTEs? 3537 */ 3538 PDEBUG(0, 3539 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3540 va, ptes[arm_btop(va)])); 3541 pg->mdpage.pvh_attrs |= PVF_REF; 3542 3543 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3544 PTE_SYNC(&ptes[arm_btop(va)]); 3545 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3546 3547 simple_unlock(&pg->mdpage.pvh_slock); 3548 3549 cpu_tlb_flushID_SE(va); 3550 cpu_cpwait(); 3551 rv = 1; 3552 out: 3553 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3554 PMAP_MAP_TO_HEAD_UNLOCK(); 3555 return (rv); 3556 } 3557 3558 /* 3559 * pmap_collect: free resources held by a pmap 3560 * 3561 * => optional function. 3562 * => called when a process is swapped out to free memory. 3563 */ 3564 3565 void 3566 pmap_collect(struct pmap *pmap) 3567 { 3568 } 3569 3570 /* 3571 * Routine: pmap_procwr 3572 * 3573 * Function: 3574 * Synchronize caches corresponding to [addr, addr+len) in p. 3575 * 3576 */ 3577 void 3578 pmap_procwr(struct proc *p, vaddr_t va, int len) 3579 { 3580 /* We only need to do anything if it is the current process. */ 3581 if (p == curproc) 3582 cpu_icache_sync_range(va, len); 3583 } 3584 /* 3585 * PTP functions 3586 */ 3587 3588 /* 3589 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3590 * 3591 * => pmap should NOT be pmap_kernel() 3592 * => pmap should be locked 3593 */ 3594 3595 static struct vm_page * 3596 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3597 { 3598 struct vm_page *ptp; 3599 3600 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3601 3602 if (pmap_pde_page(pmap_pde(pmap, va))) { 3603 3604 /* valid... check hint (saves us a PA->PG lookup) */ 3605 if (pmap->pm_ptphint && 3606 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3607 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3608 return (pmap->pm_ptphint); 3609 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3610 #ifdef DIAGNOSTIC 3611 if (ptp == NULL) 3612 panic("pmap_get_ptp: unmanaged user PTP"); 3613 #endif 3614 pmap->pm_ptphint = ptp; 3615 return(ptp); 3616 } 3617 3618 /* allocate a new PTP (updates ptphint) */ 3619 return (pmap_alloc_ptp(pmap, va)); 3620 } 3621 3622 /* 3623 * pmap_alloc_ptp: allocate a PTP for a PMAP 3624 * 3625 * => pmap should already be locked by caller 3626 * => we use the ptp's wire_count to count the number of active mappings 3627 * in the PTP (we start it at one to prevent any chance this PTP 3628 * will ever leak onto the active/inactive queues) 3629 */ 3630 3631 /*__inline */ static struct vm_page * 3632 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3633 { 3634 struct vm_page *ptp; 3635 3636 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3637 3638 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3639 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3640 if (ptp == NULL) 3641 return (NULL); 3642 3643 /* got one! */ 3644 ptp->flags &= ~PG_BUSY; /* never busy */ 3645 ptp->wire_count = 1; /* no mappings yet */ 3646 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), 3647 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3648 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3649 pmap->pm_ptphint = ptp; 3650 return (ptp); 3651 } 3652 3653 vaddr_t 3654 pmap_growkernel(vaddr_t maxkvaddr) 3655 { 3656 struct pmap *kpm = pmap_kernel(), *pm; 3657 int s; 3658 paddr_t ptaddr; 3659 struct vm_page *ptp; 3660 3661 if (maxkvaddr <= pmap_curmaxkvaddr) 3662 goto out; /* we are OK */ 3663 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3664 pmap_curmaxkvaddr, maxkvaddr)); 3665 3666 /* 3667 * whoops! we need to add kernel PTPs 3668 */ 3669 3670 s = splhigh(); /* to be safe */ 3671 simple_lock(&kpm->pm_obj.vmobjlock); 3672 /* due to the way the arm pmap works we map 4MB at a time */ 3673 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3674 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3675 3676 if (uvm.page_init_done == FALSE) { 3677 3678 /* 3679 * we're growing the kernel pmap early (from 3680 * uvm_pageboot_alloc()). this case must be 3681 * handled a little differently. 3682 */ 3683 3684 if (uvm_page_physget(&ptaddr) == FALSE) 3685 panic("pmap_growkernel: out of memory"); 3686 pmap_zero_page(ptaddr); 3687 3688 /* map this page in */ 3689 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, 3690 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3691 3692 /* count PTP as resident */ 3693 kpm->pm_stats.resident_count++; 3694 continue; 3695 } 3696 3697 /* 3698 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3699 * pmap_initialized == FALSE CASE! WE MAY BE 3700 * INVOKED WHILE pmap_init() IS RUNNING! 3701 */ 3702 3703 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3704 panic("pmap_growkernel: alloc ptp failed"); 3705 3706 /* distribute new kernel PTP to all active pmaps */ 3707 simple_lock(&pmaps_lock); 3708 LIST_FOREACH(pm, &pmaps, pm_list) { 3709 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3710 VM_PAGE_TO_PHYS(ptp), 3711 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3712 } 3713 3714 /* Invalidate the PTPT cache. */ 3715 pool_cache_invalidate(&pmap_ptpt_cache); 3716 pmap_ptpt_cache_generation++; 3717 3718 simple_unlock(&pmaps_lock); 3719 } 3720 3721 /* 3722 * flush out the cache, expensive but growkernel will happen so 3723 * rarely 3724 */ 3725 cpu_tlb_flushD(); 3726 cpu_cpwait(); 3727 3728 simple_unlock(&kpm->pm_obj.vmobjlock); 3729 splx(s); 3730 3731 out: 3732 return (pmap_curmaxkvaddr); 3733 } 3734 3735 /************************ Utility routines ****************************/ 3736 3737 /* 3738 * vector_page_setprot: 3739 * 3740 * Manipulate the protection of the vector page. 3741 */ 3742 void 3743 vector_page_setprot(int prot) 3744 { 3745 pt_entry_t *pte; 3746 3747 pte = vtopte(vector_page); 3748 3749 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3750 PTE_SYNC(pte); 3751 cpu_tlb_flushD_SE(vector_page); 3752 cpu_cpwait(); 3753 } 3754 3755 /************************ Bootstrapping routines ****************************/ 3756 3757 /* 3758 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3759 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3760 * find them as necessary. 3761 * 3762 * Note that the data on this list is not valid after initarm() returns. 3763 */ 3764 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3765 3766 static vaddr_t 3767 kernel_pt_lookup(paddr_t pa) 3768 { 3769 pv_addr_t *pv; 3770 3771 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3772 if (pv->pv_pa == pa) 3773 return (pv->pv_va); 3774 } 3775 return (0); 3776 } 3777 3778 /* 3779 * pmap_map_section: 3780 * 3781 * Create a single section mapping. 3782 */ 3783 void 3784 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3785 { 3786 pd_entry_t *pde = (pd_entry_t *) l1pt; 3787 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3788 3789 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3790 3791 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3792 L1_S_PROT(PTE_KERNEL, prot) | fl; 3793 } 3794 3795 /* 3796 * pmap_map_entry: 3797 * 3798 * Create a single page mapping. 3799 */ 3800 void 3801 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3802 { 3803 pd_entry_t *pde = (pd_entry_t *) l1pt; 3804 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3805 pt_entry_t *pte; 3806 3807 KASSERT(((va | pa) & PGOFSET) == 0); 3808 3809 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3810 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3811 3812 pte = (pt_entry_t *) 3813 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3814 if (pte == NULL) 3815 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3816 3817 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3818 L2_S_PROT(PTE_KERNEL, prot) | fl; 3819 } 3820 3821 /* 3822 * pmap_link_l2pt: 3823 * 3824 * Link the L2 page table specified by "pa" into the L1 3825 * page table at the slot for "va". 3826 */ 3827 void 3828 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3829 { 3830 pd_entry_t *pde = (pd_entry_t *) l1pt; 3831 u_int slot = va >> L1_S_SHIFT; 3832 3833 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3834 3835 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3836 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3837 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3838 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3839 3840 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3841 } 3842 3843 /* 3844 * pmap_map_chunk: 3845 * 3846 * Map a chunk of memory using the most efficient mappings 3847 * possible (section, large page, small page) into the 3848 * provided L1 and L2 tables at the specified virtual address. 3849 */ 3850 vsize_t 3851 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3852 int prot, int cache) 3853 { 3854 pd_entry_t *pde = (pd_entry_t *) l1pt; 3855 pt_entry_t *pte, fl; 3856 vsize_t resid; 3857 int i; 3858 3859 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3860 3861 if (l1pt == 0) 3862 panic("pmap_map_chunk: no L1 table provided"); 3863 3864 #ifdef VERBOSE_INIT_ARM 3865 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3866 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3867 #endif 3868 3869 size = resid; 3870 3871 while (resid > 0) { 3872 /* See if we can use a section mapping. */ 3873 if (((pa | va) & L1_S_OFFSET) == 0 && 3874 resid >= L1_S_SIZE) { 3875 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3876 #ifdef VERBOSE_INIT_ARM 3877 printf("S"); 3878 #endif 3879 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3880 L1_S_PROT(PTE_KERNEL, prot) | fl; 3881 va += L1_S_SIZE; 3882 pa += L1_S_SIZE; 3883 resid -= L1_S_SIZE; 3884 continue; 3885 } 3886 3887 /* 3888 * Ok, we're going to use an L2 table. Make sure 3889 * one is actually in the corresponding L1 slot 3890 * for the current VA. 3891 */ 3892 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3893 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3894 3895 pte = (pt_entry_t *) 3896 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3897 if (pte == NULL) 3898 panic("pmap_map_chunk: can't find L2 table for VA" 3899 "0x%08lx", va); 3900 3901 /* See if we can use a L2 large page mapping. */ 3902 if (((pa | va) & L2_L_OFFSET) == 0 && 3903 resid >= L2_L_SIZE) { 3904 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3905 #ifdef VERBOSE_INIT_ARM 3906 printf("L"); 3907 #endif 3908 for (i = 0; i < 16; i++) { 3909 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3910 L2_L_PROTO | pa | 3911 L2_L_PROT(PTE_KERNEL, prot) | fl; 3912 } 3913 va += L2_L_SIZE; 3914 pa += L2_L_SIZE; 3915 resid -= L2_L_SIZE; 3916 continue; 3917 } 3918 3919 /* Use a small page mapping. */ 3920 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3921 #ifdef VERBOSE_INIT_ARM 3922 printf("P"); 3923 #endif 3924 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3925 L2_S_PROT(PTE_KERNEL, prot) | fl; 3926 va += NBPG; 3927 pa += NBPG; 3928 resid -= NBPG; 3929 } 3930 #ifdef VERBOSE_INIT_ARM 3931 printf("\n"); 3932 #endif 3933 return (size); 3934 } 3935 3936 /********************** PTE initialization routines **************************/ 3937 3938 /* 3939 * These routines are called when the CPU type is identified to set up 3940 * the PTE prototypes, cache modes, etc. 3941 * 3942 * The variables are always here, just in case LKMs need to reference 3943 * them (though, they shouldn't). 3944 */ 3945 3946 pt_entry_t pte_l1_s_cache_mode; 3947 pt_entry_t pte_l1_s_cache_mask; 3948 3949 pt_entry_t pte_l2_l_cache_mode; 3950 pt_entry_t pte_l2_l_cache_mask; 3951 3952 pt_entry_t pte_l2_s_cache_mode; 3953 pt_entry_t pte_l2_s_cache_mask; 3954 3955 pt_entry_t pte_l2_s_prot_u; 3956 pt_entry_t pte_l2_s_prot_w; 3957 pt_entry_t pte_l2_s_prot_mask; 3958 3959 pt_entry_t pte_l1_s_proto; 3960 pt_entry_t pte_l1_c_proto; 3961 pt_entry_t pte_l2_s_proto; 3962 3963 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3964 void (*pmap_zero_page_func)(paddr_t); 3965 3966 #if ARM_MMU_GENERIC == 1 3967 void 3968 pmap_pte_init_generic(void) 3969 { 3970 3971 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3972 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3973 3974 pte_l2_l_cache_mode = L2_B|L2_C; 3975 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3976 3977 pte_l2_s_cache_mode = L2_B|L2_C; 3978 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3979 3980 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3981 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3982 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3983 3984 pte_l1_s_proto = L1_S_PROTO_generic; 3985 pte_l1_c_proto = L1_C_PROTO_generic; 3986 pte_l2_s_proto = L2_S_PROTO_generic; 3987 3988 pmap_copy_page_func = pmap_copy_page_generic; 3989 pmap_zero_page_func = pmap_zero_page_generic; 3990 } 3991 3992 #if defined(CPU_ARM9) 3993 void 3994 pmap_pte_init_arm9(void) 3995 { 3996 3997 /* 3998 * ARM9 is compatible with generic, but we want to use 3999 * write-through caching for now. 4000 */ 4001 pmap_pte_init_generic(); 4002 4003 pte_l1_s_cache_mode = L1_S_C; 4004 pte_l2_l_cache_mode = L2_C; 4005 pte_l2_s_cache_mode = L2_C; 4006 } 4007 #endif /* CPU_ARM9 */ 4008 #endif /* ARM_MMU_GENERIC == 1 */ 4009 4010 #if ARM_MMU_XSCALE == 1 4011 void 4012 pmap_pte_init_xscale(void) 4013 { 4014 uint32_t auxctl; 4015 4016 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 4017 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 4018 4019 pte_l2_l_cache_mode = L2_B|L2_C; 4020 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 4021 4022 pte_l2_s_cache_mode = L2_B|L2_C; 4023 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 4024 4025 #ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE 4026 /* 4027 * The XScale core has an enhanced mode where writes that 4028 * miss the cache cause a cache line to be allocated. This 4029 * is significantly faster than the traditional, write-through 4030 * behavior of this case. 4031 * 4032 * However, there is a bug lurking in this pmap module, or in 4033 * other parts of the VM system, or both, which causes corruption 4034 * of NFS-backed files when this cache mode is used. We have 4035 * an ugly work-around for this problem (disable r/w-allocate 4036 * for managed kernel mappings), but the bug is still evil enough 4037 * to consider this cache mode "experimental". 4038 */ 4039 pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X); 4040 pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X); 4041 pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X); 4042 #endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */ 4043 4044 #ifdef XSCALE_CACHE_WRITE_THROUGH 4045 /* 4046 * Some versions of the XScale core have various bugs in 4047 * their cache units, the work-around for which is to run 4048 * the cache in write-through mode. Unfortunately, this 4049 * has a major (negative) impact on performance. So, we 4050 * go ahead and run fast-and-loose, in the hopes that we 4051 * don't line up the planets in a way that will trip the 4052 * bugs. 4053 * 4054 * However, we give you the option to be slow-but-correct. 4055 */ 4056 pte_l1_s_cache_mode = L1_S_C; 4057 pte_l2_l_cache_mode = L2_C; 4058 pte_l2_s_cache_mode = L2_C; 4059 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 4060 4061 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 4062 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 4063 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 4064 4065 pte_l1_s_proto = L1_S_PROTO_xscale; 4066 pte_l1_c_proto = L1_C_PROTO_xscale; 4067 pte_l2_s_proto = L2_S_PROTO_xscale; 4068 4069 pmap_copy_page_func = pmap_copy_page_xscale; 4070 pmap_zero_page_func = pmap_zero_page_xscale; 4071 4072 /* 4073 * Disable ECC protection of page table access, for now. 4074 */ 4075 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4076 : "=r" (auxctl)); 4077 auxctl &= ~XSCALE_AUXCTL_P; 4078 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4079 : 4080 : "r" (auxctl)); 4081 } 4082 4083 /* 4084 * xscale_setup_minidata: 4085 * 4086 * Set up the mini-data cache clean area. We require the 4087 * caller to allocate the right amount of physically and 4088 * virtually contiguous space. 4089 */ 4090 void 4091 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 4092 { 4093 extern vaddr_t xscale_minidata_clean_addr; 4094 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 4095 pd_entry_t *pde = (pd_entry_t *) l1pt; 4096 pt_entry_t *pte; 4097 vsize_t size; 4098 uint32_t auxctl; 4099 4100 xscale_minidata_clean_addr = va; 4101 4102 /* Round it to page size. */ 4103 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 4104 4105 for (; size != 0; 4106 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4107 pte = (pt_entry_t *) 4108 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4109 if (pte == NULL) 4110 panic("xscale_setup_minidata: can't find L2 table for " 4111 "VA 0x%08lx", va); 4112 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4113 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4114 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4115 } 4116 4117 /* 4118 * Configure the mini-data cache for write-back with 4119 * read/write-allocate. 4120 * 4121 * NOTE: In order to reconfigure the mini-data cache, we must 4122 * make sure it contains no valid data! In order to do that, 4123 * we must issue a global data cache invalidate command! 4124 * 4125 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4126 * THIS IS VERY IMPORTANT! 4127 */ 4128 4129 /* Invalidate data and mini-data. */ 4130 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4131 : 4132 : "r" (auxctl)); 4133 4134 4135 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4136 : "=r" (auxctl)); 4137 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4138 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4139 : 4140 : "r" (auxctl)); 4141 } 4142 #endif /* ARM_MMU_XSCALE == 1 */ 4143
Indexes created Tue Sep 30 10:09:55 GMT 2025