pmap.c revision 1.116
1 /* $NetBSD: pmap.c,v 1.116 2002/09/05 18:34:00 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.116 2002/09/05 18:34:00 jdolecek Exp $"); 147 148 #ifdef PMAP_DEBUG 149 #define PDEBUG(_lev_,_stat_) \ 150 if (pmap_debug_level >= (_lev_)) \ 151 ((_stat_)) 152 int pmap_debug_level = -2; 153 void pmap_dump_pvlist(vaddr_t phys, char *m); 154 155 /* 156 * for switching to potentially finer grained debugging 157 */ 158 #define PDB_FOLLOW 0x0001 159 #define PDB_INIT 0x0002 160 #define PDB_ENTER 0x0004 161 #define PDB_REMOVE 0x0008 162 #define PDB_CREATE 0x0010 163 #define PDB_PTPAGE 0x0020 164 #define PDB_GROWKERN 0x0040 165 #define PDB_BITS 0x0080 166 #define PDB_COLLECT 0x0100 167 #define PDB_PROTECT 0x0200 168 #define PDB_MAP_L1 0x0400 169 #define PDB_BOOTSTRAP 0x1000 170 #define PDB_PARANOIA 0x2000 171 #define PDB_WIRING 0x4000 172 #define PDB_PVDUMP 0x8000 173 174 int debugmap = 0; 175 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 176 #define NPDEBUG(_lev_,_stat_) \ 177 if (pmapdebug & (_lev_)) \ 178 ((_stat_)) 179 180 #else /* PMAP_DEBUG */ 181 #define PDEBUG(_lev_,_stat_) /* Nothing */ 182 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 183 #endif /* PMAP_DEBUG */ 184 185 struct pmap kernel_pmap_store; 186 187 /* 188 * linked list of all non-kernel pmaps 189 */ 190 191 static LIST_HEAD(, pmap) pmaps; 192 193 /* 194 * pool that pmap structures are allocated from 195 */ 196 197 struct pool pmap_pmap_pool; 198 199 /* 200 * pool/cache that PT-PT's are allocated from 201 */ 202 203 struct pool pmap_ptpt_pool; 204 struct pool_cache pmap_ptpt_cache; 205 u_int pmap_ptpt_cache_generation; 206 207 static void *pmap_ptpt_page_alloc(struct pool *, int); 208 static void pmap_ptpt_page_free(struct pool *, void *); 209 210 struct pool_allocator pmap_ptpt_allocator = { 211 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 212 }; 213 214 static int pmap_ptpt_ctor(void *, void *, int); 215 216 static pt_entry_t *csrc_pte, *cdst_pte; 217 static vaddr_t csrcp, cdstp; 218 219 char *memhook; 220 extern caddr_t msgbufaddr; 221 222 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 223 /* 224 * locking data structures 225 */ 226 227 static struct lock pmap_main_lock; 228 static struct simplelock pvalloc_lock; 229 static struct simplelock pmaps_lock; 230 #ifdef LOCKDEBUG 231 #define PMAP_MAP_TO_HEAD_LOCK() \ 232 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 233 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 234 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 235 236 #define PMAP_HEAD_TO_MAP_LOCK() \ 237 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 238 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 239 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 240 #else 241 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 242 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 244 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 245 #endif /* LOCKDEBUG */ 246 247 /* 248 * pv_page management structures: locked by pvalloc_lock 249 */ 250 251 TAILQ_HEAD(pv_pagelist, pv_page); 252 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 253 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 254 static int pv_nfpvents; /* # of free pv entries */ 255 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 256 static vaddr_t pv_cachedva; /* cached VA for later use */ 257 258 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 259 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 260 /* high water mark */ 261 262 /* 263 * local prototypes 264 */ 265 266 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 267 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 268 #define ALLOCPV_NEED 0 /* need PV now */ 269 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 270 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 271 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 272 static void pmap_enter_pv __P((struct vm_page *, 273 struct pv_entry *, struct pmap *, 274 vaddr_t, struct vm_page *, int)); 275 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 276 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 277 static void pmap_free_pv_doit __P((struct pv_entry *)); 278 static void pmap_free_pvpage __P((void)); 279 static boolean_t pmap_is_curpmap __P((struct pmap *)); 280 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 281 vaddr_t)); 282 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 283 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 284 285 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 286 u_int, u_int)); 287 288 /* 289 * Structure that describes and L1 table. 290 */ 291 struct l1pt { 292 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 293 struct pglist pt_plist; /* Allocated page list */ 294 vaddr_t pt_va; /* Allocated virtual address */ 295 int pt_flags; /* Flags */ 296 }; 297 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 298 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 299 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 300 301 static void pmap_free_l1pt __P((struct l1pt *)); 302 static int pmap_allocpagedir __P((struct pmap *)); 303 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 304 static void pmap_remove_all __P((struct vm_page *)); 305 306 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 307 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 308 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 309 310 extern paddr_t physical_start; 311 extern paddr_t physical_end; 312 extern unsigned int free_pages; 313 extern int max_processes; 314 315 vaddr_t virtual_avail; 316 vaddr_t virtual_end; 317 vaddr_t pmap_curmaxkvaddr; 318 319 vaddr_t avail_start; 320 vaddr_t avail_end; 321 322 extern pv_addr_t systempage; 323 324 /* Variables used by the L1 page table queue code */ 325 SIMPLEQ_HEAD(l1pt_queue, l1pt); 326 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 327 static int l1pt_static_queue_count; /* items in the static l1 queue */ 328 static int l1pt_static_create_count; /* static l1 items created */ 329 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 330 static int l1pt_queue_count; /* items in the l1 queue */ 331 static int l1pt_create_count; /* stat - L1's create count */ 332 static int l1pt_reuse_count; /* stat - L1's reused count */ 333 334 /* Local function prototypes (not used outside this file) */ 335 void pmap_pinit __P((struct pmap *)); 336 void pmap_freepagedir __P((struct pmap *)); 337 338 /* Other function prototypes */ 339 extern void bzero_page __P((vaddr_t)); 340 extern void bcopy_page __P((vaddr_t, vaddr_t)); 341 342 struct l1pt *pmap_alloc_l1pt __P((void)); 343 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 344 vaddr_t l2pa, int)); 345 346 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 347 static void pmap_unmap_ptes __P((struct pmap *)); 348 349 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 350 pt_entry_t *, boolean_t)); 351 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 352 pt_entry_t *, boolean_t)); 353 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 354 pt_entry_t *, boolean_t)); 355 356 /* 357 * real definition of pv_entry. 358 */ 359 360 struct pv_entry { 361 struct pv_entry *pv_next; /* next pv_entry */ 362 struct pmap *pv_pmap; /* pmap where mapping lies */ 363 vaddr_t pv_va; /* virtual address for mapping */ 364 int pv_flags; /* flags */ 365 struct vm_page *pv_ptp; /* vm_page for the ptp */ 366 }; 367 368 /* 369 * pv_entrys are dynamically allocated in chunks from a single page. 370 * we keep track of how many pv_entrys are in use for each page and 371 * we can free pv_entry pages if needed. there is one lock for the 372 * entire allocation system. 373 */ 374 375 struct pv_page_info { 376 TAILQ_ENTRY(pv_page) pvpi_list; 377 struct pv_entry *pvpi_pvfree; 378 int pvpi_nfree; 379 }; 380 381 /* 382 * number of pv_entry's in a pv_page 383 * (note: won't work on systems where NPBG isn't a constant) 384 */ 385 386 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 387 sizeof(struct pv_entry)) 388 389 /* 390 * a pv_page: where pv_entrys are allocated from 391 */ 392 393 struct pv_page { 394 struct pv_page_info pvinfo; 395 struct pv_entry pvents[PVE_PER_PVPAGE]; 396 }; 397 398 #ifdef MYCROFT_HACK 399 int mycroft_hack = 0; 400 #endif 401 402 /* Function to set the debug level of the pmap code */ 403 404 #ifdef PMAP_DEBUG 405 void 406 pmap_debug(int level) 407 { 408 pmap_debug_level = level; 409 printf("pmap_debug: level=%d\n", pmap_debug_level); 410 } 411 #endif /* PMAP_DEBUG */ 412 413 __inline static boolean_t 414 pmap_is_curpmap(struct pmap *pmap) 415 { 416 417 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 418 pmap == pmap_kernel()) 419 return (TRUE); 420 421 return (FALSE); 422 } 423 424 /* 425 * PTE_SYNC_CURRENT: 426 * 427 * Make sure the pte is flushed to RAM. If the pmap is 428 * not the current pmap, then also evict the pte from 429 * any cache lines. 430 */ 431 #define PTE_SYNC_CURRENT(pmap, pte) \ 432 do { \ 433 if (pmap_is_curpmap(pmap)) \ 434 PTE_SYNC(pte); \ 435 else \ 436 PTE_FLUSH(pte); \ 437 } while (/*CONSTCOND*/0) 438 439 /* 440 * PTE_FLUSH_ALT: 441 * 442 * Make sure the pte is not in any cache lines. We expect 443 * this to be used only when a pte has not been modified. 444 */ 445 #define PTE_FLUSH_ALT(pmap, pte) \ 446 do { \ 447 if (pmap_is_curpmap(pmap) == 0) \ 448 PTE_FLUSH(pte); \ 449 } while (/*CONSTCOND*/0) 450 451 /* 452 * p v _ e n t r y f u n c t i o n s 453 */ 454 455 /* 456 * pv_entry allocation functions: 457 * the main pv_entry allocation functions are: 458 * pmap_alloc_pv: allocate a pv_entry structure 459 * pmap_free_pv: free one pv_entry 460 * pmap_free_pvs: free a list of pv_entrys 461 * 462 * the rest are helper functions 463 */ 464 465 /* 466 * pmap_alloc_pv: inline function to allocate a pv_entry structure 467 * => we lock pvalloc_lock 468 * => if we fail, we call out to pmap_alloc_pvpage 469 * => 3 modes: 470 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 471 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 472 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 473 * one now 474 * 475 * "try" is for optional functions like pmap_copy(). 476 */ 477 478 __inline static struct pv_entry * 479 pmap_alloc_pv(struct pmap *pmap, int mode) 480 { 481 struct pv_page *pvpage; 482 struct pv_entry *pv; 483 484 simple_lock(&pvalloc_lock); 485 486 pvpage = TAILQ_FIRST(&pv_freepages); 487 488 if (pvpage != NULL) { 489 pvpage->pvinfo.pvpi_nfree--; 490 if (pvpage->pvinfo.pvpi_nfree == 0) { 491 /* nothing left in this one? */ 492 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 493 } 494 pv = pvpage->pvinfo.pvpi_pvfree; 495 KASSERT(pv); 496 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 497 pv_nfpvents--; /* took one from pool */ 498 } else { 499 pv = NULL; /* need more of them */ 500 } 501 502 /* 503 * if below low water mark or we didn't get a pv_entry we try and 504 * create more pv_entrys ... 505 */ 506 507 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 508 if (pv == NULL) 509 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 510 mode : ALLOCPV_NEED); 511 else 512 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 513 } 514 515 simple_unlock(&pvalloc_lock); 516 return(pv); 517 } 518 519 /* 520 * pmap_alloc_pvpage: maybe allocate a new pvpage 521 * 522 * if need_entry is false: try and allocate a new pv_page 523 * if need_entry is true: try and allocate a new pv_page and return a 524 * new pv_entry from it. if we are unable to allocate a pv_page 525 * we make a last ditch effort to steal a pv_page from some other 526 * mapping. if that fails, we panic... 527 * 528 * => we assume that the caller holds pvalloc_lock 529 */ 530 531 static struct pv_entry * 532 pmap_alloc_pvpage(struct pmap *pmap, int mode) 533 { 534 struct vm_page *pg; 535 struct pv_page *pvpage; 536 struct pv_entry *pv; 537 int s; 538 539 /* 540 * if we need_entry and we've got unused pv_pages, allocate from there 541 */ 542 543 pvpage = TAILQ_FIRST(&pv_unusedpgs); 544 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 545 546 /* move it to pv_freepages list */ 547 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 548 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 549 550 /* allocate a pv_entry */ 551 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 552 pv = pvpage->pvinfo.pvpi_pvfree; 553 KASSERT(pv); 554 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 555 556 pv_nfpvents--; /* took one from pool */ 557 return(pv); 558 } 559 560 /* 561 * see if we've got a cached unmapped VA that we can map a page in. 562 * if not, try to allocate one. 563 */ 564 565 566 if (pv_cachedva == 0) { 567 s = splvm(); 568 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 569 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 570 splx(s); 571 if (pv_cachedva == 0) { 572 return (NULL); 573 } 574 } 575 576 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 577 UVM_PGA_USERESERVE); 578 579 if (pg == NULL) 580 return (NULL); 581 pg->flags &= ~PG_BUSY; /* never busy */ 582 583 /* 584 * add a mapping for our new pv_page and free its entrys (save one!) 585 * 586 * NOTE: If we are allocating a PV page for the kernel pmap, the 587 * pmap is already locked! (...but entering the mapping is safe...) 588 */ 589 590 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 591 VM_PROT_READ|VM_PROT_WRITE); 592 pmap_update(pmap_kernel()); 593 pvpage = (struct pv_page *) pv_cachedva; 594 pv_cachedva = 0; 595 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 596 } 597 598 /* 599 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 600 * 601 * => caller must hold pvalloc_lock 602 * => if need_entry is true, we allocate and return one pv_entry 603 */ 604 605 static struct pv_entry * 606 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 607 { 608 int tofree, lcv; 609 610 /* do we need to return one? */ 611 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 612 613 pvp->pvinfo.pvpi_pvfree = NULL; 614 pvp->pvinfo.pvpi_nfree = tofree; 615 for (lcv = 0 ; lcv < tofree ; lcv++) { 616 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 617 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 618 } 619 if (need_entry) 620 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 621 else 622 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 623 pv_nfpvents += tofree; 624 return((need_entry) ? &pvp->pvents[lcv] : NULL); 625 } 626 627 /* 628 * pmap_free_pv_doit: actually free a pv_entry 629 * 630 * => do not call this directly! instead use either 631 * 1. pmap_free_pv ==> free a single pv_entry 632 * 2. pmap_free_pvs => free a list of pv_entrys 633 * => we must be holding pvalloc_lock 634 */ 635 636 __inline static void 637 pmap_free_pv_doit(struct pv_entry *pv) 638 { 639 struct pv_page *pvp; 640 641 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 642 pv_nfpvents++; 643 pvp->pvinfo.pvpi_nfree++; 644 645 /* nfree == 1 => fully allocated page just became partly allocated */ 646 if (pvp->pvinfo.pvpi_nfree == 1) { 647 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 648 } 649 650 /* free it */ 651 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 652 pvp->pvinfo.pvpi_pvfree = pv; 653 654 /* 655 * are all pv_page's pv_entry's free? move it to unused queue. 656 */ 657 658 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 659 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 660 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 661 } 662 } 663 664 /* 665 * pmap_free_pv: free a single pv_entry 666 * 667 * => we gain the pvalloc_lock 668 */ 669 670 __inline static void 671 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 672 { 673 simple_lock(&pvalloc_lock); 674 pmap_free_pv_doit(pv); 675 676 /* 677 * Can't free the PV page if the PV entries were associated with 678 * the kernel pmap; the pmap is already locked. 679 */ 680 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 681 pmap != pmap_kernel()) 682 pmap_free_pvpage(); 683 684 simple_unlock(&pvalloc_lock); 685 } 686 687 /* 688 * pmap_free_pvs: free a list of pv_entrys 689 * 690 * => we gain the pvalloc_lock 691 */ 692 693 __inline static void 694 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 695 { 696 struct pv_entry *nextpv; 697 698 simple_lock(&pvalloc_lock); 699 700 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 701 nextpv = pvs->pv_next; 702 pmap_free_pv_doit(pvs); 703 } 704 705 /* 706 * Can't free the PV page if the PV entries were associated with 707 * the kernel pmap; the pmap is already locked. 708 */ 709 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 710 pmap != pmap_kernel()) 711 pmap_free_pvpage(); 712 713 simple_unlock(&pvalloc_lock); 714 } 715 716 717 /* 718 * pmap_free_pvpage: try and free an unused pv_page structure 719 * 720 * => assume caller is holding the pvalloc_lock and that 721 * there is a page on the pv_unusedpgs list 722 * => if we can't get a lock on the kmem_map we try again later 723 */ 724 725 static void 726 pmap_free_pvpage(void) 727 { 728 int s; 729 struct vm_map *map; 730 struct vm_map_entry *dead_entries; 731 struct pv_page *pvp; 732 733 s = splvm(); /* protect kmem_map */ 734 735 pvp = TAILQ_FIRST(&pv_unusedpgs); 736 737 /* 738 * note: watch out for pv_initpage which is allocated out of 739 * kernel_map rather than kmem_map. 740 */ 741 if (pvp == pv_initpage) 742 map = kernel_map; 743 else 744 map = kmem_map; 745 if (vm_map_lock_try(map)) { 746 747 /* remove pvp from pv_unusedpgs */ 748 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 749 750 /* unmap the page */ 751 dead_entries = NULL; 752 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 753 &dead_entries); 754 vm_map_unlock(map); 755 756 if (dead_entries != NULL) 757 uvm_unmap_detach(dead_entries, 0); 758 759 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 760 } 761 if (pvp == pv_initpage) 762 /* no more initpage, we've freed it */ 763 pv_initpage = NULL; 764 765 splx(s); 766 } 767 768 /* 769 * main pv_entry manipulation functions: 770 * pmap_enter_pv: enter a mapping onto a vm_page list 771 * pmap_remove_pv: remove a mappiing from a vm_page list 772 * 773 * NOTE: pmap_enter_pv expects to lock the pvh itself 774 * pmap_remove_pv expects te caller to lock the pvh before calling 775 */ 776 777 /* 778 * pmap_enter_pv: enter a mapping onto a vm_page lst 779 * 780 * => caller should hold the proper lock on pmap_main_lock 781 * => caller should have pmap locked 782 * => we will gain the lock on the vm_page and allocate the new pv_entry 783 * => caller should adjust ptp's wire_count before calling 784 * => caller should not adjust pmap's wire_count 785 */ 786 787 __inline static void 788 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 789 vaddr_t va, struct vm_page *ptp, int flags) 790 { 791 pve->pv_pmap = pmap; 792 pve->pv_va = va; 793 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 794 pve->pv_flags = flags; 795 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 796 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 797 pg->mdpage.pvh_list = pve; /* ... locked list */ 798 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 799 if (pve->pv_flags & PVF_WIRED) 800 ++pmap->pm_stats.wired_count; 801 #ifdef PMAP_ALIAS_DEBUG 802 { 803 int s = splhigh(); 804 if (pve->pv_flags & PVF_WRITE) 805 pg->mdpage.rw_mappings++; 806 else 807 pg->mdpage.ro_mappings++; 808 if (pg->mdpage.rw_mappings != 0 && 809 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 810 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 811 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 812 pg->mdpage.krw_mappings); 813 } 814 splx(s); 815 } 816 #endif /* PMAP_ALIAS_DEBUG */ 817 } 818 819 /* 820 * pmap_remove_pv: try to remove a mapping from a pv_list 821 * 822 * => caller should hold proper lock on pmap_main_lock 823 * => pmap should be locked 824 * => caller should hold lock on vm_page [so that attrs can be adjusted] 825 * => caller should adjust ptp's wire_count and free PTP if needed 826 * => caller should NOT adjust pmap's wire_count 827 * => we return the removed pve 828 */ 829 830 __inline static struct pv_entry * 831 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 832 { 833 struct pv_entry *pve, **prevptr; 834 835 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 836 pve = *prevptr; 837 while (pve) { 838 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 839 *prevptr = pve->pv_next; /* remove it! */ 840 if (pve->pv_flags & PVF_WIRED) 841 --pmap->pm_stats.wired_count; 842 #ifdef PMAP_ALIAS_DEBUG 843 { 844 int s = splhigh(); 845 if (pve->pv_flags & PVF_WRITE) { 846 KASSERT(pg->mdpage.rw_mappings != 0); 847 pg->mdpage.rw_mappings--; 848 } else { 849 KASSERT(pg->mdpage.ro_mappings != 0); 850 pg->mdpage.ro_mappings--; 851 } 852 splx(s); 853 } 854 #endif /* PMAP_ALIAS_DEBUG */ 855 break; 856 } 857 prevptr = &pve->pv_next; /* previous pointer */ 858 pve = pve->pv_next; /* advance */ 859 } 860 return(pve); /* return removed pve */ 861 } 862 863 /* 864 * 865 * pmap_modify_pv: Update pv flags 866 * 867 * => caller should hold lock on vm_page [so that attrs can be adjusted] 868 * => caller should NOT adjust pmap's wire_count 869 * => caller must call pmap_vac_me_harder() if writable status of a page 870 * may have changed. 871 * => we return the old flags 872 * 873 * Modify a physical-virtual mapping in the pv table 874 */ 875 876 static /* __inline */ u_int 877 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 878 u_int bic_mask, u_int eor_mask) 879 { 880 struct pv_entry *npv; 881 u_int flags, oflags; 882 883 /* 884 * There is at least one VA mapping this page. 885 */ 886 887 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 888 if (pmap == npv->pv_pmap && va == npv->pv_va) { 889 oflags = npv->pv_flags; 890 npv->pv_flags = flags = 891 ((oflags & ~bic_mask) ^ eor_mask); 892 if ((flags ^ oflags) & PVF_WIRED) { 893 if (flags & PVF_WIRED) 894 ++pmap->pm_stats.wired_count; 895 else 896 --pmap->pm_stats.wired_count; 897 } 898 #ifdef PMAP_ALIAS_DEBUG 899 { 900 int s = splhigh(); 901 if ((flags ^ oflags) & PVF_WRITE) { 902 if (flags & PVF_WRITE) { 903 pg->mdpage.rw_mappings++; 904 pg->mdpage.ro_mappings--; 905 if (pg->mdpage.rw_mappings != 0 && 906 (pg->mdpage.kro_mappings != 0 || 907 pg->mdpage.krw_mappings != 0)) { 908 printf("pmap_modify_pv: rw %u, " 909 "kro %u, krw %u\n", 910 pg->mdpage.rw_mappings, 911 pg->mdpage.kro_mappings, 912 pg->mdpage.krw_mappings); 913 } 914 } else { 915 KASSERT(pg->mdpage.rw_mappings != 0); 916 pg->mdpage.rw_mappings--; 917 pg->mdpage.ro_mappings++; 918 } 919 } 920 splx(s); 921 } 922 #endif /* PMAP_ALIAS_DEBUG */ 923 return (oflags); 924 } 925 } 926 return (0); 927 } 928 929 /* 930 * Map the specified level 2 pagetable into the level 1 page table for 931 * the given pmap to cover a chunk of virtual address space starting from the 932 * address specified. 933 */ 934 #define PMAP_PTP_SELFREF 0x01 935 #define PMAP_PTP_CACHEABLE 0x02 936 937 static __inline void 938 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, int flags) 939 { 940 vaddr_t ptva; 941 942 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 943 944 /* Calculate the index into the L1 page table. */ 945 ptva = va >> L1_S_SHIFT; 946 947 /* Map page table into the L1. */ 948 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 949 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 950 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 951 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 952 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 953 954 /* Map the page table into the page table area. */ 955 if (flags & PMAP_PTP_SELFREF) { 956 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 957 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE) | 958 ((flags & PMAP_PTP_CACHEABLE) ? pte_l2_s_cache_mode : 0); 959 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 960 } 961 } 962 963 #if 0 964 static __inline void 965 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 966 { 967 vaddr_t ptva; 968 969 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 970 971 /* Calculate the index into the L1 page table. */ 972 ptva = va >> L1_S_SHIFT; 973 974 /* Unmap page table from the L1. */ 975 pmap->pm_pdir[ptva + 0] = 0; 976 pmap->pm_pdir[ptva + 1] = 0; 977 pmap->pm_pdir[ptva + 2] = 0; 978 pmap->pm_pdir[ptva + 3] = 0; 979 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 980 981 /* Unmap the page table from the page table area. */ 982 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 983 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 984 } 985 #endif 986 987 /* 988 * Used to map a range of physical addresses into kernel 989 * virtual address space. 990 * 991 * For now, VM is already on, we only need to map the 992 * specified memory. 993 * 994 * XXX This routine should eventually go away; it's only used 995 * XXX by machine-dependent crash dump code. 996 */ 997 vaddr_t 998 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 999 { 1000 pt_entry_t *pte; 1001 1002 while (spa < epa) { 1003 pte = vtopte(va); 1004 1005 *pte = L2_S_PROTO | spa | 1006 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 1007 PTE_SYNC(pte); 1008 cpu_tlb_flushID_SE(va); 1009 va += NBPG; 1010 spa += NBPG; 1011 } 1012 pmap_update(pmap_kernel()); 1013 return(va); 1014 } 1015 1016 1017 /* 1018 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1019 * 1020 * bootstrap the pmap system. This is called from initarm and allows 1021 * the pmap system to initailise any structures it requires. 1022 * 1023 * Currently this sets up the kernel_pmap that is statically allocated 1024 * and also allocated virtual addresses for certain page hooks. 1025 * Currently the only one page hook is allocated that is used 1026 * to zero physical pages of memory. 1027 * It also initialises the start and end address of the kernel data space. 1028 */ 1029 1030 char *boot_head; 1031 1032 void 1033 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1034 { 1035 pt_entry_t *pte; 1036 1037 pmap_kernel()->pm_pdir = kernel_l1pt; 1038 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 1039 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1040 simple_lock_init(&pmap_kernel()->pm_lock); 1041 pmap_kernel()->pm_obj.pgops = NULL; 1042 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1043 pmap_kernel()->pm_obj.uo_npages = 0; 1044 pmap_kernel()->pm_obj.uo_refs = 1; 1045 1046 virtual_avail = KERNEL_VM_BASE; 1047 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1048 1049 /* 1050 * now we allocate the "special" VAs which are used for tmp mappings 1051 * by the pmap (and other modules). we allocate the VAs by advancing 1052 * virtual_avail (note that there are no pages mapped at these VAs). 1053 * we find the PTE that maps the allocated VA via the linear PTE 1054 * mapping. 1055 */ 1056 1057 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1058 1059 csrcp = virtual_avail; csrc_pte = pte; 1060 virtual_avail += PAGE_SIZE; pte++; 1061 1062 cdstp = virtual_avail; cdst_pte = pte; 1063 virtual_avail += PAGE_SIZE; pte++; 1064 1065 memhook = (char *) virtual_avail; /* don't need pte */ 1066 virtual_avail += PAGE_SIZE; pte++; 1067 1068 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1069 virtual_avail += round_page(MSGBUFSIZE); 1070 pte += atop(round_page(MSGBUFSIZE)); 1071 1072 /* 1073 * init the static-global locks and global lists. 1074 */ 1075 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1076 simple_lock_init(&pvalloc_lock); 1077 simple_lock_init(&pmaps_lock); 1078 LIST_INIT(&pmaps); 1079 TAILQ_INIT(&pv_freepages); 1080 TAILQ_INIT(&pv_unusedpgs); 1081 1082 /* 1083 * initialize the pmap pool. 1084 */ 1085 1086 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1087 &pool_allocator_nointr); 1088 1089 /* 1090 * initialize the PT-PT pool and cache. 1091 */ 1092 1093 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1094 &pmap_ptpt_allocator); 1095 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1096 pmap_ptpt_ctor, NULL, NULL); 1097 1098 cpu_dcache_wbinv_all(); 1099 } 1100 1101 /* 1102 * void pmap_init(void) 1103 * 1104 * Initialize the pmap module. 1105 * Called by vm_init() in vm/vm_init.c in order to initialise 1106 * any structures that the pmap system needs to map virtual memory. 1107 */ 1108 1109 extern int physmem; 1110 1111 void 1112 pmap_init(void) 1113 { 1114 1115 /* 1116 * Set the available memory vars - These do not map to real memory 1117 * addresses and cannot as the physical memory is fragmented. 1118 * They are used by ps for %mem calculations. 1119 * One could argue whether this should be the entire memory or just 1120 * the memory that is useable in a user process. 1121 */ 1122 avail_start = 0; 1123 avail_end = physmem * NBPG; 1124 1125 /* 1126 * now we need to free enough pv_entry structures to allow us to get 1127 * the kmem_map/kmem_object allocated and inited (done after this 1128 * function is finished). to do this we allocate one bootstrap page out 1129 * of kernel_map and use it to provide an initial pool of pv_entry 1130 * structures. we never free this page. 1131 */ 1132 1133 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1134 if (pv_initpage == NULL) 1135 panic("pmap_init: pv_initpage"); 1136 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1137 pv_nfpvents = 0; 1138 (void) pmap_add_pvpage(pv_initpage, FALSE); 1139 1140 pmap_initialized = TRUE; 1141 1142 /* Initialise our L1 page table queues and counters */ 1143 SIMPLEQ_INIT(&l1pt_static_queue); 1144 l1pt_static_queue_count = 0; 1145 l1pt_static_create_count = 0; 1146 SIMPLEQ_INIT(&l1pt_queue); 1147 l1pt_queue_count = 0; 1148 l1pt_create_count = 0; 1149 l1pt_reuse_count = 0; 1150 } 1151 1152 /* 1153 * pmap_postinit() 1154 * 1155 * This routine is called after the vm and kmem subsystems have been 1156 * initialised. This allows the pmap code to perform any initialisation 1157 * that can only be done one the memory allocation is in place. 1158 */ 1159 1160 void 1161 pmap_postinit(void) 1162 { 1163 int loop; 1164 struct l1pt *pt; 1165 1166 #ifdef PMAP_STATIC_L1S 1167 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1168 #else /* PMAP_STATIC_L1S */ 1169 for (loop = 0; loop < max_processes; ++loop) { 1170 #endif /* PMAP_STATIC_L1S */ 1171 /* Allocate a L1 page table */ 1172 pt = pmap_alloc_l1pt(); 1173 if (!pt) 1174 panic("Cannot allocate static L1 page tables\n"); 1175 1176 /* Clean it */ 1177 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1178 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1179 /* Add the page table to the queue */ 1180 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1181 ++l1pt_static_queue_count; 1182 ++l1pt_static_create_count; 1183 } 1184 } 1185 1186 1187 /* 1188 * Create and return a physical map. 1189 * 1190 * If the size specified for the map is zero, the map is an actual physical 1191 * map, and may be referenced by the hardware. 1192 * 1193 * If the size specified is non-zero, the map will be used in software only, 1194 * and is bounded by that size. 1195 */ 1196 1197 pmap_t 1198 pmap_create(void) 1199 { 1200 struct pmap *pmap; 1201 1202 /* 1203 * Fetch pmap entry from the pool 1204 */ 1205 1206 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1207 /* XXX is this really needed! */ 1208 memset(pmap, 0, sizeof(*pmap)); 1209 1210 simple_lock_init(&pmap->pm_obj.vmobjlock); 1211 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1212 TAILQ_INIT(&pmap->pm_obj.memq); 1213 pmap->pm_obj.uo_npages = 0; 1214 pmap->pm_obj.uo_refs = 1; 1215 pmap->pm_stats.wired_count = 0; 1216 pmap->pm_stats.resident_count = 1; 1217 pmap->pm_ptphint = NULL; 1218 1219 /* Now init the machine part of the pmap */ 1220 pmap_pinit(pmap); 1221 return(pmap); 1222 } 1223 1224 /* 1225 * pmap_alloc_l1pt() 1226 * 1227 * This routine allocates physical and virtual memory for a L1 page table 1228 * and wires it. 1229 * A l1pt structure is returned to describe the allocated page table. 1230 * 1231 * This routine is allowed to fail if the required memory cannot be allocated. 1232 * In this case NULL is returned. 1233 */ 1234 1235 struct l1pt * 1236 pmap_alloc_l1pt(void) 1237 { 1238 paddr_t pa; 1239 vaddr_t va; 1240 struct l1pt *pt; 1241 int error; 1242 struct vm_page *m; 1243 1244 /* Allocate virtual address space for the L1 page table */ 1245 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1246 if (va == 0) { 1247 #ifdef DIAGNOSTIC 1248 PDEBUG(0, 1249 printf("pmap: Cannot allocate pageable memory for L1\n")); 1250 #endif /* DIAGNOSTIC */ 1251 return(NULL); 1252 } 1253 1254 /* Allocate memory for the l1pt structure */ 1255 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1256 1257 /* 1258 * Allocate pages from the VM system. 1259 */ 1260 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1261 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1262 if (error) { 1263 #ifdef DIAGNOSTIC 1264 PDEBUG(0, 1265 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1266 error)); 1267 #endif /* DIAGNOSTIC */ 1268 /* Release the resources we already have claimed */ 1269 free(pt, M_VMPMAP); 1270 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1271 return(NULL); 1272 } 1273 1274 /* Map our physical pages into our virtual space */ 1275 pt->pt_va = va; 1276 m = TAILQ_FIRST(&pt->pt_plist); 1277 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1278 pa = VM_PAGE_TO_PHYS(m); 1279 1280 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE); 1281 1282 va += NBPG; 1283 m = m->pageq.tqe_next; 1284 } 1285 1286 #ifdef DIAGNOSTIC 1287 if (m) 1288 panic("pmap_alloc_l1pt: pglist not empty\n"); 1289 #endif /* DIAGNOSTIC */ 1290 1291 pt->pt_flags = 0; 1292 return(pt); 1293 } 1294 1295 /* 1296 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1297 */ 1298 static void 1299 pmap_free_l1pt(struct l1pt *pt) 1300 { 1301 /* Separate the physical memory for the virtual space */ 1302 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1303 pmap_update(pmap_kernel()); 1304 1305 /* Return the physical memory */ 1306 uvm_pglistfree(&pt->pt_plist); 1307 1308 /* Free the virtual space */ 1309 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1310 1311 /* Free the l1pt structure */ 1312 free(pt, M_VMPMAP); 1313 } 1314 1315 /* 1316 * pmap_ptpt_page_alloc: 1317 * 1318 * Back-end page allocator for the PT-PT pool. 1319 */ 1320 static void * 1321 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1322 { 1323 struct vm_page *pg; 1324 pt_entry_t *pte; 1325 vaddr_t va; 1326 1327 /* XXX PR_WAITOK? */ 1328 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1329 if (va == 0) 1330 return (NULL); 1331 1332 for (;;) { 1333 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1334 if (pg != NULL) 1335 break; 1336 if ((flags & PR_WAITOK) == 0) { 1337 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1338 return (NULL); 1339 } 1340 uvm_wait("pmap_ptpt"); 1341 } 1342 1343 pte = vtopte(va); 1344 KDASSERT(pmap_pte_v(pte) == 0); 1345 1346 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1347 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1348 PTE_SYNC(pte); 1349 #ifdef PMAP_ALIAS_DEBUG 1350 { 1351 int s = splhigh(); 1352 pg->mdpage.krw_mappings++; 1353 splx(s); 1354 } 1355 #endif /* PMAP_ALIAS_DEBUG */ 1356 1357 return ((void *) va); 1358 } 1359 1360 /* 1361 * pmap_ptpt_page_free: 1362 * 1363 * Back-end page free'er for the PT-PT pool. 1364 */ 1365 static void 1366 pmap_ptpt_page_free(struct pool *pp, void *v) 1367 { 1368 vaddr_t va = (vaddr_t) v; 1369 paddr_t pa; 1370 1371 pa = vtophys(va); 1372 1373 pmap_kremove(va, L2_TABLE_SIZE); 1374 pmap_update(pmap_kernel()); 1375 1376 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1377 1378 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1379 } 1380 1381 /* 1382 * pmap_ptpt_ctor: 1383 * 1384 * Constructor for the PT-PT cache. 1385 */ 1386 static int 1387 pmap_ptpt_ctor(void *arg, void *object, int flags) 1388 { 1389 caddr_t vptpt = object; 1390 1391 /* Page is already zero'd. */ 1392 1393 /* 1394 * Map in kernel PTs. 1395 * 1396 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1397 */ 1398 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1399 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1400 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1401 (KERNEL_PD_SIZE >> 2)); 1402 1403 return (0); 1404 } 1405 1406 /* 1407 * Allocate a page directory. 1408 * This routine will either allocate a new page directory from the pool 1409 * of L1 page tables currently held by the kernel or it will allocate 1410 * a new one via pmap_alloc_l1pt(). 1411 * It will then initialise the l1 page table for use. 1412 */ 1413 static int 1414 pmap_allocpagedir(struct pmap *pmap) 1415 { 1416 vaddr_t vptpt; 1417 paddr_t pa; 1418 struct l1pt *pt; 1419 u_int gen; 1420 1421 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1422 1423 /* Do we have any spare L1's lying around ? */ 1424 if (l1pt_static_queue_count) { 1425 --l1pt_static_queue_count; 1426 pt = SIMPLEQ_FIRST(&l1pt_static_queue); 1427 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt_queue); 1428 } else if (l1pt_queue_count) { 1429 --l1pt_queue_count; 1430 pt = SIMPLEQ_FIRST(&l1pt_queue); 1431 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt_queue); 1432 ++l1pt_reuse_count; 1433 } else { 1434 pt = pmap_alloc_l1pt(); 1435 if (!pt) 1436 return(ENOMEM); 1437 ++l1pt_create_count; 1438 } 1439 1440 /* Store the pointer to the l1 descriptor in the pmap. */ 1441 pmap->pm_l1pt = pt; 1442 1443 /* Get the physical address of the start of the l1 */ 1444 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1445 1446 /* Store the virtual address of the l1 in the pmap. */ 1447 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1448 1449 /* Clean the L1 if it is dirty */ 1450 if (!(pt->pt_flags & PTFLAG_CLEAN)) { 1451 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1452 cpu_dcache_wb_range((vaddr_t) pmap->pm_pdir, 1453 (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1454 } 1455 1456 /* Allocate a page table to map all the page tables for this pmap */ 1457 KASSERT(pmap->pm_vptpt == 0); 1458 1459 try_again: 1460 gen = pmap_ptpt_cache_generation; 1461 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1462 if (vptpt == NULL) { 1463 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1464 pmap_freepagedir(pmap); 1465 return (ENOMEM); 1466 } 1467 1468 /* need to lock this all up for growkernel */ 1469 simple_lock(&pmaps_lock); 1470 1471 if (gen != pmap_ptpt_cache_generation) { 1472 simple_unlock(&pmaps_lock); 1473 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1474 goto try_again; 1475 } 1476 1477 pmap->pm_vptpt = vptpt; 1478 pmap->pm_pptpt = vtophys(vptpt); 1479 1480 /* Duplicate the kernel mappings. */ 1481 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1482 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1483 KERNEL_PD_SIZE); 1484 cpu_dcache_wb_range((vaddr_t)pmap->pm_pdir + 1485 (L1_TABLE_SIZE - KERNEL_PD_SIZE), KERNEL_PD_SIZE); 1486 1487 /* Wire in this page table */ 1488 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, PMAP_PTP_SELFREF); 1489 1490 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1491 1492 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1493 simple_unlock(&pmaps_lock); 1494 1495 return(0); 1496 } 1497 1498 1499 /* 1500 * Initialize a preallocated and zeroed pmap structure, 1501 * such as one in a vmspace structure. 1502 */ 1503 1504 void 1505 pmap_pinit(struct pmap *pmap) 1506 { 1507 int backoff = 6; 1508 int retry = 10; 1509 1510 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1511 1512 /* Keep looping until we succeed in allocating a page directory */ 1513 while (pmap_allocpagedir(pmap) != 0) { 1514 /* 1515 * Ok we failed to allocate a suitable block of memory for an 1516 * L1 page table. This means that either: 1517 * 1. 16KB of virtual address space could not be allocated 1518 * 2. 16KB of physically contiguous memory on a 16KB boundary 1519 * could not be allocated. 1520 * 1521 * Since we cannot fail we will sleep for a while and try 1522 * again. 1523 * 1524 * Searching for a suitable L1 PT is expensive: 1525 * to avoid hogging the system when memory is really 1526 * scarce, use an exponential back-off so that 1527 * eventually we won't retry more than once every 8 1528 * seconds. This should allow other processes to run 1529 * to completion and free up resources. 1530 */ 1531 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1532 NULL); 1533 if (--retry == 0) { 1534 retry = 10; 1535 if (backoff) 1536 --backoff; 1537 } 1538 } 1539 1540 if (vector_page < KERNEL_BASE) { 1541 /* 1542 * Map the vector page. This will also allocate and map 1543 * an L2 table for it. 1544 */ 1545 pmap_enter(pmap, vector_page, systempage.pv_pa, 1546 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1547 pmap_update(pmap); 1548 } 1549 } 1550 1551 void 1552 pmap_freepagedir(struct pmap *pmap) 1553 { 1554 /* Free the memory used for the page table mapping */ 1555 if (pmap->pm_vptpt != 0) { 1556 /* 1557 * XXX Objects freed to a pool cache must be in constructed 1558 * XXX form when freed, but we don't free page tables as we 1559 * XXX go, so we need to zap the mappings here. 1560 * 1561 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1562 */ 1563 memset((caddr_t) pmap->pm_vptpt, 0, 1564 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1565 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1566 } 1567 1568 /* junk the L1 page table */ 1569 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1570 /* Add the page table to the queue */ 1571 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1572 pmap->pm_l1pt, pt_queue); 1573 ++l1pt_static_queue_count; 1574 } else if (l1pt_queue_count < 8) { 1575 /* Add the page table to the queue */ 1576 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1577 ++l1pt_queue_count; 1578 } else 1579 pmap_free_l1pt(pmap->pm_l1pt); 1580 } 1581 1582 /* 1583 * Retire the given physical map from service. 1584 * Should only be called if the map contains no valid mappings. 1585 */ 1586 1587 void 1588 pmap_destroy(struct pmap *pmap) 1589 { 1590 struct vm_page *page; 1591 int count; 1592 1593 if (pmap == NULL) 1594 return; 1595 1596 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1597 1598 /* 1599 * Drop reference count 1600 */ 1601 simple_lock(&pmap->pm_obj.vmobjlock); 1602 count = --pmap->pm_obj.uo_refs; 1603 simple_unlock(&pmap->pm_obj.vmobjlock); 1604 if (count > 0) { 1605 return; 1606 } 1607 1608 /* 1609 * reference count is zero, free pmap resources and then free pmap. 1610 */ 1611 1612 /* 1613 * remove it from global list of pmaps 1614 */ 1615 1616 simple_lock(&pmaps_lock); 1617 LIST_REMOVE(pmap, pm_list); 1618 simple_unlock(&pmaps_lock); 1619 1620 if (vector_page < KERNEL_BASE) { 1621 /* Remove the vector page mapping */ 1622 pmap_remove(pmap, vector_page, vector_page + NBPG); 1623 pmap_update(pmap); 1624 } 1625 1626 /* 1627 * Free any page tables still mapped 1628 * This is only temporay until pmap_enter can count the number 1629 * of mappings made in a page table. Then pmap_remove() can 1630 * reduce the count and free the pagetable when the count 1631 * reaches zero. Note that entries in this list should match the 1632 * contents of the ptpt, however this is faster than walking a 1024 1633 * entries looking for pt's 1634 * taken from i386 pmap.c 1635 */ 1636 /* 1637 * vmobjlock must be held while freeing pages 1638 */ 1639 simple_lock(&pmap->pm_obj.vmobjlock); 1640 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1641 KASSERT((page->flags & PG_BUSY) == 0); 1642 1643 /* Freeing a PT page? The contents are a throw-away. */ 1644 KASSERT((page->offset & PD_OFFSET) == 0);/* XXX KDASSERT */ 1645 cpu_dcache_inv_range((vaddr_t)vtopte(page->offset), PAGE_SIZE); 1646 1647 page->wire_count = 0; 1648 uvm_pagefree(page); 1649 } 1650 simple_unlock(&pmap->pm_obj.vmobjlock); 1651 1652 /* Free the page dir */ 1653 pmap_freepagedir(pmap); 1654 1655 /* return the pmap to the pool */ 1656 pool_put(&pmap_pmap_pool, pmap); 1657 } 1658 1659 1660 /* 1661 * void pmap_reference(struct pmap *pmap) 1662 * 1663 * Add a reference to the specified pmap. 1664 */ 1665 1666 void 1667 pmap_reference(struct pmap *pmap) 1668 { 1669 if (pmap == NULL) 1670 return; 1671 1672 simple_lock(&pmap->pm_lock); 1673 pmap->pm_obj.uo_refs++; 1674 simple_unlock(&pmap->pm_lock); 1675 } 1676 1677 /* 1678 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1679 * 1680 * Return the start and end addresses of the kernel's virtual space. 1681 * These values are setup in pmap_bootstrap and are updated as pages 1682 * are allocated. 1683 */ 1684 1685 void 1686 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1687 { 1688 *start = virtual_avail; 1689 *end = virtual_end; 1690 } 1691 1692 /* 1693 * Activate the address space for the specified process. If the process 1694 * is the current process, load the new MMU context. 1695 */ 1696 void 1697 pmap_activate(struct proc *p) 1698 { 1699 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1700 struct pcb *pcb = &p->p_addr->u_pcb; 1701 1702 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1703 (paddr_t *)&pcb->pcb_pagedir); 1704 1705 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1706 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1707 1708 if (p == curproc) { 1709 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1710 setttb((u_int)pcb->pcb_pagedir); 1711 } 1712 } 1713 1714 /* 1715 * Deactivate the address space of the specified process. 1716 */ 1717 void 1718 pmap_deactivate(struct proc *p) 1719 { 1720 } 1721 1722 /* 1723 * Perform any deferred pmap operations. 1724 */ 1725 void 1726 pmap_update(struct pmap *pmap) 1727 { 1728 1729 /* 1730 * We haven't deferred any pmap operations, but we do need to 1731 * make sure TLB/cache operations have completed. 1732 */ 1733 cpu_cpwait(); 1734 } 1735 1736 /* 1737 * pmap_clean_page() 1738 * 1739 * This is a local function used to work out the best strategy to clean 1740 * a single page referenced by its entry in the PV table. It's used by 1741 * pmap_copy_page, pmap_zero page and maybe some others later on. 1742 * 1743 * Its policy is effectively: 1744 * o If there are no mappings, we don't bother doing anything with the cache. 1745 * o If there is one mapping, we clean just that page. 1746 * o If there are multiple mappings, we clean the entire cache. 1747 * 1748 * So that some functions can be further optimised, it returns 0 if it didn't 1749 * clean the entire cache, or 1 if it did. 1750 * 1751 * XXX One bug in this routine is that if the pv_entry has a single page 1752 * mapped at 0x00000000 a whole cache clean will be performed rather than 1753 * just the 1 page. Since this should not occur in everyday use and if it does 1754 * it will just result in not the most efficient clean for the page. 1755 */ 1756 static int 1757 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1758 { 1759 struct pmap *pmap; 1760 struct pv_entry *npv; 1761 int cache_needs_cleaning = 0; 1762 vaddr_t page_to_clean = 0; 1763 1764 if (pv == NULL) { 1765 /* nothing mapped in so nothing to flush */ 1766 return (0); 1767 } 1768 1769 /* 1770 * Since we flush the cache each time we change curproc, we 1771 * only need to flush the page if it is in the current pmap. 1772 */ 1773 if (curproc) 1774 pmap = curproc->p_vmspace->vm_map.pmap; 1775 else 1776 pmap = pmap_kernel(); 1777 1778 for (npv = pv; npv; npv = npv->pv_next) { 1779 if (npv->pv_pmap == pmap) { 1780 /* 1781 * The page is mapped non-cacheable in 1782 * this map. No need to flush the cache. 1783 */ 1784 if (npv->pv_flags & PVF_NC) { 1785 #ifdef DIAGNOSTIC 1786 if (cache_needs_cleaning) 1787 panic("pmap_clean_page: " 1788 "cache inconsistency"); 1789 #endif 1790 break; 1791 } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1792 continue; 1793 if (cache_needs_cleaning) { 1794 page_to_clean = 0; 1795 break; 1796 } else 1797 page_to_clean = npv->pv_va; 1798 cache_needs_cleaning = 1; 1799 } 1800 } 1801 1802 if (page_to_clean) { 1803 /* 1804 * XXX If is_src, we really only need to write-back, 1805 * XXX not invalidate, too. Investigate further. 1806 * XXX --thorpej (at) netbsd.org 1807 */ 1808 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1809 } else if (cache_needs_cleaning) { 1810 cpu_idcache_wbinv_all(); 1811 return (1); 1812 } 1813 return (0); 1814 } 1815 1816 /* 1817 * pmap_zero_page() 1818 * 1819 * Zero a given physical page by mapping it at a page hook point. 1820 * In doing the zero page op, the page we zero is mapped cachable, as with 1821 * StrongARM accesses to non-cached pages are non-burst making writing 1822 * _any_ bulk data very slow. 1823 */ 1824 #if ARM_MMU_GENERIC == 1 1825 void 1826 pmap_zero_page_generic(paddr_t phys) 1827 { 1828 #ifdef DEBUG 1829 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1830 1831 if (pg->mdpage.pvh_list != NULL) 1832 panic("pmap_zero_page: page has mappings"); 1833 #endif 1834 1835 KDASSERT((phys & PGOFSET) == 0); 1836 1837 /* 1838 * Hook in the page, zero it, and purge the cache for that 1839 * zeroed page. Invalidate the TLB as needed. 1840 */ 1841 *cdst_pte = L2_S_PROTO | phys | 1842 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1843 PTE_SYNC(cdst_pte); 1844 cpu_tlb_flushD_SE(cdstp); 1845 cpu_cpwait(); 1846 bzero_page(cdstp); 1847 cpu_dcache_wbinv_range(cdstp, NBPG); 1848 } 1849 #endif /* ARM_MMU_GENERIC == 1 */ 1850 1851 #if ARM_MMU_XSCALE == 1 1852 void 1853 pmap_zero_page_xscale(paddr_t phys) 1854 { 1855 #ifdef DEBUG 1856 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1857 1858 if (pg->mdpage.pvh_list != NULL) 1859 panic("pmap_zero_page: page has mappings"); 1860 #endif 1861 1862 KDASSERT((phys & PGOFSET) == 0); 1863 1864 /* 1865 * Hook in the page, zero it, and purge the cache for that 1866 * zeroed page. Invalidate the TLB as needed. 1867 */ 1868 *cdst_pte = L2_S_PROTO | phys | 1869 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1870 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1871 PTE_SYNC(cdst_pte); 1872 cpu_tlb_flushD_SE(cdstp); 1873 cpu_cpwait(); 1874 bzero_page(cdstp); 1875 xscale_cache_clean_minidata(); 1876 } 1877 #endif /* ARM_MMU_XSCALE == 1 */ 1878 1879 /* pmap_pageidlezero() 1880 * 1881 * The same as above, except that we assume that the page is not 1882 * mapped. This means we never have to flush the cache first. Called 1883 * from the idle loop. 1884 */ 1885 boolean_t 1886 pmap_pageidlezero(paddr_t phys) 1887 { 1888 int i, *ptr; 1889 boolean_t rv = TRUE; 1890 #ifdef DEBUG 1891 struct vm_page *pg; 1892 1893 pg = PHYS_TO_VM_PAGE(phys); 1894 if (pg->mdpage.pvh_list != NULL) 1895 panic("pmap_pageidlezero: page has mappings"); 1896 #endif 1897 1898 KDASSERT((phys & PGOFSET) == 0); 1899 1900 /* 1901 * Hook in the page, zero it, and purge the cache for that 1902 * zeroed page. Invalidate the TLB as needed. 1903 */ 1904 *cdst_pte = L2_S_PROTO | phys | 1905 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1906 PTE_SYNC(cdst_pte); 1907 cpu_tlb_flushD_SE(cdstp); 1908 cpu_cpwait(); 1909 1910 for (i = 0, ptr = (int *)cdstp; 1911 i < (NBPG / sizeof(int)); i++) { 1912 if (sched_whichqs != 0) { 1913 /* 1914 * A process has become ready. Abort now, 1915 * so we don't keep it waiting while we 1916 * do slow memory access to finish this 1917 * page. 1918 */ 1919 rv = FALSE; 1920 break; 1921 } 1922 *ptr++ = 0; 1923 } 1924 1925 if (rv) 1926 /* 1927 * if we aborted we'll rezero this page again later so don't 1928 * purge it unless we finished it 1929 */ 1930 cpu_dcache_wbinv_range(cdstp, NBPG); 1931 return (rv); 1932 } 1933 1934 /* 1935 * pmap_copy_page() 1936 * 1937 * Copy one physical page into another, by mapping the pages into 1938 * hook points. The same comment regarding cachability as in 1939 * pmap_zero_page also applies here. 1940 */ 1941 #if ARM_MMU_GENERIC == 1 1942 void 1943 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1944 { 1945 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1946 #ifdef DEBUG 1947 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1948 1949 if (dst_pg->mdpage.pvh_list != NULL) 1950 panic("pmap_copy_page: dst page has mappings"); 1951 #endif 1952 1953 KDASSERT((src & PGOFSET) == 0); 1954 KDASSERT((dst & PGOFSET) == 0); 1955 1956 /* 1957 * Clean the source page. Hold the source page's lock for 1958 * the duration of the copy so that no other mappings can 1959 * be created while we have a potentially aliased mapping. 1960 */ 1961 simple_lock(&src_pg->mdpage.pvh_slock); 1962 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1963 1964 /* 1965 * Map the pages into the page hook points, copy them, and purge 1966 * the cache for the appropriate page. Invalidate the TLB 1967 * as required. 1968 */ 1969 *csrc_pte = L2_S_PROTO | src | 1970 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1971 PTE_SYNC(csrc_pte); 1972 *cdst_pte = L2_S_PROTO | dst | 1973 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1974 PTE_SYNC(cdst_pte); 1975 cpu_tlb_flushD_SE(csrcp); 1976 cpu_tlb_flushD_SE(cdstp); 1977 cpu_cpwait(); 1978 bcopy_page(csrcp, cdstp); 1979 cpu_dcache_inv_range(csrcp, NBPG); 1980 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1981 cpu_dcache_wbinv_range(cdstp, NBPG); 1982 } 1983 #endif /* ARM_MMU_GENERIC == 1 */ 1984 1985 #if ARM_MMU_XSCALE == 1 1986 void 1987 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1988 { 1989 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1990 #ifdef DEBUG 1991 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1992 1993 if (dst_pg->mdpage.pvh_list != NULL) 1994 panic("pmap_copy_page: dst page has mappings"); 1995 #endif 1996 1997 KDASSERT((src & PGOFSET) == 0); 1998 KDASSERT((dst & PGOFSET) == 0); 1999 2000 /* 2001 * Clean the source page. Hold the source page's lock for 2002 * the duration of the copy so that no other mappings can 2003 * be created while we have a potentially aliased mapping. 2004 */ 2005 simple_lock(&src_pg->mdpage.pvh_slock); 2006 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2007 2008 /* 2009 * Map the pages into the page hook points, copy them, and purge 2010 * the cache for the appropriate page. Invalidate the TLB 2011 * as required. 2012 */ 2013 *csrc_pte = L2_S_PROTO | src | 2014 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 2015 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2016 PTE_SYNC(csrc_pte); 2017 *cdst_pte = L2_S_PROTO | dst | 2018 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 2019 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2020 PTE_SYNC(cdst_pte); 2021 cpu_tlb_flushD_SE(csrcp); 2022 cpu_tlb_flushD_SE(cdstp); 2023 cpu_cpwait(); 2024 bcopy_page(csrcp, cdstp); 2025 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2026 xscale_cache_clean_minidata(); 2027 } 2028 #endif /* ARM_MMU_XSCALE == 1 */ 2029 2030 #if 0 2031 void 2032 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 2033 { 2034 pd_entry_t *pde; 2035 paddr_t pa; 2036 struct vm_page *m; 2037 2038 if (pmap == pmap_kernel()) 2039 return; 2040 2041 pde = pmap_pde(pmap, va & PD_FRAME); 2042 pa = pmap_pte_pa(pde); 2043 m = PHYS_TO_VM_PAGE(pa); 2044 m->wire_count++; 2045 #ifdef MYCROFT_HACK 2046 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2047 pmap, va, pde, pa, m, m->wire_count); 2048 #endif 2049 } 2050 2051 void 2052 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2053 { 2054 pd_entry_t *pde; 2055 paddr_t pa; 2056 struct vm_page *m; 2057 2058 if (pmap == pmap_kernel()) 2059 return; 2060 2061 pde = pmap_pde(pmap, va & PD_FRAME); 2062 pa = pmap_pte_pa(pde); 2063 m = PHYS_TO_VM_PAGE(pa); 2064 m->wire_count--; 2065 #ifdef MYCROFT_HACK 2066 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2067 pmap, va, pde, pa, m, m->wire_count); 2068 #endif 2069 if (m->wire_count == 0) { 2070 #ifdef MYCROFT_HACK 2071 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2072 pmap, va, pde, pa, m); 2073 #endif 2074 pmap_unmap_in_l1(pmap, va & PD_FRAME); 2075 uvm_pagefree(m); 2076 --pmap->pm_stats.resident_count; 2077 } 2078 } 2079 #else 2080 #define pmap_pte_addref(pmap, va) 2081 #define pmap_pte_delref(pmap, va) 2082 #endif 2083 2084 /* 2085 * Since we have a virtually indexed cache, we may need to inhibit caching if 2086 * there is more than one mapping and at least one of them is writable. 2087 * Since we purge the cache on every context switch, we only need to check for 2088 * other mappings within the same pmap, or kernel_pmap. 2089 * This function is also called when a page is unmapped, to possibly reenable 2090 * caching on any remaining mappings. 2091 * 2092 * The code implements the following logic, where: 2093 * 2094 * KW = # of kernel read/write pages 2095 * KR = # of kernel read only pages 2096 * UW = # of user read/write pages 2097 * UR = # of user read only pages 2098 * OW = # of user read/write pages in another pmap, then 2099 * 2100 * KC = kernel mapping is cacheable 2101 * UC = user mapping is cacheable 2102 * 2103 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2104 * +--------------------------------------------- 2105 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2106 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2107 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2108 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2109 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2110 * 2111 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2112 */ 2113 __inline static void 2114 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2115 boolean_t clear_cache) 2116 { 2117 if (pmap == pmap_kernel()) 2118 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2119 else 2120 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2121 } 2122 2123 static void 2124 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2125 boolean_t clear_cache) 2126 { 2127 int user_entries = 0; 2128 int user_writable = 0; 2129 int user_cacheable = 0; 2130 int kernel_entries = 0; 2131 int kernel_writable = 0; 2132 int kernel_cacheable = 0; 2133 struct pv_entry *pv; 2134 struct pmap *last_pmap = pmap; 2135 2136 #ifdef DIAGNOSTIC 2137 if (pmap != pmap_kernel()) 2138 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2139 #endif 2140 2141 /* 2142 * Pass one, see if there are both kernel and user pmaps for 2143 * this page. Calculate whether there are user-writable or 2144 * kernel-writable pages. 2145 */ 2146 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2147 if (pv->pv_pmap != pmap) { 2148 user_entries++; 2149 if (pv->pv_flags & PVF_WRITE) 2150 user_writable++; 2151 if ((pv->pv_flags & PVF_NC) == 0) 2152 user_cacheable++; 2153 } else { 2154 kernel_entries++; 2155 if (pv->pv_flags & PVF_WRITE) 2156 kernel_writable++; 2157 if ((pv->pv_flags & PVF_NC) == 0) 2158 kernel_cacheable++; 2159 } 2160 } 2161 2162 /* 2163 * We know we have just been updating a kernel entry, so if 2164 * all user pages are already cacheable, then there is nothing 2165 * further to do. 2166 */ 2167 if (kernel_entries == 0 && 2168 user_cacheable == user_entries) 2169 return; 2170 2171 if (user_entries) { 2172 /* 2173 * Scan over the list again, for each entry, if it 2174 * might not be set correctly, call pmap_vac_me_user 2175 * to recalculate the settings. 2176 */ 2177 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2178 /* 2179 * We know kernel mappings will get set 2180 * correctly in other calls. We also know 2181 * that if the pmap is the same as last_pmap 2182 * then we've just handled this entry. 2183 */ 2184 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2185 continue; 2186 /* 2187 * If there are kernel entries and this page 2188 * is writable but non-cacheable, then we can 2189 * skip this entry also. 2190 */ 2191 if (kernel_entries > 0 && 2192 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2193 (PVF_NC | PVF_WRITE)) 2194 continue; 2195 /* 2196 * Similarly if there are no kernel-writable 2197 * entries and the page is already 2198 * read-only/cacheable. 2199 */ 2200 if (kernel_writable == 0 && 2201 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2202 continue; 2203 /* 2204 * For some of the remaining cases, we know 2205 * that we must recalculate, but for others we 2206 * can't tell if they are correct or not, so 2207 * we recalculate anyway. 2208 */ 2209 pmap_unmap_ptes(last_pmap); 2210 last_pmap = pv->pv_pmap; 2211 ptes = pmap_map_ptes(last_pmap); 2212 pmap_vac_me_user(last_pmap, pg, ptes, 2213 pmap_is_curpmap(last_pmap)); 2214 } 2215 /* Restore the pte mapping that was passed to us. */ 2216 if (last_pmap != pmap) { 2217 pmap_unmap_ptes(last_pmap); 2218 ptes = pmap_map_ptes(pmap); 2219 } 2220 if (kernel_entries == 0) 2221 return; 2222 } 2223 2224 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2225 return; 2226 } 2227 2228 static void 2229 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2230 boolean_t clear_cache) 2231 { 2232 struct pmap *kpmap = pmap_kernel(); 2233 struct pv_entry *pv, *npv; 2234 int entries = 0; 2235 int writable = 0; 2236 int cacheable_entries = 0; 2237 int kern_cacheable = 0; 2238 int other_writable = 0; 2239 2240 pv = pg->mdpage.pvh_list; 2241 KASSERT(ptes != NULL); 2242 2243 /* 2244 * Count mappings and writable mappings in this pmap. 2245 * Include kernel mappings as part of our own. 2246 * Keep a pointer to the first one. 2247 */ 2248 for (npv = pv; npv; npv = npv->pv_next) { 2249 /* Count mappings in the same pmap */ 2250 if (pmap == npv->pv_pmap || 2251 kpmap == npv->pv_pmap) { 2252 if (entries++ == 0) 2253 pv = npv; 2254 /* Cacheable mappings */ 2255 if ((npv->pv_flags & PVF_NC) == 0) { 2256 cacheable_entries++; 2257 if (kpmap == npv->pv_pmap) 2258 kern_cacheable++; 2259 } 2260 /* Writable mappings */ 2261 if (npv->pv_flags & PVF_WRITE) 2262 ++writable; 2263 } else if (npv->pv_flags & PVF_WRITE) 2264 other_writable = 1; 2265 } 2266 2267 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2268 "writable %d cacheable %d %s\n", pmap, entries, writable, 2269 cacheable_entries, clear_cache ? "clean" : "no clean")); 2270 2271 /* 2272 * Enable or disable caching as necessary. 2273 * Note: the first entry might be part of the kernel pmap, 2274 * so we can't assume this is indicative of the state of the 2275 * other (maybe non-kpmap) entries. 2276 */ 2277 if ((entries > 1 && writable) || 2278 (entries > 0 && pmap == kpmap && other_writable)) { 2279 if (cacheable_entries == 0) 2280 return; 2281 for (npv = pv; npv; npv = npv->pv_next) { 2282 if ((pmap == npv->pv_pmap 2283 || kpmap == npv->pv_pmap) && 2284 (npv->pv_flags & PVF_NC) == 0) { 2285 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2286 PTE_SYNC_CURRENT(pmap, 2287 &ptes[arm_btop(npv->pv_va)]); 2288 npv->pv_flags |= PVF_NC; 2289 /* 2290 * If this page needs flushing from the 2291 * cache, and we aren't going to do it 2292 * below, do it now. 2293 */ 2294 if ((cacheable_entries < 4 && 2295 (clear_cache || npv->pv_pmap == kpmap)) || 2296 (npv->pv_pmap == kpmap && 2297 !clear_cache && kern_cacheable < 4)) { 2298 cpu_idcache_wbinv_range(npv->pv_va, 2299 NBPG); 2300 cpu_tlb_flushID_SE(npv->pv_va); 2301 } 2302 } 2303 } 2304 if ((clear_cache && cacheable_entries >= 4) || 2305 kern_cacheable >= 4) { 2306 cpu_idcache_wbinv_all(); 2307 cpu_tlb_flushID(); 2308 } 2309 cpu_cpwait(); 2310 } else if (entries > 0) { 2311 /* 2312 * Turn cacheing back on for some pages. If it is a kernel 2313 * page, only do so if there are no other writable pages. 2314 */ 2315 for (npv = pv; npv; npv = npv->pv_next) { 2316 if ((pmap == npv->pv_pmap || 2317 (kpmap == npv->pv_pmap && other_writable == 0)) && 2318 (npv->pv_flags & PVF_NC)) { 2319 ptes[arm_btop(npv->pv_va)] |= 2320 pte_l2_s_cache_mode; 2321 PTE_SYNC_CURRENT(pmap, 2322 &ptes[arm_btop(npv->pv_va)]); 2323 npv->pv_flags &= ~PVF_NC; 2324 } 2325 } 2326 } 2327 } 2328 2329 /* 2330 * pmap_remove() 2331 * 2332 * pmap_remove is responsible for nuking a number of mappings for a range 2333 * of virtual address space in the current pmap. To do this efficiently 2334 * is interesting, because in a number of cases a wide virtual address 2335 * range may be supplied that contains few actual mappings. So, the 2336 * optimisations are: 2337 * 1. Try and skip over hunks of address space for which an L1 entry 2338 * does not exist. 2339 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2340 * maybe do just a partial cache clean. This path of execution is 2341 * complicated by the fact that the cache must be flushed _before_ 2342 * the PTE is nuked, being a VAC :-) 2343 * 3. Maybe later fast-case a single page, but I don't think this is 2344 * going to make _that_ much difference overall. 2345 */ 2346 2347 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2348 2349 void 2350 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2351 { 2352 int cleanlist_idx = 0; 2353 struct pagelist { 2354 vaddr_t va; 2355 pt_entry_t *pte; 2356 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2357 pt_entry_t *pte = 0, *ptes; 2358 paddr_t pa; 2359 int pmap_active; 2360 struct vm_page *pg; 2361 2362 /* Exit quick if there is no pmap */ 2363 if (!pmap) 2364 return; 2365 2366 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2367 pmap, sva, eva)); 2368 2369 /* 2370 * we lock in the pmap => vm_page direction 2371 */ 2372 PMAP_MAP_TO_HEAD_LOCK(); 2373 2374 ptes = pmap_map_ptes(pmap); 2375 /* Get a page table pointer */ 2376 while (sva < eva) { 2377 if (pmap_pde_page(pmap_pde(pmap, sva))) 2378 break; 2379 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2380 } 2381 2382 pte = &ptes[arm_btop(sva)]; 2383 /* Note if the pmap is active thus require cache and tlb cleans */ 2384 pmap_active = pmap_is_curpmap(pmap); 2385 2386 /* Now loop along */ 2387 while (sva < eva) { 2388 /* Check if we can move to the next PDE (l1 chunk) */ 2389 if ((sva & L2_ADDR_BITS) == 0) { 2390 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2391 sva += L1_S_SIZE; 2392 pte += arm_btop(L1_S_SIZE); 2393 continue; 2394 } 2395 } 2396 2397 /* We've found a valid PTE, so this page of PTEs has to go. */ 2398 if (pmap_pte_v(pte)) { 2399 /* Update statistics */ 2400 --pmap->pm_stats.resident_count; 2401 2402 /* 2403 * Add this page to our cache remove list, if we can. 2404 * If, however the cache remove list is totally full, 2405 * then do a complete cache invalidation taking note 2406 * to backtrack the PTE table beforehand, and ignore 2407 * the lists in future because there's no longer any 2408 * point in bothering with them (we've paid the 2409 * penalty, so will carry on unhindered). Otherwise, 2410 * when we fall out, we just clean the list. 2411 */ 2412 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2413 pa = pmap_pte_pa(pte); 2414 2415 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2416 /* Add to the clean list. */ 2417 cleanlist[cleanlist_idx].pte = pte; 2418 cleanlist[cleanlist_idx].va = sva; 2419 cleanlist_idx++; 2420 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2421 int cnt; 2422 2423 /* Nuke everything if needed. */ 2424 if (pmap_active) { 2425 cpu_idcache_wbinv_all(); 2426 cpu_tlb_flushID(); 2427 } 2428 2429 /* 2430 * Roll back the previous PTE list, 2431 * and zero out the current PTE. 2432 */ 2433 for (cnt = 0; 2434 cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; 2435 cnt++) { 2436 *cleanlist[cnt].pte = 0; 2437 if (pmap_active) 2438 PTE_SYNC(cleanlist[cnt].pte); 2439 else 2440 PTE_FLUSH(cleanlist[cnt].pte); 2441 pmap_pte_delref(pmap, 2442 cleanlist[cnt].va); 2443 } 2444 *pte = 0; 2445 if (pmap_active) 2446 PTE_SYNC(pte); 2447 else 2448 PTE_FLUSH(pte); 2449 pmap_pte_delref(pmap, sva); 2450 cleanlist_idx++; 2451 } else { 2452 /* 2453 * We've already nuked the cache and 2454 * TLB, so just carry on regardless, 2455 * and we won't need to do it again 2456 */ 2457 *pte = 0; 2458 if (pmap_active) 2459 PTE_SYNC(pte); 2460 else 2461 PTE_FLUSH(pte); 2462 pmap_pte_delref(pmap, sva); 2463 } 2464 2465 /* 2466 * Update flags. In a number of circumstances, 2467 * we could cluster a lot of these and do a 2468 * number of sequential pages in one go. 2469 */ 2470 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2471 struct pv_entry *pve; 2472 simple_lock(&pg->mdpage.pvh_slock); 2473 pve = pmap_remove_pv(pg, pmap, sva); 2474 pmap_free_pv(pmap, pve); 2475 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2476 simple_unlock(&pg->mdpage.pvh_slock); 2477 } 2478 } else if (pmap_active == 0) 2479 PTE_FLUSH(pte); 2480 sva += NBPG; 2481 pte++; 2482 } 2483 2484 /* 2485 * Now, if we've fallen through down to here, chances are that there 2486 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2487 */ 2488 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2489 u_int cnt; 2490 2491 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2492 if (pmap_active) { 2493 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2494 NBPG); 2495 *cleanlist[cnt].pte = 0; 2496 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2497 PTE_SYNC(cleanlist[cnt].pte); 2498 } else { 2499 *cleanlist[cnt].pte = 0; 2500 PTE_FLUSH(cleanlist[cnt].pte); 2501 } 2502 pmap_pte_delref(pmap, cleanlist[cnt].va); 2503 } 2504 } 2505 2506 pmap_unmap_ptes(pmap); 2507 2508 PMAP_MAP_TO_HEAD_UNLOCK(); 2509 } 2510 2511 /* 2512 * Routine: pmap_remove_all 2513 * Function: 2514 * Removes this physical page from 2515 * all physical maps in which it resides. 2516 * Reflects back modify bits to the pager. 2517 */ 2518 2519 static void 2520 pmap_remove_all(struct vm_page *pg) 2521 { 2522 struct pv_entry *pv, *npv; 2523 struct pmap *pmap; 2524 pt_entry_t *pte, *ptes; 2525 2526 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2527 2528 /* set vm_page => pmap locking */ 2529 PMAP_HEAD_TO_MAP_LOCK(); 2530 2531 simple_lock(&pg->mdpage.pvh_slock); 2532 2533 pv = pg->mdpage.pvh_list; 2534 if (pv == NULL) { 2535 PDEBUG(0, printf("free page\n")); 2536 simple_unlock(&pg->mdpage.pvh_slock); 2537 PMAP_HEAD_TO_MAP_UNLOCK(); 2538 return; 2539 } 2540 pmap_clean_page(pv, FALSE); 2541 2542 while (pv) { 2543 pmap = pv->pv_pmap; 2544 ptes = pmap_map_ptes(pmap); 2545 pte = &ptes[arm_btop(pv->pv_va)]; 2546 2547 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2548 pv->pv_va, pv->pv_flags)); 2549 #ifdef DEBUG 2550 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2551 pmap_pte_v(pte) == 0 || 2552 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2553 panic("pmap_remove_all: bad mapping"); 2554 #endif /* DEBUG */ 2555 2556 /* 2557 * Update statistics 2558 */ 2559 --pmap->pm_stats.resident_count; 2560 2561 /* Wired bit */ 2562 if (pv->pv_flags & PVF_WIRED) 2563 --pmap->pm_stats.wired_count; 2564 2565 /* 2566 * Invalidate the PTEs. 2567 * XXX: should cluster them up and invalidate as many 2568 * as possible at once. 2569 */ 2570 2571 #ifdef needednotdone 2572 reduce wiring count on page table pages as references drop 2573 #endif 2574 2575 *pte = 0; 2576 PTE_SYNC_CURRENT(pmap, pte); 2577 pmap_pte_delref(pmap, pv->pv_va); 2578 2579 npv = pv->pv_next; 2580 pmap_free_pv(pmap, pv); 2581 pv = npv; 2582 pmap_unmap_ptes(pmap); 2583 } 2584 pg->mdpage.pvh_list = NULL; 2585 simple_unlock(&pg->mdpage.pvh_slock); 2586 PMAP_HEAD_TO_MAP_UNLOCK(); 2587 2588 PDEBUG(0, printf("done\n")); 2589 cpu_tlb_flushID(); 2590 cpu_cpwait(); 2591 } 2592 2593 2594 /* 2595 * Set the physical protection on the specified range of this map as requested. 2596 */ 2597 2598 void 2599 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2600 { 2601 pt_entry_t *pte = NULL, *ptes; 2602 struct vm_page *pg; 2603 int flush = 0; 2604 2605 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2606 pmap, sva, eva, prot)); 2607 2608 if (~prot & VM_PROT_READ) { 2609 /* 2610 * Just remove the mappings. pmap_update() is not required 2611 * here since the caller should do it. 2612 */ 2613 pmap_remove(pmap, sva, eva); 2614 return; 2615 } 2616 if (prot & VM_PROT_WRITE) { 2617 /* 2618 * If this is a read->write transition, just ignore it and let 2619 * uvm_fault() take care of it later. 2620 */ 2621 return; 2622 } 2623 2624 /* Need to lock map->head */ 2625 PMAP_MAP_TO_HEAD_LOCK(); 2626 2627 ptes = pmap_map_ptes(pmap); 2628 2629 /* 2630 * OK, at this point, we know we're doing write-protect operation. 2631 * If the pmap is active, write-back the range. 2632 */ 2633 if (pmap_is_curpmap(pmap)) 2634 cpu_dcache_wb_range(sva, eva - sva); 2635 2636 /* 2637 * We need to acquire a pointer to a page table page before entering 2638 * the following loop. 2639 */ 2640 while (sva < eva) { 2641 if (pmap_pde_page(pmap_pde(pmap, sva))) 2642 break; 2643 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2644 } 2645 2646 pte = &ptes[arm_btop(sva)]; 2647 2648 while (sva < eva) { 2649 /* only check once in a while */ 2650 if ((sva & L2_ADDR_BITS) == 0) { 2651 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2652 /* We can race ahead here, to the next pde. */ 2653 sva += L1_S_SIZE; 2654 pte += arm_btop(L1_S_SIZE); 2655 continue; 2656 } 2657 } 2658 2659 if (!pmap_pte_v(pte)) { 2660 PTE_FLUSH_ALT(pmap, pte); 2661 goto next; 2662 } 2663 2664 flush = 1; 2665 2666 pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte)); 2667 2668 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2669 PTE_SYNC_CURRENT(pmap, pte); /* XXXJRT optimize */ 2670 2671 /* Clear write flag */ 2672 if (pg != NULL) { 2673 simple_lock(&pg->mdpage.pvh_slock); 2674 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2675 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2676 simple_unlock(&pg->mdpage.pvh_slock); 2677 } 2678 2679 next: 2680 sva += NBPG; 2681 pte++; 2682 } 2683 pmap_unmap_ptes(pmap); 2684 PMAP_MAP_TO_HEAD_UNLOCK(); 2685 if (flush) 2686 cpu_tlb_flushID(); 2687 } 2688 2689 /* 2690 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2691 * int flags) 2692 * 2693 * Insert the given physical page (p) at 2694 * the specified virtual address (v) in the 2695 * target physical map with the protection requested. 2696 * 2697 * If specified, the page will be wired down, meaning 2698 * that the related pte can not be reclaimed. 2699 * 2700 * NB: This is the only routine which MAY NOT lazy-evaluate 2701 * or lose information. That is, this routine must actually 2702 * insert this page into the given map NOW. 2703 */ 2704 2705 int 2706 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2707 int flags) 2708 { 2709 pt_entry_t *ptes, opte, npte; 2710 paddr_t opa; 2711 boolean_t wired = (flags & PMAP_WIRED) != 0; 2712 struct vm_page *pg; 2713 struct pv_entry *pve; 2714 int error, nflags; 2715 2716 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2717 va, pa, pmap, prot, wired)); 2718 2719 #ifdef DIAGNOSTIC 2720 /* Valid address ? */ 2721 if (va >= (pmap_curmaxkvaddr)) 2722 panic("pmap_enter: too big"); 2723 if (pmap != pmap_kernel() && va != 0) { 2724 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2725 panic("pmap_enter: kernel page in user map"); 2726 } else { 2727 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2728 panic("pmap_enter: user page in kernel map"); 2729 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2730 panic("pmap_enter: entering PT page"); 2731 } 2732 #endif 2733 2734 KDASSERT(((va | pa) & PGOFSET) == 0); 2735 2736 /* 2737 * Get a pointer to the page. Later on in this function, we 2738 * test for a managed page by checking pg != NULL. 2739 */ 2740 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2741 2742 /* get lock */ 2743 PMAP_MAP_TO_HEAD_LOCK(); 2744 2745 /* 2746 * map the ptes. If there's not already an L2 table for this 2747 * address, allocate one. 2748 */ 2749 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2750 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2751 struct vm_page *ptp; 2752 2753 /* kernel should be pre-grown */ 2754 KASSERT(pmap != pmap_kernel()); 2755 2756 /* if failure is allowed then don't try too hard */ 2757 ptp = pmap_get_ptp(pmap, va & PD_FRAME); 2758 if (ptp == NULL) { 2759 if (flags & PMAP_CANFAIL) { 2760 error = ENOMEM; 2761 goto out; 2762 } 2763 panic("pmap_enter: get ptp failed"); 2764 } 2765 } 2766 opte = ptes[arm_btop(va)]; 2767 2768 nflags = 0; 2769 if (prot & VM_PROT_WRITE) 2770 nflags |= PVF_WRITE; 2771 if (wired) 2772 nflags |= PVF_WIRED; 2773 2774 /* Is the pte valid ? If so then this page is already mapped */ 2775 if (l2pte_valid(opte)) { 2776 /* Get the physical address of the current page mapped */ 2777 opa = l2pte_pa(opte); 2778 2779 /* Are we mapping the same page ? */ 2780 if (opa == pa) { 2781 /* Check to see if we're doing rw->ro. */ 2782 if ((opte & L2_S_PROT_W) != 0 && 2783 (prot & VM_PROT_WRITE) == 0) { 2784 /* Yup, flush the cache if current pmap. */ 2785 if (pmap_is_curpmap(pmap)) 2786 cpu_dcache_wb_range(va, NBPG); 2787 } 2788 2789 /* Has the wiring changed ? */ 2790 if (pg != NULL) { 2791 simple_lock(&pg->mdpage.pvh_slock); 2792 (void) pmap_modify_pv(pmap, va, pg, 2793 PVF_WRITE | PVF_WIRED, nflags); 2794 simple_unlock(&pg->mdpage.pvh_slock); 2795 } 2796 } else { 2797 struct vm_page *opg; 2798 2799 /* We are replacing the page with a new one. */ 2800 cpu_idcache_wbinv_range(va, NBPG); 2801 2802 /* 2803 * If it is part of our managed memory then we 2804 * must remove it from the PV list 2805 */ 2806 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2807 simple_lock(&opg->mdpage.pvh_slock); 2808 pve = pmap_remove_pv(opg, pmap, va); 2809 simple_unlock(&opg->mdpage.pvh_slock); 2810 } else { 2811 pve = NULL; 2812 } 2813 2814 goto enter; 2815 } 2816 } else { 2817 opa = 0; 2818 pve = NULL; 2819 pmap_pte_addref(pmap, va); 2820 2821 /* pte is not valid so we must be hooking in a new page */ 2822 ++pmap->pm_stats.resident_count; 2823 2824 enter: 2825 /* 2826 * Enter on the PV list if part of our managed memory 2827 */ 2828 if (pg != NULL) { 2829 if (pve == NULL) { 2830 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2831 if (pve == NULL) { 2832 if (flags & PMAP_CANFAIL) { 2833 PTE_FLUSH_ALT(pmap, 2834 ptes[arm_btop(va)]); 2835 error = ENOMEM; 2836 goto out; 2837 } 2838 panic("pmap_enter: no pv entries " 2839 "available"); 2840 } 2841 } 2842 /* enter_pv locks pvh when adding */ 2843 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2844 } else { 2845 if (pve != NULL) 2846 pmap_free_pv(pmap, pve); 2847 } 2848 } 2849 2850 /* Construct the pte, giving the correct access. */ 2851 npte = pa; 2852 2853 /* VA 0 is magic. */ 2854 if (pmap != pmap_kernel() && va != vector_page) 2855 npte |= L2_S_PROT_U; 2856 2857 if (pg != NULL) { 2858 #ifdef DIAGNOSTIC 2859 if ((flags & VM_PROT_ALL) & ~prot) 2860 panic("pmap_enter: access_type exceeds prot"); 2861 #endif 2862 npte |= pte_l2_s_cache_mode; 2863 if (flags & VM_PROT_WRITE) { 2864 npte |= L2_S_PROTO | L2_S_PROT_W; 2865 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2866 } else if (flags & VM_PROT_ALL) { 2867 npte |= L2_S_PROTO; 2868 pg->mdpage.pvh_attrs |= PVF_REF; 2869 } else 2870 npte |= L2_TYPE_INV; 2871 } else { 2872 if (prot & VM_PROT_WRITE) 2873 npte |= L2_S_PROTO | L2_S_PROT_W; 2874 else if (prot & VM_PROT_ALL) 2875 npte |= L2_S_PROTO; 2876 else 2877 npte |= L2_TYPE_INV; 2878 } 2879 2880 #if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE) 2881 #if ARM_NMMUS > 1 2882 # error "XXX Unable to use read/write-allocate and configure non-XScale" 2883 #endif 2884 /* 2885 * XXX BRUTAL HACK! This allows us to limp along with 2886 * XXX the read/write-allocate cache mode. 2887 */ 2888 if (pmap == pmap_kernel()) 2889 npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X); 2890 #endif 2891 ptes[arm_btop(va)] = npte; 2892 PTE_SYNC_CURRENT(pmap, &ptes[arm_btop(va)]); 2893 2894 if (pg != NULL) { 2895 simple_lock(&pg->mdpage.pvh_slock); 2896 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2897 simple_unlock(&pg->mdpage.pvh_slock); 2898 } 2899 2900 /* Better flush the TLB ... */ 2901 cpu_tlb_flushID_SE(va); 2902 error = 0; 2903 out: 2904 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2905 PMAP_MAP_TO_HEAD_UNLOCK(); 2906 2907 return error; 2908 } 2909 2910 /* 2911 * pmap_kenter_pa: enter a kernel mapping 2912 * 2913 * => no need to lock anything assume va is already allocated 2914 * => should be faster than normal pmap enter function 2915 */ 2916 void 2917 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2918 { 2919 pt_entry_t *pte; 2920 2921 pte = vtopte(va); 2922 KASSERT(!pmap_pte_v(pte)); 2923 2924 #ifdef PMAP_ALIAS_DEBUG 2925 { 2926 struct vm_page *pg; 2927 int s; 2928 2929 pg = PHYS_TO_VM_PAGE(pa); 2930 if (pg != NULL) { 2931 s = splhigh(); 2932 if (pg->mdpage.ro_mappings == 0 && 2933 pg->mdpage.rw_mappings == 0 && 2934 pg->mdpage.kro_mappings == 0 && 2935 pg->mdpage.krw_mappings == 0) { 2936 /* This case is okay. */ 2937 } else if (pg->mdpage.rw_mappings == 0 && 2938 pg->mdpage.krw_mappings == 0 && 2939 (prot & VM_PROT_WRITE) == 0) { 2940 /* This case is okay. */ 2941 } else { 2942 /* Something is awry. */ 2943 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2944 "prot 0x%x\n", pg->mdpage.ro_mappings, 2945 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2946 pg->mdpage.krw_mappings, prot); 2947 Debugger(); 2948 } 2949 if (prot & VM_PROT_WRITE) 2950 pg->mdpage.krw_mappings++; 2951 else 2952 pg->mdpage.kro_mappings++; 2953 splx(s); 2954 } 2955 } 2956 #endif /* PMAP_ALIAS_DEBUG */ 2957 2958 *pte = L2_S_PROTO | pa | 2959 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2960 PTE_SYNC(pte); 2961 } 2962 2963 void 2964 pmap_kremove(vaddr_t va, vsize_t len) 2965 { 2966 pt_entry_t *pte; 2967 vaddr_t ova = va; 2968 vaddr_t olen = len; 2969 2970 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2971 2972 /* 2973 * We assume that we will only be called with small 2974 * regions of memory. 2975 */ 2976 2977 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2978 pte = vtopte(va); 2979 #ifdef PMAP_ALIAS_DEBUG 2980 { 2981 struct vm_page *pg; 2982 int s; 2983 2984 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 2985 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 2986 s = splhigh(); 2987 if (*pte & L2_S_PROT_W) { 2988 KASSERT(pg->mdpage.krw_mappings != 0); 2989 pg->mdpage.krw_mappings--; 2990 } else { 2991 KASSERT(pg->mdpage.kro_mappings != 0); 2992 pg->mdpage.kro_mappings--; 2993 } 2994 splx(s); 2995 } 2996 } 2997 #endif /* PMAP_ALIAS_DEBUG */ 2998 cpu_idcache_wbinv_range(va, PAGE_SIZE); 2999 *pte = 0; 3000 cpu_tlb_flushID_SE(va); 3001 } 3002 PTE_SYNC_RANGE(vtopte(ova), olen >> PAGE_SHIFT); 3003 } 3004 3005 /* 3006 * pmap_page_protect: 3007 * 3008 * Lower the permission for all mappings to a given page. 3009 */ 3010 3011 void 3012 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 3013 { 3014 3015 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 3016 VM_PAGE_TO_PHYS(pg), prot)); 3017 3018 switch(prot) { 3019 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 3020 case VM_PROT_READ|VM_PROT_WRITE: 3021 return; 3022 3023 case VM_PROT_READ: 3024 case VM_PROT_READ|VM_PROT_EXECUTE: 3025 pmap_clearbit(pg, PVF_WRITE); 3026 break; 3027 3028 default: 3029 pmap_remove_all(pg); 3030 break; 3031 } 3032 } 3033 3034 3035 /* 3036 * Routine: pmap_unwire 3037 * Function: Clear the wired attribute for a map/virtual-address 3038 * pair. 3039 * In/out conditions: 3040 * The mapping must already exist in the pmap. 3041 */ 3042 3043 void 3044 pmap_unwire(struct pmap *pmap, vaddr_t va) 3045 { 3046 pt_entry_t *ptes; 3047 struct vm_page *pg; 3048 paddr_t pa; 3049 3050 PMAP_MAP_TO_HEAD_LOCK(); 3051 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3052 3053 if (pmap_pde_v(pmap_pde(pmap, va))) { 3054 #ifdef DIAGNOSTIC 3055 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3056 panic("pmap_unwire: invalid L2 PTE"); 3057 #endif 3058 /* Extract the physical address of the page */ 3059 pa = l2pte_pa(ptes[arm_btop(va)]); 3060 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3061 3062 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3063 goto out; 3064 3065 /* Update the wired bit in the pv entry for this page. */ 3066 simple_lock(&pg->mdpage.pvh_slock); 3067 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 3068 simple_unlock(&pg->mdpage.pvh_slock); 3069 } 3070 #ifdef DIAGNOSTIC 3071 else { 3072 panic("pmap_unwire: invalid L1 PTE"); 3073 } 3074 #endif 3075 out: 3076 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3077 PMAP_MAP_TO_HEAD_UNLOCK(); 3078 } 3079 3080 /* 3081 * Routine: pmap_extract 3082 * Function: 3083 * Extract the physical page address associated 3084 * with the given map/virtual_address pair. 3085 */ 3086 boolean_t 3087 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 3088 { 3089 pd_entry_t *pde; 3090 pt_entry_t *pte, *ptes; 3091 paddr_t pa; 3092 3093 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3094 3095 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3096 3097 pde = pmap_pde(pmap, va); 3098 pte = &ptes[arm_btop(va)]; 3099 3100 if (pmap_pde_section(pde)) { 3101 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3102 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3103 goto out; 3104 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3105 PDEBUG(5, printf("no mapping\n")); 3106 goto failed; 3107 } 3108 3109 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3110 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3111 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3112 goto out; 3113 } 3114 3115 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3116 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3117 3118 out: 3119 if (pap != NULL) 3120 *pap = pa; 3121 3122 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3123 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3124 return (TRUE); 3125 3126 failed: 3127 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3128 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3129 return (FALSE); 3130 } 3131 3132 3133 /* 3134 * pmap_copy: 3135 * 3136 * Copy the range specified by src_addr/len from the source map to the 3137 * range dst_addr/len in the destination map. 3138 * 3139 * This routine is only advisory and need not do anything. 3140 */ 3141 /* Call deleted in <arm/arm32/pmap.h> */ 3142 3143 #if defined(PMAP_DEBUG) 3144 void 3145 pmap_dump_pvlist(phys, m) 3146 vaddr_t phys; 3147 char *m; 3148 { 3149 struct vm_page *pg; 3150 struct pv_entry *pv; 3151 3152 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3153 printf("INVALID PA\n"); 3154 return; 3155 } 3156 simple_lock(&pg->mdpage.pvh_slock); 3157 printf("%s %08lx:", m, phys); 3158 if (pg->mdpage.pvh_list == NULL) { 3159 simple_unlock(&pg->mdpage.pvh_slock); 3160 printf(" no mappings\n"); 3161 return; 3162 } 3163 3164 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3165 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3166 pv->pv_va, pv->pv_flags); 3167 3168 printf("\n"); 3169 simple_unlock(&pg->mdpage.pvh_slock); 3170 } 3171 3172 #endif /* PMAP_DEBUG */ 3173 3174 static pt_entry_t * 3175 pmap_map_ptes(struct pmap *pmap) 3176 { 3177 struct proc *p; 3178 3179 /* the kernel's pmap is always accessible */ 3180 if (pmap == pmap_kernel()) { 3181 return (pt_entry_t *)PTE_BASE; 3182 } 3183 3184 if (pmap_is_curpmap(pmap)) { 3185 simple_lock(&pmap->pm_obj.vmobjlock); 3186 return (pt_entry_t *)PTE_BASE; 3187 } 3188 3189 p = curproc; 3190 KDASSERT(p != NULL); 3191 3192 /* need to lock both curpmap and pmap: use ordered locking */ 3193 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3194 simple_lock(&pmap->pm_obj.vmobjlock); 3195 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3196 } else { 3197 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3198 simple_lock(&pmap->pm_obj.vmobjlock); 3199 } 3200 3201 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, 3202 pmap->pm_pptpt, 0); 3203 cpu_tlb_flushD(); 3204 cpu_cpwait(); 3205 return (pt_entry_t *)APTE_BASE; 3206 } 3207 3208 /* 3209 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3210 */ 3211 3212 static void 3213 pmap_unmap_ptes(struct pmap *pmap) 3214 { 3215 3216 if (pmap == pmap_kernel()) { 3217 return; 3218 } 3219 if (pmap_is_curpmap(pmap)) { 3220 simple_unlock(&pmap->pm_obj.vmobjlock); 3221 } else { 3222 KDASSERT(curproc != NULL); 3223 simple_unlock(&pmap->pm_obj.vmobjlock); 3224 simple_unlock( 3225 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3226 } 3227 } 3228 3229 /* 3230 * Modify pte bits for all ptes corresponding to the given physical address. 3231 * We use `maskbits' rather than `clearbits' because we're always passing 3232 * constants and the latter would require an extra inversion at run-time. 3233 */ 3234 3235 static void 3236 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3237 { 3238 struct pv_entry *pv; 3239 pt_entry_t *ptes, npte, opte; 3240 vaddr_t va; 3241 3242 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3243 VM_PAGE_TO_PHYS(pg), maskbits)); 3244 3245 PMAP_HEAD_TO_MAP_LOCK(); 3246 simple_lock(&pg->mdpage.pvh_slock); 3247 3248 /* 3249 * Clear saved attributes (modify, reference) 3250 */ 3251 pg->mdpage.pvh_attrs &= ~maskbits; 3252 3253 if (pg->mdpage.pvh_list == NULL) { 3254 simple_unlock(&pg->mdpage.pvh_slock); 3255 PMAP_HEAD_TO_MAP_UNLOCK(); 3256 return; 3257 } 3258 3259 /* 3260 * Loop over all current mappings setting/clearing as appropos 3261 */ 3262 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3263 #ifdef PMAP_ALIAS_DEBUG 3264 { 3265 int s = splhigh(); 3266 if ((maskbits & PVF_WRITE) != 0 && 3267 (pv->pv_flags & PVF_WRITE) != 0) { 3268 KASSERT(pg->mdpage.rw_mappings != 0); 3269 pg->mdpage.rw_mappings--; 3270 pg->mdpage.ro_mappings++; 3271 } 3272 splx(s); 3273 } 3274 #endif /* PMAP_ALIAS_DEBUG */ 3275 va = pv->pv_va; 3276 pv->pv_flags &= ~maskbits; 3277 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3278 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3279 npte = opte = ptes[arm_btop(va)]; 3280 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3281 if ((pv->pv_flags & PVF_NC)) { 3282 /* 3283 * Entry is not cacheable: reenable 3284 * the cache, nothing to flush 3285 * 3286 * Don't turn caching on again if this 3287 * is a modified emulation. This 3288 * would be inconsitent with the 3289 * settings created by 3290 * pmap_vac_me_harder(). 3291 * 3292 * There's no need to call 3293 * pmap_vac_me_harder() here: all 3294 * pages are loosing their write 3295 * permission. 3296 * 3297 */ 3298 if (maskbits & PVF_WRITE) { 3299 npte |= pte_l2_s_cache_mode; 3300 pv->pv_flags &= ~PVF_NC; 3301 } 3302 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3303 /* 3304 * Entry is cacheable: check if pmap is 3305 * current if it is flush it, 3306 * otherwise it won't be in the cache 3307 */ 3308 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3309 } 3310 3311 /* make the pte read only */ 3312 npte &= ~L2_S_PROT_W; 3313 } 3314 3315 if (maskbits & PVF_REF) { 3316 if (pmap_is_curpmap(pv->pv_pmap) && 3317 (pv->pv_flags & PVF_NC) == 0) { 3318 /* 3319 * Check npte here; we may have already 3320 * done the wbinv above, and the validity 3321 * of the PTE is the same for opte and 3322 * npte. 3323 */ 3324 if (npte & L2_S_PROT_W) { 3325 cpu_idcache_wbinv_range(pv->pv_va, 3326 NBPG); 3327 } else if ((npte & L2_TYPE_MASK) 3328 != L2_TYPE_INV) { 3329 /* XXXJRT need idcache_inv_range */ 3330 cpu_idcache_wbinv_range(pv->pv_va, 3331 NBPG); 3332 } 3333 } 3334 3335 /* make the pte invalid */ 3336 npte = (npte & ~L2_TYPE_MASK) | L2_TYPE_INV; 3337 } 3338 3339 if (npte != opte) { 3340 ptes[arm_btop(va)] = npte; 3341 PTE_SYNC_CURRENT(pv->pv_pmap, &ptes[arm_btop(va)]); 3342 /* Flush the TLB entry if a current pmap. */ 3343 if (pmap_is_curpmap(pv->pv_pmap)) 3344 cpu_tlb_flushID_SE(pv->pv_va); 3345 } else 3346 PTE_FLUSH_ALT(pv->pv_pmap, &ptes[arm_btop(va)]); 3347 3348 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3349 } 3350 cpu_cpwait(); 3351 3352 simple_unlock(&pg->mdpage.pvh_slock); 3353 PMAP_HEAD_TO_MAP_UNLOCK(); 3354 } 3355 3356 /* 3357 * pmap_clear_modify: 3358 * 3359 * Clear the "modified" attribute for a page. 3360 */ 3361 boolean_t 3362 pmap_clear_modify(struct vm_page *pg) 3363 { 3364 boolean_t rv; 3365 3366 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3367 rv = TRUE; 3368 pmap_clearbit(pg, PVF_MOD); 3369 } else 3370 rv = FALSE; 3371 3372 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3373 VM_PAGE_TO_PHYS(pg), rv)); 3374 3375 return (rv); 3376 } 3377 3378 /* 3379 * pmap_clear_reference: 3380 * 3381 * Clear the "referenced" attribute for a page. 3382 */ 3383 boolean_t 3384 pmap_clear_reference(struct vm_page *pg) 3385 { 3386 boolean_t rv; 3387 3388 if (pg->mdpage.pvh_attrs & PVF_REF) { 3389 rv = TRUE; 3390 pmap_clearbit(pg, PVF_REF); 3391 } else 3392 rv = FALSE; 3393 3394 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3395 VM_PAGE_TO_PHYS(pg), rv)); 3396 3397 return (rv); 3398 } 3399 3400 /* 3401 * pmap_is_modified: 3402 * 3403 * Test if a page has the "modified" attribute. 3404 */ 3405 /* See <arm/arm32/pmap.h> */ 3406 3407 /* 3408 * pmap_is_referenced: 3409 * 3410 * Test if a page has the "referenced" attribute. 3411 */ 3412 /* See <arm/arm32/pmap.h> */ 3413 3414 int 3415 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3416 { 3417 pt_entry_t *ptes; 3418 struct vm_page *pg; 3419 paddr_t pa; 3420 u_int flags; 3421 int rv = 0; 3422 3423 PDEBUG(2, printf("pmap_modified_emulation\n")); 3424 3425 PMAP_MAP_TO_HEAD_LOCK(); 3426 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3427 3428 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3429 PDEBUG(2, printf("L1 PTE invalid\n")); 3430 goto out; 3431 } 3432 3433 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3434 3435 /* 3436 * Don't need to PTE_FLUSH_ALT() here; this is always done 3437 * with the current pmap. 3438 */ 3439 3440 /* Check for a invalid pte */ 3441 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3442 goto out; 3443 3444 /* This can happen if user code tries to access kernel memory. */ 3445 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3446 goto out; 3447 3448 /* Extract the physical address of the page */ 3449 pa = l2pte_pa(ptes[arm_btop(va)]); 3450 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3451 goto out; 3452 3453 /* Get the current flags for this page. */ 3454 simple_lock(&pg->mdpage.pvh_slock); 3455 3456 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3457 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3458 3459 /* 3460 * Do the flags say this page is writable ? If not then it is a 3461 * genuine write fault. If yes then the write fault is our fault 3462 * as we did not reflect the write access in the PTE. Now we know 3463 * a write has occurred we can correct this and also set the 3464 * modified bit 3465 */ 3466 if (~flags & PVF_WRITE) { 3467 simple_unlock(&pg->mdpage.pvh_slock); 3468 goto out; 3469 } 3470 3471 PDEBUG(0, 3472 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3473 va, ptes[arm_btop(va)])); 3474 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3475 3476 /* 3477 * Re-enable write permissions for the page. No need to call 3478 * pmap_vac_me_harder(), since this is just a 3479 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3480 * We've already set the cacheable bits based on the assumption 3481 * that we can write to this page. 3482 */ 3483 ptes[arm_btop(va)] = 3484 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3485 PTE_SYNC(&ptes[arm_btop(va)]); 3486 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3487 3488 simple_unlock(&pg->mdpage.pvh_slock); 3489 3490 cpu_tlb_flushID_SE(va); 3491 cpu_cpwait(); 3492 rv = 1; 3493 out: 3494 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3495 PMAP_MAP_TO_HEAD_UNLOCK(); 3496 return (rv); 3497 } 3498 3499 int 3500 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3501 { 3502 pt_entry_t *ptes; 3503 struct vm_page *pg; 3504 paddr_t pa; 3505 int rv = 0; 3506 3507 PDEBUG(2, printf("pmap_handled_emulation\n")); 3508 3509 PMAP_MAP_TO_HEAD_LOCK(); 3510 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3511 3512 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3513 PDEBUG(2, printf("L1 PTE invalid\n")); 3514 goto out; 3515 } 3516 3517 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3518 3519 /* 3520 * Don't need to PTE_FLUSH_ALT() here; this is always done 3521 * with the current pmap. 3522 */ 3523 3524 /* Check for invalid pte */ 3525 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3526 goto out; 3527 3528 /* This can happen if user code tries to access kernel memory. */ 3529 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3530 goto out; 3531 3532 /* Extract the physical address of the page */ 3533 pa = l2pte_pa(ptes[arm_btop(va)]); 3534 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3535 goto out; 3536 3537 simple_lock(&pg->mdpage.pvh_slock); 3538 3539 /* 3540 * Ok we just enable the pte and mark the attibs as handled 3541 * XXX Should we traverse the PV list and enable all PTEs? 3542 */ 3543 PDEBUG(0, 3544 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3545 va, ptes[arm_btop(va)])); 3546 pg->mdpage.pvh_attrs |= PVF_REF; 3547 3548 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3549 PTE_SYNC(&ptes[arm_btop(va)]); 3550 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3551 3552 simple_unlock(&pg->mdpage.pvh_slock); 3553 3554 cpu_tlb_flushID_SE(va); 3555 cpu_cpwait(); 3556 rv = 1; 3557 out: 3558 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3559 PMAP_MAP_TO_HEAD_UNLOCK(); 3560 return (rv); 3561 } 3562 3563 /* 3564 * pmap_collect: free resources held by a pmap 3565 * 3566 * => optional function. 3567 * => called when a process is swapped out to free memory. 3568 */ 3569 3570 void 3571 pmap_collect(struct pmap *pmap) 3572 { 3573 } 3574 3575 /* 3576 * Routine: pmap_procwr 3577 * 3578 * Function: 3579 * Synchronize caches corresponding to [addr, addr+len) in p. 3580 * 3581 */ 3582 void 3583 pmap_procwr(struct proc *p, vaddr_t va, int len) 3584 { 3585 /* We only need to do anything if it is the current process. */ 3586 if (p == curproc) 3587 cpu_icache_sync_range(va, len); 3588 } 3589 /* 3590 * PTP functions 3591 */ 3592 3593 /* 3594 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3595 * 3596 * => pmap should NOT be pmap_kernel() 3597 * => pmap should be locked 3598 */ 3599 3600 static struct vm_page * 3601 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3602 { 3603 struct vm_page *ptp; 3604 3605 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3606 3607 if (pmap_pde_page(pmap_pde(pmap, va))) { 3608 3609 /* valid... check hint (saves us a PA->PG lookup) */ 3610 if (pmap->pm_ptphint && 3611 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3612 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3613 return (pmap->pm_ptphint); 3614 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3615 #ifdef DIAGNOSTIC 3616 if (ptp == NULL) 3617 panic("pmap_get_ptp: unmanaged user PTP"); 3618 #endif 3619 pmap->pm_ptphint = ptp; 3620 return(ptp); 3621 } 3622 3623 /* allocate a new PTP (updates ptphint) */ 3624 return (pmap_alloc_ptp(pmap, va)); 3625 } 3626 3627 /* 3628 * pmap_alloc_ptp: allocate a PTP for a PMAP 3629 * 3630 * => pmap should already be locked by caller 3631 * => we use the ptp's wire_count to count the number of active mappings 3632 * in the PTP (we start it at one to prevent any chance this PTP 3633 * will ever leak onto the active/inactive queues) 3634 */ 3635 3636 /*__inline */ static struct vm_page * 3637 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3638 { 3639 struct vm_page *ptp; 3640 3641 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3642 3643 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3644 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3645 if (ptp == NULL) 3646 return (NULL); 3647 3648 /* got one! */ 3649 ptp->flags &= ~PG_BUSY; /* never busy */ 3650 ptp->wire_count = 1; /* no mappings yet */ 3651 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), 3652 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3653 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3654 pmap->pm_ptphint = ptp; 3655 return (ptp); 3656 } 3657 3658 vaddr_t 3659 pmap_growkernel(vaddr_t maxkvaddr) 3660 { 3661 struct pmap *kpm = pmap_kernel(), *pm; 3662 int s; 3663 paddr_t ptaddr; 3664 struct vm_page *ptp; 3665 3666 if (maxkvaddr <= pmap_curmaxkvaddr) 3667 goto out; /* we are OK */ 3668 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3669 pmap_curmaxkvaddr, maxkvaddr)); 3670 3671 /* 3672 * whoops! we need to add kernel PTPs 3673 */ 3674 3675 s = splhigh(); /* to be safe */ 3676 simple_lock(&kpm->pm_obj.vmobjlock); 3677 /* due to the way the arm pmap works we map 4MB at a time */ 3678 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3679 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3680 3681 if (uvm.page_init_done == FALSE) { 3682 3683 /* 3684 * we're growing the kernel pmap early (from 3685 * uvm_pageboot_alloc()). this case must be 3686 * handled a little differently. 3687 */ 3688 3689 if (uvm_page_physget(&ptaddr) == FALSE) 3690 panic("pmap_growkernel: out of memory"); 3691 pmap_zero_page(ptaddr); 3692 3693 /* map this page in */ 3694 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, 3695 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3696 3697 /* count PTP as resident */ 3698 kpm->pm_stats.resident_count++; 3699 continue; 3700 } 3701 3702 /* 3703 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3704 * pmap_initialized == FALSE CASE! WE MAY BE 3705 * INVOKED WHILE pmap_init() IS RUNNING! 3706 */ 3707 3708 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3709 panic("pmap_growkernel: alloc ptp failed"); 3710 3711 /* distribute new kernel PTP to all active pmaps */ 3712 simple_lock(&pmaps_lock); 3713 LIST_FOREACH(pm, &pmaps, pm_list) { 3714 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3715 VM_PAGE_TO_PHYS(ptp), 3716 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3717 } 3718 3719 /* Invalidate the PTPT cache. */ 3720 pool_cache_invalidate(&pmap_ptpt_cache); 3721 pmap_ptpt_cache_generation++; 3722 3723 simple_unlock(&pmaps_lock); 3724 } 3725 3726 /* 3727 * flush out the cache, expensive but growkernel will happen so 3728 * rarely 3729 */ 3730 cpu_tlb_flushD(); 3731 cpu_cpwait(); 3732 3733 simple_unlock(&kpm->pm_obj.vmobjlock); 3734 splx(s); 3735 3736 out: 3737 return (pmap_curmaxkvaddr); 3738 } 3739 3740 /************************ Utility routines ****************************/ 3741 3742 /* 3743 * vector_page_setprot: 3744 * 3745 * Manipulate the protection of the vector page. 3746 */ 3747 void 3748 vector_page_setprot(int prot) 3749 { 3750 pt_entry_t *pte; 3751 3752 pte = vtopte(vector_page); 3753 3754 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3755 PTE_SYNC(pte); 3756 cpu_tlb_flushD_SE(vector_page); 3757 cpu_cpwait(); 3758 } 3759 3760 /************************ Bootstrapping routines ****************************/ 3761 3762 /* 3763 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3764 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3765 * find them as necessary. 3766 * 3767 * Note that the data on this list is not valid after initarm() returns. 3768 */ 3769 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3770 3771 static vaddr_t 3772 kernel_pt_lookup(paddr_t pa) 3773 { 3774 pv_addr_t *pv; 3775 3776 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3777 if (pv->pv_pa == pa) 3778 return (pv->pv_va); 3779 } 3780 return (0); 3781 } 3782 3783 /* 3784 * pmap_map_section: 3785 * 3786 * Create a single section mapping. 3787 */ 3788 void 3789 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3790 { 3791 pd_entry_t *pde = (pd_entry_t *) l1pt; 3792 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3793 3794 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3795 3796 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3797 L1_S_PROT(PTE_KERNEL, prot) | fl; 3798 } 3799 3800 /* 3801 * pmap_map_entry: 3802 * 3803 * Create a single page mapping. 3804 */ 3805 void 3806 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3807 { 3808 pd_entry_t *pde = (pd_entry_t *) l1pt; 3809 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3810 pt_entry_t *pte; 3811 3812 KASSERT(((va | pa) & PGOFSET) == 0); 3813 3814 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3815 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3816 3817 pte = (pt_entry_t *) 3818 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3819 if (pte == NULL) 3820 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3821 3822 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3823 L2_S_PROT(PTE_KERNEL, prot) | fl; 3824 } 3825 3826 /* 3827 * pmap_link_l2pt: 3828 * 3829 * Link the L2 page table specified by "pa" into the L1 3830 * page table at the slot for "va". 3831 */ 3832 void 3833 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3834 { 3835 pd_entry_t *pde = (pd_entry_t *) l1pt; 3836 u_int slot = va >> L1_S_SHIFT; 3837 3838 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3839 3840 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3841 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3842 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3843 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3844 3845 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3846 } 3847 3848 /* 3849 * pmap_map_chunk: 3850 * 3851 * Map a chunk of memory using the most efficient mappings 3852 * possible (section, large page, small page) into the 3853 * provided L1 and L2 tables at the specified virtual address. 3854 */ 3855 vsize_t 3856 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3857 int prot, int cache) 3858 { 3859 pd_entry_t *pde = (pd_entry_t *) l1pt; 3860 pt_entry_t *pte, fl; 3861 vsize_t resid; 3862 int i; 3863 3864 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3865 3866 if (l1pt == 0) 3867 panic("pmap_map_chunk: no L1 table provided"); 3868 3869 #ifdef VERBOSE_INIT_ARM 3870 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3871 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3872 #endif 3873 3874 size = resid; 3875 3876 while (resid > 0) { 3877 /* See if we can use a section mapping. */ 3878 if (((pa | va) & L1_S_OFFSET) == 0 && 3879 resid >= L1_S_SIZE) { 3880 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3881 #ifdef VERBOSE_INIT_ARM 3882 printf("S"); 3883 #endif 3884 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3885 L1_S_PROT(PTE_KERNEL, prot) | fl; 3886 va += L1_S_SIZE; 3887 pa += L1_S_SIZE; 3888 resid -= L1_S_SIZE; 3889 continue; 3890 } 3891 3892 /* 3893 * Ok, we're going to use an L2 table. Make sure 3894 * one is actually in the corresponding L1 slot 3895 * for the current VA. 3896 */ 3897 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3898 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3899 3900 pte = (pt_entry_t *) 3901 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3902 if (pte == NULL) 3903 panic("pmap_map_chunk: can't find L2 table for VA" 3904 "0x%08lx", va); 3905 3906 /* See if we can use a L2 large page mapping. */ 3907 if (((pa | va) & L2_L_OFFSET) == 0 && 3908 resid >= L2_L_SIZE) { 3909 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3910 #ifdef VERBOSE_INIT_ARM 3911 printf("L"); 3912 #endif 3913 for (i = 0; i < 16; i++) { 3914 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3915 L2_L_PROTO | pa | 3916 L2_L_PROT(PTE_KERNEL, prot) | fl; 3917 } 3918 va += L2_L_SIZE; 3919 pa += L2_L_SIZE; 3920 resid -= L2_L_SIZE; 3921 continue; 3922 } 3923 3924 /* Use a small page mapping. */ 3925 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3926 #ifdef VERBOSE_INIT_ARM 3927 printf("P"); 3928 #endif 3929 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3930 L2_S_PROT(PTE_KERNEL, prot) | fl; 3931 va += NBPG; 3932 pa += NBPG; 3933 resid -= NBPG; 3934 } 3935 #ifdef VERBOSE_INIT_ARM 3936 printf("\n"); 3937 #endif 3938 return (size); 3939 } 3940 3941 /********************** PTE initialization routines **************************/ 3942 3943 /* 3944 * These routines are called when the CPU type is identified to set up 3945 * the PTE prototypes, cache modes, etc. 3946 * 3947 * The variables are always here, just in case LKMs need to reference 3948 * them (though, they shouldn't). 3949 */ 3950 3951 pt_entry_t pte_l1_s_cache_mode; 3952 pt_entry_t pte_l1_s_cache_mask; 3953 3954 pt_entry_t pte_l2_l_cache_mode; 3955 pt_entry_t pte_l2_l_cache_mask; 3956 3957 pt_entry_t pte_l2_s_cache_mode; 3958 pt_entry_t pte_l2_s_cache_mask; 3959 3960 pt_entry_t pte_l2_s_prot_u; 3961 pt_entry_t pte_l2_s_prot_w; 3962 pt_entry_t pte_l2_s_prot_mask; 3963 3964 pt_entry_t pte_l1_s_proto; 3965 pt_entry_t pte_l1_c_proto; 3966 pt_entry_t pte_l2_s_proto; 3967 3968 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3969 void (*pmap_zero_page_func)(paddr_t); 3970 3971 #if ARM_MMU_GENERIC == 1 3972 void 3973 pmap_pte_init_generic(void) 3974 { 3975 3976 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3977 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3978 3979 pte_l2_l_cache_mode = L2_B|L2_C; 3980 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3981 3982 pte_l2_s_cache_mode = L2_B|L2_C; 3983 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3984 3985 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3986 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3987 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3988 3989 pte_l1_s_proto = L1_S_PROTO_generic; 3990 pte_l1_c_proto = L1_C_PROTO_generic; 3991 pte_l2_s_proto = L2_S_PROTO_generic; 3992 3993 pmap_copy_page_func = pmap_copy_page_generic; 3994 pmap_zero_page_func = pmap_zero_page_generic; 3995 } 3996 3997 #if defined(CPU_ARM9) 3998 void 3999 pmap_pte_init_arm9(void) 4000 { 4001 4002 /* 4003 * ARM9 is compatible with generic, but we want to use 4004 * write-through caching for now. 4005 */ 4006 pmap_pte_init_generic(); 4007 4008 pte_l1_s_cache_mode = L1_S_C; 4009 pte_l2_l_cache_mode = L2_C; 4010 pte_l2_s_cache_mode = L2_C; 4011 } 4012 #endif /* CPU_ARM9 */ 4013 #endif /* ARM_MMU_GENERIC == 1 */ 4014 4015 #if ARM_MMU_XSCALE == 1 4016 void 4017 pmap_pte_init_xscale(void) 4018 { 4019 uint32_t auxctl; 4020 4021 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 4022 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 4023 4024 pte_l2_l_cache_mode = L2_B|L2_C; 4025 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 4026 4027 pte_l2_s_cache_mode = L2_B|L2_C; 4028 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 4029 4030 #ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE 4031 /* 4032 * The XScale core has an enhanced mode where writes that 4033 * miss the cache cause a cache line to be allocated. This 4034 * is significantly faster than the traditional, write-through 4035 * behavior of this case. 4036 * 4037 * However, there is a bug lurking in this pmap module, or in 4038 * other parts of the VM system, or both, which causes corruption 4039 * of NFS-backed files when this cache mode is used. We have 4040 * an ugly work-around for this problem (disable r/w-allocate 4041 * for managed kernel mappings), but the bug is still evil enough 4042 * to consider this cache mode "experimental". 4043 */ 4044 pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X); 4045 pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X); 4046 pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X); 4047 #endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */ 4048 4049 #ifdef XSCALE_CACHE_WRITE_THROUGH 4050 /* 4051 * Some versions of the XScale core have various bugs in 4052 * their cache units, the work-around for which is to run 4053 * the cache in write-through mode. Unfortunately, this 4054 * has a major (negative) impact on performance. So, we 4055 * go ahead and run fast-and-loose, in the hopes that we 4056 * don't line up the planets in a way that will trip the 4057 * bugs. 4058 * 4059 * However, we give you the option to be slow-but-correct. 4060 */ 4061 pte_l1_s_cache_mode = L1_S_C; 4062 pte_l2_l_cache_mode = L2_C; 4063 pte_l2_s_cache_mode = L2_C; 4064 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 4065 4066 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 4067 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 4068 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 4069 4070 pte_l1_s_proto = L1_S_PROTO_xscale; 4071 pte_l1_c_proto = L1_C_PROTO_xscale; 4072 pte_l2_s_proto = L2_S_PROTO_xscale; 4073 4074 pmap_copy_page_func = pmap_copy_page_xscale; 4075 pmap_zero_page_func = pmap_zero_page_xscale; 4076 4077 /* 4078 * Disable ECC protection of page table access, for now. 4079 */ 4080 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4081 : "=r" (auxctl)); 4082 auxctl &= ~XSCALE_AUXCTL_P; 4083 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4084 : 4085 : "r" (auxctl)); 4086 } 4087 4088 /* 4089 * xscale_setup_minidata: 4090 * 4091 * Set up the mini-data cache clean area. We require the 4092 * caller to allocate the right amount of physically and 4093 * virtually contiguous space. 4094 */ 4095 void 4096 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 4097 { 4098 extern vaddr_t xscale_minidata_clean_addr; 4099 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 4100 pd_entry_t *pde = (pd_entry_t *) l1pt; 4101 pt_entry_t *pte; 4102 vsize_t size; 4103 uint32_t auxctl; 4104 4105 xscale_minidata_clean_addr = va; 4106 4107 /* Round it to page size. */ 4108 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 4109 4110 for (; size != 0; 4111 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4112 pte = (pt_entry_t *) 4113 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4114 if (pte == NULL) 4115 panic("xscale_setup_minidata: can't find L2 table for " 4116 "VA 0x%08lx", va); 4117 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4118 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4119 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4120 } 4121 4122 /* 4123 * Configure the mini-data cache for write-back with 4124 * read/write-allocate. 4125 * 4126 * NOTE: In order to reconfigure the mini-data cache, we must 4127 * make sure it contains no valid data! In order to do that, 4128 * we must issue a global data cache invalidate command! 4129 * 4130 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4131 * THIS IS VERY IMPORTANT! 4132 */ 4133 4134 /* Invalidate data and mini-data. */ 4135 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4136 : 4137 : "r" (auxctl)); 4138 4139 4140 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4141 : "=r" (auxctl)); 4142 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4143 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4144 : 4145 : "r" (auxctl)); 4146 } 4147 #endif /* ARM_MMU_XSCALE == 1 */ 4148
Indexes created Sat Sep 27 14:09:57 GMT 2025