pmap.c revision 1.122
1 /* $NetBSD: pmap.c,v 1.122 2002/11/12 22:14:21 chris Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001-2002 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.122 2002/11/12 22:14:21 chris Exp $"); 147 148 #ifdef PMAP_DEBUG 149 #define PDEBUG(_lev_,_stat_) \ 150 if (pmap_debug_level >= (_lev_)) \ 151 ((_stat_)) 152 int pmap_debug_level = -2; 153 void pmap_dump_pvlist(vaddr_t phys, char *m); 154 155 /* 156 * for switching to potentially finer grained debugging 157 */ 158 #define PDB_FOLLOW 0x0001 159 #define PDB_INIT 0x0002 160 #define PDB_ENTER 0x0004 161 #define PDB_REMOVE 0x0008 162 #define PDB_CREATE 0x0010 163 #define PDB_PTPAGE 0x0020 164 #define PDB_GROWKERN 0x0040 165 #define PDB_BITS 0x0080 166 #define PDB_COLLECT 0x0100 167 #define PDB_PROTECT 0x0200 168 #define PDB_MAP_L1 0x0400 169 #define PDB_BOOTSTRAP 0x1000 170 #define PDB_PARANOIA 0x2000 171 #define PDB_WIRING 0x4000 172 #define PDB_PVDUMP 0x8000 173 174 int debugmap = 0; 175 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 176 #define NPDEBUG(_lev_,_stat_) \ 177 if (pmapdebug & (_lev_)) \ 178 ((_stat_)) 179 180 #else /* PMAP_DEBUG */ 181 #define PDEBUG(_lev_,_stat_) /* Nothing */ 182 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 183 #endif /* PMAP_DEBUG */ 184 185 struct pmap kernel_pmap_store; 186 187 /* 188 * linked list of all non-kernel pmaps 189 */ 190 191 static LIST_HEAD(, pmap) pmaps; 192 193 /* 194 * pool that pmap structures are allocated from 195 */ 196 197 struct pool pmap_pmap_pool; 198 199 /* 200 * pool/cache that PT-PT's are allocated from 201 */ 202 203 struct pool pmap_ptpt_pool; 204 struct pool_cache pmap_ptpt_cache; 205 u_int pmap_ptpt_cache_generation; 206 207 static void *pmap_ptpt_page_alloc(struct pool *, int); 208 static void pmap_ptpt_page_free(struct pool *, void *); 209 210 struct pool_allocator pmap_ptpt_allocator = { 211 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 212 }; 213 214 static int pmap_ptpt_ctor(void *, void *, int); 215 216 static pt_entry_t *csrc_pte, *cdst_pte; 217 static vaddr_t csrcp, cdstp; 218 219 char *memhook; 220 extern caddr_t msgbufaddr; 221 222 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 223 /* 224 * locking data structures 225 */ 226 227 static struct lock pmap_main_lock; 228 static struct simplelock pvalloc_lock; 229 static struct simplelock pmaps_lock; 230 #ifdef LOCKDEBUG 231 #define PMAP_MAP_TO_HEAD_LOCK() \ 232 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 233 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 234 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 235 236 #define PMAP_HEAD_TO_MAP_LOCK() \ 237 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 238 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 239 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 240 #else 241 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 242 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 244 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 245 #endif /* LOCKDEBUG */ 246 247 /* 248 * pv_page management structures: locked by pvalloc_lock 249 */ 250 251 TAILQ_HEAD(pv_pagelist, pv_page); 252 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 253 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 254 static unsigned int pv_nfpvents; /* # of free pv entries */ 255 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 256 static vaddr_t pv_cachedva; /* cached VA for later use */ 257 258 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 259 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 260 /* high water mark */ 261 262 /* 263 * local prototypes 264 */ 265 266 static struct pv_entry *pmap_add_pvpage(struct pv_page *, boolean_t); 267 static struct pv_entry *pmap_alloc_pv(struct pmap *, int); /* see codes below */ 268 #define ALLOCPV_NEED 0 /* need PV now */ 269 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 270 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 271 static struct pv_entry *pmap_alloc_pvpage(struct pmap *, int); 272 static void pmap_enter_pv(struct vm_page *, 273 struct pv_entry *, struct pmap *, 274 vaddr_t, struct vm_page *, unsigned int); 275 static void pmap_free_pv(struct pmap *, struct pv_entry *); 276 static void pmap_free_pvs(struct pmap *, struct pv_entry *); 277 static void pmap_free_pv_doit(struct pv_entry *); 278 static void pmap_free_pvpage(void); 279 static boolean_t pmap_is_curpmap(struct pmap *); 280 static struct pv_entry *pmap_remove_pv(struct vm_page *, struct pmap *, 281 vaddr_t); 282 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 283 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 284 285 static u_int pmap_modify_pv(struct pmap *, vaddr_t, struct vm_page *, 286 u_int, u_int); 287 288 /* 289 * Structure that describes and L1 table. 290 */ 291 struct l1pt { 292 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 293 struct pglist pt_plist; /* Allocated page list */ 294 vaddr_t pt_va; /* Allocated virtual address */ 295 int pt_flags; /* Flags */ 296 }; 297 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 298 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 299 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 300 301 static void pmap_free_l1pt(struct l1pt *); 302 static int pmap_allocpagedir(struct pmap *); 303 static int pmap_clean_page(struct pv_entry *, boolean_t); 304 static void pmap_page_remove(struct vm_page *); 305 306 static struct vm_page *pmap_alloc_ptp(struct pmap *, vaddr_t); 307 static struct vm_page *pmap_get_ptp(struct pmap *, vaddr_t); 308 __inline static void pmap_clearbit(struct vm_page *, unsigned int); 309 310 extern paddr_t physical_start; 311 extern paddr_t physical_end; 312 extern unsigned int free_pages; 313 extern int max_processes; 314 315 vaddr_t virtual_avail; 316 vaddr_t virtual_end; 317 vaddr_t pmap_curmaxkvaddr; 318 319 vaddr_t avail_start; 320 vaddr_t avail_end; 321 322 extern pv_addr_t systempage; 323 324 /* Variables used by the L1 page table queue code */ 325 SIMPLEQ_HEAD(l1pt_queue, l1pt); 326 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 327 static int l1pt_static_queue_count; /* items in the static l1 queue */ 328 static int l1pt_static_create_count; /* static l1 items created */ 329 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 330 static int l1pt_queue_count; /* items in the l1 queue */ 331 static int l1pt_create_count; /* stat - L1's create count */ 332 static int l1pt_reuse_count; /* stat - L1's reused count */ 333 334 /* Local function prototypes (not used outside this file) */ 335 void pmap_pinit(struct pmap *); 336 void pmap_freepagedir(struct pmap *); 337 338 /* Other function prototypes */ 339 extern void bzero_page(vaddr_t); 340 extern void bcopy_page(vaddr_t, vaddr_t); 341 342 struct l1pt *pmap_alloc_l1pt(void); 343 static __inline void pmap_map_in_l1(struct pmap *pmap, vaddr_t va, 344 vaddr_t l2pa, int); 345 346 static pt_entry_t *pmap_map_ptes(struct pmap *); 347 static void pmap_unmap_ptes(struct pmap *); 348 349 __inline static void pmap_vac_me_harder(struct pmap *, struct vm_page *, 350 pt_entry_t *, boolean_t); 351 static void pmap_vac_me_kpmap(struct pmap *, struct vm_page *, 352 pt_entry_t *, boolean_t); 353 static void pmap_vac_me_user(struct pmap *, struct vm_page *, 354 pt_entry_t *, boolean_t); 355 356 /* 357 * real definition of pv_entry. 358 */ 359 360 struct pv_entry { 361 struct pv_entry *pv_next; /* next pv_entry */ 362 struct pmap *pv_pmap; /* pmap where mapping lies */ 363 vaddr_t pv_va; /* virtual address for mapping */ 364 int pv_flags; /* flags */ 365 struct vm_page *pv_ptp; /* vm_page for the ptp */ 366 }; 367 368 /* 369 * pv_entrys are dynamically allocated in chunks from a single page. 370 * we keep track of how many pv_entrys are in use for each page and 371 * we can free pv_entry pages if needed. there is one lock for the 372 * entire allocation system. 373 */ 374 375 struct pv_page_info { 376 TAILQ_ENTRY(pv_page) pvpi_list; 377 struct pv_entry *pvpi_pvfree; 378 int pvpi_nfree; 379 }; 380 381 /* 382 * number of pv_entry's in a pv_page 383 * (note: won't work on systems where NPBG isn't a constant) 384 */ 385 386 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 387 sizeof(struct pv_entry)) 388 389 /* 390 * a pv_page: where pv_entrys are allocated from 391 */ 392 393 struct pv_page { 394 struct pv_page_info pvinfo; 395 struct pv_entry pvents[PVE_PER_PVPAGE]; 396 }; 397 398 #ifdef MYCROFT_HACK 399 int mycroft_hack = 0; 400 #endif 401 402 /* Function to set the debug level of the pmap code */ 403 404 #ifdef PMAP_DEBUG 405 void 406 pmap_debug(int level) 407 { 408 pmap_debug_level = level; 409 printf("pmap_debug: level=%d\n", pmap_debug_level); 410 } 411 #endif /* PMAP_DEBUG */ 412 413 __inline static boolean_t 414 pmap_is_curpmap(struct pmap *pmap) 415 { 416 417 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 418 pmap == pmap_kernel()) 419 return (TRUE); 420 421 return (FALSE); 422 } 423 424 /* 425 * PTE_SYNC_CURRENT: 426 * 427 * Make sure the pte is flushed to RAM. If the pmap is 428 * not the current pmap, then also evict the pte from 429 * any cache lines. 430 */ 431 #define PTE_SYNC_CURRENT(pmap, pte) \ 432 do { \ 433 if (pmap_is_curpmap(pmap)) \ 434 PTE_SYNC(pte); \ 435 else \ 436 PTE_FLUSH(pte); \ 437 } while (/*CONSTCOND*/0) 438 439 /* 440 * PTE_FLUSH_ALT: 441 * 442 * Make sure the pte is not in any cache lines. We expect 443 * this to be used only when a pte has not been modified. 444 */ 445 #define PTE_FLUSH_ALT(pmap, pte) \ 446 do { \ 447 if (pmap_is_curpmap(pmap) == 0) \ 448 PTE_FLUSH(pte); \ 449 } while (/*CONSTCOND*/0) 450 451 /* 452 * p v _ e n t r y f u n c t i o n s 453 */ 454 455 /* 456 * pv_entry allocation functions: 457 * the main pv_entry allocation functions are: 458 * pmap_alloc_pv: allocate a pv_entry structure 459 * pmap_free_pv: free one pv_entry 460 * pmap_free_pvs: free a list of pv_entrys 461 * 462 * the rest are helper functions 463 */ 464 465 /* 466 * pmap_alloc_pv: inline function to allocate a pv_entry structure 467 * => we lock pvalloc_lock 468 * => if we fail, we call out to pmap_alloc_pvpage 469 * => 3 modes: 470 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 471 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 472 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 473 * one now 474 * 475 * "try" is for optional functions like pmap_copy(). 476 */ 477 478 __inline static struct pv_entry * 479 pmap_alloc_pv(struct pmap *pmap, int mode) 480 { 481 struct pv_page *pvpage; 482 struct pv_entry *pv; 483 484 simple_lock(&pvalloc_lock); 485 486 pvpage = TAILQ_FIRST(&pv_freepages); 487 488 if (pvpage != NULL) { 489 pvpage->pvinfo.pvpi_nfree--; 490 if (pvpage->pvinfo.pvpi_nfree == 0) { 491 /* nothing left in this one? */ 492 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 493 } 494 pv = pvpage->pvinfo.pvpi_pvfree; 495 KASSERT(pv); 496 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 497 pv_nfpvents--; /* took one from pool */ 498 } else { 499 pv = NULL; /* need more of them */ 500 } 501 502 /* 503 * if below low water mark or we didn't get a pv_entry we try and 504 * create more pv_entrys ... 505 */ 506 507 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 508 if (pv == NULL) 509 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 510 mode : ALLOCPV_NEED); 511 else 512 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 513 } 514 515 simple_unlock(&pvalloc_lock); 516 return(pv); 517 } 518 519 /* 520 * pmap_alloc_pvpage: maybe allocate a new pvpage 521 * 522 * if need_entry is false: try and allocate a new pv_page 523 * if need_entry is true: try and allocate a new pv_page and return a 524 * new pv_entry from it. if we are unable to allocate a pv_page 525 * we make a last ditch effort to steal a pv_page from some other 526 * mapping. if that fails, we panic... 527 * 528 * => we assume that the caller holds pvalloc_lock 529 */ 530 531 static struct pv_entry * 532 pmap_alloc_pvpage(struct pmap *pmap, int mode) 533 { 534 struct vm_page *pg; 535 struct pv_page *pvpage; 536 struct pv_entry *pv; 537 538 /* 539 * if we need_entry and we've got unused pv_pages, allocate from there 540 */ 541 542 pvpage = TAILQ_FIRST(&pv_unusedpgs); 543 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 544 545 /* move it to pv_freepages list */ 546 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 547 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 548 549 /* allocate a pv_entry */ 550 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 551 pv = pvpage->pvinfo.pvpi_pvfree; 552 KASSERT(pv); 553 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 554 555 pv_nfpvents--; /* took one from pool */ 556 return(pv); 557 } 558 559 /* 560 * see if we've got a cached unmapped VA that we can map a page in. 561 * if not, try to allocate one. 562 */ 563 564 565 if (pv_cachedva == 0) { 566 int s; 567 s = splvm(); 568 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 569 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 570 splx(s); 571 if (pv_cachedva == 0) { 572 return (NULL); 573 } 574 } 575 576 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 577 UVM_PGA_USERESERVE); 578 579 if (pg == NULL) 580 return (NULL); 581 pg->flags &= ~PG_BUSY; /* never busy */ 582 583 /* 584 * add a mapping for our new pv_page and free its entrys (save one!) 585 * 586 * NOTE: If we are allocating a PV page for the kernel pmap, the 587 * pmap is already locked! (...but entering the mapping is safe...) 588 */ 589 590 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 591 VM_PROT_READ|VM_PROT_WRITE); 592 pmap_update(pmap_kernel()); 593 pvpage = (struct pv_page *) pv_cachedva; 594 pv_cachedva = 0; 595 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 596 } 597 598 /* 599 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 600 * 601 * => caller must hold pvalloc_lock 602 * => if need_entry is true, we allocate and return one pv_entry 603 */ 604 605 static struct pv_entry * 606 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 607 { 608 unsigned int tofree, lcv; 609 610 /* do we need to return one? */ 611 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 612 613 pvp->pvinfo.pvpi_pvfree = NULL; 614 pvp->pvinfo.pvpi_nfree = tofree; 615 for (lcv = 0 ; lcv < tofree ; lcv++) { 616 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 617 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 618 } 619 if (need_entry) 620 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 621 else 622 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 623 pv_nfpvents += tofree; 624 return((need_entry) ? &pvp->pvents[lcv] : NULL); 625 } 626 627 /* 628 * pmap_free_pv_doit: actually free a pv_entry 629 * 630 * => do not call this directly! instead use either 631 * 1. pmap_free_pv ==> free a single pv_entry 632 * 2. pmap_free_pvs => free a list of pv_entrys 633 * => we must be holding pvalloc_lock 634 */ 635 636 __inline static void 637 pmap_free_pv_doit(struct pv_entry *pv) 638 { 639 struct pv_page *pvp; 640 641 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 642 pv_nfpvents++; 643 pvp->pvinfo.pvpi_nfree++; 644 645 /* nfree == 1 => fully allocated page just became partly allocated */ 646 if (pvp->pvinfo.pvpi_nfree == 1) { 647 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 648 } 649 650 /* free it */ 651 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 652 pvp->pvinfo.pvpi_pvfree = pv; 653 654 /* 655 * are all pv_page's pv_entry's free? move it to unused queue. 656 */ 657 658 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 659 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 660 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 661 } 662 } 663 664 /* 665 * pmap_free_pv: free a single pv_entry 666 * 667 * => we gain the pvalloc_lock 668 */ 669 670 __inline static void 671 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 672 { 673 simple_lock(&pvalloc_lock); 674 pmap_free_pv_doit(pv); 675 676 /* 677 * Can't free the PV page if the PV entries were associated with 678 * the kernel pmap; the pmap is already locked. 679 */ 680 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 681 pmap != pmap_kernel()) 682 pmap_free_pvpage(); 683 684 simple_unlock(&pvalloc_lock); 685 } 686 687 /* 688 * pmap_free_pvs: free a list of pv_entrys 689 * 690 * => we gain the pvalloc_lock 691 */ 692 693 __inline static void 694 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 695 { 696 struct pv_entry *nextpv; 697 698 simple_lock(&pvalloc_lock); 699 700 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 701 nextpv = pvs->pv_next; 702 pmap_free_pv_doit(pvs); 703 } 704 705 /* 706 * Can't free the PV page if the PV entries were associated with 707 * the kernel pmap; the pmap is already locked. 708 */ 709 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 710 pmap != pmap_kernel()) 711 pmap_free_pvpage(); 712 713 simple_unlock(&pvalloc_lock); 714 } 715 716 717 /* 718 * pmap_free_pvpage: try and free an unused pv_page structure 719 * 720 * => assume caller is holding the pvalloc_lock and that 721 * there is a page on the pv_unusedpgs list 722 * => if we can't get a lock on the kmem_map we try again later 723 */ 724 725 static void 726 pmap_free_pvpage(void) 727 { 728 int s; 729 struct vm_map *map; 730 struct vm_map_entry *dead_entries; 731 struct pv_page *pvp; 732 733 s = splvm(); /* protect kmem_map */ 734 735 pvp = TAILQ_FIRST(&pv_unusedpgs); 736 737 /* 738 * note: watch out for pv_initpage which is allocated out of 739 * kernel_map rather than kmem_map. 740 */ 741 if (pvp == pv_initpage) 742 map = kernel_map; 743 else 744 map = kmem_map; 745 if (vm_map_lock_try(map)) { 746 747 /* remove pvp from pv_unusedpgs */ 748 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 749 750 /* unmap the page */ 751 dead_entries = NULL; 752 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 753 &dead_entries); 754 vm_map_unlock(map); 755 756 if (dead_entries != NULL) 757 uvm_unmap_detach(dead_entries, 0); 758 759 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 760 } 761 if (pvp == pv_initpage) 762 /* no more initpage, we've freed it */ 763 pv_initpage = NULL; 764 765 splx(s); 766 } 767 768 /* 769 * main pv_entry manipulation functions: 770 * pmap_enter_pv: enter a mapping onto a vm_page list 771 * pmap_remove_pv: remove a mappiing from a vm_page list 772 * 773 * NOTE: pmap_enter_pv expects to lock the pvh itself 774 * pmap_remove_pv expects te caller to lock the pvh before calling 775 */ 776 777 /* 778 * pmap_enter_pv: enter a mapping onto a vm_page lst 779 * 780 * => caller should hold the proper lock on pmap_main_lock 781 * => caller should have pmap locked 782 * => we will gain the lock on the vm_page and allocate the new pv_entry 783 * => caller should adjust ptp's wire_count before calling 784 * => caller should not adjust pmap's wire_count 785 */ 786 787 __inline static void 788 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 789 vaddr_t va, struct vm_page *ptp, unsigned int flags) 790 { 791 pve->pv_pmap = pmap; 792 pve->pv_va = va; 793 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 794 pve->pv_flags = flags; 795 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 796 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 797 pg->mdpage.pvh_list = pve; /* ... locked list */ 798 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 799 if (pve->pv_flags & PVF_WIRED) 800 ++pmap->pm_stats.wired_count; 801 #ifdef PMAP_ALIAS_DEBUG 802 { 803 int s = splhigh(); 804 if (pve->pv_flags & PVF_WRITE) 805 pg->mdpage.rw_mappings++; 806 else 807 pg->mdpage.ro_mappings++; 808 if (pg->mdpage.rw_mappings != 0 && 809 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 810 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 811 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 812 pg->mdpage.krw_mappings); 813 } 814 splx(s); 815 } 816 #endif /* PMAP_ALIAS_DEBUG */ 817 } 818 819 /* 820 * pmap_remove_pv: try to remove a mapping from a pv_list 821 * 822 * => caller should hold proper lock on pmap_main_lock 823 * => pmap should be locked 824 * => caller should hold lock on vm_page [so that attrs can be adjusted] 825 * => caller should adjust ptp's wire_count and free PTP if needed 826 * => caller should NOT adjust pmap's wire_count 827 * => we return the removed pve 828 */ 829 830 __inline static struct pv_entry * 831 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 832 { 833 struct pv_entry *pve, **prevptr; 834 835 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 836 pve = *prevptr; 837 while (pve) { 838 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 839 *prevptr = pve->pv_next; /* remove it! */ 840 if (pve->pv_flags & PVF_WIRED) 841 --pmap->pm_stats.wired_count; 842 #ifdef PMAP_ALIAS_DEBUG 843 { 844 int s = splhigh(); 845 if (pve->pv_flags & PVF_WRITE) { 846 KASSERT(pg->mdpage.rw_mappings != 0); 847 pg->mdpage.rw_mappings--; 848 } else { 849 KASSERT(pg->mdpage.ro_mappings != 0); 850 pg->mdpage.ro_mappings--; 851 } 852 splx(s); 853 } 854 #endif /* PMAP_ALIAS_DEBUG */ 855 break; 856 } 857 prevptr = &pve->pv_next; /* previous pointer */ 858 pve = pve->pv_next; /* advance */ 859 } 860 return(pve); /* return removed pve */ 861 } 862 863 /* 864 * 865 * pmap_modify_pv: Update pv flags 866 * 867 * => caller should hold lock on vm_page [so that attrs can be adjusted] 868 * => caller should NOT adjust pmap's wire_count 869 * => caller must call pmap_vac_me_harder() if writable status of a page 870 * may have changed. 871 * => we return the old flags 872 * 873 * Modify a physical-virtual mapping in the pv table 874 */ 875 876 static /* __inline */ u_int 877 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 878 u_int bic_mask, u_int eor_mask) 879 { 880 struct pv_entry *npv; 881 u_int flags, oflags; 882 883 /* 884 * There is at least one VA mapping this page. 885 */ 886 887 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 888 if (pmap == npv->pv_pmap && va == npv->pv_va) { 889 oflags = npv->pv_flags; 890 npv->pv_flags = flags = 891 ((oflags & ~bic_mask) ^ eor_mask); 892 if ((flags ^ oflags) & PVF_WIRED) { 893 if (flags & PVF_WIRED) 894 ++pmap->pm_stats.wired_count; 895 else 896 --pmap->pm_stats.wired_count; 897 } 898 #ifdef PMAP_ALIAS_DEBUG 899 { 900 int s = splhigh(); 901 if ((flags ^ oflags) & PVF_WRITE) { 902 if (flags & PVF_WRITE) { 903 pg->mdpage.rw_mappings++; 904 pg->mdpage.ro_mappings--; 905 if (pg->mdpage.rw_mappings != 0 && 906 (pg->mdpage.kro_mappings != 0 || 907 pg->mdpage.krw_mappings != 0)) { 908 printf("pmap_modify_pv: rw %u, " 909 "kro %u, krw %u\n", 910 pg->mdpage.rw_mappings, 911 pg->mdpage.kro_mappings, 912 pg->mdpage.krw_mappings); 913 } 914 } else { 915 KASSERT(pg->mdpage.rw_mappings != 0); 916 pg->mdpage.rw_mappings--; 917 pg->mdpage.ro_mappings++; 918 } 919 } 920 splx(s); 921 } 922 #endif /* PMAP_ALIAS_DEBUG */ 923 return (oflags); 924 } 925 } 926 return (0); 927 } 928 929 /* 930 * Map the specified level 2 pagetable into the level 1 page table for 931 * the given pmap to cover a chunk of virtual address space starting from the 932 * address specified. 933 */ 934 #define PMAP_PTP_SELFREF 0x01 935 #define PMAP_PTP_CACHEABLE 0x02 936 937 static __inline void 938 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, int flags) 939 { 940 vaddr_t ptva; 941 942 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 943 944 /* Calculate the index into the L1 page table. */ 945 ptva = va >> L1_S_SHIFT; 946 947 /* Map page table into the L1. */ 948 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 949 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 950 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 951 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 952 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 953 954 /* Map the page table into the page table area. */ 955 if (flags & PMAP_PTP_SELFREF) { 956 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 957 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE) | 958 ((flags & PMAP_PTP_CACHEABLE) ? pte_l2_s_cache_mode : 0); 959 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 960 } 961 } 962 963 #if 0 964 static __inline void 965 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 966 { 967 vaddr_t ptva; 968 969 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 970 971 /* Calculate the index into the L1 page table. */ 972 ptva = va >> L1_S_SHIFT; 973 974 /* Unmap page table from the L1. */ 975 pmap->pm_pdir[ptva + 0] = 0; 976 pmap->pm_pdir[ptva + 1] = 0; 977 pmap->pm_pdir[ptva + 2] = 0; 978 pmap->pm_pdir[ptva + 3] = 0; 979 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 980 981 /* Unmap the page table from the page table area. */ 982 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 983 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 984 } 985 #endif 986 987 /* 988 * Used to map a range of physical addresses into kernel 989 * virtual address space. 990 * 991 * For now, VM is already on, we only need to map the 992 * specified memory. 993 * 994 * XXX This routine should eventually go away; it's only used 995 * XXX by machine-dependent crash dump code. 996 */ 997 vaddr_t 998 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 999 { 1000 pt_entry_t *pte; 1001 1002 while (spa < epa) { 1003 pte = vtopte(va); 1004 1005 *pte = L2_S_PROTO | spa | 1006 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 1007 PTE_SYNC(pte); 1008 cpu_tlb_flushID_SE(va); 1009 va += NBPG; 1010 spa += NBPG; 1011 } 1012 pmap_update(pmap_kernel()); 1013 return(va); 1014 } 1015 1016 1017 /* 1018 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1019 * 1020 * bootstrap the pmap system. This is called from initarm and allows 1021 * the pmap system to initailise any structures it requires. 1022 * 1023 * Currently this sets up the kernel_pmap that is statically allocated 1024 * and also allocated virtual addresses for certain page hooks. 1025 * Currently the only one page hook is allocated that is used 1026 * to zero physical pages of memory. 1027 * It also initialises the start and end address of the kernel data space. 1028 */ 1029 1030 char *boot_head; 1031 1032 void 1033 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1034 { 1035 pt_entry_t *pte; 1036 1037 pmap_kernel()->pm_pdir = kernel_l1pt; 1038 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 1039 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1040 simple_lock_init(&pmap_kernel()->pm_lock); 1041 pmap_kernel()->pm_obj.pgops = NULL; 1042 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1043 pmap_kernel()->pm_obj.uo_npages = 0; 1044 pmap_kernel()->pm_obj.uo_refs = 1; 1045 1046 virtual_avail = KERNEL_VM_BASE; 1047 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1048 1049 /* 1050 * now we allocate the "special" VAs which are used for tmp mappings 1051 * by the pmap (and other modules). we allocate the VAs by advancing 1052 * virtual_avail (note that there are no pages mapped at these VAs). 1053 * we find the PTE that maps the allocated VA via the linear PTE 1054 * mapping. 1055 */ 1056 1057 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1058 1059 csrcp = virtual_avail; csrc_pte = pte; 1060 virtual_avail += PAGE_SIZE; pte++; 1061 1062 cdstp = virtual_avail; cdst_pte = pte; 1063 virtual_avail += PAGE_SIZE; pte++; 1064 1065 memhook = (char *) virtual_avail; /* don't need pte */ 1066 virtual_avail += PAGE_SIZE; pte++; 1067 1068 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1069 virtual_avail += round_page(MSGBUFSIZE); 1070 pte += atop(round_page(MSGBUFSIZE)); 1071 1072 /* 1073 * init the static-global locks and global lists. 1074 */ 1075 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1076 simple_lock_init(&pvalloc_lock); 1077 simple_lock_init(&pmaps_lock); 1078 LIST_INIT(&pmaps); 1079 TAILQ_INIT(&pv_freepages); 1080 TAILQ_INIT(&pv_unusedpgs); 1081 1082 /* 1083 * initialize the pmap pool. 1084 */ 1085 1086 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1087 &pool_allocator_nointr); 1088 1089 /* 1090 * initialize the PT-PT pool and cache. 1091 */ 1092 1093 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1094 &pmap_ptpt_allocator); 1095 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1096 pmap_ptpt_ctor, NULL, NULL); 1097 1098 cpu_dcache_wbinv_all(); 1099 } 1100 1101 /* 1102 * void pmap_init(void) 1103 * 1104 * Initialize the pmap module. 1105 * Called by vm_init() in vm/vm_init.c in order to initialise 1106 * any structures that the pmap system needs to map virtual memory. 1107 */ 1108 1109 extern int physmem; 1110 1111 void 1112 pmap_init(void) 1113 { 1114 1115 /* 1116 * Set the available memory vars - These do not map to real memory 1117 * addresses and cannot as the physical memory is fragmented. 1118 * They are used by ps for %mem calculations. 1119 * One could argue whether this should be the entire memory or just 1120 * the memory that is useable in a user process. 1121 */ 1122 avail_start = 0; 1123 avail_end = physmem * NBPG; 1124 1125 /* 1126 * now we need to free enough pv_entry structures to allow us to get 1127 * the kmem_map/kmem_object allocated and inited (done after this 1128 * function is finished). to do this we allocate one bootstrap page out 1129 * of kernel_map and use it to provide an initial pool of pv_entry 1130 * structures. we never free this page. 1131 */ 1132 1133 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1134 if (pv_initpage == NULL) 1135 panic("pmap_init: pv_initpage"); 1136 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1137 pv_nfpvents = 0; 1138 (void) pmap_add_pvpage(pv_initpage, FALSE); 1139 1140 pmap_initialized = TRUE; 1141 1142 /* Initialise our L1 page table queues and counters */ 1143 SIMPLEQ_INIT(&l1pt_static_queue); 1144 l1pt_static_queue_count = 0; 1145 l1pt_static_create_count = 0; 1146 SIMPLEQ_INIT(&l1pt_queue); 1147 l1pt_queue_count = 0; 1148 l1pt_create_count = 0; 1149 l1pt_reuse_count = 0; 1150 } 1151 1152 /* 1153 * pmap_postinit() 1154 * 1155 * This routine is called after the vm and kmem subsystems have been 1156 * initialised. This allows the pmap code to perform any initialisation 1157 * that can only be done one the memory allocation is in place. 1158 */ 1159 1160 void 1161 pmap_postinit(void) 1162 { 1163 unsigned int loop; 1164 struct l1pt *pt; 1165 1166 #ifdef PMAP_STATIC_L1S 1167 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1168 #else /* PMAP_STATIC_L1S */ 1169 for (loop = 0; loop < max_processes; ++loop) { 1170 #endif /* PMAP_STATIC_L1S */ 1171 /* Allocate a L1 page table */ 1172 pt = pmap_alloc_l1pt(); 1173 if (!pt) 1174 panic("Cannot allocate static L1 page tables"); 1175 1176 /* Clean it */ 1177 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1178 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1179 /* Add the page table to the queue */ 1180 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1181 ++l1pt_static_queue_count; 1182 ++l1pt_static_create_count; 1183 } 1184 } 1185 1186 1187 /* 1188 * Create and return a physical map. 1189 * 1190 * If the size specified for the map is zero, the map is an actual physical 1191 * map, and may be referenced by the hardware. 1192 * 1193 * If the size specified is non-zero, the map will be used in software only, 1194 * and is bounded by that size. 1195 */ 1196 1197 pmap_t 1198 pmap_create(void) 1199 { 1200 struct pmap *pmap; 1201 1202 /* 1203 * Fetch pmap entry from the pool 1204 */ 1205 1206 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1207 /* XXX is this really needed! */ 1208 memset(pmap, 0, sizeof(*pmap)); 1209 1210 simple_lock_init(&pmap->pm_obj.vmobjlock); 1211 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1212 TAILQ_INIT(&pmap->pm_obj.memq); 1213 pmap->pm_obj.uo_npages = 0; 1214 pmap->pm_obj.uo_refs = 1; 1215 pmap->pm_stats.wired_count = 0; 1216 pmap->pm_stats.resident_count = 1; 1217 pmap->pm_ptphint = NULL; 1218 1219 /* Now init the machine part of the pmap */ 1220 pmap_pinit(pmap); 1221 return(pmap); 1222 } 1223 1224 /* 1225 * pmap_alloc_l1pt() 1226 * 1227 * This routine allocates physical and virtual memory for a L1 page table 1228 * and wires it. 1229 * A l1pt structure is returned to describe the allocated page table. 1230 * 1231 * This routine is allowed to fail if the required memory cannot be allocated. 1232 * In this case NULL is returned. 1233 */ 1234 1235 struct l1pt * 1236 pmap_alloc_l1pt(void) 1237 { 1238 paddr_t pa; 1239 vaddr_t va; 1240 struct l1pt *pt; 1241 int error; 1242 struct vm_page *m; 1243 1244 /* Allocate virtual address space for the L1 page table */ 1245 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1246 if (va == 0) { 1247 #ifdef DIAGNOSTIC 1248 PDEBUG(0, 1249 printf("pmap: Cannot allocate pageable memory for L1\n")); 1250 #endif /* DIAGNOSTIC */ 1251 return(NULL); 1252 } 1253 1254 /* Allocate memory for the l1pt structure */ 1255 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1256 1257 /* 1258 * Allocate pages from the VM system. 1259 */ 1260 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1261 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1262 if (error) { 1263 #ifdef DIAGNOSTIC 1264 PDEBUG(0, 1265 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1266 error)); 1267 #endif /* DIAGNOSTIC */ 1268 /* Release the resources we already have claimed */ 1269 free(pt, M_VMPMAP); 1270 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1271 return(NULL); 1272 } 1273 1274 /* Map our physical pages into our virtual space */ 1275 pt->pt_va = va; 1276 m = TAILQ_FIRST(&pt->pt_plist); 1277 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1278 pa = VM_PAGE_TO_PHYS(m); 1279 1280 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE); 1281 1282 va += NBPG; 1283 m = m->pageq.tqe_next; 1284 } 1285 1286 #ifdef DIAGNOSTIC 1287 if (m) 1288 panic("pmap_alloc_l1pt: pglist not empty"); 1289 #endif /* DIAGNOSTIC */ 1290 1291 pt->pt_flags = 0; 1292 return(pt); 1293 } 1294 1295 /* 1296 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1297 */ 1298 static void 1299 pmap_free_l1pt(struct l1pt *pt) 1300 { 1301 /* Separate the physical memory for the virtual space */ 1302 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1303 pmap_update(pmap_kernel()); 1304 1305 /* Return the physical memory */ 1306 uvm_pglistfree(&pt->pt_plist); 1307 1308 /* Free the virtual space */ 1309 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1310 1311 /* Free the l1pt structure */ 1312 free(pt, M_VMPMAP); 1313 } 1314 1315 /* 1316 * pmap_ptpt_page_alloc: 1317 * 1318 * Back-end page allocator for the PT-PT pool. 1319 */ 1320 static void * 1321 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1322 { 1323 struct vm_page *pg; 1324 pt_entry_t *pte; 1325 vaddr_t va; 1326 1327 /* XXX PR_WAITOK? */ 1328 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1329 if (va == 0) 1330 return (NULL); 1331 1332 for (;;) { 1333 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1334 if (pg != NULL) 1335 break; 1336 if ((flags & PR_WAITOK) == 0) { 1337 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1338 return (NULL); 1339 } 1340 uvm_wait("pmap_ptpt"); 1341 } 1342 1343 pte = vtopte(va); 1344 KDASSERT(pmap_pte_v(pte) == 0); 1345 1346 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1347 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1348 PTE_SYNC(pte); 1349 #ifdef PMAP_ALIAS_DEBUG 1350 { 1351 int s = splhigh(); 1352 pg->mdpage.krw_mappings++; 1353 splx(s); 1354 } 1355 #endif /* PMAP_ALIAS_DEBUG */ 1356 1357 return ((void *) va); 1358 } 1359 1360 /* 1361 * pmap_ptpt_page_free: 1362 * 1363 * Back-end page free'er for the PT-PT pool. 1364 */ 1365 static void 1366 pmap_ptpt_page_free(struct pool *pp, void *v) 1367 { 1368 vaddr_t va = (vaddr_t) v; 1369 paddr_t pa; 1370 1371 pa = vtophys(va); 1372 1373 pmap_kremove(va, L2_TABLE_SIZE); 1374 pmap_update(pmap_kernel()); 1375 1376 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1377 1378 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1379 } 1380 1381 /* 1382 * pmap_ptpt_ctor: 1383 * 1384 * Constructor for the PT-PT cache. 1385 */ 1386 static int 1387 pmap_ptpt_ctor(void *arg, void *object, int flags) 1388 { 1389 caddr_t vptpt = object; 1390 1391 /* Page is already zero'd. */ 1392 1393 /* 1394 * Map in kernel PTs. 1395 * 1396 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1397 */ 1398 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1399 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1400 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1401 (KERNEL_PD_SIZE >> 2)); 1402 1403 return (0); 1404 } 1405 1406 /* 1407 * Allocate a page directory. 1408 * This routine will either allocate a new page directory from the pool 1409 * of L1 page tables currently held by the kernel or it will allocate 1410 * a new one via pmap_alloc_l1pt(). 1411 * It will then initialise the l1 page table for use. 1412 */ 1413 static int 1414 pmap_allocpagedir(struct pmap *pmap) 1415 { 1416 vaddr_t vptpt; 1417 struct l1pt *pt; 1418 u_int gen; 1419 1420 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1421 1422 /* Do we have any spare L1's lying around ? */ 1423 if (l1pt_static_queue_count) { 1424 --l1pt_static_queue_count; 1425 pt = SIMPLEQ_FIRST(&l1pt_static_queue); 1426 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt_queue); 1427 } else if (l1pt_queue_count) { 1428 --l1pt_queue_count; 1429 pt = SIMPLEQ_FIRST(&l1pt_queue); 1430 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt_queue); 1431 ++l1pt_reuse_count; 1432 } else { 1433 pt = pmap_alloc_l1pt(); 1434 if (!pt) 1435 return(ENOMEM); 1436 ++l1pt_create_count; 1437 } 1438 1439 /* Store the pointer to the l1 descriptor in the pmap. */ 1440 pmap->pm_l1pt = pt; 1441 1442 /* Store the virtual address of the l1 in the pmap. */ 1443 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1444 1445 /* Clean the L1 if it is dirty */ 1446 if (!(pt->pt_flags & PTFLAG_CLEAN)) { 1447 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1448 cpu_dcache_wb_range((vaddr_t) pmap->pm_pdir, 1449 (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1450 } 1451 1452 /* Allocate a page table to map all the page tables for this pmap */ 1453 KASSERT(pmap->pm_vptpt == 0); 1454 1455 try_again: 1456 gen = pmap_ptpt_cache_generation; 1457 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1458 if (vptpt == NULL) { 1459 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1460 pmap_freepagedir(pmap); 1461 return (ENOMEM); 1462 } 1463 1464 /* need to lock this all up for growkernel */ 1465 simple_lock(&pmaps_lock); 1466 1467 if (gen != pmap_ptpt_cache_generation) { 1468 simple_unlock(&pmaps_lock); 1469 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1470 goto try_again; 1471 } 1472 1473 pmap->pm_vptpt = vptpt; 1474 pmap->pm_pptpt = vtophys(vptpt); 1475 1476 /* Duplicate the kernel mappings. */ 1477 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1478 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1479 KERNEL_PD_SIZE); 1480 cpu_dcache_wb_range((vaddr_t)pmap->pm_pdir + 1481 (L1_TABLE_SIZE - KERNEL_PD_SIZE), KERNEL_PD_SIZE); 1482 1483 /* Wire in this page table */ 1484 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, PMAP_PTP_SELFREF); 1485 1486 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1487 1488 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1489 simple_unlock(&pmaps_lock); 1490 1491 return(0); 1492 } 1493 1494 1495 /* 1496 * Initialize a preallocated and zeroed pmap structure, 1497 * such as one in a vmspace structure. 1498 */ 1499 1500 void 1501 pmap_pinit(struct pmap *pmap) 1502 { 1503 int backoff = 6; 1504 int retry = 10; 1505 1506 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1507 1508 /* Keep looping until we succeed in allocating a page directory */ 1509 while (pmap_allocpagedir(pmap) != 0) { 1510 /* 1511 * Ok we failed to allocate a suitable block of memory for an 1512 * L1 page table. This means that either: 1513 * 1. 16KB of virtual address space could not be allocated 1514 * 2. 16KB of physically contiguous memory on a 16KB boundary 1515 * could not be allocated. 1516 * 1517 * Since we cannot fail we will sleep for a while and try 1518 * again. 1519 * 1520 * Searching for a suitable L1 PT is expensive: 1521 * to avoid hogging the system when memory is really 1522 * scarce, use an exponential back-off so that 1523 * eventually we won't retry more than once every 8 1524 * seconds. This should allow other processes to run 1525 * to completion and free up resources. 1526 */ 1527 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1528 NULL); 1529 if (--retry == 0) { 1530 retry = 10; 1531 if (backoff) 1532 --backoff; 1533 } 1534 } 1535 1536 if (vector_page < KERNEL_BASE) { 1537 /* 1538 * Map the vector page. This will also allocate and map 1539 * an L2 table for it. 1540 */ 1541 pmap_enter(pmap, vector_page, systempage.pv_pa, 1542 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1543 pmap_update(pmap); 1544 } 1545 } 1546 1547 void 1548 pmap_freepagedir(struct pmap *pmap) 1549 { 1550 /* Free the memory used for the page table mapping */ 1551 if (pmap->pm_vptpt != 0) { 1552 /* 1553 * XXX Objects freed to a pool cache must be in constructed 1554 * XXX form when freed, but we don't free page tables as we 1555 * XXX go, so we need to zap the mappings here. 1556 * 1557 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1558 */ 1559 memset((caddr_t) pmap->pm_vptpt, 0, 1560 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1561 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1562 } 1563 1564 /* junk the L1 page table */ 1565 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1566 /* Add the page table to the queue */ 1567 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1568 pmap->pm_l1pt, pt_queue); 1569 ++l1pt_static_queue_count; 1570 } else if (l1pt_queue_count < 8) { 1571 /* Add the page table to the queue */ 1572 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1573 ++l1pt_queue_count; 1574 } else 1575 pmap_free_l1pt(pmap->pm_l1pt); 1576 } 1577 1578 /* 1579 * Retire the given physical map from service. 1580 * Should only be called if the map contains no valid mappings. 1581 */ 1582 1583 void 1584 pmap_destroy(struct pmap *pmap) 1585 { 1586 struct vm_page *page; 1587 int count; 1588 1589 if (pmap == NULL) 1590 return; 1591 1592 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1593 1594 /* 1595 * Drop reference count 1596 */ 1597 simple_lock(&pmap->pm_obj.vmobjlock); 1598 count = --pmap->pm_obj.uo_refs; 1599 simple_unlock(&pmap->pm_obj.vmobjlock); 1600 if (count > 0) { 1601 return; 1602 } 1603 1604 /* 1605 * reference count is zero, free pmap resources and then free pmap. 1606 */ 1607 1608 /* 1609 * remove it from global list of pmaps 1610 */ 1611 1612 simple_lock(&pmaps_lock); 1613 LIST_REMOVE(pmap, pm_list); 1614 simple_unlock(&pmaps_lock); 1615 1616 if (vector_page < KERNEL_BASE) { 1617 /* Remove the vector page mapping */ 1618 pmap_remove(pmap, vector_page, vector_page + NBPG); 1619 pmap_update(pmap); 1620 } 1621 1622 /* 1623 * Free any page tables still mapped 1624 * This is only temporay until pmap_enter can count the number 1625 * of mappings made in a page table. Then pmap_remove() can 1626 * reduce the count and free the pagetable when the count 1627 * reaches zero. Note that entries in this list should match the 1628 * contents of the ptpt, however this is faster than walking a 1024 1629 * entries looking for pt's 1630 * taken from i386 pmap.c 1631 */ 1632 /* 1633 * vmobjlock must be held while freeing pages 1634 */ 1635 simple_lock(&pmap->pm_obj.vmobjlock); 1636 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1637 KASSERT((page->flags & PG_BUSY) == 0); 1638 1639 /* Freeing a PT page? The contents are a throw-away. */ 1640 KASSERT((page->offset & PD_OFFSET) == 0);/* XXX KDASSERT */ 1641 cpu_dcache_inv_range((vaddr_t)vtopte(page->offset), PAGE_SIZE); 1642 1643 page->wire_count = 0; 1644 uvm_pagefree(page); 1645 } 1646 simple_unlock(&pmap->pm_obj.vmobjlock); 1647 1648 /* Free the page dir */ 1649 pmap_freepagedir(pmap); 1650 1651 /* return the pmap to the pool */ 1652 pool_put(&pmap_pmap_pool, pmap); 1653 } 1654 1655 1656 /* 1657 * void pmap_reference(struct pmap *pmap) 1658 * 1659 * Add a reference to the specified pmap. 1660 */ 1661 1662 void 1663 pmap_reference(struct pmap *pmap) 1664 { 1665 if (pmap == NULL) 1666 return; 1667 1668 simple_lock(&pmap->pm_lock); 1669 pmap->pm_obj.uo_refs++; 1670 simple_unlock(&pmap->pm_lock); 1671 } 1672 1673 /* 1674 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1675 * 1676 * Return the start and end addresses of the kernel's virtual space. 1677 * These values are setup in pmap_bootstrap and are updated as pages 1678 * are allocated. 1679 */ 1680 1681 void 1682 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1683 { 1684 *start = virtual_avail; 1685 *end = virtual_end; 1686 } 1687 1688 /* 1689 * Activate the address space for the specified process. If the process 1690 * is the current process, load the new MMU context. 1691 */ 1692 void 1693 pmap_activate(struct proc *p) 1694 { 1695 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1696 struct pcb *pcb = &p->p_addr->u_pcb; 1697 1698 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1699 (paddr_t *)&pcb->pcb_pagedir); 1700 1701 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1702 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1703 1704 if (p == curproc) { 1705 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1706 setttb((u_int)pcb->pcb_pagedir); 1707 } 1708 } 1709 1710 /* 1711 * Deactivate the address space of the specified process. 1712 */ 1713 void 1714 pmap_deactivate(struct proc *p) 1715 { 1716 } 1717 1718 /* 1719 * Perform any deferred pmap operations. 1720 */ 1721 void 1722 pmap_update(struct pmap *pmap) 1723 { 1724 1725 /* 1726 * We haven't deferred any pmap operations, but we do need to 1727 * make sure TLB/cache operations have completed. 1728 */ 1729 cpu_cpwait(); 1730 } 1731 1732 /* 1733 * pmap_clean_page() 1734 * 1735 * This is a local function used to work out the best strategy to clean 1736 * a single page referenced by its entry in the PV table. It's used by 1737 * pmap_copy_page, pmap_zero page and maybe some others later on. 1738 * 1739 * Its policy is effectively: 1740 * o If there are no mappings, we don't bother doing anything with the cache. 1741 * o If there is one mapping, we clean just that page. 1742 * o If there are multiple mappings, we clean the entire cache. 1743 * 1744 * So that some functions can be further optimised, it returns 0 if it didn't 1745 * clean the entire cache, or 1 if it did. 1746 * 1747 * XXX One bug in this routine is that if the pv_entry has a single page 1748 * mapped at 0x00000000 a whole cache clean will be performed rather than 1749 * just the 1 page. Since this should not occur in everyday use and if it does 1750 * it will just result in not the most efficient clean for the page. 1751 */ 1752 static int 1753 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1754 { 1755 struct pmap *pmap; 1756 struct pv_entry *npv; 1757 int cache_needs_cleaning = 0; 1758 vaddr_t page_to_clean = 0; 1759 1760 if (pv == NULL) { 1761 /* nothing mapped in so nothing to flush */ 1762 return (0); 1763 } 1764 1765 /* 1766 * Since we flush the cache each time we change curproc, we 1767 * only need to flush the page if it is in the current pmap. 1768 */ 1769 if (curproc) 1770 pmap = curproc->p_vmspace->vm_map.pmap; 1771 else 1772 pmap = pmap_kernel(); 1773 1774 for (npv = pv; npv; npv = npv->pv_next) { 1775 if (npv->pv_pmap == pmap) { 1776 /* 1777 * The page is mapped non-cacheable in 1778 * this map. No need to flush the cache. 1779 */ 1780 if (npv->pv_flags & PVF_NC) { 1781 #ifdef DIAGNOSTIC 1782 if (cache_needs_cleaning) 1783 panic("pmap_clean_page: " 1784 "cache inconsistency"); 1785 #endif 1786 break; 1787 } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1788 continue; 1789 if (cache_needs_cleaning) { 1790 page_to_clean = 0; 1791 break; 1792 } else 1793 page_to_clean = npv->pv_va; 1794 cache_needs_cleaning = 1; 1795 } 1796 } 1797 1798 if (page_to_clean) { 1799 /* 1800 * XXX If is_src, we really only need to write-back, 1801 * XXX not invalidate, too. Investigate further. 1802 * XXX --thorpej (at) netbsd.org 1803 */ 1804 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1805 } else if (cache_needs_cleaning) { 1806 cpu_idcache_wbinv_all(); 1807 return (1); 1808 } 1809 return (0); 1810 } 1811 1812 /* 1813 * pmap_zero_page() 1814 * 1815 * Zero a given physical page by mapping it at a page hook point. 1816 * In doing the zero page op, the page we zero is mapped cachable, as with 1817 * StrongARM accesses to non-cached pages are non-burst making writing 1818 * _any_ bulk data very slow. 1819 */ 1820 #if ARM_MMU_GENERIC == 1 1821 void 1822 pmap_zero_page_generic(paddr_t phys) 1823 { 1824 #ifdef DEBUG 1825 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1826 1827 if (pg->mdpage.pvh_list != NULL) 1828 panic("pmap_zero_page: page has mappings"); 1829 #endif 1830 1831 KDASSERT((phys & PGOFSET) == 0); 1832 1833 /* 1834 * Hook in the page, zero it, and purge the cache for that 1835 * zeroed page. Invalidate the TLB as needed. 1836 */ 1837 *cdst_pte = L2_S_PROTO | phys | 1838 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1839 PTE_SYNC(cdst_pte); 1840 cpu_tlb_flushD_SE(cdstp); 1841 cpu_cpwait(); 1842 bzero_page(cdstp); 1843 cpu_dcache_wbinv_range(cdstp, NBPG); 1844 } 1845 #endif /* ARM_MMU_GENERIC == 1 */ 1846 1847 #if ARM_MMU_XSCALE == 1 1848 void 1849 pmap_zero_page_xscale(paddr_t phys) 1850 { 1851 #ifdef DEBUG 1852 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1853 1854 if (pg->mdpage.pvh_list != NULL) 1855 panic("pmap_zero_page: page has mappings"); 1856 #endif 1857 1858 KDASSERT((phys & PGOFSET) == 0); 1859 1860 /* 1861 * Hook in the page, zero it, and purge the cache for that 1862 * zeroed page. Invalidate the TLB as needed. 1863 */ 1864 *cdst_pte = L2_S_PROTO | phys | 1865 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1866 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1867 PTE_SYNC(cdst_pte); 1868 cpu_tlb_flushD_SE(cdstp); 1869 cpu_cpwait(); 1870 bzero_page(cdstp); 1871 xscale_cache_clean_minidata(); 1872 } 1873 #endif /* ARM_MMU_XSCALE == 1 */ 1874 1875 /* pmap_pageidlezero() 1876 * 1877 * The same as above, except that we assume that the page is not 1878 * mapped. This means we never have to flush the cache first. Called 1879 * from the idle loop. 1880 */ 1881 boolean_t 1882 pmap_pageidlezero(paddr_t phys) 1883 { 1884 unsigned int i; 1885 int *ptr; 1886 boolean_t rv = TRUE; 1887 #ifdef DEBUG 1888 struct vm_page *pg; 1889 1890 pg = PHYS_TO_VM_PAGE(phys); 1891 if (pg->mdpage.pvh_list != NULL) 1892 panic("pmap_pageidlezero: page has mappings"); 1893 #endif 1894 1895 KDASSERT((phys & PGOFSET) == 0); 1896 1897 /* 1898 * Hook in the page, zero it, and purge the cache for that 1899 * zeroed page. Invalidate the TLB as needed. 1900 */ 1901 *cdst_pte = L2_S_PROTO | phys | 1902 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1903 PTE_SYNC(cdst_pte); 1904 cpu_tlb_flushD_SE(cdstp); 1905 cpu_cpwait(); 1906 1907 for (i = 0, ptr = (int *)cdstp; 1908 i < (NBPG / sizeof(int)); i++) { 1909 if (sched_whichqs != 0) { 1910 /* 1911 * A process has become ready. Abort now, 1912 * so we don't keep it waiting while we 1913 * do slow memory access to finish this 1914 * page. 1915 */ 1916 rv = FALSE; 1917 break; 1918 } 1919 *ptr++ = 0; 1920 } 1921 1922 if (rv) 1923 /* 1924 * if we aborted we'll rezero this page again later so don't 1925 * purge it unless we finished it 1926 */ 1927 cpu_dcache_wbinv_range(cdstp, NBPG); 1928 return (rv); 1929 } 1930 1931 /* 1932 * pmap_copy_page() 1933 * 1934 * Copy one physical page into another, by mapping the pages into 1935 * hook points. The same comment regarding cachability as in 1936 * pmap_zero_page also applies here. 1937 */ 1938 #if ARM_MMU_GENERIC == 1 1939 void 1940 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1941 { 1942 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1943 #ifdef DEBUG 1944 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1945 1946 if (dst_pg->mdpage.pvh_list != NULL) 1947 panic("pmap_copy_page: dst page has mappings"); 1948 #endif 1949 1950 KDASSERT((src & PGOFSET) == 0); 1951 KDASSERT((dst & PGOFSET) == 0); 1952 1953 /* 1954 * Clean the source page. Hold the source page's lock for 1955 * the duration of the copy so that no other mappings can 1956 * be created while we have a potentially aliased mapping. 1957 */ 1958 simple_lock(&src_pg->mdpage.pvh_slock); 1959 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1960 1961 /* 1962 * Map the pages into the page hook points, copy them, and purge 1963 * the cache for the appropriate page. Invalidate the TLB 1964 * as required. 1965 */ 1966 *csrc_pte = L2_S_PROTO | src | 1967 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1968 PTE_SYNC(csrc_pte); 1969 *cdst_pte = L2_S_PROTO | dst | 1970 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1971 PTE_SYNC(cdst_pte); 1972 cpu_tlb_flushD_SE(csrcp); 1973 cpu_tlb_flushD_SE(cdstp); 1974 cpu_cpwait(); 1975 bcopy_page(csrcp, cdstp); 1976 cpu_dcache_inv_range(csrcp, NBPG); 1977 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1978 cpu_dcache_wbinv_range(cdstp, NBPG); 1979 } 1980 #endif /* ARM_MMU_GENERIC == 1 */ 1981 1982 #if ARM_MMU_XSCALE == 1 1983 void 1984 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1985 { 1986 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1987 #ifdef DEBUG 1988 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1989 1990 if (dst_pg->mdpage.pvh_list != NULL) 1991 panic("pmap_copy_page: dst page has mappings"); 1992 #endif 1993 1994 KDASSERT((src & PGOFSET) == 0); 1995 KDASSERT((dst & PGOFSET) == 0); 1996 1997 /* 1998 * Clean the source page. Hold the source page's lock for 1999 * the duration of the copy so that no other mappings can 2000 * be created while we have a potentially aliased mapping. 2001 */ 2002 simple_lock(&src_pg->mdpage.pvh_slock); 2003 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2004 2005 /* 2006 * Map the pages into the page hook points, copy them, and purge 2007 * the cache for the appropriate page. Invalidate the TLB 2008 * as required. 2009 */ 2010 *csrc_pte = L2_S_PROTO | src | 2011 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 2012 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2013 PTE_SYNC(csrc_pte); 2014 *cdst_pte = L2_S_PROTO | dst | 2015 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 2016 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2017 PTE_SYNC(cdst_pte); 2018 cpu_tlb_flushD_SE(csrcp); 2019 cpu_tlb_flushD_SE(cdstp); 2020 cpu_cpwait(); 2021 bcopy_page(csrcp, cdstp); 2022 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2023 xscale_cache_clean_minidata(); 2024 } 2025 #endif /* ARM_MMU_XSCALE == 1 */ 2026 2027 #if 0 2028 void 2029 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 2030 { 2031 pd_entry_t *pde; 2032 paddr_t pa; 2033 struct vm_page *m; 2034 2035 if (pmap == pmap_kernel()) 2036 return; 2037 2038 pde = pmap_pde(pmap, va & PD_FRAME); 2039 pa = pmap_pte_pa(pde); 2040 m = PHYS_TO_VM_PAGE(pa); 2041 m->wire_count++; 2042 #ifdef MYCROFT_HACK 2043 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2044 pmap, va, pde, pa, m, m->wire_count); 2045 #endif 2046 } 2047 2048 void 2049 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2050 { 2051 pd_entry_t *pde; 2052 paddr_t pa; 2053 struct vm_page *m; 2054 2055 if (pmap == pmap_kernel()) 2056 return; 2057 2058 pde = pmap_pde(pmap, va & PD_FRAME); 2059 pa = pmap_pte_pa(pde); 2060 m = PHYS_TO_VM_PAGE(pa); 2061 m->wire_count--; 2062 #ifdef MYCROFT_HACK 2063 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2064 pmap, va, pde, pa, m, m->wire_count); 2065 #endif 2066 if (m->wire_count == 0) { 2067 #ifdef MYCROFT_HACK 2068 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2069 pmap, va, pde, pa, m); 2070 #endif 2071 pmap_unmap_in_l1(pmap, va & PD_FRAME); 2072 uvm_pagefree(m); 2073 --pmap->pm_stats.resident_count; 2074 } 2075 } 2076 #else 2077 #define pmap_pte_addref(pmap, va) 2078 #define pmap_pte_delref(pmap, va) 2079 #endif 2080 2081 /* 2082 * Since we have a virtually indexed cache, we may need to inhibit caching if 2083 * there is more than one mapping and at least one of them is writable. 2084 * Since we purge the cache on every context switch, we only need to check for 2085 * other mappings within the same pmap, or kernel_pmap. 2086 * This function is also called when a page is unmapped, to possibly reenable 2087 * caching on any remaining mappings. 2088 * 2089 * The code implements the following logic, where: 2090 * 2091 * KW = # of kernel read/write pages 2092 * KR = # of kernel read only pages 2093 * UW = # of user read/write pages 2094 * UR = # of user read only pages 2095 * OW = # of user read/write pages in another pmap, then 2096 * 2097 * KC = kernel mapping is cacheable 2098 * UC = user mapping is cacheable 2099 * 2100 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2101 * +--------------------------------------------- 2102 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2103 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2104 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2105 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2106 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2107 * 2108 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2109 */ 2110 __inline static void 2111 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2112 boolean_t clear_cache) 2113 { 2114 if (pmap == pmap_kernel()) 2115 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2116 else 2117 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2118 } 2119 2120 static void 2121 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2122 boolean_t clear_cache) 2123 { 2124 unsigned int user_entries = 0; 2125 unsigned int user_writable = 0; 2126 unsigned int user_cacheable = 0; 2127 unsigned int kernel_entries = 0; 2128 unsigned int kernel_writable = 0; 2129 unsigned int kernel_cacheable = 0; 2130 struct pv_entry *pv; 2131 struct pmap *last_pmap = pmap; 2132 2133 #ifdef DIAGNOSTIC 2134 if (pmap != pmap_kernel()) 2135 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2136 #endif 2137 2138 /* 2139 * Pass one, see if there are both kernel and user pmaps for 2140 * this page. Calculate whether there are user-writable or 2141 * kernel-writable pages. 2142 */ 2143 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2144 if (pv->pv_pmap != pmap) { 2145 user_entries++; 2146 if (pv->pv_flags & PVF_WRITE) 2147 user_writable++; 2148 if ((pv->pv_flags & PVF_NC) == 0) 2149 user_cacheable++; 2150 } else { 2151 kernel_entries++; 2152 if (pv->pv_flags & PVF_WRITE) 2153 kernel_writable++; 2154 if ((pv->pv_flags & PVF_NC) == 0) 2155 kernel_cacheable++; 2156 } 2157 } 2158 2159 /* 2160 * We know we have just been updating a kernel entry, so if 2161 * all user pages are already cacheable, then there is nothing 2162 * further to do. 2163 */ 2164 if (kernel_entries == 0 && 2165 user_cacheable == user_entries) 2166 return; 2167 2168 if (user_entries) { 2169 /* 2170 * Scan over the list again, for each entry, if it 2171 * might not be set correctly, call pmap_vac_me_user 2172 * to recalculate the settings. 2173 */ 2174 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2175 /* 2176 * We know kernel mappings will get set 2177 * correctly in other calls. We also know 2178 * that if the pmap is the same as last_pmap 2179 * then we've just handled this entry. 2180 */ 2181 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2182 continue; 2183 /* 2184 * If there are kernel entries and this page 2185 * is writable but non-cacheable, then we can 2186 * skip this entry also. 2187 */ 2188 if (kernel_entries > 0 && 2189 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2190 (PVF_NC | PVF_WRITE)) 2191 continue; 2192 /* 2193 * Similarly if there are no kernel-writable 2194 * entries and the page is already 2195 * read-only/cacheable. 2196 */ 2197 if (kernel_writable == 0 && 2198 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2199 continue; 2200 /* 2201 * For some of the remaining cases, we know 2202 * that we must recalculate, but for others we 2203 * can't tell if they are correct or not, so 2204 * we recalculate anyway. 2205 */ 2206 pmap_unmap_ptes(last_pmap); 2207 last_pmap = pv->pv_pmap; 2208 ptes = pmap_map_ptes(last_pmap); 2209 pmap_vac_me_user(last_pmap, pg, ptes, 2210 pmap_is_curpmap(last_pmap)); 2211 } 2212 /* Restore the pte mapping that was passed to us. */ 2213 if (last_pmap != pmap) { 2214 pmap_unmap_ptes(last_pmap); 2215 ptes = pmap_map_ptes(pmap); 2216 } 2217 if (kernel_entries == 0) 2218 return; 2219 } 2220 2221 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2222 return; 2223 } 2224 2225 static void 2226 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2227 boolean_t clear_cache) 2228 { 2229 struct pmap *kpmap = pmap_kernel(); 2230 struct pv_entry *pv, *npv; 2231 unsigned int entries = 0; 2232 unsigned int writable = 0; 2233 unsigned int cacheable_entries = 0; 2234 unsigned int kern_cacheable = 0; 2235 unsigned int other_writable = 0; 2236 2237 pv = pg->mdpage.pvh_list; 2238 KASSERT(ptes != NULL); 2239 2240 /* 2241 * Count mappings and writable mappings in this pmap. 2242 * Include kernel mappings as part of our own. 2243 * Keep a pointer to the first one. 2244 */ 2245 for (npv = pv; npv; npv = npv->pv_next) { 2246 /* Count mappings in the same pmap */ 2247 if (pmap == npv->pv_pmap || 2248 kpmap == npv->pv_pmap) { 2249 if (entries++ == 0) 2250 pv = npv; 2251 /* Cacheable mappings */ 2252 if ((npv->pv_flags & PVF_NC) == 0) { 2253 cacheable_entries++; 2254 if (kpmap == npv->pv_pmap) 2255 kern_cacheable++; 2256 } 2257 /* Writable mappings */ 2258 if (npv->pv_flags & PVF_WRITE) 2259 ++writable; 2260 } else if (npv->pv_flags & PVF_WRITE) 2261 other_writable = 1; 2262 } 2263 2264 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2265 "writable %d cacheable %d %s\n", pmap, entries, writable, 2266 cacheable_entries, clear_cache ? "clean" : "no clean")); 2267 2268 /* 2269 * Enable or disable caching as necessary. 2270 * Note: the first entry might be part of the kernel pmap, 2271 * so we can't assume this is indicative of the state of the 2272 * other (maybe non-kpmap) entries. 2273 */ 2274 if ((entries > 1 && writable) || 2275 (entries > 0 && pmap == kpmap && other_writable)) { 2276 if (cacheable_entries == 0) 2277 return; 2278 for (npv = pv; npv; npv = npv->pv_next) { 2279 if ((pmap == npv->pv_pmap 2280 || kpmap == npv->pv_pmap) && 2281 (npv->pv_flags & PVF_NC) == 0) { 2282 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2283 PTE_SYNC_CURRENT(pmap, 2284 &ptes[arm_btop(npv->pv_va)]); 2285 npv->pv_flags |= PVF_NC; 2286 /* 2287 * If this page needs flushing from the 2288 * cache, and we aren't going to do it 2289 * below, do it now. 2290 */ 2291 if ((cacheable_entries < 4 && 2292 (clear_cache || npv->pv_pmap == kpmap)) || 2293 (npv->pv_pmap == kpmap && 2294 !clear_cache && kern_cacheable < 4)) { 2295 cpu_idcache_wbinv_range(npv->pv_va, 2296 NBPG); 2297 cpu_tlb_flushID_SE(npv->pv_va); 2298 } 2299 } 2300 } 2301 if ((clear_cache && cacheable_entries >= 4) || 2302 kern_cacheable >= 4) { 2303 cpu_idcache_wbinv_all(); 2304 cpu_tlb_flushID(); 2305 } 2306 cpu_cpwait(); 2307 } else if (entries > cacheable_entries) { 2308 /* 2309 * Turn cacheing back on for some pages. If it is a kernel 2310 * page, only do so if there are no other writable pages. 2311 */ 2312 for (npv = pv; npv; npv = npv->pv_next) { 2313 if ((pmap == npv->pv_pmap || 2314 (kpmap == npv->pv_pmap && other_writable == 0)) && 2315 (npv->pv_flags & PVF_NC)) { 2316 ptes[arm_btop(npv->pv_va)] |= 2317 pte_l2_s_cache_mode; 2318 PTE_SYNC_CURRENT(pmap, 2319 &ptes[arm_btop(npv->pv_va)]); 2320 npv->pv_flags &= ~PVF_NC; 2321 } 2322 } 2323 } 2324 } 2325 2326 /* 2327 * pmap_remove() 2328 * 2329 * pmap_remove is responsible for nuking a number of mappings for a range 2330 * of virtual address space in the current pmap. To do this efficiently 2331 * is interesting, because in a number of cases a wide virtual address 2332 * range may be supplied that contains few actual mappings. So, the 2333 * optimisations are: 2334 * 1. Try and skip over hunks of address space for which an L1 entry 2335 * does not exist. 2336 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2337 * maybe do just a partial cache clean. This path of execution is 2338 * complicated by the fact that the cache must be flushed _before_ 2339 * the PTE is nuked, being a VAC :-) 2340 * 3. Maybe later fast-case a single page, but I don't think this is 2341 * going to make _that_ much difference overall. 2342 */ 2343 2344 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2345 2346 void 2347 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2348 { 2349 unsigned int cleanlist_idx = 0; 2350 struct pagelist { 2351 vaddr_t va; 2352 pt_entry_t *pte; 2353 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2354 pt_entry_t *pte = 0, *ptes; 2355 paddr_t pa; 2356 int pmap_active; 2357 struct vm_page *pg; 2358 struct pv_entry *pv_tofree = NULL; 2359 2360 /* Exit quick if there is no pmap */ 2361 if (!pmap) 2362 return; 2363 2364 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2365 pmap, sva, eva)); 2366 2367 /* 2368 * we lock in the pmap => vm_page direction 2369 */ 2370 PMAP_MAP_TO_HEAD_LOCK(); 2371 2372 ptes = pmap_map_ptes(pmap); 2373 /* Get a page table pointer */ 2374 while (sva < eva) { 2375 if (pmap_pde_page(pmap_pde(pmap, sva))) 2376 break; 2377 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2378 } 2379 2380 pte = &ptes[arm_btop(sva)]; 2381 /* Note if the pmap is active thus require cache and tlb cleans */ 2382 pmap_active = pmap_is_curpmap(pmap); 2383 2384 /* Now loop along */ 2385 while (sva < eva) { 2386 /* Check if we can move to the next PDE (l1 chunk) */ 2387 if ((sva & L2_ADDR_BITS) == 0) { 2388 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2389 sva += L1_S_SIZE; 2390 pte += arm_btop(L1_S_SIZE); 2391 continue; 2392 } 2393 } 2394 2395 /* We've found a valid PTE, so this page of PTEs has to go. */ 2396 if (pmap_pte_v(pte)) { 2397 /* Update statistics */ 2398 --pmap->pm_stats.resident_count; 2399 2400 /* 2401 * Add this page to our cache remove list, if we can. 2402 * If, however the cache remove list is totally full, 2403 * then do a complete cache invalidation taking note 2404 * to backtrack the PTE table beforehand, and ignore 2405 * the lists in future because there's no longer any 2406 * point in bothering with them (we've paid the 2407 * penalty, so will carry on unhindered). Otherwise, 2408 * when we fall out, we just clean the list. 2409 */ 2410 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2411 pa = pmap_pte_pa(pte); 2412 2413 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2414 /* Add to the clean list. */ 2415 cleanlist[cleanlist_idx].pte = pte; 2416 cleanlist[cleanlist_idx].va = sva; 2417 cleanlist_idx++; 2418 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2419 int cnt; 2420 2421 /* Nuke everything if needed. */ 2422 if (pmap_active) { 2423 cpu_idcache_wbinv_all(); 2424 cpu_tlb_flushID(); 2425 } 2426 2427 /* 2428 * Roll back the previous PTE list, 2429 * and zero out the current PTE. 2430 */ 2431 for (cnt = 0; 2432 cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; 2433 cnt++) { 2434 *cleanlist[cnt].pte = 0; 2435 if (pmap_active) 2436 PTE_SYNC(cleanlist[cnt].pte); 2437 else 2438 PTE_FLUSH(cleanlist[cnt].pte); 2439 pmap_pte_delref(pmap, 2440 cleanlist[cnt].va); 2441 } 2442 *pte = 0; 2443 if (pmap_active) 2444 PTE_SYNC(pte); 2445 else 2446 PTE_FLUSH(pte); 2447 pmap_pte_delref(pmap, sva); 2448 cleanlist_idx++; 2449 } else { 2450 /* 2451 * We've already nuked the cache and 2452 * TLB, so just carry on regardless, 2453 * and we won't need to do it again 2454 */ 2455 *pte = 0; 2456 if (pmap_active) 2457 PTE_SYNC(pte); 2458 else 2459 PTE_FLUSH(pte); 2460 pmap_pte_delref(pmap, sva); 2461 } 2462 2463 /* 2464 * Update flags. In a number of circumstances, 2465 * we could cluster a lot of these and do a 2466 * number of sequential pages in one go. 2467 */ 2468 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2469 struct pv_entry *pve; 2470 simple_lock(&pg->mdpage.pvh_slock); 2471 pve = pmap_remove_pv(pg, pmap, sva); 2472 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2473 simple_unlock(&pg->mdpage.pvh_slock); 2474 if (pve != NULL) { 2475 pve->pv_next = pv_tofree; 2476 pv_tofree = pve; 2477 } 2478 } 2479 } else if (pmap_active == 0) 2480 PTE_FLUSH(pte); 2481 sva += NBPG; 2482 pte++; 2483 } 2484 2485 /* 2486 * Now, if we've fallen through down to here, chances are that there 2487 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2488 */ 2489 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2490 u_int cnt; 2491 2492 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2493 if (pmap_active) { 2494 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2495 NBPG); 2496 *cleanlist[cnt].pte = 0; 2497 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2498 PTE_SYNC(cleanlist[cnt].pte); 2499 } else { 2500 *cleanlist[cnt].pte = 0; 2501 PTE_FLUSH(cleanlist[cnt].pte); 2502 } 2503 pmap_pte_delref(pmap, cleanlist[cnt].va); 2504 } 2505 } 2506 2507 /* Delete pv entries */ 2508 if (pv_tofree != NULL) 2509 pmap_free_pvs(pmap, pv_tofree); 2510 2511 pmap_unmap_ptes(pmap); 2512 2513 PMAP_MAP_TO_HEAD_UNLOCK(); 2514 } 2515 2516 /* 2517 * Routine: pmap_page_remove 2518 * Function: 2519 * Removes this physical page from 2520 * all physical maps in which it resides. 2521 * Reflects back modify bits to the pager. 2522 */ 2523 2524 static void 2525 pmap_page_remove(struct vm_page *pg) 2526 { 2527 struct pv_entry *pv, *npv; 2528 struct pmap *pmap; 2529 pt_entry_t *pte, *ptes; 2530 2531 PDEBUG(0, printf("pmap_page_remove: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2532 2533 /* set vm_page => pmap locking */ 2534 PMAP_HEAD_TO_MAP_LOCK(); 2535 2536 simple_lock(&pg->mdpage.pvh_slock); 2537 2538 pv = pg->mdpage.pvh_list; 2539 if (pv == NULL) { 2540 PDEBUG(0, printf("free page\n")); 2541 simple_unlock(&pg->mdpage.pvh_slock); 2542 PMAP_HEAD_TO_MAP_UNLOCK(); 2543 return; 2544 } 2545 pmap_clean_page(pv, FALSE); 2546 2547 while (pv) { 2548 pmap = pv->pv_pmap; 2549 ptes = pmap_map_ptes(pmap); 2550 pte = &ptes[arm_btop(pv->pv_va)]; 2551 2552 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2553 pv->pv_va, pv->pv_flags)); 2554 #ifdef DEBUG 2555 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2556 pmap_pte_v(pte) == 0 || 2557 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2558 panic("pmap_page_remove: bad mapping"); 2559 #endif /* DEBUG */ 2560 2561 /* 2562 * Update statistics 2563 */ 2564 --pmap->pm_stats.resident_count; 2565 2566 /* Wired bit */ 2567 if (pv->pv_flags & PVF_WIRED) 2568 --pmap->pm_stats.wired_count; 2569 2570 /* 2571 * Invalidate the PTEs. 2572 * XXX: should cluster them up and invalidate as many 2573 * as possible at once. 2574 */ 2575 2576 #ifdef needednotdone 2577 reduce wiring count on page table pages as references drop 2578 #endif 2579 2580 *pte = 0; 2581 PTE_SYNC_CURRENT(pmap, pte); 2582 pmap_pte_delref(pmap, pv->pv_va); 2583 2584 npv = pv->pv_next; 2585 pmap_free_pv(pmap, pv); 2586 pv = npv; 2587 pmap_unmap_ptes(pmap); 2588 } 2589 pg->mdpage.pvh_list = NULL; 2590 simple_unlock(&pg->mdpage.pvh_slock); 2591 PMAP_HEAD_TO_MAP_UNLOCK(); 2592 2593 PDEBUG(0, printf("done\n")); 2594 cpu_tlb_flushID(); 2595 cpu_cpwait(); 2596 } 2597 2598 2599 /* 2600 * Set the physical protection on the specified range of this map as requested. 2601 */ 2602 2603 void 2604 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2605 { 2606 pt_entry_t *pte = NULL, *ptes; 2607 struct vm_page *pg; 2608 int flush = 0; 2609 2610 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2611 pmap, sva, eva, prot)); 2612 2613 if (~prot & VM_PROT_READ) { 2614 /* 2615 * Just remove the mappings. pmap_update() is not required 2616 * here since the caller should do it. 2617 */ 2618 pmap_remove(pmap, sva, eva); 2619 return; 2620 } 2621 if (prot & VM_PROT_WRITE) { 2622 /* 2623 * If this is a read->write transition, just ignore it and let 2624 * uvm_fault() take care of it later. 2625 */ 2626 return; 2627 } 2628 2629 /* Need to lock map->head */ 2630 PMAP_MAP_TO_HEAD_LOCK(); 2631 2632 ptes = pmap_map_ptes(pmap); 2633 2634 /* 2635 * OK, at this point, we know we're doing write-protect operation. 2636 * If the pmap is active, write-back the range. 2637 */ 2638 if (pmap_is_curpmap(pmap)) 2639 cpu_dcache_wb_range(sva, eva - sva); 2640 2641 /* 2642 * We need to acquire a pointer to a page table page before entering 2643 * the following loop. 2644 */ 2645 while (sva < eva) { 2646 if (pmap_pde_page(pmap_pde(pmap, sva))) 2647 break; 2648 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2649 } 2650 2651 pte = &ptes[arm_btop(sva)]; 2652 2653 while (sva < eva) { 2654 /* only check once in a while */ 2655 if ((sva & L2_ADDR_BITS) == 0) { 2656 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2657 /* We can race ahead here, to the next pde. */ 2658 sva += L1_S_SIZE; 2659 pte += arm_btop(L1_S_SIZE); 2660 continue; 2661 } 2662 } 2663 2664 if (!pmap_pte_v(pte)) { 2665 PTE_FLUSH_ALT(pmap, pte); 2666 goto next; 2667 } 2668 2669 flush = 1; 2670 2671 pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte)); 2672 2673 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2674 PTE_SYNC_CURRENT(pmap, pte); /* XXXJRT optimize */ 2675 2676 /* Clear write flag */ 2677 if (pg != NULL) { 2678 simple_lock(&pg->mdpage.pvh_slock); 2679 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2680 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2681 simple_unlock(&pg->mdpage.pvh_slock); 2682 } 2683 2684 next: 2685 sva += NBPG; 2686 pte++; 2687 } 2688 pmap_unmap_ptes(pmap); 2689 PMAP_MAP_TO_HEAD_UNLOCK(); 2690 if (flush) 2691 cpu_tlb_flushID(); 2692 } 2693 2694 /* 2695 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2696 * int flags) 2697 * 2698 * Insert the given physical page (p) at 2699 * the specified virtual address (v) in the 2700 * target physical map with the protection requested. 2701 * 2702 * If specified, the page will be wired down, meaning 2703 * that the related pte can not be reclaimed. 2704 * 2705 * NB: This is the only routine which MAY NOT lazy-evaluate 2706 * or lose information. That is, this routine must actually 2707 * insert this page into the given map NOW. 2708 */ 2709 2710 int 2711 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2712 int flags) 2713 { 2714 pt_entry_t *ptes, opte, npte; 2715 paddr_t opa; 2716 boolean_t wired = (flags & PMAP_WIRED) != 0; 2717 struct vm_page *pg; 2718 struct pv_entry *pve; 2719 int error, nflags; 2720 struct vm_page *ptp = NULL; 2721 2722 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2723 va, pa, pmap, prot, wired)); 2724 2725 #ifdef DIAGNOSTIC 2726 /* Valid address ? */ 2727 if (va >= (pmap_curmaxkvaddr)) 2728 panic("pmap_enter: too big"); 2729 if (pmap != pmap_kernel() && va != 0) { 2730 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2731 panic("pmap_enter: kernel page in user map"); 2732 } else { 2733 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2734 panic("pmap_enter: user page in kernel map"); 2735 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2736 panic("pmap_enter: entering PT page"); 2737 } 2738 #endif 2739 2740 KDASSERT(((va | pa) & PGOFSET) == 0); 2741 2742 /* 2743 * Get a pointer to the page. Later on in this function, we 2744 * test for a managed page by checking pg != NULL. 2745 */ 2746 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2747 2748 /* get lock */ 2749 PMAP_MAP_TO_HEAD_LOCK(); 2750 2751 /* 2752 * map the ptes. If there's not already an L2 table for this 2753 * address, allocate one. 2754 */ 2755 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2756 /* kernel should be pre-grown */ 2757 if (pmap != pmap_kernel()) 2758 { 2759 /* if failure is allowed then don't try too hard */ 2760 ptp = pmap_get_ptp(pmap, va & PD_FRAME); 2761 if (ptp == NULL) { 2762 if (flags & PMAP_CANFAIL) { 2763 error = ENOMEM; 2764 goto out; 2765 } 2766 panic("pmap_enter: get ptp failed"); 2767 } 2768 } 2769 opte = ptes[arm_btop(va)]; 2770 2771 nflags = 0; 2772 if (prot & VM_PROT_WRITE) 2773 nflags |= PVF_WRITE; 2774 if (wired) 2775 nflags |= PVF_WIRED; 2776 2777 /* Is the pte valid ? If so then this page is already mapped */ 2778 if (l2pte_valid(opte)) { 2779 /* Get the physical address of the current page mapped */ 2780 opa = l2pte_pa(opte); 2781 2782 /* Are we mapping the same page ? */ 2783 if (opa == pa) { 2784 /* Check to see if we're doing rw->ro. */ 2785 if ((opte & L2_S_PROT_W) != 0 && 2786 (prot & VM_PROT_WRITE) == 0) { 2787 /* Yup, flush the cache if current pmap. */ 2788 if (pmap_is_curpmap(pmap)) 2789 cpu_dcache_wb_range(va, NBPG); 2790 } 2791 2792 /* Has the wiring changed ? */ 2793 if (pg != NULL) { 2794 simple_lock(&pg->mdpage.pvh_slock); 2795 (void) pmap_modify_pv(pmap, va, pg, 2796 PVF_WRITE | PVF_WIRED, nflags); 2797 simple_unlock(&pg->mdpage.pvh_slock); 2798 } 2799 } else { 2800 struct vm_page *opg; 2801 2802 /* We are replacing the page with a new one. */ 2803 cpu_idcache_wbinv_range(va, NBPG); 2804 2805 /* 2806 * If it is part of our managed memory then we 2807 * must remove it from the PV list 2808 */ 2809 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2810 simple_lock(&opg->mdpage.pvh_slock); 2811 pve = pmap_remove_pv(opg, pmap, va); 2812 simple_unlock(&opg->mdpage.pvh_slock); 2813 } else { 2814 pve = NULL; 2815 } 2816 2817 goto enter; 2818 } 2819 } else { 2820 opa = 0; 2821 pve = NULL; 2822 2823 /* bump ptp ref */ 2824 if (ptp != NULL) 2825 ptp->wire_count++; 2826 2827 /* pte is not valid so we must be hooking in a new page */ 2828 ++pmap->pm_stats.resident_count; 2829 2830 enter: 2831 /* 2832 * Enter on the PV list if part of our managed memory 2833 */ 2834 if (pg != NULL) { 2835 if (pve == NULL) { 2836 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2837 if (pve == NULL) { 2838 if (flags & PMAP_CANFAIL) { 2839 PTE_FLUSH_ALT(pmap, 2840 ptes[arm_btop(va)]); 2841 error = ENOMEM; 2842 goto out; 2843 } 2844 panic("pmap_enter: no pv entries " 2845 "available"); 2846 } 2847 } 2848 /* enter_pv locks pvh when adding */ 2849 pmap_enter_pv(pg, pve, pmap, va, ptp, nflags); 2850 } else { 2851 if (pve != NULL) 2852 pmap_free_pv(pmap, pve); 2853 } 2854 } 2855 2856 /* Construct the pte, giving the correct access. */ 2857 npte = pa; 2858 2859 /* VA 0 is magic. */ 2860 if (pmap != pmap_kernel() && va != vector_page) 2861 npte |= L2_S_PROT_U; 2862 2863 if (pg != NULL) { 2864 #ifdef DIAGNOSTIC 2865 if ((flags & VM_PROT_ALL) & ~prot) 2866 panic("pmap_enter: access_type exceeds prot"); 2867 #endif 2868 npte |= pte_l2_s_cache_mode; 2869 if (flags & VM_PROT_WRITE) { 2870 npte |= L2_S_PROTO | L2_S_PROT_W; 2871 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2872 } else if (flags & VM_PROT_ALL) { 2873 npte |= L2_S_PROTO; 2874 pg->mdpage.pvh_attrs |= PVF_REF; 2875 } else 2876 npte |= L2_TYPE_INV; 2877 } else { 2878 if (prot & VM_PROT_WRITE) 2879 npte |= L2_S_PROTO | L2_S_PROT_W; 2880 else if (prot & VM_PROT_ALL) 2881 npte |= L2_S_PROTO; 2882 else 2883 npte |= L2_TYPE_INV; 2884 } 2885 2886 #if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE) 2887 #if ARM_NMMUS > 1 2888 # error "XXX Unable to use read/write-allocate and configure non-XScale" 2889 #endif 2890 /* 2891 * XXX BRUTAL HACK! This allows us to limp along with 2892 * XXX the read/write-allocate cache mode. 2893 */ 2894 if (pmap == pmap_kernel()) 2895 npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X); 2896 #endif 2897 ptes[arm_btop(va)] = npte; 2898 PTE_SYNC_CURRENT(pmap, &ptes[arm_btop(va)]); 2899 2900 if (pg != NULL) { 2901 simple_lock(&pg->mdpage.pvh_slock); 2902 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2903 simple_unlock(&pg->mdpage.pvh_slock); 2904 } 2905 2906 /* Better flush the TLB ... */ 2907 cpu_tlb_flushID_SE(va); 2908 error = 0; 2909 out: 2910 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2911 PMAP_MAP_TO_HEAD_UNLOCK(); 2912 2913 return error; 2914 } 2915 2916 /* 2917 * pmap_kenter_pa: enter a kernel mapping 2918 * 2919 * => no need to lock anything assume va is already allocated 2920 * => should be faster than normal pmap enter function 2921 */ 2922 void 2923 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2924 { 2925 pt_entry_t *pte; 2926 2927 pte = vtopte(va); 2928 KASSERT(!pmap_pte_v(pte)); 2929 2930 #ifdef PMAP_ALIAS_DEBUG 2931 { 2932 struct vm_page *pg; 2933 int s; 2934 2935 pg = PHYS_TO_VM_PAGE(pa); 2936 if (pg != NULL) { 2937 s = splhigh(); 2938 if (pg->mdpage.ro_mappings == 0 && 2939 pg->mdpage.rw_mappings == 0 && 2940 pg->mdpage.kro_mappings == 0 && 2941 pg->mdpage.krw_mappings == 0) { 2942 /* This case is okay. */ 2943 } else if (pg->mdpage.rw_mappings == 0 && 2944 pg->mdpage.krw_mappings == 0 && 2945 (prot & VM_PROT_WRITE) == 0) { 2946 /* This case is okay. */ 2947 } else { 2948 /* Something is awry. */ 2949 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2950 "prot 0x%x\n", pg->mdpage.ro_mappings, 2951 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2952 pg->mdpage.krw_mappings, prot); 2953 Debugger(); 2954 } 2955 if (prot & VM_PROT_WRITE) 2956 pg->mdpage.krw_mappings++; 2957 else 2958 pg->mdpage.kro_mappings++; 2959 splx(s); 2960 } 2961 } 2962 #endif /* PMAP_ALIAS_DEBUG */ 2963 2964 *pte = L2_S_PROTO | pa | 2965 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2966 PTE_SYNC(pte); 2967 } 2968 2969 void 2970 pmap_kremove(vaddr_t va, vsize_t len) 2971 { 2972 pt_entry_t *pte; 2973 vaddr_t ova = va; 2974 vaddr_t olen = len; 2975 2976 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2977 2978 /* 2979 * We assume that we will only be called with small 2980 * regions of memory. 2981 */ 2982 2983 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2984 pte = vtopte(va); 2985 #ifdef PMAP_ALIAS_DEBUG 2986 { 2987 struct vm_page *pg; 2988 int s; 2989 2990 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 2991 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 2992 s = splhigh(); 2993 if (*pte & L2_S_PROT_W) { 2994 KASSERT(pg->mdpage.krw_mappings != 0); 2995 pg->mdpage.krw_mappings--; 2996 } else { 2997 KASSERT(pg->mdpage.kro_mappings != 0); 2998 pg->mdpage.kro_mappings--; 2999 } 3000 splx(s); 3001 } 3002 } 3003 #endif /* PMAP_ALIAS_DEBUG */ 3004 cpu_idcache_wbinv_range(va, PAGE_SIZE); 3005 *pte = 0; 3006 cpu_tlb_flushID_SE(va); 3007 } 3008 PTE_SYNC_RANGE(vtopte(ova), olen >> PAGE_SHIFT); 3009 } 3010 3011 /* 3012 * pmap_page_protect: 3013 * 3014 * Lower the permission for all mappings to a given page. 3015 */ 3016 3017 void 3018 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 3019 { 3020 3021 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 3022 VM_PAGE_TO_PHYS(pg), prot)); 3023 3024 switch(prot) { 3025 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 3026 case VM_PROT_READ|VM_PROT_WRITE: 3027 return; 3028 3029 case VM_PROT_READ: 3030 case VM_PROT_READ|VM_PROT_EXECUTE: 3031 pmap_clearbit(pg, PVF_WRITE); 3032 break; 3033 3034 default: 3035 pmap_page_remove(pg); 3036 break; 3037 } 3038 } 3039 3040 3041 /* 3042 * Routine: pmap_unwire 3043 * Function: Clear the wired attribute for a map/virtual-address 3044 * pair. 3045 * In/out conditions: 3046 * The mapping must already exist in the pmap. 3047 */ 3048 3049 void 3050 pmap_unwire(struct pmap *pmap, vaddr_t va) 3051 { 3052 pt_entry_t *ptes; 3053 struct vm_page *pg; 3054 paddr_t pa; 3055 3056 PMAP_MAP_TO_HEAD_LOCK(); 3057 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3058 3059 if (pmap_pde_v(pmap_pde(pmap, va))) { 3060 #ifdef DIAGNOSTIC 3061 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3062 panic("pmap_unwire: invalid L2 PTE"); 3063 #endif 3064 /* Extract the physical address of the page */ 3065 pa = l2pte_pa(ptes[arm_btop(va)]); 3066 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3067 3068 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3069 goto out; 3070 3071 /* Update the wired bit in the pv entry for this page. */ 3072 simple_lock(&pg->mdpage.pvh_slock); 3073 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 3074 simple_unlock(&pg->mdpage.pvh_slock); 3075 } 3076 #ifdef DIAGNOSTIC 3077 else { 3078 panic("pmap_unwire: invalid L1 PTE"); 3079 } 3080 #endif 3081 out: 3082 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3083 PMAP_MAP_TO_HEAD_UNLOCK(); 3084 } 3085 3086 /* 3087 * Routine: pmap_extract 3088 * Function: 3089 * Extract the physical page address associated 3090 * with the given map/virtual_address pair. 3091 */ 3092 boolean_t 3093 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 3094 { 3095 pd_entry_t *pde; 3096 pt_entry_t *pte, *ptes; 3097 paddr_t pa; 3098 3099 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3100 3101 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3102 3103 pde = pmap_pde(pmap, va); 3104 pte = &ptes[arm_btop(va)]; 3105 3106 if (pmap_pde_section(pde)) { 3107 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3108 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3109 goto out; 3110 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3111 PDEBUG(5, printf("no mapping\n")); 3112 goto failed; 3113 } 3114 3115 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3116 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3117 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3118 goto out; 3119 } 3120 3121 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3122 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3123 3124 out: 3125 if (pap != NULL) 3126 *pap = pa; 3127 3128 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3129 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3130 return (TRUE); 3131 3132 failed: 3133 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3134 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3135 return (FALSE); 3136 } 3137 3138 3139 /* 3140 * pmap_copy: 3141 * 3142 * Copy the range specified by src_addr/len from the source map to the 3143 * range dst_addr/len in the destination map. 3144 * 3145 * This routine is only advisory and need not do anything. 3146 */ 3147 /* Call deleted in <arm/arm32/pmap.h> */ 3148 3149 #if defined(PMAP_DEBUG) 3150 void 3151 pmap_dump_pvlist(phys, m) 3152 vaddr_t phys; 3153 char *m; 3154 { 3155 struct vm_page *pg; 3156 struct pv_entry *pv; 3157 3158 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3159 printf("INVALID PA\n"); 3160 return; 3161 } 3162 simple_lock(&pg->mdpage.pvh_slock); 3163 printf("%s %08lx:", m, phys); 3164 if (pg->mdpage.pvh_list == NULL) { 3165 simple_unlock(&pg->mdpage.pvh_slock); 3166 printf(" no mappings\n"); 3167 return; 3168 } 3169 3170 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3171 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3172 pv->pv_va, pv->pv_flags); 3173 3174 printf("\n"); 3175 simple_unlock(&pg->mdpage.pvh_slock); 3176 } 3177 3178 #endif /* PMAP_DEBUG */ 3179 3180 static pt_entry_t * 3181 pmap_map_ptes(struct pmap *pmap) 3182 { 3183 struct proc *p; 3184 3185 /* the kernel's pmap is always accessible */ 3186 if (pmap == pmap_kernel()) { 3187 return (pt_entry_t *)PTE_BASE; 3188 } 3189 3190 if (pmap_is_curpmap(pmap)) { 3191 simple_lock(&pmap->pm_obj.vmobjlock); 3192 return (pt_entry_t *)PTE_BASE; 3193 } 3194 3195 p = curproc; 3196 KDASSERT(p != NULL); 3197 3198 /* need to lock both curpmap and pmap: use ordered locking */ 3199 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3200 simple_lock(&pmap->pm_obj.vmobjlock); 3201 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3202 } else { 3203 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3204 simple_lock(&pmap->pm_obj.vmobjlock); 3205 } 3206 3207 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, 3208 pmap->pm_pptpt, 0); 3209 cpu_tlb_flushD(); 3210 cpu_cpwait(); 3211 return (pt_entry_t *)APTE_BASE; 3212 } 3213 3214 /* 3215 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3216 */ 3217 3218 static void 3219 pmap_unmap_ptes(struct pmap *pmap) 3220 { 3221 3222 if (pmap == pmap_kernel()) { 3223 return; 3224 } 3225 if (pmap_is_curpmap(pmap)) { 3226 simple_unlock(&pmap->pm_obj.vmobjlock); 3227 } else { 3228 KDASSERT(curproc != NULL); 3229 simple_unlock(&pmap->pm_obj.vmobjlock); 3230 simple_unlock( 3231 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3232 } 3233 } 3234 3235 /* 3236 * Modify pte bits for all ptes corresponding to the given physical address. 3237 * We use `maskbits' rather than `clearbits' because we're always passing 3238 * constants and the latter would require an extra inversion at run-time. 3239 */ 3240 3241 static void 3242 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3243 { 3244 struct pv_entry *pv; 3245 pt_entry_t *ptes, npte, opte; 3246 vaddr_t va; 3247 3248 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3249 VM_PAGE_TO_PHYS(pg), maskbits)); 3250 3251 PMAP_HEAD_TO_MAP_LOCK(); 3252 simple_lock(&pg->mdpage.pvh_slock); 3253 3254 /* 3255 * Clear saved attributes (modify, reference) 3256 */ 3257 pg->mdpage.pvh_attrs &= ~maskbits; 3258 3259 if (pg->mdpage.pvh_list == NULL) { 3260 simple_unlock(&pg->mdpage.pvh_slock); 3261 PMAP_HEAD_TO_MAP_UNLOCK(); 3262 return; 3263 } 3264 3265 /* 3266 * Loop over all current mappings setting/clearing as appropos 3267 */ 3268 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3269 #ifdef PMAP_ALIAS_DEBUG 3270 { 3271 int s = splhigh(); 3272 if ((maskbits & PVF_WRITE) != 0 && 3273 (pv->pv_flags & PVF_WRITE) != 0) { 3274 KASSERT(pg->mdpage.rw_mappings != 0); 3275 pg->mdpage.rw_mappings--; 3276 pg->mdpage.ro_mappings++; 3277 } 3278 splx(s); 3279 } 3280 #endif /* PMAP_ALIAS_DEBUG */ 3281 va = pv->pv_va; 3282 pv->pv_flags &= ~maskbits; 3283 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3284 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3285 npte = opte = ptes[arm_btop(va)]; 3286 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3287 if ((pv->pv_flags & PVF_NC)) { 3288 /* 3289 * Entry is not cacheable: reenable 3290 * the cache, nothing to flush 3291 * 3292 * Don't turn caching on again if this 3293 * is a modified emulation. This 3294 * would be inconsitent with the 3295 * settings created by 3296 * pmap_vac_me_harder(). 3297 * 3298 * There's no need to call 3299 * pmap_vac_me_harder() here: all 3300 * pages are loosing their write 3301 * permission. 3302 * 3303 */ 3304 if (maskbits & PVF_WRITE) { 3305 npte |= pte_l2_s_cache_mode; 3306 pv->pv_flags &= ~PVF_NC; 3307 } 3308 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3309 /* 3310 * Entry is cacheable: check if pmap is 3311 * current if it is flush it, 3312 * otherwise it won't be in the cache 3313 */ 3314 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3315 } 3316 3317 /* make the pte read only */ 3318 npte &= ~L2_S_PROT_W; 3319 } 3320 3321 if (maskbits & PVF_REF) { 3322 if (pmap_is_curpmap(pv->pv_pmap) && 3323 (pv->pv_flags & PVF_NC) == 0) { 3324 /* 3325 * Check npte here; we may have already 3326 * done the wbinv above, and the validity 3327 * of the PTE is the same for opte and 3328 * npte. 3329 */ 3330 if (npte & L2_S_PROT_W) { 3331 cpu_idcache_wbinv_range(pv->pv_va, 3332 NBPG); 3333 } else if ((npte & L2_TYPE_MASK) 3334 != L2_TYPE_INV) { 3335 /* XXXJRT need idcache_inv_range */ 3336 cpu_idcache_wbinv_range(pv->pv_va, 3337 NBPG); 3338 } 3339 } 3340 3341 /* make the pte invalid */ 3342 npte = (npte & ~L2_TYPE_MASK) | L2_TYPE_INV; 3343 } 3344 3345 if (npte != opte) { 3346 ptes[arm_btop(va)] = npte; 3347 PTE_SYNC_CURRENT(pv->pv_pmap, &ptes[arm_btop(va)]); 3348 /* Flush the TLB entry if a current pmap. */ 3349 if (pmap_is_curpmap(pv->pv_pmap)) 3350 cpu_tlb_flushID_SE(pv->pv_va); 3351 } else 3352 PTE_FLUSH_ALT(pv->pv_pmap, &ptes[arm_btop(va)]); 3353 3354 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3355 } 3356 cpu_cpwait(); 3357 3358 simple_unlock(&pg->mdpage.pvh_slock); 3359 PMAP_HEAD_TO_MAP_UNLOCK(); 3360 } 3361 3362 /* 3363 * pmap_clear_modify: 3364 * 3365 * Clear the "modified" attribute for a page. 3366 */ 3367 boolean_t 3368 pmap_clear_modify(struct vm_page *pg) 3369 { 3370 boolean_t rv; 3371 3372 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3373 rv = TRUE; 3374 pmap_clearbit(pg, PVF_MOD); 3375 } else 3376 rv = FALSE; 3377 3378 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3379 VM_PAGE_TO_PHYS(pg), rv)); 3380 3381 return (rv); 3382 } 3383 3384 /* 3385 * pmap_clear_reference: 3386 * 3387 * Clear the "referenced" attribute for a page. 3388 */ 3389 boolean_t 3390 pmap_clear_reference(struct vm_page *pg) 3391 { 3392 boolean_t rv; 3393 3394 if (pg->mdpage.pvh_attrs & PVF_REF) { 3395 rv = TRUE; 3396 pmap_clearbit(pg, PVF_REF); 3397 } else 3398 rv = FALSE; 3399 3400 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3401 VM_PAGE_TO_PHYS(pg), rv)); 3402 3403 return (rv); 3404 } 3405 3406 /* 3407 * pmap_is_modified: 3408 * 3409 * Test if a page has the "modified" attribute. 3410 */ 3411 /* See <arm/arm32/pmap.h> */ 3412 3413 /* 3414 * pmap_is_referenced: 3415 * 3416 * Test if a page has the "referenced" attribute. 3417 */ 3418 /* See <arm/arm32/pmap.h> */ 3419 3420 int 3421 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3422 { 3423 pt_entry_t *ptes; 3424 struct vm_page *pg; 3425 paddr_t pa; 3426 u_int flags; 3427 int rv = 0; 3428 3429 PDEBUG(2, printf("pmap_modified_emulation\n")); 3430 3431 PMAP_MAP_TO_HEAD_LOCK(); 3432 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3433 3434 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3435 PDEBUG(2, printf("L1 PTE invalid\n")); 3436 goto out; 3437 } 3438 3439 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3440 3441 /* 3442 * Don't need to PTE_FLUSH_ALT() here; this is always done 3443 * with the current pmap. 3444 */ 3445 3446 /* Check for a invalid pte */ 3447 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3448 goto out; 3449 3450 /* This can happen if user code tries to access kernel memory. */ 3451 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3452 goto out; 3453 3454 /* Extract the physical address of the page */ 3455 pa = l2pte_pa(ptes[arm_btop(va)]); 3456 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3457 goto out; 3458 3459 /* Get the current flags for this page. */ 3460 simple_lock(&pg->mdpage.pvh_slock); 3461 3462 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3463 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3464 3465 /* 3466 * Do the flags say this page is writable ? If not then it is a 3467 * genuine write fault. If yes then the write fault is our fault 3468 * as we did not reflect the write access in the PTE. Now we know 3469 * a write has occurred we can correct this and also set the 3470 * modified bit 3471 */ 3472 if (~flags & PVF_WRITE) { 3473 simple_unlock(&pg->mdpage.pvh_slock); 3474 goto out; 3475 } 3476 3477 PDEBUG(0, 3478 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3479 va, ptes[arm_btop(va)])); 3480 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3481 3482 /* 3483 * Re-enable write permissions for the page. No need to call 3484 * pmap_vac_me_harder(), since this is just a 3485 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3486 * We've already set the cacheable bits based on the assumption 3487 * that we can write to this page. 3488 */ 3489 ptes[arm_btop(va)] = 3490 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3491 PTE_SYNC(&ptes[arm_btop(va)]); 3492 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3493 3494 simple_unlock(&pg->mdpage.pvh_slock); 3495 3496 cpu_tlb_flushID_SE(va); 3497 cpu_cpwait(); 3498 rv = 1; 3499 out: 3500 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3501 PMAP_MAP_TO_HEAD_UNLOCK(); 3502 return (rv); 3503 } 3504 3505 int 3506 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3507 { 3508 pt_entry_t *ptes; 3509 struct vm_page *pg; 3510 paddr_t pa; 3511 int rv = 0; 3512 3513 PDEBUG(2, printf("pmap_handled_emulation\n")); 3514 3515 PMAP_MAP_TO_HEAD_LOCK(); 3516 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3517 3518 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3519 PDEBUG(2, printf("L1 PTE invalid\n")); 3520 goto out; 3521 } 3522 3523 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3524 3525 /* 3526 * Don't need to PTE_FLUSH_ALT() here; this is always done 3527 * with the current pmap. 3528 */ 3529 3530 /* Check for invalid pte */ 3531 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3532 goto out; 3533 3534 /* This can happen if user code tries to access kernel memory. */ 3535 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3536 goto out; 3537 3538 /* Extract the physical address of the page */ 3539 pa = l2pte_pa(ptes[arm_btop(va)]); 3540 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3541 goto out; 3542 3543 simple_lock(&pg->mdpage.pvh_slock); 3544 3545 /* 3546 * Ok we just enable the pte and mark the attibs as handled 3547 * XXX Should we traverse the PV list and enable all PTEs? 3548 */ 3549 PDEBUG(0, 3550 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3551 va, ptes[arm_btop(va)])); 3552 pg->mdpage.pvh_attrs |= PVF_REF; 3553 3554 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3555 PTE_SYNC(&ptes[arm_btop(va)]); 3556 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3557 3558 simple_unlock(&pg->mdpage.pvh_slock); 3559 3560 cpu_tlb_flushID_SE(va); 3561 cpu_cpwait(); 3562 rv = 1; 3563 out: 3564 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3565 PMAP_MAP_TO_HEAD_UNLOCK(); 3566 return (rv); 3567 } 3568 3569 /* 3570 * pmap_collect: free resources held by a pmap 3571 * 3572 * => optional function. 3573 * => called when a process is swapped out to free memory. 3574 */ 3575 3576 void 3577 pmap_collect(struct pmap *pmap) 3578 { 3579 } 3580 3581 /* 3582 * Routine: pmap_procwr 3583 * 3584 * Function: 3585 * Synchronize caches corresponding to [addr, addr+len) in p. 3586 * 3587 */ 3588 void 3589 pmap_procwr(struct proc *p, vaddr_t va, int len) 3590 { 3591 /* We only need to do anything if it is the current process. */ 3592 if (p == curproc) 3593 cpu_icache_sync_range(va, len); 3594 } 3595 /* 3596 * PTP functions 3597 */ 3598 3599 /* 3600 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3601 * 3602 * => pmap should NOT be pmap_kernel() 3603 * => pmap should be locked 3604 */ 3605 3606 static struct vm_page * 3607 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3608 { 3609 struct vm_page *ptp; 3610 pd_entry_t *pde; 3611 3612 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3613 3614 pde = pmap_pde(pmap, va); 3615 if (pmap_pde_v(pde)) { 3616 /* valid... check hint (saves us a PA->PG lookup) */ 3617 if (pmap->pm_ptphint && 3618 ((*pde) & L2_S_FRAME) == 3619 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3620 return (pmap->pm_ptphint); 3621 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3622 #ifdef DIAGNOSTIC 3623 if (ptp == NULL) 3624 panic("pmap_get_ptp: unmanaged user PTP"); 3625 #endif 3626 pmap->pm_ptphint = ptp; 3627 return(ptp); 3628 } 3629 3630 /* allocate a new PTP (updates ptphint) */ 3631 return (pmap_alloc_ptp(pmap, va)); 3632 } 3633 3634 /* 3635 * pmap_alloc_ptp: allocate a PTP for a PMAP 3636 * 3637 * => pmap should already be locked by caller 3638 * => we use the ptp's wire_count to count the number of active mappings 3639 * in the PTP (we start it at one to prevent any chance this PTP 3640 * will ever leak onto the active/inactive queues) 3641 */ 3642 3643 /*__inline */ static struct vm_page * 3644 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3645 { 3646 struct vm_page *ptp; 3647 3648 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3649 3650 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3651 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3652 if (ptp == NULL) 3653 return (NULL); 3654 3655 /* got one! */ 3656 ptp->flags &= ~PG_BUSY; /* never busy */ 3657 ptp->wire_count = 1; /* no mappings yet */ 3658 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), 3659 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3660 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3661 pmap->pm_ptphint = ptp; 3662 return (ptp); 3663 } 3664 3665 vaddr_t 3666 pmap_growkernel(vaddr_t maxkvaddr) 3667 { 3668 struct pmap *kpm = pmap_kernel(), *pm; 3669 int s; 3670 paddr_t ptaddr; 3671 struct vm_page *ptp; 3672 3673 if (maxkvaddr <= pmap_curmaxkvaddr) 3674 goto out; /* we are OK */ 3675 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3676 pmap_curmaxkvaddr, maxkvaddr)); 3677 3678 /* 3679 * whoops! we need to add kernel PTPs 3680 */ 3681 3682 s = splhigh(); /* to be safe */ 3683 simple_lock(&kpm->pm_obj.vmobjlock); 3684 /* due to the way the arm pmap works we map 4MB at a time */ 3685 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3686 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3687 3688 if (uvm.page_init_done == FALSE) { 3689 3690 /* 3691 * we're growing the kernel pmap early (from 3692 * uvm_pageboot_alloc()). this case must be 3693 * handled a little differently. 3694 */ 3695 3696 if (uvm_page_physget(&ptaddr) == FALSE) 3697 panic("pmap_growkernel: out of memory"); 3698 pmap_zero_page(ptaddr); 3699 3700 /* map this page in */ 3701 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, 3702 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3703 3704 /* count PTP as resident */ 3705 kpm->pm_stats.resident_count++; 3706 continue; 3707 } 3708 3709 /* 3710 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3711 * pmap_initialized == FALSE CASE! WE MAY BE 3712 * INVOKED WHILE pmap_init() IS RUNNING! 3713 */ 3714 3715 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3716 panic("pmap_growkernel: alloc ptp failed"); 3717 3718 /* distribute new kernel PTP to all active pmaps */ 3719 simple_lock(&pmaps_lock); 3720 LIST_FOREACH(pm, &pmaps, pm_list) { 3721 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3722 VM_PAGE_TO_PHYS(ptp), 3723 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3724 } 3725 3726 /* Invalidate the PTPT cache. */ 3727 pool_cache_invalidate(&pmap_ptpt_cache); 3728 pmap_ptpt_cache_generation++; 3729 3730 simple_unlock(&pmaps_lock); 3731 } 3732 3733 /* 3734 * flush out the cache, expensive but growkernel will happen so 3735 * rarely 3736 */ 3737 cpu_tlb_flushD(); 3738 cpu_cpwait(); 3739 3740 simple_unlock(&kpm->pm_obj.vmobjlock); 3741 splx(s); 3742 3743 out: 3744 return (pmap_curmaxkvaddr); 3745 } 3746 3747 /************************ Utility routines ****************************/ 3748 3749 /* 3750 * vector_page_setprot: 3751 * 3752 * Manipulate the protection of the vector page. 3753 */ 3754 void 3755 vector_page_setprot(int prot) 3756 { 3757 pt_entry_t *pte; 3758 3759 pte = vtopte(vector_page); 3760 3761 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3762 PTE_SYNC(pte); 3763 cpu_tlb_flushD_SE(vector_page); 3764 cpu_cpwait(); 3765 } 3766 3767 /************************ Bootstrapping routines ****************************/ 3768 3769 /* 3770 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3771 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3772 * find them as necessary. 3773 * 3774 * Note that the data on this list is not valid after initarm() returns. 3775 */ 3776 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3777 3778 static vaddr_t 3779 kernel_pt_lookup(paddr_t pa) 3780 { 3781 pv_addr_t *pv; 3782 3783 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3784 if (pv->pv_pa == pa) 3785 return (pv->pv_va); 3786 } 3787 return (0); 3788 } 3789 3790 /* 3791 * pmap_map_section: 3792 * 3793 * Create a single section mapping. 3794 */ 3795 void 3796 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3797 { 3798 pd_entry_t *pde = (pd_entry_t *) l1pt; 3799 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3800 3801 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3802 3803 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3804 L1_S_PROT(PTE_KERNEL, prot) | fl; 3805 } 3806 3807 /* 3808 * pmap_map_entry: 3809 * 3810 * Create a single page mapping. 3811 */ 3812 void 3813 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3814 { 3815 pd_entry_t *pde = (pd_entry_t *) l1pt; 3816 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3817 pt_entry_t *pte; 3818 3819 KASSERT(((va | pa) & PGOFSET) == 0); 3820 3821 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3822 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3823 3824 pte = (pt_entry_t *) 3825 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3826 if (pte == NULL) 3827 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3828 3829 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3830 L2_S_PROT(PTE_KERNEL, prot) | fl; 3831 } 3832 3833 /* 3834 * pmap_link_l2pt: 3835 * 3836 * Link the L2 page table specified by "pa" into the L1 3837 * page table at the slot for "va". 3838 */ 3839 void 3840 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3841 { 3842 pd_entry_t *pde = (pd_entry_t *) l1pt; 3843 u_int slot = va >> L1_S_SHIFT; 3844 3845 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3846 3847 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3848 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3849 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3850 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3851 3852 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3853 } 3854 3855 /* 3856 * pmap_map_chunk: 3857 * 3858 * Map a chunk of memory using the most efficient mappings 3859 * possible (section, large page, small page) into the 3860 * provided L1 and L2 tables at the specified virtual address. 3861 */ 3862 vsize_t 3863 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3864 int prot, int cache) 3865 { 3866 pd_entry_t *pde = (pd_entry_t *) l1pt; 3867 pt_entry_t *pte, fl; 3868 vsize_t resid; 3869 int i; 3870 3871 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3872 3873 if (l1pt == 0) 3874 panic("pmap_map_chunk: no L1 table provided"); 3875 3876 #ifdef VERBOSE_INIT_ARM 3877 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3878 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3879 #endif 3880 3881 size = resid; 3882 3883 while (resid > 0) { 3884 /* See if we can use a section mapping. */ 3885 if (((pa | va) & L1_S_OFFSET) == 0 && 3886 resid >= L1_S_SIZE) { 3887 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3888 #ifdef VERBOSE_INIT_ARM 3889 printf("S"); 3890 #endif 3891 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3892 L1_S_PROT(PTE_KERNEL, prot) | fl; 3893 va += L1_S_SIZE; 3894 pa += L1_S_SIZE; 3895 resid -= L1_S_SIZE; 3896 continue; 3897 } 3898 3899 /* 3900 * Ok, we're going to use an L2 table. Make sure 3901 * one is actually in the corresponding L1 slot 3902 * for the current VA. 3903 */ 3904 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3905 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3906 3907 pte = (pt_entry_t *) 3908 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3909 if (pte == NULL) 3910 panic("pmap_map_chunk: can't find L2 table for VA" 3911 "0x%08lx", va); 3912 3913 /* See if we can use a L2 large page mapping. */ 3914 if (((pa | va) & L2_L_OFFSET) == 0 && 3915 resid >= L2_L_SIZE) { 3916 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3917 #ifdef VERBOSE_INIT_ARM 3918 printf("L"); 3919 #endif 3920 for (i = 0; i < 16; i++) { 3921 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3922 L2_L_PROTO | pa | 3923 L2_L_PROT(PTE_KERNEL, prot) | fl; 3924 } 3925 va += L2_L_SIZE; 3926 pa += L2_L_SIZE; 3927 resid -= L2_L_SIZE; 3928 continue; 3929 } 3930 3931 /* Use a small page mapping. */ 3932 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3933 #ifdef VERBOSE_INIT_ARM 3934 printf("P"); 3935 #endif 3936 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3937 L2_S_PROT(PTE_KERNEL, prot) | fl; 3938 va += NBPG; 3939 pa += NBPG; 3940 resid -= NBPG; 3941 } 3942 #ifdef VERBOSE_INIT_ARM 3943 printf("\n"); 3944 #endif 3945 return (size); 3946 } 3947 3948 /********************** PTE initialization routines **************************/ 3949 3950 /* 3951 * These routines are called when the CPU type is identified to set up 3952 * the PTE prototypes, cache modes, etc. 3953 * 3954 * The variables are always here, just in case LKMs need to reference 3955 * them (though, they shouldn't). 3956 */ 3957 3958 pt_entry_t pte_l1_s_cache_mode; 3959 pt_entry_t pte_l1_s_cache_mask; 3960 3961 pt_entry_t pte_l2_l_cache_mode; 3962 pt_entry_t pte_l2_l_cache_mask; 3963 3964 pt_entry_t pte_l2_s_cache_mode; 3965 pt_entry_t pte_l2_s_cache_mask; 3966 3967 pt_entry_t pte_l2_s_prot_u; 3968 pt_entry_t pte_l2_s_prot_w; 3969 pt_entry_t pte_l2_s_prot_mask; 3970 3971 pt_entry_t pte_l1_s_proto; 3972 pt_entry_t pte_l1_c_proto; 3973 pt_entry_t pte_l2_s_proto; 3974 3975 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3976 void (*pmap_zero_page_func)(paddr_t); 3977 3978 #if ARM_MMU_GENERIC == 1 3979 void 3980 pmap_pte_init_generic(void) 3981 { 3982 3983 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3984 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3985 3986 pte_l2_l_cache_mode = L2_B|L2_C; 3987 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3988 3989 pte_l2_s_cache_mode = L2_B|L2_C; 3990 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3991 3992 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3993 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3994 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3995 3996 pte_l1_s_proto = L1_S_PROTO_generic; 3997 pte_l1_c_proto = L1_C_PROTO_generic; 3998 pte_l2_s_proto = L2_S_PROTO_generic; 3999 4000 pmap_copy_page_func = pmap_copy_page_generic; 4001 pmap_zero_page_func = pmap_zero_page_generic; 4002 } 4003 4004 #if defined(CPU_ARM9) 4005 void 4006 pmap_pte_init_arm9(void) 4007 { 4008 4009 /* 4010 * ARM9 is compatible with generic, but we want to use 4011 * write-through caching for now. 4012 */ 4013 pmap_pte_init_generic(); 4014 4015 pte_l1_s_cache_mode = L1_S_C; 4016 pte_l2_l_cache_mode = L2_C; 4017 pte_l2_s_cache_mode = L2_C; 4018 } 4019 #endif /* CPU_ARM9 */ 4020 #endif /* ARM_MMU_GENERIC == 1 */ 4021 4022 #if ARM_MMU_XSCALE == 1 4023 void 4024 pmap_pte_init_xscale(void) 4025 { 4026 uint32_t auxctl; 4027 4028 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 4029 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 4030 4031 pte_l2_l_cache_mode = L2_B|L2_C; 4032 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 4033 4034 pte_l2_s_cache_mode = L2_B|L2_C; 4035 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 4036 4037 #ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE 4038 /* 4039 * The XScale core has an enhanced mode where writes that 4040 * miss the cache cause a cache line to be allocated. This 4041 * is significantly faster than the traditional, write-through 4042 * behavior of this case. 4043 * 4044 * However, there is a bug lurking in this pmap module, or in 4045 * other parts of the VM system, or both, which causes corruption 4046 * of NFS-backed files when this cache mode is used. We have 4047 * an ugly work-around for this problem (disable r/w-allocate 4048 * for managed kernel mappings), but the bug is still evil enough 4049 * to consider this cache mode "experimental". 4050 */ 4051 pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X); 4052 pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X); 4053 pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X); 4054 #endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */ 4055 4056 #ifdef XSCALE_CACHE_WRITE_THROUGH 4057 /* 4058 * Some versions of the XScale core have various bugs in 4059 * their cache units, the work-around for which is to run 4060 * the cache in write-through mode. Unfortunately, this 4061 * has a major (negative) impact on performance. So, we 4062 * go ahead and run fast-and-loose, in the hopes that we 4063 * don't line up the planets in a way that will trip the 4064 * bugs. 4065 * 4066 * However, we give you the option to be slow-but-correct. 4067 */ 4068 pte_l1_s_cache_mode = L1_S_C; 4069 pte_l2_l_cache_mode = L2_C; 4070 pte_l2_s_cache_mode = L2_C; 4071 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 4072 4073 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 4074 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 4075 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 4076 4077 pte_l1_s_proto = L1_S_PROTO_xscale; 4078 pte_l1_c_proto = L1_C_PROTO_xscale; 4079 pte_l2_s_proto = L2_S_PROTO_xscale; 4080 4081 pmap_copy_page_func = pmap_copy_page_xscale; 4082 pmap_zero_page_func = pmap_zero_page_xscale; 4083 4084 /* 4085 * Disable ECC protection of page table access, for now. 4086 */ 4087 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4088 : "=r" (auxctl)); 4089 auxctl &= ~XSCALE_AUXCTL_P; 4090 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4091 : 4092 : "r" (auxctl)); 4093 } 4094 4095 /* 4096 * xscale_setup_minidata: 4097 * 4098 * Set up the mini-data cache clean area. We require the 4099 * caller to allocate the right amount of physically and 4100 * virtually contiguous space. 4101 */ 4102 void 4103 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 4104 { 4105 extern vaddr_t xscale_minidata_clean_addr; 4106 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 4107 pd_entry_t *pde = (pd_entry_t *) l1pt; 4108 pt_entry_t *pte; 4109 vsize_t size; 4110 uint32_t auxctl; 4111 4112 xscale_minidata_clean_addr = va; 4113 4114 /* Round it to page size. */ 4115 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 4116 4117 for (; size != 0; 4118 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4119 pte = (pt_entry_t *) 4120 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4121 if (pte == NULL) 4122 panic("xscale_setup_minidata: can't find L2 table for " 4123 "VA 0x%08lx", va); 4124 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4125 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4126 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4127 } 4128 4129 /* 4130 * Configure the mini-data cache for write-back with 4131 * read/write-allocate. 4132 * 4133 * NOTE: In order to reconfigure the mini-data cache, we must 4134 * make sure it contains no valid data! In order to do that, 4135 * we must issue a global data cache invalidate command! 4136 * 4137 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4138 * THIS IS VERY IMPORTANT! 4139 */ 4140 4141 /* Invalidate data and mini-data. */ 4142 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4143 : 4144 : "r" (auxctl)); 4145 4146 4147 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4148 : "=r" (auxctl)); 4149 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4150 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4151 : 4152 : "r" (auxctl)); 4153 } 4154 #endif /* ARM_MMU_XSCALE == 1 */ 4155
Indexes created Sun Sep 28 16:09:52 GMT 2025