pmap.c revision 1.125
1 /* $NetBSD: pmap.c,v 1.125 2003/02/21 00:23:03 chris Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001-2002 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.125 2003/02/21 00:23:03 chris Exp $"); 147 148 #ifdef PMAP_DEBUG 149 #define PDEBUG(_lev_,_stat_) \ 150 if (pmap_debug_level >= (_lev_)) \ 151 ((_stat_)) 152 int pmap_debug_level = -2; 153 void pmap_dump_pvlist(vaddr_t phys, char *m); 154 155 /* 156 * for switching to potentially finer grained debugging 157 */ 158 #define PDB_FOLLOW 0x0001 159 #define PDB_INIT 0x0002 160 #define PDB_ENTER 0x0004 161 #define PDB_REMOVE 0x0008 162 #define PDB_CREATE 0x0010 163 #define PDB_PTPAGE 0x0020 164 #define PDB_GROWKERN 0x0040 165 #define PDB_BITS 0x0080 166 #define PDB_COLLECT 0x0100 167 #define PDB_PROTECT 0x0200 168 #define PDB_MAP_L1 0x0400 169 #define PDB_BOOTSTRAP 0x1000 170 #define PDB_PARANOIA 0x2000 171 #define PDB_WIRING 0x4000 172 #define PDB_PVDUMP 0x8000 173 174 int debugmap = 0; 175 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW | PDB_GROWKERN | PDB_ENTER | PDB_REMOVE; 176 #define NPDEBUG(_lev_,_stat_) \ 177 if (pmapdebug & (_lev_)) \ 178 ((_stat_)) 179 180 #else /* PMAP_DEBUG */ 181 #define PDEBUG(_lev_,_stat_) /* Nothing */ 182 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 183 #endif /* PMAP_DEBUG */ 184 185 struct pmap kernel_pmap_store; 186 187 /* 188 * linked list of all non-kernel pmaps 189 */ 190 191 static LIST_HEAD(, pmap) pmaps; 192 193 /* 194 * pool that pmap structures are allocated from 195 */ 196 197 struct pool pmap_pmap_pool; 198 199 /* 200 * pool/cache that PT-PT's are allocated from 201 */ 202 203 struct pool pmap_ptpt_pool; 204 struct pool_cache pmap_ptpt_cache; 205 u_int pmap_ptpt_cache_generation; 206 207 static void *pmap_ptpt_page_alloc(struct pool *, int); 208 static void pmap_ptpt_page_free(struct pool *, void *); 209 210 struct pool_allocator pmap_ptpt_allocator = { 211 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 212 }; 213 214 static int pmap_ptpt_ctor(void *, void *, int); 215 216 static pt_entry_t *csrc_pte, *cdst_pte; 217 static vaddr_t csrcp, cdstp; 218 219 char *memhook; 220 extern caddr_t msgbufaddr; 221 222 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 223 /* 224 * locking data structures 225 */ 226 227 static struct lock pmap_main_lock; 228 static struct simplelock pvalloc_lock; 229 static struct simplelock pmaps_lock; 230 #ifdef LOCKDEBUG 231 #define PMAP_MAP_TO_HEAD_LOCK() \ 232 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 233 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 234 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 235 236 #define PMAP_HEAD_TO_MAP_LOCK() \ 237 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 238 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 239 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 240 #else 241 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 242 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 244 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 245 #endif /* LOCKDEBUG */ 246 247 /* 248 * pv_page management structures: locked by pvalloc_lock 249 */ 250 251 TAILQ_HEAD(pv_pagelist, pv_page); 252 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 253 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 254 static unsigned int pv_nfpvents; /* # of free pv entries */ 255 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 256 static vaddr_t pv_cachedva; /* cached VA for later use */ 257 258 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 259 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 260 /* high water mark */ 261 262 /* 263 * local prototypes 264 */ 265 266 static struct pv_entry *pmap_add_pvpage(struct pv_page *, boolean_t); 267 static struct pv_entry *pmap_alloc_pv(struct pmap *, unsigned int); 268 #define ALLOCPV_NEED 0 /* need PV now */ 269 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 270 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 271 static struct pv_entry *pmap_alloc_pvpage(struct pmap *, unsigned int); 272 static void pmap_enter_pv(struct vm_page *, 273 struct pv_entry *, struct pmap *, 274 vaddr_t, struct vm_page *, unsigned int); 275 static void pmap_free_pv(struct pmap *, struct pv_entry *); 276 static void pmap_free_pvs(struct pmap *, struct pv_entry *); 277 static void pmap_free_pv_doit(struct pv_entry *); 278 static void pmap_free_pvpage(void); 279 static boolean_t pmap_is_curpmap(struct pmap *); 280 static struct pv_entry *pmap_remove_pv(struct vm_page *, struct pmap *, 281 vaddr_t); 282 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 283 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 284 285 static u_int pmap_modify_pv(struct pmap *, vaddr_t, struct vm_page *, 286 u_int, u_int); 287 288 /* 289 * Structure that describes and L1 table. 290 */ 291 struct l1pt { 292 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 293 struct pglist pt_plist; /* Allocated page list */ 294 vaddr_t pt_va; /* Allocated virtual address */ 295 unsigned int pt_flags; /* Flags */ 296 }; 297 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 298 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 299 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 300 301 static void pmap_free_l1pt(struct l1pt *); 302 static int pmap_allocpagedir(struct pmap *); 303 static int pmap_clean_page(struct pv_entry *, boolean_t); 304 static void pmap_page_remove(struct vm_page *); 305 306 static struct vm_page *pmap_alloc_ptp(struct pmap *, vaddr_t); 307 static struct vm_page *pmap_get_ptp(struct pmap *, vaddr_t); 308 __inline static void pmap_clearbit(struct vm_page *, unsigned int); 309 310 extern paddr_t physical_start; 311 extern paddr_t physical_end; 312 extern unsigned int free_pages; 313 extern int max_processes; 314 315 vaddr_t virtual_avail; 316 vaddr_t virtual_end; 317 vaddr_t pmap_curmaxkvaddr; 318 319 vaddr_t avail_start; 320 vaddr_t avail_end; 321 322 extern pv_addr_t systempage; 323 324 /* Variables used by the L1 page table queue code */ 325 SIMPLEQ_HEAD(l1pt_queue, l1pt); 326 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 327 static u_int l1pt_static_queue_count; /* items in the static l1 queue */ 328 static u_int l1pt_static_create_count; /* static l1 items created */ 329 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 330 static u_int l1pt_queue_count; /* items in the l1 queue */ 331 static u_int l1pt_create_count; /* stat - L1's create count */ 332 static u_int l1pt_reuse_count; /* stat - L1's reused count */ 333 334 /* Local function prototypes (not used outside this file) */ 335 void pmap_pinit(struct pmap *); 336 void pmap_freepagedir(struct pmap *); 337 338 /* Other function prototypes */ 339 extern void bzero_page(vaddr_t); 340 extern void bcopy_page(vaddr_t, vaddr_t); 341 342 struct l1pt *pmap_alloc_l1pt(void); 343 static __inline void pmap_map_in_l1(struct pmap *pmap, vaddr_t va, 344 vaddr_t l2pa, unsigned int); 345 346 static pt_entry_t *pmap_map_ptes(struct pmap *); 347 static void pmap_unmap_ptes(struct pmap *); 348 349 __inline static void pmap_vac_me_harder(struct pmap *, struct vm_page *, 350 pt_entry_t *, boolean_t); 351 static void pmap_vac_me_kpmap(struct pmap *, struct vm_page *, 352 pt_entry_t *, boolean_t); 353 static void pmap_vac_me_user(struct pmap *, struct vm_page *, 354 pt_entry_t *, boolean_t); 355 356 /* 357 * real definition of pv_entry. 358 */ 359 360 struct pv_entry { 361 struct pv_entry *pv_next; /* next pv_entry */ 362 struct pmap *pv_pmap; /* pmap where mapping lies */ 363 vaddr_t pv_va; /* virtual address for mapping */ 364 unsigned int pv_flags; /* flags */ 365 struct vm_page *pv_ptp; /* vm_page for the ptp */ 366 }; 367 368 /* 369 * pv_entrys are dynamically allocated in chunks from a single page. 370 * we keep track of how many pv_entrys are in use for each page and 371 * we can free pv_entry pages if needed. there is one lock for the 372 * entire allocation system. 373 */ 374 375 struct pv_page_info { 376 TAILQ_ENTRY(pv_page) pvpi_list; 377 struct pv_entry *pvpi_pvfree; 378 unsigned int pvpi_nfree; 379 }; 380 381 /* 382 * number of pv_entry's in a pv_page 383 * (note: won't work on systems where NPBG isn't a constant) 384 */ 385 386 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 387 sizeof(struct pv_entry)) 388 389 /* 390 * a pv_page: where pv_entrys are allocated from 391 */ 392 393 struct pv_page { 394 struct pv_page_info pvinfo; 395 struct pv_entry pvents[PVE_PER_PVPAGE]; 396 }; 397 398 #ifdef MYCROFT_HACK 399 int mycroft_hack = 0; 400 #endif 401 402 /* Function to set the debug level of the pmap code */ 403 404 #ifdef PMAP_DEBUG 405 void 406 pmap_debug(int level) 407 { 408 pmap_debug_level = level; 409 printf("pmap_debug: level=%d\n", pmap_debug_level); 410 } 411 #endif /* PMAP_DEBUG */ 412 413 __inline static boolean_t 414 pmap_is_curpmap(struct pmap *pmap) 415 { 416 417 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 418 pmap == pmap_kernel()) 419 return (TRUE); 420 421 return (FALSE); 422 } 423 424 /* 425 * PTE_SYNC_CURRENT: 426 * 427 * Make sure the pte is flushed to RAM. If the pmap is 428 * not the current pmap, then also evict the pte from 429 * any cache lines. 430 */ 431 #define PTE_SYNC_CURRENT(pmap, pte) \ 432 do { \ 433 if (pmap_is_curpmap(pmap)) \ 434 PTE_SYNC(pte); \ 435 else \ 436 PTE_FLUSH(pte); \ 437 } while (/*CONSTCOND*/0) 438 439 /* 440 * PTE_FLUSH_ALT: 441 * 442 * Make sure the pte is not in any cache lines. We expect 443 * this to be used only when a pte has not been modified. 444 */ 445 #define PTE_FLUSH_ALT(pmap, pte) \ 446 do { \ 447 if (pmap_is_curpmap(pmap) == 0) \ 448 PTE_FLUSH(pte); \ 449 } while (/*CONSTCOND*/0) 450 451 /* 452 * p v _ e n t r y f u n c t i o n s 453 */ 454 455 /* 456 * pv_entry allocation functions: 457 * the main pv_entry allocation functions are: 458 * pmap_alloc_pv: allocate a pv_entry structure 459 * pmap_free_pv: free one pv_entry 460 * pmap_free_pvs: free a list of pv_entrys 461 * 462 * the rest are helper functions 463 */ 464 465 /* 466 * pmap_alloc_pv: inline function to allocate a pv_entry structure 467 * => we lock pvalloc_lock 468 * => if we fail, we call out to pmap_alloc_pvpage 469 * => 3 modes: 470 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 471 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 472 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 473 * one now 474 * 475 * "try" is for optional functions like pmap_copy(). 476 */ 477 478 __inline static struct pv_entry * 479 pmap_alloc_pv(struct pmap *pmap, unsigned int mode) 480 { 481 struct pv_page *pvpage; 482 struct pv_entry *pv; 483 484 simple_lock(&pvalloc_lock); 485 486 pvpage = TAILQ_FIRST(&pv_freepages); 487 488 if (pvpage != NULL) { 489 pvpage->pvinfo.pvpi_nfree--; 490 if (pvpage->pvinfo.pvpi_nfree == 0) { 491 /* nothing left in this one? */ 492 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 493 } 494 pv = pvpage->pvinfo.pvpi_pvfree; 495 KASSERT(pv); 496 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 497 pv_nfpvents--; /* took one from pool */ 498 } else { 499 pv = NULL; /* need more of them */ 500 } 501 502 /* 503 * if below low water mark or we didn't get a pv_entry we try and 504 * create more pv_entrys ... 505 */ 506 507 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 508 if (pv == NULL) 509 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 510 mode : ALLOCPV_NEED); 511 else 512 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 513 } 514 515 simple_unlock(&pvalloc_lock); 516 return(pv); 517 } 518 519 /* 520 * pmap_alloc_pvpage: maybe allocate a new pvpage 521 * 522 * if need_entry is false: try and allocate a new pv_page 523 * if need_entry is true: try and allocate a new pv_page and return a 524 * new pv_entry from it. if we are unable to allocate a pv_page 525 * we make a last ditch effort to steal a pv_page from some other 526 * mapping. if that fails, we panic... 527 * 528 * => we assume that the caller holds pvalloc_lock 529 */ 530 531 static struct pv_entry * 532 pmap_alloc_pvpage(struct pmap *pmap, unsigned int mode) 533 { 534 struct vm_page *pg; 535 struct pv_page *pvpage; 536 struct pv_entry *pv; 537 538 /* 539 * if we need_entry and we've got unused pv_pages, allocate from there 540 */ 541 542 pvpage = TAILQ_FIRST(&pv_unusedpgs); 543 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 544 545 /* move it to pv_freepages list */ 546 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 547 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 548 549 /* allocate a pv_entry */ 550 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 551 pv = pvpage->pvinfo.pvpi_pvfree; 552 KASSERT(pv); 553 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 554 555 pv_nfpvents--; /* took one from pool */ 556 return(pv); 557 } 558 559 /* 560 * see if we've got a cached unmapped VA that we can map a page in. 561 * if not, try to allocate one. 562 */ 563 564 565 if (pv_cachedva == 0) { 566 int s; 567 s = splvm(); 568 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 569 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 570 splx(s); 571 if (pv_cachedva == 0) { 572 return (NULL); 573 } 574 } 575 576 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 577 UVM_PGA_USERESERVE); 578 579 if (pg == NULL) 580 return (NULL); 581 pg->flags &= ~PG_BUSY; /* never busy */ 582 583 /* 584 * add a mapping for our new pv_page and free its entrys (save one!) 585 * 586 * NOTE: If we are allocating a PV page for the kernel pmap, the 587 * pmap is already locked! (...but entering the mapping is safe...) 588 */ 589 590 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 591 VM_PROT_READ|VM_PROT_WRITE); 592 pmap_update(pmap_kernel()); 593 pvpage = (struct pv_page *) pv_cachedva; 594 pv_cachedva = 0; 595 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 596 } 597 598 /* 599 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 600 * 601 * => caller must hold pvalloc_lock 602 * => if need_entry is true, we allocate and return one pv_entry 603 */ 604 605 static struct pv_entry * 606 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 607 { 608 unsigned int tofree, lcv; 609 610 /* do we need to return one? */ 611 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 612 613 pvp->pvinfo.pvpi_pvfree = NULL; 614 pvp->pvinfo.pvpi_nfree = tofree; 615 for (lcv = 0 ; lcv < tofree ; lcv++) { 616 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 617 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 618 } 619 if (need_entry) 620 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 621 else 622 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 623 pv_nfpvents += tofree; 624 return((need_entry) ? &pvp->pvents[lcv] : NULL); 625 } 626 627 /* 628 * pmap_free_pv_doit: actually free a pv_entry 629 * 630 * => do not call this directly! instead use either 631 * 1. pmap_free_pv ==> free a single pv_entry 632 * 2. pmap_free_pvs => free a list of pv_entrys 633 * => we must be holding pvalloc_lock 634 */ 635 636 __inline static void 637 pmap_free_pv_doit(struct pv_entry *pv) 638 { 639 struct pv_page *pvp; 640 641 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 642 pv_nfpvents++; 643 pvp->pvinfo.pvpi_nfree++; 644 645 /* nfree == 1 => fully allocated page just became partly allocated */ 646 if (pvp->pvinfo.pvpi_nfree == 1) { 647 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 648 } 649 650 /* free it */ 651 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 652 pvp->pvinfo.pvpi_pvfree = pv; 653 654 /* 655 * are all pv_page's pv_entry's free? move it to unused queue. 656 */ 657 658 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 659 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 660 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 661 } 662 } 663 664 /* 665 * pmap_free_pv: free a single pv_entry 666 * 667 * => we gain the pvalloc_lock 668 */ 669 670 __inline static void 671 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 672 { 673 simple_lock(&pvalloc_lock); 674 pmap_free_pv_doit(pv); 675 676 /* 677 * Can't free the PV page if the PV entries were associated with 678 * the kernel pmap; the pmap is already locked. 679 */ 680 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 681 pmap != pmap_kernel()) 682 pmap_free_pvpage(); 683 684 simple_unlock(&pvalloc_lock); 685 } 686 687 /* 688 * pmap_free_pvs: free a list of pv_entrys 689 * 690 * => we gain the pvalloc_lock 691 */ 692 693 __inline static void 694 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 695 { 696 struct pv_entry *nextpv; 697 698 simple_lock(&pvalloc_lock); 699 700 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 701 nextpv = pvs->pv_next; 702 pmap_free_pv_doit(pvs); 703 } 704 705 /* 706 * Can't free the PV page if the PV entries were associated with 707 * the kernel pmap; the pmap is already locked. 708 */ 709 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 710 pmap != pmap_kernel()) 711 pmap_free_pvpage(); 712 713 simple_unlock(&pvalloc_lock); 714 } 715 716 717 /* 718 * pmap_free_pvpage: try and free an unused pv_page structure 719 * 720 * => assume caller is holding the pvalloc_lock and that 721 * there is a page on the pv_unusedpgs list 722 * => if we can't get a lock on the kmem_map we try again later 723 */ 724 725 static void 726 pmap_free_pvpage(void) 727 { 728 int s; 729 struct vm_map *map; 730 struct vm_map_entry *dead_entries; 731 struct pv_page *pvp; 732 733 s = splvm(); /* protect kmem_map */ 734 735 pvp = TAILQ_FIRST(&pv_unusedpgs); 736 737 /* 738 * note: watch out for pv_initpage which is allocated out of 739 * kernel_map rather than kmem_map. 740 */ 741 if (pvp == pv_initpage) 742 map = kernel_map; 743 else 744 map = kmem_map; 745 if (vm_map_lock_try(map)) { 746 747 /* remove pvp from pv_unusedpgs */ 748 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 749 750 /* unmap the page */ 751 dead_entries = NULL; 752 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 753 &dead_entries); 754 vm_map_unlock(map); 755 756 if (dead_entries != NULL) 757 uvm_unmap_detach(dead_entries, 0); 758 759 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 760 } 761 if (pvp == pv_initpage) 762 /* no more initpage, we've freed it */ 763 pv_initpage = NULL; 764 765 splx(s); 766 } 767 768 /* 769 * main pv_entry manipulation functions: 770 * pmap_enter_pv: enter a mapping onto a vm_page list 771 * pmap_remove_pv: remove a mappiing from a vm_page list 772 * 773 * NOTE: pmap_enter_pv expects to lock the pvh itself 774 * pmap_remove_pv expects te caller to lock the pvh before calling 775 */ 776 777 /* 778 * pmap_enter_pv: enter a mapping onto a vm_page lst 779 * 780 * => caller should hold the proper lock on pmap_main_lock 781 * => caller should have pmap locked 782 * => we will gain the lock on the vm_page and allocate the new pv_entry 783 * => caller should adjust ptp's wire_count before calling 784 * => caller should not adjust pmap's wire_count 785 */ 786 787 __inline static void 788 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 789 vaddr_t va, struct vm_page *ptp, unsigned int flags) 790 { 791 pve->pv_pmap = pmap; 792 pve->pv_va = va; 793 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 794 pve->pv_flags = flags; 795 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 796 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 797 pg->mdpage.pvh_list = pve; /* ... locked list */ 798 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 799 if (pve->pv_flags & PVF_WIRED) 800 ++pmap->pm_stats.wired_count; 801 #ifdef PMAP_ALIAS_DEBUG 802 { 803 int s = splhigh(); 804 if (pve->pv_flags & PVF_WRITE) 805 pg->mdpage.rw_mappings++; 806 else 807 pg->mdpage.ro_mappings++; 808 if (pg->mdpage.rw_mappings != 0 && 809 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 810 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 811 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 812 pg->mdpage.krw_mappings); 813 } 814 splx(s); 815 } 816 #endif /* PMAP_ALIAS_DEBUG */ 817 } 818 819 /* 820 * pmap_remove_pv: try to remove a mapping from a pv_list 821 * 822 * => caller should hold proper lock on pmap_main_lock 823 * => pmap should be locked 824 * => caller should hold lock on vm_page [so that attrs can be adjusted] 825 * => caller should adjust ptp's wire_count and free PTP if needed 826 * => caller should NOT adjust pmap's wire_count 827 * => we return the removed pve 828 */ 829 830 __inline static struct pv_entry * 831 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 832 { 833 struct pv_entry *pve, **prevptr; 834 835 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 836 pve = *prevptr; 837 while (pve) { 838 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 839 *prevptr = pve->pv_next; /* remove it! */ 840 if (pve->pv_flags & PVF_WIRED) 841 --pmap->pm_stats.wired_count; 842 #ifdef PMAP_ALIAS_DEBUG 843 { 844 int s = splhigh(); 845 if (pve->pv_flags & PVF_WRITE) { 846 KASSERT(pg->mdpage.rw_mappings != 0); 847 pg->mdpage.rw_mappings--; 848 } else { 849 KASSERT(pg->mdpage.ro_mappings != 0); 850 pg->mdpage.ro_mappings--; 851 } 852 splx(s); 853 } 854 #endif /* PMAP_ALIAS_DEBUG */ 855 break; 856 } 857 prevptr = &pve->pv_next; /* previous pointer */ 858 pve = pve->pv_next; /* advance */ 859 } 860 return(pve); /* return removed pve */ 861 } 862 863 /* 864 * 865 * pmap_modify_pv: Update pv flags 866 * 867 * => caller should hold lock on vm_page [so that attrs can be adjusted] 868 * => caller should NOT adjust pmap's wire_count 869 * => caller must call pmap_vac_me_harder() if writable status of a page 870 * may have changed. 871 * => we return the old flags 872 * 873 * Modify a physical-virtual mapping in the pv table 874 */ 875 876 static /* __inline */ u_int 877 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 878 u_int bic_mask, u_int eor_mask) 879 { 880 struct pv_entry *npv; 881 u_int flags, oflags; 882 883 /* 884 * There is at least one VA mapping this page. 885 */ 886 887 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 888 if (pmap == npv->pv_pmap && va == npv->pv_va) { 889 oflags = npv->pv_flags; 890 npv->pv_flags = flags = 891 ((oflags & ~bic_mask) ^ eor_mask); 892 if ((flags ^ oflags) & PVF_WIRED) { 893 if (flags & PVF_WIRED) 894 ++pmap->pm_stats.wired_count; 895 else 896 --pmap->pm_stats.wired_count; 897 } 898 #ifdef PMAP_ALIAS_DEBUG 899 { 900 int s = splhigh(); 901 if ((flags ^ oflags) & PVF_WRITE) { 902 if (flags & PVF_WRITE) { 903 pg->mdpage.rw_mappings++; 904 pg->mdpage.ro_mappings--; 905 if (pg->mdpage.rw_mappings != 0 && 906 (pg->mdpage.kro_mappings != 0 || 907 pg->mdpage.krw_mappings != 0)) { 908 printf("pmap_modify_pv: rw %u, " 909 "kro %u, krw %u\n", 910 pg->mdpage.rw_mappings, 911 pg->mdpage.kro_mappings, 912 pg->mdpage.krw_mappings); 913 } 914 } else { 915 KASSERT(pg->mdpage.rw_mappings != 0); 916 pg->mdpage.rw_mappings--; 917 pg->mdpage.ro_mappings++; 918 } 919 } 920 splx(s); 921 } 922 #endif /* PMAP_ALIAS_DEBUG */ 923 return (oflags); 924 } 925 } 926 return (0); 927 } 928 929 /* 930 * Map the specified level 2 pagetable into the level 1 page table for 931 * the given pmap to cover a chunk of virtual address space starting from the 932 * address specified. 933 */ 934 #define PMAP_PTP_SELFREF 0x01 935 #define PMAP_PTP_CACHEABLE 0x02 936 937 static __inline void 938 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, unsigned int flags) 939 { 940 vaddr_t ptva; 941 942 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 943 944 /* Calculate the index into the L1 page table. */ 945 ptva = va >> L1_S_SHIFT; 946 947 /* Map page table into the L1. */ 948 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 949 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 950 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 951 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 952 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 953 954 /* Map the page table into the page table area. */ 955 if (flags & PMAP_PTP_SELFREF) { 956 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 957 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE) | 958 ((flags & PMAP_PTP_CACHEABLE) ? pte_l2_s_cache_mode : 0); 959 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 960 } 961 } 962 963 #if 0 964 static __inline void 965 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 966 { 967 vaddr_t ptva; 968 969 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 970 971 /* Calculate the index into the L1 page table. */ 972 ptva = va >> L1_S_SHIFT; 973 974 /* Unmap page table from the L1. */ 975 pmap->pm_pdir[ptva + 0] = 0; 976 pmap->pm_pdir[ptva + 1] = 0; 977 pmap->pm_pdir[ptva + 2] = 0; 978 pmap->pm_pdir[ptva + 3] = 0; 979 cpu_dcache_wb_range((vaddr_t) &pmap->pm_pdir[ptva + 0], 16); 980 981 /* Unmap the page table from the page table area. */ 982 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 983 PTE_SYNC_CURRENT(pmap, (pt_entry_t *)(pmap->pm_vptpt + ptva)); 984 } 985 #endif 986 987 /* 988 * Used to map a range of physical addresses into kernel 989 * virtual address space. 990 * 991 * For now, VM is already on, we only need to map the 992 * specified memory. 993 * 994 * XXX This routine should eventually go away; it's only used 995 * XXX by machine-dependent crash dump code. 996 */ 997 vaddr_t 998 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 999 { 1000 pt_entry_t *pte; 1001 1002 while (spa < epa) { 1003 pte = vtopte(va); 1004 1005 *pte = L2_S_PROTO | spa | 1006 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 1007 PTE_SYNC(pte); 1008 cpu_tlb_flushID_SE(va); 1009 va += NBPG; 1010 spa += NBPG; 1011 } 1012 pmap_update(pmap_kernel()); 1013 return(va); 1014 } 1015 1016 1017 /* 1018 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1019 * 1020 * bootstrap the pmap system. This is called from initarm and allows 1021 * the pmap system to initailise any structures it requires. 1022 * 1023 * Currently this sets up the kernel_pmap that is statically allocated 1024 * and also allocated virtual addresses for certain page hooks. 1025 * Currently the only one page hook is allocated that is used 1026 * to zero physical pages of memory. 1027 * It also initialises the start and end address of the kernel data space. 1028 */ 1029 1030 char *boot_head; 1031 1032 void 1033 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1034 { 1035 pt_entry_t *pte; 1036 1037 pmap_kernel()->pm_pdir = kernel_l1pt; 1038 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 1039 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1040 simple_lock_init(&pmap_kernel()->pm_lock); 1041 pmap_kernel()->pm_obj.pgops = NULL; 1042 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1043 pmap_kernel()->pm_obj.uo_npages = 0; 1044 pmap_kernel()->pm_obj.uo_refs = 1; 1045 1046 virtual_avail = KERNEL_VM_BASE; 1047 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1048 1049 /* 1050 * now we allocate the "special" VAs which are used for tmp mappings 1051 * by the pmap (and other modules). we allocate the VAs by advancing 1052 * virtual_avail (note that there are no pages mapped at these VAs). 1053 * we find the PTE that maps the allocated VA via the linear PTE 1054 * mapping. 1055 */ 1056 1057 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1058 1059 csrcp = virtual_avail; csrc_pte = pte; 1060 virtual_avail += PAGE_SIZE; pte++; 1061 1062 cdstp = virtual_avail; cdst_pte = pte; 1063 virtual_avail += PAGE_SIZE; pte++; 1064 1065 memhook = (char *) virtual_avail; /* don't need pte */ 1066 *pte = 0; 1067 virtual_avail += PAGE_SIZE; pte++; 1068 1069 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1070 virtual_avail += round_page(MSGBUFSIZE); 1071 pte += atop(round_page(MSGBUFSIZE)); 1072 1073 /* 1074 * init the static-global locks and global lists. 1075 */ 1076 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1077 simple_lock_init(&pvalloc_lock); 1078 simple_lock_init(&pmaps_lock); 1079 LIST_INIT(&pmaps); 1080 TAILQ_INIT(&pv_freepages); 1081 TAILQ_INIT(&pv_unusedpgs); 1082 1083 /* 1084 * initialize the pmap pool. 1085 */ 1086 1087 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1088 &pool_allocator_nointr); 1089 1090 /* 1091 * initialize the PT-PT pool and cache. 1092 */ 1093 1094 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1095 &pmap_ptpt_allocator); 1096 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1097 pmap_ptpt_ctor, NULL, NULL); 1098 1099 cpu_dcache_wbinv_all(); 1100 } 1101 1102 /* 1103 * void pmap_init(void) 1104 * 1105 * Initialize the pmap module. 1106 * Called by vm_init() in vm/vm_init.c in order to initialise 1107 * any structures that the pmap system needs to map virtual memory. 1108 */ 1109 1110 extern int physmem; 1111 1112 void 1113 pmap_init(void) 1114 { 1115 1116 /* 1117 * Set the available memory vars - These do not map to real memory 1118 * addresses and cannot as the physical memory is fragmented. 1119 * They are used by ps for %mem calculations. 1120 * One could argue whether this should be the entire memory or just 1121 * the memory that is useable in a user process. 1122 */ 1123 avail_start = 0; 1124 avail_end = physmem * NBPG; 1125 1126 /* 1127 * now we need to free enough pv_entry structures to allow us to get 1128 * the kmem_map/kmem_object allocated and inited (done after this 1129 * function is finished). to do this we allocate one bootstrap page out 1130 * of kernel_map and use it to provide an initial pool of pv_entry 1131 * structures. we never free this page. 1132 */ 1133 1134 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1135 if (pv_initpage == NULL) 1136 panic("pmap_init: pv_initpage"); 1137 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1138 pv_nfpvents = 0; 1139 (void) pmap_add_pvpage(pv_initpage, FALSE); 1140 1141 pmap_initialized = TRUE; 1142 1143 /* Initialise our L1 page table queues and counters */ 1144 SIMPLEQ_INIT(&l1pt_static_queue); 1145 l1pt_static_queue_count = 0; 1146 l1pt_static_create_count = 0; 1147 SIMPLEQ_INIT(&l1pt_queue); 1148 l1pt_queue_count = 0; 1149 l1pt_create_count = 0; 1150 l1pt_reuse_count = 0; 1151 } 1152 1153 /* 1154 * pmap_postinit() 1155 * 1156 * This routine is called after the vm and kmem subsystems have been 1157 * initialised. This allows the pmap code to perform any initialisation 1158 * that can only be done one the memory allocation is in place. 1159 */ 1160 1161 void 1162 pmap_postinit(void) 1163 { 1164 unsigned int loop; 1165 struct l1pt *pt; 1166 1167 #ifdef PMAP_STATIC_L1S 1168 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1169 #else /* PMAP_STATIC_L1S */ 1170 for (loop = 0; loop < max_processes; ++loop) { 1171 #endif /* PMAP_STATIC_L1S */ 1172 /* Allocate a L1 page table */ 1173 pt = pmap_alloc_l1pt(); 1174 if (!pt) 1175 panic("Cannot allocate static L1 page tables"); 1176 1177 /* Clean it */ 1178 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1179 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1180 /* Add the page table to the queue */ 1181 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1182 ++l1pt_static_queue_count; 1183 ++l1pt_static_create_count; 1184 } 1185 } 1186 1187 1188 /* 1189 * Create and return a physical map. 1190 * 1191 * If the size specified for the map is zero, the map is an actual physical 1192 * map, and may be referenced by the hardware. 1193 * 1194 * If the size specified is non-zero, the map will be used in software only, 1195 * and is bounded by that size. 1196 */ 1197 1198 pmap_t 1199 pmap_create(void) 1200 { 1201 struct pmap *pmap; 1202 1203 /* 1204 * Fetch pmap entry from the pool 1205 */ 1206 1207 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1208 /* XXX is this really needed! */ 1209 memset(pmap, 0, sizeof(*pmap)); 1210 1211 simple_lock_init(&pmap->pm_obj.vmobjlock); 1212 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1213 TAILQ_INIT(&pmap->pm_obj.memq); 1214 pmap->pm_obj.uo_npages = 0; 1215 pmap->pm_obj.uo_refs = 1; 1216 pmap->pm_stats.wired_count = 0; 1217 pmap->pm_stats.resident_count = 1; 1218 pmap->pm_ptphint = NULL; 1219 1220 /* Now init the machine part of the pmap */ 1221 pmap_pinit(pmap); 1222 return(pmap); 1223 } 1224 1225 /* 1226 * pmap_alloc_l1pt() 1227 * 1228 * This routine allocates physical and virtual memory for a L1 page table 1229 * and wires it. 1230 * A l1pt structure is returned to describe the allocated page table. 1231 * 1232 * This routine is allowed to fail if the required memory cannot be allocated. 1233 * In this case NULL is returned. 1234 */ 1235 1236 struct l1pt * 1237 pmap_alloc_l1pt(void) 1238 { 1239 paddr_t pa; 1240 vaddr_t va; 1241 struct l1pt *pt; 1242 int error; 1243 struct vm_page *m; 1244 1245 /* Allocate virtual address space for the L1 page table */ 1246 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1247 if (va == 0) { 1248 #ifdef DIAGNOSTIC 1249 PDEBUG(0, 1250 printf("pmap: Cannot allocate pageable memory for L1\n")); 1251 #endif /* DIAGNOSTIC */ 1252 return(NULL); 1253 } 1254 1255 /* Allocate memory for the l1pt structure */ 1256 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1257 1258 /* 1259 * Allocate pages from the VM system. 1260 */ 1261 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1262 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1263 if (error) { 1264 #ifdef DIAGNOSTIC 1265 PDEBUG(0, 1266 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1267 error)); 1268 #endif /* DIAGNOSTIC */ 1269 /* Release the resources we already have claimed */ 1270 free(pt, M_VMPMAP); 1271 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1272 return(NULL); 1273 } 1274 1275 /* Map our physical pages into our virtual space */ 1276 pt->pt_va = va; 1277 m = TAILQ_FIRST(&pt->pt_plist); 1278 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1279 pa = VM_PAGE_TO_PHYS(m); 1280 1281 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE); 1282 1283 va += NBPG; 1284 m = m->pageq.tqe_next; 1285 } 1286 1287 #ifdef DIAGNOSTIC 1288 if (m) 1289 panic("pmap_alloc_l1pt: pglist not empty"); 1290 #endif /* DIAGNOSTIC */ 1291 1292 pt->pt_flags = 0; 1293 return(pt); 1294 } 1295 1296 /* 1297 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1298 */ 1299 static void 1300 pmap_free_l1pt(struct l1pt *pt) 1301 { 1302 /* Separate the physical memory for the virtual space */ 1303 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1304 pmap_update(pmap_kernel()); 1305 1306 /* Return the physical memory */ 1307 uvm_pglistfree(&pt->pt_plist); 1308 1309 /* Free the virtual space */ 1310 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1311 1312 /* Free the l1pt structure */ 1313 free(pt, M_VMPMAP); 1314 } 1315 1316 /* 1317 * pmap_ptpt_page_alloc: 1318 * 1319 * Back-end page allocator for the PT-PT pool. 1320 */ 1321 static void * 1322 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1323 { 1324 struct vm_page *pg; 1325 pt_entry_t *pte; 1326 vaddr_t va; 1327 1328 /* XXX PR_WAITOK? */ 1329 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1330 if (va == 0) 1331 return (NULL); 1332 1333 for (;;) { 1334 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1335 if (pg != NULL) 1336 break; 1337 if ((flags & PR_WAITOK) == 0) { 1338 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1339 return (NULL); 1340 } 1341 uvm_wait("pmap_ptpt"); 1342 } 1343 1344 pte = vtopte(va); 1345 KDASSERT(pmap_pte_v(pte) == 0); 1346 1347 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1348 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1349 PTE_SYNC(pte); 1350 #ifdef PMAP_ALIAS_DEBUG 1351 { 1352 int s = splhigh(); 1353 pg->mdpage.krw_mappings++; 1354 splx(s); 1355 } 1356 #endif /* PMAP_ALIAS_DEBUG */ 1357 1358 return ((void *) va); 1359 } 1360 1361 /* 1362 * pmap_ptpt_page_free: 1363 * 1364 * Back-end page free'er for the PT-PT pool. 1365 */ 1366 static void 1367 pmap_ptpt_page_free(struct pool *pp, void *v) 1368 { 1369 vaddr_t va = (vaddr_t) v; 1370 paddr_t pa; 1371 1372 pa = vtophys(va); 1373 1374 pmap_kremove(va, L2_TABLE_SIZE); 1375 pmap_update(pmap_kernel()); 1376 1377 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1378 1379 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1380 } 1381 1382 /* 1383 * pmap_ptpt_ctor: 1384 * 1385 * Constructor for the PT-PT cache. 1386 */ 1387 static int 1388 pmap_ptpt_ctor(void *arg, void *object, int flags) 1389 { 1390 caddr_t vptpt = object; 1391 1392 /* Page is already zero'd. */ 1393 1394 /* 1395 * Map in kernel PTs. 1396 * 1397 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1398 */ 1399 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1400 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1401 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1402 (KERNEL_PD_SIZE >> 2)); 1403 1404 return (0); 1405 } 1406 1407 /* 1408 * Allocate a page directory. 1409 * This routine will either allocate a new page directory from the pool 1410 * of L1 page tables currently held by the kernel or it will allocate 1411 * a new one via pmap_alloc_l1pt(). 1412 * It will then initialise the l1 page table for use. 1413 */ 1414 static int 1415 pmap_allocpagedir(struct pmap *pmap) 1416 { 1417 vaddr_t vptpt; 1418 struct l1pt *pt; 1419 u_int gen; 1420 1421 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1422 1423 /* Do we have any spare L1's lying around ? */ 1424 if (l1pt_static_queue_count) { 1425 --l1pt_static_queue_count; 1426 pt = SIMPLEQ_FIRST(&l1pt_static_queue); 1427 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt_queue); 1428 } else if (l1pt_queue_count) { 1429 --l1pt_queue_count; 1430 pt = SIMPLEQ_FIRST(&l1pt_queue); 1431 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt_queue); 1432 ++l1pt_reuse_count; 1433 } else { 1434 pt = pmap_alloc_l1pt(); 1435 if (!pt) 1436 return(ENOMEM); 1437 ++l1pt_create_count; 1438 } 1439 1440 /* Store the pointer to the l1 descriptor in the pmap. */ 1441 pmap->pm_l1pt = pt; 1442 1443 /* Store the virtual address of the l1 in the pmap. */ 1444 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1445 1446 /* Clean the L1 if it is dirty */ 1447 if (!(pt->pt_flags & PTFLAG_CLEAN)) { 1448 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1449 cpu_dcache_wb_range((vaddr_t) pmap->pm_pdir, 1450 (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1451 } 1452 1453 /* Allocate a page table to map all the page tables for this pmap */ 1454 KASSERT(pmap->pm_vptpt == 0); 1455 1456 try_again: 1457 gen = pmap_ptpt_cache_generation; 1458 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1459 if (vptpt == NULL) { 1460 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1461 pmap_freepagedir(pmap); 1462 return (ENOMEM); 1463 } 1464 1465 /* need to lock this all up for growkernel */ 1466 simple_lock(&pmaps_lock); 1467 1468 if (gen != pmap_ptpt_cache_generation) { 1469 simple_unlock(&pmaps_lock); 1470 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1471 goto try_again; 1472 } 1473 1474 pmap->pm_vptpt = vptpt; 1475 pmap->pm_pptpt = vtophys(vptpt); 1476 1477 /* Duplicate the kernel mappings. */ 1478 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1479 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1480 KERNEL_PD_SIZE); 1481 cpu_dcache_wb_range((vaddr_t)pmap->pm_pdir + 1482 (L1_TABLE_SIZE - KERNEL_PD_SIZE), KERNEL_PD_SIZE); 1483 1484 /* Wire in this page table */ 1485 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, PMAP_PTP_SELFREF); 1486 1487 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1488 1489 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1490 simple_unlock(&pmaps_lock); 1491 1492 return(0); 1493 } 1494 1495 1496 /* 1497 * Initialize a preallocated and zeroed pmap structure, 1498 * such as one in a vmspace structure. 1499 */ 1500 1501 void 1502 pmap_pinit(struct pmap *pmap) 1503 { 1504 unsigned int backoff = 6; 1505 unsigned int retry = 10; 1506 1507 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1508 1509 /* Keep looping until we succeed in allocating a page directory */ 1510 while (pmap_allocpagedir(pmap) != 0) { 1511 /* 1512 * Ok we failed to allocate a suitable block of memory for an 1513 * L1 page table. This means that either: 1514 * 1. 16KB of virtual address space could not be allocated 1515 * 2. 16KB of physically contiguous memory on a 16KB boundary 1516 * could not be allocated. 1517 * 1518 * Since we cannot fail we will sleep for a while and try 1519 * again. 1520 * 1521 * Searching for a suitable L1 PT is expensive: 1522 * to avoid hogging the system when memory is really 1523 * scarce, use an exponential back-off so that 1524 * eventually we won't retry more than once every 8 1525 * seconds. This should allow other processes to run 1526 * to completion and free up resources. 1527 */ 1528 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1529 NULL); 1530 if (--retry == 0) { 1531 retry = 10; 1532 if (backoff) 1533 --backoff; 1534 } 1535 } 1536 1537 if (vector_page < KERNEL_BASE) { 1538 /* 1539 * Map the vector page. This will also allocate and map 1540 * an L2 table for it. 1541 */ 1542 pmap_enter(pmap, vector_page, systempage.pv_pa, 1543 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1544 pmap_update(pmap); 1545 } 1546 } 1547 1548 void 1549 pmap_freepagedir(struct pmap *pmap) 1550 { 1551 /* Free the memory used for the page table mapping */ 1552 if (pmap->pm_vptpt != 0) { 1553 /* 1554 * XXX Objects freed to a pool cache must be in constructed 1555 * XXX form when freed, but we don't free page tables as we 1556 * XXX go, so we need to zap the mappings here. 1557 * 1558 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1559 */ 1560 memset((caddr_t) pmap->pm_vptpt, 0, 1561 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1562 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1563 } 1564 1565 /* junk the L1 page table */ 1566 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1567 /* Add the page table to the queue */ 1568 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1569 pmap->pm_l1pt, pt_queue); 1570 ++l1pt_static_queue_count; 1571 } else if (l1pt_queue_count < 8) { 1572 /* Add the page table to the queue */ 1573 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1574 ++l1pt_queue_count; 1575 } else 1576 pmap_free_l1pt(pmap->pm_l1pt); 1577 } 1578 1579 /* 1580 * Retire the given physical map from service. 1581 * Should only be called if the map contains no valid mappings. 1582 */ 1583 1584 void 1585 pmap_destroy(struct pmap *pmap) 1586 { 1587 struct vm_page *page; 1588 unsigned int count; 1589 1590 if (pmap == NULL) 1591 return; 1592 1593 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1594 1595 /* 1596 * Drop reference count 1597 */ 1598 simple_lock(&pmap->pm_obj.vmobjlock); 1599 count = --pmap->pm_obj.uo_refs; 1600 simple_unlock(&pmap->pm_obj.vmobjlock); 1601 if (count > 0) { 1602 return; 1603 } 1604 1605 /* 1606 * reference count is zero, free pmap resources and then free pmap. 1607 */ 1608 1609 /* 1610 * remove it from global list of pmaps 1611 */ 1612 1613 simple_lock(&pmaps_lock); 1614 LIST_REMOVE(pmap, pm_list); 1615 simple_unlock(&pmaps_lock); 1616 1617 if (vector_page < KERNEL_BASE) { 1618 /* Remove the vector page mapping */ 1619 pmap_remove(pmap, vector_page, vector_page + NBPG); 1620 pmap_update(pmap); 1621 } 1622 1623 /* 1624 * Free any page tables still mapped 1625 * This is only temporay until pmap_enter can count the number 1626 * of mappings made in a page table. Then pmap_remove() can 1627 * reduce the count and free the pagetable when the count 1628 * reaches zero. Note that entries in this list should match the 1629 * contents of the ptpt, however this is faster than walking a 1024 1630 * entries looking for pt's 1631 * taken from i386 pmap.c 1632 */ 1633 /* 1634 * vmobjlock must be held while freeing pages 1635 */ 1636 simple_lock(&pmap->pm_obj.vmobjlock); 1637 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1638 KASSERT((page->flags & PG_BUSY) == 0); 1639 1640 /* Freeing a PT page? The contents are a throw-away. */ 1641 KASSERT((page->offset & PD_OFFSET) == 0);/* XXX KDASSERT */ 1642 cpu_dcache_inv_range((vaddr_t)vtopte(page->offset), PAGE_SIZE); 1643 1644 page->wire_count = 0; 1645 uvm_pagefree(page); 1646 } 1647 simple_unlock(&pmap->pm_obj.vmobjlock); 1648 1649 /* Free the page dir */ 1650 pmap_freepagedir(pmap); 1651 1652 /* return the pmap to the pool */ 1653 pool_put(&pmap_pmap_pool, pmap); 1654 } 1655 1656 1657 /* 1658 * void pmap_reference(struct pmap *pmap) 1659 * 1660 * Add a reference to the specified pmap. 1661 */ 1662 1663 void 1664 pmap_reference(struct pmap *pmap) 1665 { 1666 if (pmap == NULL) 1667 return; 1668 1669 simple_lock(&pmap->pm_lock); 1670 pmap->pm_obj.uo_refs++; 1671 simple_unlock(&pmap->pm_lock); 1672 } 1673 1674 /* 1675 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1676 * 1677 * Return the start and end addresses of the kernel's virtual space. 1678 * These values are setup in pmap_bootstrap and are updated as pages 1679 * are allocated. 1680 */ 1681 1682 void 1683 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1684 { 1685 *start = virtual_avail; 1686 *end = virtual_end; 1687 } 1688 1689 /* 1690 * Activate the address space for the specified process. If the process 1691 * is the current process, load the new MMU context. 1692 */ 1693 void 1694 pmap_activate(struct lwp *l) 1695 { 1696 struct pmap *pmap = l->l_proc->p_vmspace->vm_map.pmap; 1697 struct pcb *pcb = &l->l_addr->u_pcb; 1698 1699 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1700 (paddr_t *)&pcb->pcb_pagedir); 1701 1702 PDEBUG(0, printf("pmap_activate: l=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1703 l, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1704 1705 if (l == curlwp) { 1706 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1707 setttb((u_int)pcb->pcb_pagedir); 1708 } 1709 } 1710 1711 /* 1712 * Deactivate the address space of the specified process. 1713 */ 1714 void 1715 pmap_deactivate(struct lwp *l) 1716 { 1717 } 1718 1719 /* 1720 * Perform any deferred pmap operations. 1721 */ 1722 void 1723 pmap_update(struct pmap *pmap) 1724 { 1725 1726 /* 1727 * We haven't deferred any pmap operations, but we do need to 1728 * make sure TLB/cache operations have completed. 1729 */ 1730 cpu_cpwait(); 1731 } 1732 1733 /* 1734 * pmap_clean_page() 1735 * 1736 * This is a local function used to work out the best strategy to clean 1737 * a single page referenced by its entry in the PV table. It's used by 1738 * pmap_copy_page, pmap_zero page and maybe some others later on. 1739 * 1740 * Its policy is effectively: 1741 * o If there are no mappings, we don't bother doing anything with the cache. 1742 * o If there is one mapping, we clean just that page. 1743 * o If there are multiple mappings, we clean the entire cache. 1744 * 1745 * So that some functions can be further optimised, it returns 0 if it didn't 1746 * clean the entire cache, or 1 if it did. 1747 * 1748 * XXX One bug in this routine is that if the pv_entry has a single page 1749 * mapped at 0x00000000 a whole cache clean will be performed rather than 1750 * just the 1 page. Since this should not occur in everyday use and if it does 1751 * it will just result in not the most efficient clean for the page. 1752 */ 1753 static int 1754 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1755 { 1756 struct pmap *pmap; 1757 struct pv_entry *npv; 1758 boolean_t cache_needs_cleaning = FALSE; 1759 vaddr_t page_to_clean = 0; 1760 1761 if (pv == NULL) { 1762 /* nothing mapped in so nothing to flush */ 1763 return (0); 1764 } 1765 1766 /* 1767 * Since we flush the cache each time we change curlwp, we 1768 * only need to flush the page if it is in the current pmap. 1769 */ 1770 if (curproc) 1771 pmap = curproc->p_vmspace->vm_map.pmap; 1772 else 1773 pmap = pmap_kernel(); 1774 1775 for (npv = pv; npv; npv = npv->pv_next) { 1776 if (npv->pv_pmap == pmap) { 1777 /* 1778 * The page is mapped non-cacheable in 1779 * this map. No need to flush the cache. 1780 */ 1781 if (npv->pv_flags & PVF_NC) { 1782 #ifdef DIAGNOSTIC 1783 if (cache_needs_cleaning) 1784 panic("pmap_clean_page: " 1785 "cache inconsistency"); 1786 #endif 1787 break; 1788 } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1789 continue; 1790 if (cache_needs_cleaning) { 1791 page_to_clean = 0; 1792 break; 1793 } else 1794 page_to_clean = npv->pv_va; 1795 cache_needs_cleaning = TRUE; 1796 } 1797 } 1798 1799 if (page_to_clean) { 1800 /* 1801 * XXX If is_src, we really only need to write-back, 1802 * XXX not invalidate, too. Investigate further. 1803 * XXX --thorpej (at) netbsd.org 1804 */ 1805 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1806 } else if (cache_needs_cleaning) { 1807 cpu_idcache_wbinv_all(); 1808 return (1); 1809 } 1810 return (0); 1811 } 1812 1813 /* 1814 * pmap_zero_page() 1815 * 1816 * Zero a given physical page by mapping it at a page hook point. 1817 * In doing the zero page op, the page we zero is mapped cachable, as with 1818 * StrongARM accesses to non-cached pages are non-burst making writing 1819 * _any_ bulk data very slow. 1820 */ 1821 #if ARM_MMU_GENERIC == 1 1822 void 1823 pmap_zero_page_generic(paddr_t phys) 1824 { 1825 #ifdef DEBUG 1826 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1827 1828 if (pg->mdpage.pvh_list != NULL) 1829 panic("pmap_zero_page: page has mappings"); 1830 #endif 1831 1832 KDASSERT((phys & PGOFSET) == 0); 1833 1834 /* 1835 * Hook in the page, zero it, and purge the cache for that 1836 * zeroed page. Invalidate the TLB as needed. 1837 */ 1838 *cdst_pte = L2_S_PROTO | phys | 1839 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1840 PTE_SYNC(cdst_pte); 1841 cpu_tlb_flushD_SE(cdstp); 1842 cpu_cpwait(); 1843 bzero_page(cdstp); 1844 cpu_dcache_wbinv_range(cdstp, NBPG); 1845 } 1846 #endif /* ARM_MMU_GENERIC == 1 */ 1847 1848 #if ARM_MMU_XSCALE == 1 1849 void 1850 pmap_zero_page_xscale(paddr_t phys) 1851 { 1852 #ifdef DEBUG 1853 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1854 1855 if (pg->mdpage.pvh_list != NULL) 1856 panic("pmap_zero_page: page has mappings"); 1857 #endif 1858 1859 KDASSERT((phys & PGOFSET) == 0); 1860 1861 /* 1862 * Hook in the page, zero it, and purge the cache for that 1863 * zeroed page. Invalidate the TLB as needed. 1864 */ 1865 *cdst_pte = L2_S_PROTO | phys | 1866 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1867 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1868 PTE_SYNC(cdst_pte); 1869 cpu_tlb_flushD_SE(cdstp); 1870 cpu_cpwait(); 1871 bzero_page(cdstp); 1872 xscale_cache_clean_minidata(); 1873 } 1874 #endif /* ARM_MMU_XSCALE == 1 */ 1875 1876 /* pmap_pageidlezero() 1877 * 1878 * The same as above, except that we assume that the page is not 1879 * mapped. This means we never have to flush the cache first. Called 1880 * from the idle loop. 1881 */ 1882 boolean_t 1883 pmap_pageidlezero(paddr_t phys) 1884 { 1885 unsigned int i; 1886 int *ptr; 1887 boolean_t rv = TRUE; 1888 #ifdef DEBUG 1889 struct vm_page *pg; 1890 1891 pg = PHYS_TO_VM_PAGE(phys); 1892 if (pg->mdpage.pvh_list != NULL) 1893 panic("pmap_pageidlezero: page has mappings"); 1894 #endif 1895 1896 KDASSERT((phys & PGOFSET) == 0); 1897 1898 /* 1899 * Hook in the page, zero it, and purge the cache for that 1900 * zeroed page. Invalidate the TLB as needed. 1901 */ 1902 *cdst_pte = L2_S_PROTO | phys | 1903 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1904 PTE_SYNC(cdst_pte); 1905 cpu_tlb_flushD_SE(cdstp); 1906 cpu_cpwait(); 1907 1908 for (i = 0, ptr = (int *)cdstp; 1909 i < (NBPG / sizeof(int)); i++) { 1910 if (sched_whichqs != 0) { 1911 /* 1912 * A process has become ready. Abort now, 1913 * so we don't keep it waiting while we 1914 * do slow memory access to finish this 1915 * page. 1916 */ 1917 rv = FALSE; 1918 break; 1919 } 1920 *ptr++ = 0; 1921 } 1922 1923 if (rv) 1924 /* 1925 * if we aborted we'll rezero this page again later so don't 1926 * purge it unless we finished it 1927 */ 1928 cpu_dcache_wbinv_range(cdstp, NBPG); 1929 return (rv); 1930 } 1931 1932 /* 1933 * pmap_copy_page() 1934 * 1935 * Copy one physical page into another, by mapping the pages into 1936 * hook points. The same comment regarding cachability as in 1937 * pmap_zero_page also applies here. 1938 */ 1939 #if ARM_MMU_GENERIC == 1 1940 void 1941 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1942 { 1943 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1944 #ifdef DEBUG 1945 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1946 1947 if (dst_pg->mdpage.pvh_list != NULL) 1948 panic("pmap_copy_page: dst page has mappings"); 1949 #endif 1950 1951 KDASSERT((src & PGOFSET) == 0); 1952 KDASSERT((dst & PGOFSET) == 0); 1953 1954 /* 1955 * Clean the source page. Hold the source page's lock for 1956 * the duration of the copy so that no other mappings can 1957 * be created while we have a potentially aliased mapping. 1958 */ 1959 simple_lock(&src_pg->mdpage.pvh_slock); 1960 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1961 1962 /* 1963 * Map the pages into the page hook points, copy them, and purge 1964 * the cache for the appropriate page. Invalidate the TLB 1965 * as required. 1966 */ 1967 *csrc_pte = L2_S_PROTO | src | 1968 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1969 PTE_SYNC(csrc_pte); 1970 *cdst_pte = L2_S_PROTO | dst | 1971 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1972 PTE_SYNC(cdst_pte); 1973 cpu_tlb_flushD_SE(csrcp); 1974 cpu_tlb_flushD_SE(cdstp); 1975 cpu_cpwait(); 1976 bcopy_page(csrcp, cdstp); 1977 cpu_dcache_inv_range(csrcp, NBPG); 1978 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1979 cpu_dcache_wbinv_range(cdstp, NBPG); 1980 } 1981 #endif /* ARM_MMU_GENERIC == 1 */ 1982 1983 #if ARM_MMU_XSCALE == 1 1984 void 1985 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1986 { 1987 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1988 #ifdef DEBUG 1989 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1990 1991 if (dst_pg->mdpage.pvh_list != NULL) 1992 panic("pmap_copy_page: dst page has mappings"); 1993 #endif 1994 1995 KDASSERT((src & PGOFSET) == 0); 1996 KDASSERT((dst & PGOFSET) == 0); 1997 1998 /* 1999 * Clean the source page. Hold the source page's lock for 2000 * the duration of the copy so that no other mappings can 2001 * be created while we have a potentially aliased mapping. 2002 */ 2003 simple_lock(&src_pg->mdpage.pvh_slock); 2004 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2005 2006 /* 2007 * Map the pages into the page hook points, copy them, and purge 2008 * the cache for the appropriate page. Invalidate the TLB 2009 * as required. 2010 */ 2011 *csrc_pte = L2_S_PROTO | src | 2012 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 2013 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2014 PTE_SYNC(csrc_pte); 2015 *cdst_pte = L2_S_PROTO | dst | 2016 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 2017 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2018 PTE_SYNC(cdst_pte); 2019 cpu_tlb_flushD_SE(csrcp); 2020 cpu_tlb_flushD_SE(cdstp); 2021 cpu_cpwait(); 2022 bcopy_page(csrcp, cdstp); 2023 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2024 xscale_cache_clean_minidata(); 2025 } 2026 #endif /* ARM_MMU_XSCALE == 1 */ 2027 2028 #if 0 2029 void 2030 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 2031 { 2032 pd_entry_t *pde; 2033 paddr_t pa; 2034 struct vm_page *m; 2035 2036 if (pmap == pmap_kernel()) 2037 return; 2038 2039 pde = pmap_pde(pmap, va & PD_FRAME); 2040 pa = pmap_pte_pa(pde); 2041 m = PHYS_TO_VM_PAGE(pa); 2042 m->wire_count++; 2043 #ifdef MYCROFT_HACK 2044 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2045 pmap, va, pde, pa, m, m->wire_count); 2046 #endif 2047 } 2048 2049 void 2050 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2051 { 2052 pd_entry_t *pde; 2053 paddr_t pa; 2054 struct vm_page *m; 2055 2056 if (pmap == pmap_kernel()) 2057 return; 2058 2059 pde = pmap_pde(pmap, va & PD_FRAME); 2060 pa = pmap_pte_pa(pde); 2061 m = PHYS_TO_VM_PAGE(pa); 2062 m->wire_count--; 2063 #ifdef MYCROFT_HACK 2064 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2065 pmap, va, pde, pa, m, m->wire_count); 2066 #endif 2067 if (m->wire_count == 0) { 2068 #ifdef MYCROFT_HACK 2069 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2070 pmap, va, pde, pa, m); 2071 #endif 2072 pmap_unmap_in_l1(pmap, va & PD_FRAME); 2073 uvm_pagefree(m); 2074 --pmap->pm_stats.resident_count; 2075 } 2076 } 2077 #else 2078 #define pmap_pte_addref(pmap, va) 2079 #define pmap_pte_delref(pmap, va) 2080 #endif 2081 2082 /* 2083 * Since we have a virtually indexed cache, we may need to inhibit caching if 2084 * there is more than one mapping and at least one of them is writable. 2085 * Since we purge the cache on every context switch, we only need to check for 2086 * other mappings within the same pmap, or kernel_pmap. 2087 * This function is also called when a page is unmapped, to possibly reenable 2088 * caching on any remaining mappings. 2089 * 2090 * The code implements the following logic, where: 2091 * 2092 * KW = # of kernel read/write pages 2093 * KR = # of kernel read only pages 2094 * UW = # of user read/write pages 2095 * UR = # of user read only pages 2096 * OW = # of user read/write pages in another pmap, then 2097 * 2098 * KC = kernel mapping is cacheable 2099 * UC = user mapping is cacheable 2100 * 2101 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2102 * +--------------------------------------------- 2103 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2104 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2105 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2106 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2107 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2108 * 2109 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2110 */ 2111 __inline static void 2112 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2113 boolean_t clear_cache) 2114 { 2115 if (pmap == pmap_kernel()) 2116 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2117 else 2118 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2119 } 2120 2121 static void 2122 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2123 boolean_t clear_cache) 2124 { 2125 unsigned int user_entries = 0; 2126 unsigned int user_writable = 0; 2127 unsigned int user_cacheable = 0; 2128 unsigned int kernel_entries = 0; 2129 unsigned int kernel_writable = 0; 2130 unsigned int kernel_cacheable = 0; 2131 struct pv_entry *pv; 2132 struct pmap *last_pmap = pmap; 2133 2134 #ifdef DIAGNOSTIC 2135 if (pmap != pmap_kernel()) 2136 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2137 #endif 2138 2139 /* 2140 * Pass one, see if there are both kernel and user pmaps for 2141 * this page. Calculate whether there are user-writable or 2142 * kernel-writable pages. 2143 */ 2144 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2145 if (pv->pv_pmap != pmap) { 2146 user_entries++; 2147 if (pv->pv_flags & PVF_WRITE) 2148 user_writable++; 2149 if ((pv->pv_flags & PVF_NC) == 0) 2150 user_cacheable++; 2151 } else { 2152 kernel_entries++; 2153 if (pv->pv_flags & PVF_WRITE) 2154 kernel_writable++; 2155 if ((pv->pv_flags & PVF_NC) == 0) 2156 kernel_cacheable++; 2157 } 2158 } 2159 2160 /* 2161 * We know we have just been updating a kernel entry, so if 2162 * all user pages are already cacheable, then there is nothing 2163 * further to do. 2164 */ 2165 if (kernel_entries == 0 && 2166 user_cacheable == user_entries) 2167 return; 2168 2169 if (user_entries) { 2170 /* 2171 * Scan over the list again, for each entry, if it 2172 * might not be set correctly, call pmap_vac_me_user 2173 * to recalculate the settings. 2174 */ 2175 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2176 /* 2177 * We know kernel mappings will get set 2178 * correctly in other calls. We also know 2179 * that if the pmap is the same as last_pmap 2180 * then we've just handled this entry. 2181 */ 2182 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2183 continue; 2184 /* 2185 * If there are kernel entries and this page 2186 * is writable but non-cacheable, then we can 2187 * skip this entry also. 2188 */ 2189 if (kernel_entries > 0 && 2190 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2191 (PVF_NC | PVF_WRITE)) 2192 continue; 2193 /* 2194 * Similarly if there are no kernel-writable 2195 * entries and the page is already 2196 * read-only/cacheable. 2197 */ 2198 if (kernel_writable == 0 && 2199 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2200 continue; 2201 /* 2202 * For some of the remaining cases, we know 2203 * that we must recalculate, but for others we 2204 * can't tell if they are correct or not, so 2205 * we recalculate anyway. 2206 */ 2207 pmap_unmap_ptes(last_pmap); 2208 last_pmap = pv->pv_pmap; 2209 ptes = pmap_map_ptes(last_pmap); 2210 pmap_vac_me_user(last_pmap, pg, ptes, 2211 pmap_is_curpmap(last_pmap)); 2212 } 2213 /* Restore the pte mapping that was passed to us. */ 2214 if (last_pmap != pmap) { 2215 pmap_unmap_ptes(last_pmap); 2216 ptes = pmap_map_ptes(pmap); 2217 } 2218 if (kernel_entries == 0) 2219 return; 2220 } 2221 2222 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2223 return; 2224 } 2225 2226 static void 2227 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2228 boolean_t clear_cache) 2229 { 2230 struct pmap *kpmap = pmap_kernel(); 2231 struct pv_entry *pv, *npv; 2232 unsigned int entries = 0; 2233 unsigned int writable = 0; 2234 unsigned int cacheable_entries = 0; 2235 unsigned int kern_cacheable = 0; 2236 unsigned int other_writable = 0; 2237 2238 pv = pg->mdpage.pvh_list; 2239 KASSERT(ptes != NULL); 2240 2241 /* 2242 * Count mappings and writable mappings in this pmap. 2243 * Include kernel mappings as part of our own. 2244 * Keep a pointer to the first one. 2245 */ 2246 for (npv = pv; npv; npv = npv->pv_next) { 2247 /* Count mappings in the same pmap */ 2248 if (pmap == npv->pv_pmap || 2249 kpmap == npv->pv_pmap) { 2250 if (entries++ == 0) 2251 pv = npv; 2252 /* Cacheable mappings */ 2253 if ((npv->pv_flags & PVF_NC) == 0) { 2254 cacheable_entries++; 2255 if (kpmap == npv->pv_pmap) 2256 kern_cacheable++; 2257 } 2258 /* Writable mappings */ 2259 if (npv->pv_flags & PVF_WRITE) 2260 ++writable; 2261 } else if (npv->pv_flags & PVF_WRITE) 2262 other_writable = 1; 2263 } 2264 2265 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2266 "writable %d cacheable %d %s\n", pmap, entries, writable, 2267 cacheable_entries, clear_cache ? "clean" : "no clean")); 2268 2269 /* 2270 * Enable or disable caching as necessary. 2271 * Note: the first entry might be part of the kernel pmap, 2272 * so we can't assume this is indicative of the state of the 2273 * other (maybe non-kpmap) entries. 2274 */ 2275 if ((entries > 1 && writable) || 2276 (entries > 0 && pmap == kpmap && other_writable)) { 2277 if (cacheable_entries == 0) 2278 return; 2279 for (npv = pv; npv; npv = npv->pv_next) { 2280 if ((pmap == npv->pv_pmap 2281 || kpmap == npv->pv_pmap) && 2282 (npv->pv_flags & PVF_NC) == 0) { 2283 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2284 PTE_SYNC_CURRENT(pmap, 2285 &ptes[arm_btop(npv->pv_va)]); 2286 npv->pv_flags |= PVF_NC; 2287 /* 2288 * If this page needs flushing from the 2289 * cache, and we aren't going to do it 2290 * below, do it now. 2291 */ 2292 if ((cacheable_entries < 4 && 2293 (clear_cache || npv->pv_pmap == kpmap)) || 2294 (npv->pv_pmap == kpmap && 2295 !clear_cache && kern_cacheable < 4)) { 2296 cpu_idcache_wbinv_range(npv->pv_va, 2297 NBPG); 2298 cpu_tlb_flushID_SE(npv->pv_va); 2299 } 2300 } 2301 } 2302 if ((clear_cache && cacheable_entries >= 4) || 2303 kern_cacheable >= 4) { 2304 cpu_idcache_wbinv_all(); 2305 cpu_tlb_flushID(); 2306 } 2307 cpu_cpwait(); 2308 } else if (entries > cacheable_entries) { 2309 /* 2310 * Turn cacheing back on for some pages. If it is a kernel 2311 * page, only do so if there are no other writable pages. 2312 */ 2313 for (npv = pv; npv; npv = npv->pv_next) { 2314 if ((pmap == npv->pv_pmap || 2315 (kpmap == npv->pv_pmap && other_writable == 0)) && 2316 (npv->pv_flags & PVF_NC)) { 2317 ptes[arm_btop(npv->pv_va)] |= 2318 pte_l2_s_cache_mode; 2319 PTE_SYNC_CURRENT(pmap, 2320 &ptes[arm_btop(npv->pv_va)]); 2321 npv->pv_flags &= ~PVF_NC; 2322 } 2323 } 2324 } 2325 } 2326 2327 /* 2328 * pmap_remove() 2329 * 2330 * pmap_remove is responsible for nuking a number of mappings for a range 2331 * of virtual address space in the current pmap. To do this efficiently 2332 * is interesting, because in a number of cases a wide virtual address 2333 * range may be supplied that contains few actual mappings. So, the 2334 * optimisations are: 2335 * 1. Try and skip over hunks of address space for which an L1 entry 2336 * does not exist. 2337 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2338 * maybe do just a partial cache clean. This path of execution is 2339 * complicated by the fact that the cache must be flushed _before_ 2340 * the PTE is nuked, being a VAC :-) 2341 * 3. Maybe later fast-case a single page, but I don't think this is 2342 * going to make _that_ much difference overall. 2343 */ 2344 2345 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2346 2347 void 2348 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2349 { 2350 unsigned int cleanlist_idx = 0; 2351 struct pagelist { 2352 vaddr_t va; 2353 pt_entry_t *pte; 2354 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2355 pt_entry_t *pte = 0, *ptes; 2356 paddr_t pa; 2357 int pmap_active; 2358 struct vm_page *pg; 2359 struct pv_entry *pv_tofree = NULL; 2360 2361 /* Exit quick if there is no pmap */ 2362 if (!pmap) 2363 return; 2364 2365 NPDEBUG(PDB_REMOVE, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2366 pmap, sva, eva)); 2367 2368 /* 2369 * we lock in the pmap => vm_page direction 2370 */ 2371 PMAP_MAP_TO_HEAD_LOCK(); 2372 2373 ptes = pmap_map_ptes(pmap); 2374 /* Get a page table pointer */ 2375 while (sva < eva) { 2376 if (pmap_pde_page(pmap_pde(pmap, sva))) 2377 break; 2378 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2379 } 2380 2381 pte = &ptes[arm_btop(sva)]; 2382 /* Note if the pmap is active thus require cache and tlb cleans */ 2383 pmap_active = pmap_is_curpmap(pmap); 2384 2385 /* Now loop along */ 2386 while (sva < eva) { 2387 /* Check if we can move to the next PDE (l1 chunk) */ 2388 if ((sva & L2_ADDR_BITS) == 0) { 2389 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2390 sva += L1_S_SIZE; 2391 pte += arm_btop(L1_S_SIZE); 2392 continue; 2393 } 2394 } 2395 2396 /* We've found a valid PTE, so this page of PTEs has to go. */ 2397 if (pmap_pte_v(pte)) { 2398 /* Update statistics */ 2399 --pmap->pm_stats.resident_count; 2400 2401 /* 2402 * Add this page to our cache remove list, if we can. 2403 * If, however the cache remove list is totally full, 2404 * then do a complete cache invalidation taking note 2405 * to backtrack the PTE table beforehand, and ignore 2406 * the lists in future because there's no longer any 2407 * point in bothering with them (we've paid the 2408 * penalty, so will carry on unhindered). Otherwise, 2409 * when we fall out, we just clean the list. 2410 */ 2411 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2412 pa = pmap_pte_pa(pte); 2413 2414 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2415 /* Add to the clean list. */ 2416 cleanlist[cleanlist_idx].pte = pte; 2417 cleanlist[cleanlist_idx].va = sva; 2418 cleanlist_idx++; 2419 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2420 unsigned int cnt; 2421 2422 /* Nuke everything if needed. */ 2423 if (pmap_active) { 2424 cpu_idcache_wbinv_all(); 2425 cpu_tlb_flushID(); 2426 } 2427 2428 /* 2429 * Roll back the previous PTE list, 2430 * and zero out the current PTE. 2431 */ 2432 for (cnt = 0; 2433 cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; 2434 cnt++) { 2435 *cleanlist[cnt].pte = 0; 2436 if (pmap_active) 2437 PTE_SYNC(cleanlist[cnt].pte); 2438 else 2439 PTE_FLUSH(cleanlist[cnt].pte); 2440 pmap_pte_delref(pmap, 2441 cleanlist[cnt].va); 2442 } 2443 *pte = 0; 2444 if (pmap_active) 2445 PTE_SYNC(pte); 2446 else 2447 PTE_FLUSH(pte); 2448 pmap_pte_delref(pmap, sva); 2449 cleanlist_idx++; 2450 } else { 2451 /* 2452 * We've already nuked the cache and 2453 * TLB, so just carry on regardless, 2454 * and we won't need to do it again 2455 */ 2456 *pte = 0; 2457 if (pmap_active) 2458 PTE_SYNC(pte); 2459 else 2460 PTE_FLUSH(pte); 2461 pmap_pte_delref(pmap, sva); 2462 } 2463 2464 /* 2465 * Update flags. In a number of circumstances, 2466 * we could cluster a lot of these and do a 2467 * number of sequential pages in one go. 2468 */ 2469 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2470 struct pv_entry *pve; 2471 simple_lock(&pg->mdpage.pvh_slock); 2472 pve = pmap_remove_pv(pg, pmap, sva); 2473 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2474 simple_unlock(&pg->mdpage.pvh_slock); 2475 if (pve != NULL) { 2476 pve->pv_next = pv_tofree; 2477 pv_tofree = pve; 2478 } 2479 } 2480 } else if (pmap_active == 0) 2481 PTE_FLUSH(pte); 2482 sva += NBPG; 2483 pte++; 2484 } 2485 2486 /* 2487 * Now, if we've fallen through down to here, chances are that there 2488 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2489 */ 2490 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2491 u_int cnt; 2492 2493 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2494 if (pmap_active) { 2495 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2496 NBPG); 2497 *cleanlist[cnt].pte = 0; 2498 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2499 PTE_SYNC(cleanlist[cnt].pte); 2500 } else { 2501 *cleanlist[cnt].pte = 0; 2502 PTE_FLUSH(cleanlist[cnt].pte); 2503 } 2504 pmap_pte_delref(pmap, cleanlist[cnt].va); 2505 } 2506 } 2507 2508 /* Delete pv entries */ 2509 if (pv_tofree != NULL) 2510 pmap_free_pvs(pmap, pv_tofree); 2511 2512 pmap_unmap_ptes(pmap); 2513 2514 PMAP_MAP_TO_HEAD_UNLOCK(); 2515 } 2516 2517 /* 2518 * Routine: pmap_page_remove 2519 * Function: 2520 * Removes this physical page from 2521 * all physical maps in which it resides. 2522 * Reflects back modify bits to the pager. 2523 */ 2524 2525 static void 2526 pmap_page_remove(struct vm_page *pg) 2527 { 2528 struct pv_entry *pv, *npv; 2529 struct pmap *pmap; 2530 pt_entry_t *pte, *ptes; 2531 2532 PDEBUG(0, printf("pmap_page_remove: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2533 2534 /* set vm_page => pmap locking */ 2535 PMAP_HEAD_TO_MAP_LOCK(); 2536 2537 simple_lock(&pg->mdpage.pvh_slock); 2538 2539 pv = pg->mdpage.pvh_list; 2540 if (pv == NULL) { 2541 PDEBUG(0, printf("free page\n")); 2542 simple_unlock(&pg->mdpage.pvh_slock); 2543 PMAP_HEAD_TO_MAP_UNLOCK(); 2544 return; 2545 } 2546 pmap_clean_page(pv, FALSE); 2547 2548 while (pv) { 2549 pmap = pv->pv_pmap; 2550 ptes = pmap_map_ptes(pmap); 2551 pte = &ptes[arm_btop(pv->pv_va)]; 2552 2553 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2554 pv->pv_va, pv->pv_flags)); 2555 #ifdef DEBUG 2556 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2557 pmap_pte_v(pte) == 0 || 2558 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2559 panic("pmap_page_remove: bad mapping"); 2560 #endif /* DEBUG */ 2561 2562 /* 2563 * Update statistics 2564 */ 2565 --pmap->pm_stats.resident_count; 2566 2567 /* Wired bit */ 2568 if (pv->pv_flags & PVF_WIRED) 2569 --pmap->pm_stats.wired_count; 2570 2571 /* 2572 * Invalidate the PTEs. 2573 * XXX: should cluster them up and invalidate as many 2574 * as possible at once. 2575 */ 2576 2577 #ifdef needednotdone 2578 reduce wiring count on page table pages as references drop 2579 #endif 2580 2581 *pte = 0; 2582 PTE_SYNC_CURRENT(pmap, pte); 2583 pmap_pte_delref(pmap, pv->pv_va); 2584 2585 npv = pv->pv_next; 2586 pmap_free_pv(pmap, pv); 2587 pv = npv; 2588 pmap_unmap_ptes(pmap); 2589 } 2590 pg->mdpage.pvh_list = NULL; 2591 simple_unlock(&pg->mdpage.pvh_slock); 2592 PMAP_HEAD_TO_MAP_UNLOCK(); 2593 2594 PDEBUG(0, printf("done\n")); 2595 cpu_tlb_flushID(); 2596 cpu_cpwait(); 2597 } 2598 2599 2600 /* 2601 * Set the physical protection on the specified range of this map as requested. 2602 */ 2603 2604 void 2605 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2606 { 2607 pt_entry_t *pte = NULL, *ptes; 2608 struct vm_page *pg; 2609 boolean_t flush = FALSE; 2610 2611 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2612 pmap, sva, eva, prot)); 2613 2614 if (~prot & VM_PROT_READ) { 2615 /* 2616 * Just remove the mappings. pmap_update() is not required 2617 * here since the caller should do it. 2618 */ 2619 pmap_remove(pmap, sva, eva); 2620 return; 2621 } 2622 if (prot & VM_PROT_WRITE) { 2623 /* 2624 * If this is a read->write transition, just ignore it and let 2625 * uvm_fault() take care of it later. 2626 */ 2627 return; 2628 } 2629 2630 /* Need to lock map->head */ 2631 PMAP_MAP_TO_HEAD_LOCK(); 2632 2633 ptes = pmap_map_ptes(pmap); 2634 2635 /* 2636 * OK, at this point, we know we're doing write-protect operation. 2637 * If the pmap is active, write-back the range. 2638 */ 2639 if (pmap_is_curpmap(pmap)) 2640 cpu_dcache_wb_range(sva, eva - sva); 2641 2642 /* 2643 * We need to acquire a pointer to a page table page before entering 2644 * the following loop. 2645 */ 2646 while (sva < eva) { 2647 if (pmap_pde_page(pmap_pde(pmap, sva))) 2648 break; 2649 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2650 } 2651 2652 pte = &ptes[arm_btop(sva)]; 2653 2654 while (sva < eva) { 2655 /* only check once in a while */ 2656 if ((sva & L2_ADDR_BITS) == 0) { 2657 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2658 /* We can race ahead here, to the next pde. */ 2659 sva += L1_S_SIZE; 2660 pte += arm_btop(L1_S_SIZE); 2661 continue; 2662 } 2663 } 2664 2665 if (!pmap_pte_v(pte)) { 2666 PTE_FLUSH_ALT(pmap, pte); 2667 goto next; 2668 } 2669 2670 flush = TRUE; 2671 2672 pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte)); 2673 2674 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2675 PTE_SYNC_CURRENT(pmap, pte); /* XXXJRT optimize */ 2676 2677 /* Clear write flag */ 2678 if (pg != NULL) { 2679 simple_lock(&pg->mdpage.pvh_slock); 2680 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2681 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2682 simple_unlock(&pg->mdpage.pvh_slock); 2683 } 2684 2685 next: 2686 sva += NBPG; 2687 pte++; 2688 } 2689 pmap_unmap_ptes(pmap); 2690 PMAP_MAP_TO_HEAD_UNLOCK(); 2691 if (flush) 2692 cpu_tlb_flushID(); 2693 } 2694 2695 /* 2696 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2697 * int flags) 2698 * 2699 * Insert the given physical page (p) at 2700 * the specified virtual address (v) in the 2701 * target physical map with the protection requested. 2702 * 2703 * If specified, the page will be wired down, meaning 2704 * that the related pte can not be reclaimed. 2705 * 2706 * NB: This is the only routine which MAY NOT lazy-evaluate 2707 * or lose information. That is, this routine must actually 2708 * insert this page into the given map NOW. 2709 */ 2710 2711 int 2712 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2713 int flags) 2714 { 2715 pt_entry_t *ptes, opte, npte; 2716 paddr_t opa; 2717 boolean_t wired = (flags & PMAP_WIRED) != 0; 2718 struct vm_page *pg; 2719 struct pv_entry *pve; 2720 int error; 2721 unsigned int nflags; 2722 struct vm_page *ptp = NULL; 2723 2724 NPDEBUG(PDB_ENTER, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, flags=%08x, wired = %d\n", 2725 va, pa, pmap, prot, flags, wired)); 2726 2727 KDASSERT((flags & PMAP_WIRED) == 0 || (flags & VM_PROT_ALL) != 0); 2728 2729 #ifdef DIAGNOSTIC 2730 /* Valid address ? */ 2731 if (va >= (pmap_curmaxkvaddr)) 2732 panic("pmap_enter: too big"); 2733 if (pmap != pmap_kernel() && va != 0) { 2734 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2735 panic("pmap_enter: kernel page in user map"); 2736 } else { 2737 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2738 panic("pmap_enter: user page in kernel map"); 2739 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2740 panic("pmap_enter: entering PT page"); 2741 } 2742 #endif 2743 2744 KDASSERT(((va | pa) & PGOFSET) == 0); 2745 2746 /* 2747 * Get a pointer to the page. Later on in this function, we 2748 * test for a managed page by checking pg != NULL. 2749 */ 2750 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2751 2752 /* get lock */ 2753 PMAP_MAP_TO_HEAD_LOCK(); 2754 2755 /* 2756 * map the ptes. If there's not already an L2 table for this 2757 * address, allocate one. 2758 */ 2759 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2760 /* kernel should be pre-grown */ 2761 if (pmap != pmap_kernel()) 2762 { 2763 /* if failure is allowed then don't try too hard */ 2764 ptp = pmap_get_ptp(pmap, va & PD_FRAME); 2765 if (ptp == NULL) { 2766 if (flags & PMAP_CANFAIL) { 2767 error = ENOMEM; 2768 goto out; 2769 } 2770 panic("pmap_enter: get ptp failed"); 2771 } 2772 } 2773 opte = ptes[arm_btop(va)]; 2774 2775 nflags = 0; 2776 if (prot & VM_PROT_WRITE) 2777 nflags |= PVF_WRITE; 2778 if (wired) 2779 nflags |= PVF_WIRED; 2780 2781 /* Is the pte valid ? If so then this page is already mapped */ 2782 if (l2pte_valid(opte)) { 2783 /* Get the physical address of the current page mapped */ 2784 opa = l2pte_pa(opte); 2785 2786 /* Are we mapping the same page ? */ 2787 if (opa == pa) { 2788 /* Check to see if we're doing rw->ro. */ 2789 if ((opte & L2_S_PROT_W) != 0 && 2790 (prot & VM_PROT_WRITE) == 0) { 2791 /* Yup, flush the cache if current pmap. */ 2792 if (pmap_is_curpmap(pmap)) 2793 cpu_dcache_wb_range(va, NBPG); 2794 } 2795 2796 /* Has the wiring changed ? */ 2797 if (pg != NULL) { 2798 simple_lock(&pg->mdpage.pvh_slock); 2799 (void) pmap_modify_pv(pmap, va, pg, 2800 PVF_WRITE | PVF_WIRED, nflags); 2801 simple_unlock(&pg->mdpage.pvh_slock); 2802 } 2803 } else { 2804 struct vm_page *opg; 2805 2806 /* We are replacing the page with a new one. */ 2807 cpu_idcache_wbinv_range(va, NBPG); 2808 2809 /* 2810 * If it is part of our managed memory then we 2811 * must remove it from the PV list 2812 */ 2813 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2814 simple_lock(&opg->mdpage.pvh_slock); 2815 pve = pmap_remove_pv(opg, pmap, va); 2816 simple_unlock(&opg->mdpage.pvh_slock); 2817 } else { 2818 pve = NULL; 2819 } 2820 2821 goto enter; 2822 } 2823 } else { 2824 opa = 0; 2825 pve = NULL; 2826 2827 /* bump ptp ref */ 2828 if (ptp != NULL) 2829 ptp->wire_count++; 2830 2831 /* pte is not valid so we must be hooking in a new page */ 2832 ++pmap->pm_stats.resident_count; 2833 2834 enter: 2835 /* 2836 * Enter on the PV list if part of our managed memory 2837 */ 2838 if (pg != NULL) { 2839 if (pve == NULL) { 2840 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2841 if (pve == NULL) { 2842 if (flags & PMAP_CANFAIL) { 2843 PTE_FLUSH_ALT(pmap, 2844 ptes[arm_btop(va)]); 2845 error = ENOMEM; 2846 goto out; 2847 } 2848 panic("pmap_enter: no pv entries " 2849 "available"); 2850 } 2851 } 2852 /* enter_pv locks pvh when adding */ 2853 pmap_enter_pv(pg, pve, pmap, va, ptp, nflags); 2854 } else { 2855 if (pve != NULL) 2856 pmap_free_pv(pmap, pve); 2857 } 2858 } 2859 2860 /* Construct the pte, giving the correct access. */ 2861 npte = pa; 2862 2863 /* VA 0 is magic. */ 2864 if (pmap != pmap_kernel() && va != vector_page) 2865 npte |= L2_S_PROT_U; 2866 2867 if (pg != NULL) { 2868 #ifdef DIAGNOSTIC 2869 if ((flags & VM_PROT_ALL) & ~prot) 2870 panic("pmap_enter: access_type exceeds prot"); 2871 #endif 2872 npte |= pte_l2_s_cache_mode; 2873 if (flags & VM_PROT_WRITE) { 2874 npte |= L2_S_PROTO | L2_S_PROT_W; 2875 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2876 } else if (flags & VM_PROT_ALL) { 2877 npte |= L2_S_PROTO; 2878 pg->mdpage.pvh_attrs |= PVF_REF; 2879 } else 2880 npte |= L2_TYPE_INV; 2881 } else { 2882 if (prot & VM_PROT_WRITE) 2883 npte |= L2_S_PROTO | L2_S_PROT_W; 2884 else if (prot & VM_PROT_ALL) 2885 npte |= L2_S_PROTO; 2886 else 2887 npte |= L2_TYPE_INV; 2888 } 2889 2890 #if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE) 2891 #if ARM_NMMUS > 1 2892 # error "XXX Unable to use read/write-allocate and configure non-XScale" 2893 #endif 2894 /* 2895 * XXX BRUTAL HACK! This allows us to limp along with 2896 * XXX the read/write-allocate cache mode. 2897 */ 2898 if (pmap == pmap_kernel()) 2899 npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X); 2900 #endif 2901 ptes[arm_btop(va)] = npte; 2902 PTE_SYNC_CURRENT(pmap, &ptes[arm_btop(va)]); 2903 2904 if (pg != NULL) { 2905 simple_lock(&pg->mdpage.pvh_slock); 2906 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2907 simple_unlock(&pg->mdpage.pvh_slock); 2908 } 2909 2910 /* Better flush the TLB ... */ 2911 cpu_tlb_flushID_SE(va); 2912 error = 0; 2913 out: 2914 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2915 PMAP_MAP_TO_HEAD_UNLOCK(); 2916 2917 return error; 2918 } 2919 2920 /* 2921 * pmap_kenter_pa: enter a kernel mapping 2922 * 2923 * => no need to lock anything assume va is already allocated 2924 * => should be faster than normal pmap enter function 2925 */ 2926 void 2927 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2928 { 2929 pt_entry_t *pte; 2930 2931 pte = vtopte(va); 2932 KASSERT(!pmap_pte_v(pte)); 2933 2934 #ifdef PMAP_ALIAS_DEBUG 2935 { 2936 struct vm_page *pg; 2937 int s; 2938 2939 pg = PHYS_TO_VM_PAGE(pa); 2940 if (pg != NULL) { 2941 s = splhigh(); 2942 if (pg->mdpage.ro_mappings == 0 && 2943 pg->mdpage.rw_mappings == 0 && 2944 pg->mdpage.kro_mappings == 0 && 2945 pg->mdpage.krw_mappings == 0) { 2946 /* This case is okay. */ 2947 } else if (pg->mdpage.rw_mappings == 0 && 2948 pg->mdpage.krw_mappings == 0 && 2949 (prot & VM_PROT_WRITE) == 0) { 2950 /* This case is okay. */ 2951 } else { 2952 /* Something is awry. */ 2953 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2954 "prot 0x%x\n", pg->mdpage.ro_mappings, 2955 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2956 pg->mdpage.krw_mappings, prot); 2957 Debugger(); 2958 } 2959 if (prot & VM_PROT_WRITE) 2960 pg->mdpage.krw_mappings++; 2961 else 2962 pg->mdpage.kro_mappings++; 2963 splx(s); 2964 } 2965 } 2966 #endif /* PMAP_ALIAS_DEBUG */ 2967 2968 *pte = L2_S_PROTO | pa | 2969 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2970 PTE_SYNC(pte); 2971 } 2972 2973 void 2974 pmap_kremove(vaddr_t va, vsize_t len) 2975 { 2976 pt_entry_t *pte; 2977 vaddr_t ova = va; 2978 vaddr_t olen = len; 2979 2980 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2981 2982 /* 2983 * We assume that we will only be called with small 2984 * regions of memory. 2985 */ 2986 2987 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2988 pte = vtopte(va); 2989 #ifdef PMAP_ALIAS_DEBUG 2990 { 2991 struct vm_page *pg; 2992 int s; 2993 2994 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 2995 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 2996 s = splhigh(); 2997 if (*pte & L2_S_PROT_W) { 2998 KASSERT(pg->mdpage.krw_mappings != 0); 2999 pg->mdpage.krw_mappings--; 3000 } else { 3001 KASSERT(pg->mdpage.kro_mappings != 0); 3002 pg->mdpage.kro_mappings--; 3003 } 3004 splx(s); 3005 } 3006 } 3007 #endif /* PMAP_ALIAS_DEBUG */ 3008 cpu_idcache_wbinv_range(va, PAGE_SIZE); 3009 *pte = 0; 3010 cpu_tlb_flushID_SE(va); 3011 } 3012 PTE_SYNC_RANGE(vtopte(ova), olen >> PAGE_SHIFT); 3013 } 3014 3015 /* 3016 * pmap_page_protect: 3017 * 3018 * Lower the permission for all mappings to a given page. 3019 */ 3020 3021 void 3022 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 3023 { 3024 3025 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 3026 VM_PAGE_TO_PHYS(pg), prot)); 3027 3028 switch(prot) { 3029 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 3030 case VM_PROT_READ|VM_PROT_WRITE: 3031 return; 3032 3033 case VM_PROT_READ: 3034 case VM_PROT_READ|VM_PROT_EXECUTE: 3035 pmap_clearbit(pg, PVF_WRITE); 3036 break; 3037 3038 default: 3039 pmap_page_remove(pg); 3040 break; 3041 } 3042 } 3043 3044 3045 /* 3046 * Routine: pmap_unwire 3047 * Function: Clear the wired attribute for a map/virtual-address 3048 * pair. 3049 * In/out conditions: 3050 * The mapping must already exist in the pmap. 3051 */ 3052 3053 void 3054 pmap_unwire(struct pmap *pmap, vaddr_t va) 3055 { 3056 pt_entry_t *ptes; 3057 struct vm_page *pg; 3058 paddr_t pa; 3059 3060 PMAP_MAP_TO_HEAD_LOCK(); 3061 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3062 3063 if (pmap_pde_v(pmap_pde(pmap, va))) { 3064 #ifdef DIAGNOSTIC 3065 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3066 panic("pmap_unwire: invalid L2 PTE"); 3067 #endif 3068 /* Extract the physical address of the page */ 3069 pa = l2pte_pa(ptes[arm_btop(va)]); 3070 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3071 3072 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3073 goto out; 3074 3075 /* Update the wired bit in the pv entry for this page. */ 3076 simple_lock(&pg->mdpage.pvh_slock); 3077 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 3078 simple_unlock(&pg->mdpage.pvh_slock); 3079 } 3080 #ifdef DIAGNOSTIC 3081 else { 3082 panic("pmap_unwire: invalid L1 PTE"); 3083 } 3084 #endif 3085 out: 3086 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3087 PMAP_MAP_TO_HEAD_UNLOCK(); 3088 } 3089 3090 /* 3091 * Routine: pmap_extract 3092 * Function: 3093 * Extract the physical page address associated 3094 * with the given map/virtual_address pair. 3095 */ 3096 boolean_t 3097 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 3098 { 3099 pd_entry_t *pde; 3100 pt_entry_t *pte, *ptes; 3101 paddr_t pa; 3102 3103 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3104 3105 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3106 3107 pde = pmap_pde(pmap, va); 3108 pte = &ptes[arm_btop(va)]; 3109 3110 if (pmap_pde_section(pde)) { 3111 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3112 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3113 goto out; 3114 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3115 PDEBUG(5, printf("no mapping\n")); 3116 goto failed; 3117 } 3118 3119 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3120 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3121 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3122 goto out; 3123 } 3124 3125 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3126 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3127 3128 out: 3129 if (pap != NULL) 3130 *pap = pa; 3131 3132 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3133 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3134 return (TRUE); 3135 3136 failed: 3137 PTE_FLUSH_ALT(pmap, &ptes[arm_btop(va)]); 3138 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3139 return (FALSE); 3140 } 3141 3142 3143 /* 3144 * pmap_copy: 3145 * 3146 * Copy the range specified by src_addr/len from the source map to the 3147 * range dst_addr/len in the destination map. 3148 * 3149 * This routine is only advisory and need not do anything. 3150 */ 3151 /* Call deleted in <arm/arm32/pmap.h> */ 3152 3153 #if defined(PMAP_DEBUG) 3154 void 3155 pmap_dump_pvlist(phys, m) 3156 vaddr_t phys; 3157 char *m; 3158 { 3159 struct vm_page *pg; 3160 struct pv_entry *pv; 3161 3162 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3163 printf("INVALID PA\n"); 3164 return; 3165 } 3166 simple_lock(&pg->mdpage.pvh_slock); 3167 printf("%s %08lx:", m, phys); 3168 if (pg->mdpage.pvh_list == NULL) { 3169 simple_unlock(&pg->mdpage.pvh_slock); 3170 printf(" no mappings\n"); 3171 return; 3172 } 3173 3174 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3175 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3176 pv->pv_va, pv->pv_flags); 3177 3178 printf("\n"); 3179 simple_unlock(&pg->mdpage.pvh_slock); 3180 } 3181 3182 #endif /* PMAP_DEBUG */ 3183 3184 static pt_entry_t * 3185 pmap_map_ptes(struct pmap *pmap) 3186 { 3187 struct proc *p; 3188 3189 /* the kernel's pmap is always accessible */ 3190 if (pmap == pmap_kernel()) { 3191 return (pt_entry_t *)PTE_BASE; 3192 } 3193 3194 if (pmap_is_curpmap(pmap)) { 3195 simple_lock(&pmap->pm_obj.vmobjlock); 3196 return (pt_entry_t *)PTE_BASE; 3197 } 3198 3199 p = curproc; 3200 KDASSERT(p != NULL); 3201 3202 /* need to lock both curpmap and pmap: use ordered locking */ 3203 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3204 simple_lock(&pmap->pm_obj.vmobjlock); 3205 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3206 } else { 3207 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3208 simple_lock(&pmap->pm_obj.vmobjlock); 3209 } 3210 3211 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, 3212 pmap->pm_pptpt, 0); 3213 cpu_tlb_flushD(); 3214 cpu_cpwait(); 3215 return (pt_entry_t *)APTE_BASE; 3216 } 3217 3218 /* 3219 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3220 */ 3221 3222 static void 3223 pmap_unmap_ptes(struct pmap *pmap) 3224 { 3225 3226 if (pmap == pmap_kernel()) { 3227 return; 3228 } 3229 if (pmap_is_curpmap(pmap)) { 3230 simple_unlock(&pmap->pm_obj.vmobjlock); 3231 } else { 3232 KDASSERT(curproc != NULL); 3233 simple_unlock(&pmap->pm_obj.vmobjlock); 3234 simple_unlock( 3235 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3236 } 3237 } 3238 3239 /* 3240 * Modify pte bits for all ptes corresponding to the given physical address. 3241 * We use `maskbits' rather than `clearbits' because we're always passing 3242 * constants and the latter would require an extra inversion at run-time. 3243 */ 3244 3245 static void 3246 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3247 { 3248 struct pv_entry *pv; 3249 pt_entry_t *ptes, npte, opte; 3250 vaddr_t va; 3251 3252 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3253 VM_PAGE_TO_PHYS(pg), maskbits)); 3254 3255 PMAP_HEAD_TO_MAP_LOCK(); 3256 simple_lock(&pg->mdpage.pvh_slock); 3257 3258 /* 3259 * Clear saved attributes (modify, reference) 3260 */ 3261 pg->mdpage.pvh_attrs &= ~maskbits; 3262 3263 if (pg->mdpage.pvh_list == NULL) { 3264 simple_unlock(&pg->mdpage.pvh_slock); 3265 PMAP_HEAD_TO_MAP_UNLOCK(); 3266 return; 3267 } 3268 3269 /* 3270 * Loop over all current mappings setting/clearing as appropos 3271 */ 3272 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3273 #ifdef PMAP_ALIAS_DEBUG 3274 { 3275 int s = splhigh(); 3276 if ((maskbits & PVF_WRITE) != 0 && 3277 (pv->pv_flags & PVF_WRITE) != 0) { 3278 KASSERT(pg->mdpage.rw_mappings != 0); 3279 pg->mdpage.rw_mappings--; 3280 pg->mdpage.ro_mappings++; 3281 } 3282 splx(s); 3283 } 3284 #endif /* PMAP_ALIAS_DEBUG */ 3285 va = pv->pv_va; 3286 pv->pv_flags &= ~maskbits; 3287 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3288 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3289 npte = opte = ptes[arm_btop(va)]; 3290 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3291 if ((pv->pv_flags & PVF_NC)) { 3292 /* 3293 * Entry is not cacheable: reenable 3294 * the cache, nothing to flush 3295 * 3296 * Don't turn caching on again if this 3297 * is a modified emulation. This 3298 * would be inconsitent with the 3299 * settings created by 3300 * pmap_vac_me_harder(). 3301 * 3302 * There's no need to call 3303 * pmap_vac_me_harder() here: all 3304 * pages are loosing their write 3305 * permission. 3306 * 3307 */ 3308 if (maskbits & PVF_WRITE) { 3309 npte |= pte_l2_s_cache_mode; 3310 pv->pv_flags &= ~PVF_NC; 3311 } 3312 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3313 /* 3314 * Entry is cacheable: check if pmap is 3315 * current if it is flush it, 3316 * otherwise it won't be in the cache 3317 */ 3318 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3319 } 3320 3321 /* make the pte read only */ 3322 npte &= ~L2_S_PROT_W; 3323 } 3324 3325 if (maskbits & PVF_REF) { 3326 if (pmap_is_curpmap(pv->pv_pmap) && 3327 (pv->pv_flags & PVF_NC) == 0) { 3328 /* 3329 * Check npte here; we may have already 3330 * done the wbinv above, and the validity 3331 * of the PTE is the same for opte and 3332 * npte. 3333 */ 3334 if (npte & L2_S_PROT_W) { 3335 cpu_idcache_wbinv_range(pv->pv_va, 3336 NBPG); 3337 } else if ((npte & L2_TYPE_MASK) 3338 != L2_TYPE_INV) { 3339 /* XXXJRT need idcache_inv_range */ 3340 cpu_idcache_wbinv_range(pv->pv_va, 3341 NBPG); 3342 } 3343 } 3344 3345 /* make the pte invalid */ 3346 npte = (npte & ~L2_TYPE_MASK) | L2_TYPE_INV; 3347 } 3348 3349 if (npte != opte) { 3350 ptes[arm_btop(va)] = npte; 3351 PTE_SYNC_CURRENT(pv->pv_pmap, &ptes[arm_btop(va)]); 3352 /* Flush the TLB entry if a current pmap. */ 3353 if (pmap_is_curpmap(pv->pv_pmap)) 3354 cpu_tlb_flushID_SE(pv->pv_va); 3355 } else 3356 PTE_FLUSH_ALT(pv->pv_pmap, &ptes[arm_btop(va)]); 3357 3358 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3359 } 3360 cpu_cpwait(); 3361 3362 simple_unlock(&pg->mdpage.pvh_slock); 3363 PMAP_HEAD_TO_MAP_UNLOCK(); 3364 } 3365 3366 /* 3367 * pmap_clear_modify: 3368 * 3369 * Clear the "modified" attribute for a page. 3370 */ 3371 boolean_t 3372 pmap_clear_modify(struct vm_page *pg) 3373 { 3374 boolean_t rv; 3375 3376 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3377 rv = TRUE; 3378 pmap_clearbit(pg, PVF_MOD); 3379 } else 3380 rv = FALSE; 3381 3382 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3383 VM_PAGE_TO_PHYS(pg), rv)); 3384 3385 return (rv); 3386 } 3387 3388 /* 3389 * pmap_clear_reference: 3390 * 3391 * Clear the "referenced" attribute for a page. 3392 */ 3393 boolean_t 3394 pmap_clear_reference(struct vm_page *pg) 3395 { 3396 boolean_t rv; 3397 3398 if (pg->mdpage.pvh_attrs & PVF_REF) { 3399 rv = TRUE; 3400 pmap_clearbit(pg, PVF_REF); 3401 } else 3402 rv = FALSE; 3403 3404 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3405 VM_PAGE_TO_PHYS(pg), rv)); 3406 3407 return (rv); 3408 } 3409 3410 /* 3411 * pmap_is_modified: 3412 * 3413 * Test if a page has the "modified" attribute. 3414 */ 3415 /* See <arm/arm32/pmap.h> */ 3416 3417 /* 3418 * pmap_is_referenced: 3419 * 3420 * Test if a page has the "referenced" attribute. 3421 */ 3422 /* See <arm/arm32/pmap.h> */ 3423 3424 int 3425 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3426 { 3427 pt_entry_t *ptes; 3428 struct vm_page *pg; 3429 paddr_t pa; 3430 u_int flags; 3431 int rv = 0; 3432 3433 PDEBUG(2, printf("pmap_modified_emulation\n")); 3434 3435 PMAP_MAP_TO_HEAD_LOCK(); 3436 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3437 3438 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3439 PDEBUG(2, printf("L1 PTE invalid\n")); 3440 goto out; 3441 } 3442 3443 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3444 3445 /* 3446 * Don't need to PTE_FLUSH_ALT() here; this is always done 3447 * with the current pmap. 3448 */ 3449 3450 /* Check for a invalid pte */ 3451 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3452 goto out; 3453 3454 /* This can happen if user code tries to access kernel memory. */ 3455 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3456 goto out; 3457 3458 /* Extract the physical address of the page */ 3459 pa = l2pte_pa(ptes[arm_btop(va)]); 3460 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3461 goto out; 3462 3463 /* Get the current flags for this page. */ 3464 simple_lock(&pg->mdpage.pvh_slock); 3465 3466 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3467 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3468 3469 /* 3470 * Do the flags say this page is writable ? If not then it is a 3471 * genuine write fault. If yes then the write fault is our fault 3472 * as we did not reflect the write access in the PTE. Now we know 3473 * a write has occurred we can correct this and also set the 3474 * modified bit 3475 */ 3476 if (~flags & PVF_WRITE) { 3477 simple_unlock(&pg->mdpage.pvh_slock); 3478 goto out; 3479 } 3480 3481 PDEBUG(0, 3482 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3483 va, ptes[arm_btop(va)])); 3484 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3485 3486 /* 3487 * Re-enable write permissions for the page. No need to call 3488 * pmap_vac_me_harder(), since this is just a 3489 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3490 * We've already set the cacheable bits based on the assumption 3491 * that we can write to this page. 3492 */ 3493 ptes[arm_btop(va)] = 3494 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3495 PTE_SYNC(&ptes[arm_btop(va)]); 3496 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3497 3498 simple_unlock(&pg->mdpage.pvh_slock); 3499 3500 cpu_tlb_flushID_SE(va); 3501 cpu_cpwait(); 3502 rv = 1; 3503 out: 3504 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3505 PMAP_MAP_TO_HEAD_UNLOCK(); 3506 return (rv); 3507 } 3508 3509 int 3510 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3511 { 3512 pt_entry_t *ptes; 3513 struct vm_page *pg; 3514 paddr_t pa; 3515 int rv = 0; 3516 3517 PDEBUG(2, printf("pmap_handled_emulation\n")); 3518 3519 PMAP_MAP_TO_HEAD_LOCK(); 3520 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3521 3522 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3523 PDEBUG(2, printf("L1 PTE invalid\n")); 3524 goto out; 3525 } 3526 3527 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3528 3529 /* 3530 * Don't need to PTE_FLUSH_ALT() here; this is always done 3531 * with the current pmap. 3532 */ 3533 3534 /* Check for invalid pte */ 3535 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3536 goto out; 3537 3538 /* This can happen if user code tries to access kernel memory. */ 3539 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3540 goto out; 3541 3542 /* Extract the physical address of the page */ 3543 pa = l2pte_pa(ptes[arm_btop(va)]); 3544 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3545 goto out; 3546 3547 simple_lock(&pg->mdpage.pvh_slock); 3548 3549 /* 3550 * Ok we just enable the pte and mark the attibs as handled 3551 * XXX Should we traverse the PV list and enable all PTEs? 3552 */ 3553 PDEBUG(0, 3554 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3555 va, ptes[arm_btop(va)])); 3556 pg->mdpage.pvh_attrs |= PVF_REF; 3557 3558 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3559 PTE_SYNC(&ptes[arm_btop(va)]); 3560 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3561 3562 simple_unlock(&pg->mdpage.pvh_slock); 3563 3564 cpu_tlb_flushID_SE(va); 3565 cpu_cpwait(); 3566 rv = 1; 3567 out: 3568 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3569 PMAP_MAP_TO_HEAD_UNLOCK(); 3570 return (rv); 3571 } 3572 3573 /* 3574 * pmap_collect: free resources held by a pmap 3575 * 3576 * => optional function. 3577 * => called when a process is swapped out to free memory. 3578 */ 3579 3580 void 3581 pmap_collect(struct pmap *pmap) 3582 { 3583 } 3584 3585 /* 3586 * Routine: pmap_procwr 3587 * 3588 * Function: 3589 * Synchronize caches corresponding to [addr, addr+len) in p. 3590 * 3591 */ 3592 void 3593 pmap_procwr(struct proc *p, vaddr_t va, int len) 3594 { 3595 /* We only need to do anything if it is the current process. */ 3596 if (p == curproc) 3597 cpu_icache_sync_range(va, len); 3598 } 3599 /* 3600 * PTP functions 3601 */ 3602 3603 /* 3604 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3605 * 3606 * => pmap should NOT be pmap_kernel() 3607 * => pmap should be locked 3608 */ 3609 3610 static struct vm_page * 3611 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3612 { 3613 struct vm_page *ptp; 3614 pd_entry_t *pde; 3615 3616 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3617 3618 pde = pmap_pde(pmap, va); 3619 if (pmap_pde_v(pde)) { 3620 /* valid... check hint (saves us a PA->PG lookup) */ 3621 if (pmap->pm_ptphint && 3622 ((*pde) & L2_S_FRAME) == 3623 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3624 return (pmap->pm_ptphint); 3625 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3626 #ifdef DIAGNOSTIC 3627 if (ptp == NULL) 3628 panic("pmap_get_ptp: unmanaged user PTP"); 3629 #endif 3630 pmap->pm_ptphint = ptp; 3631 return(ptp); 3632 } 3633 3634 /* allocate a new PTP (updates ptphint) */ 3635 return (pmap_alloc_ptp(pmap, va)); 3636 } 3637 3638 /* 3639 * pmap_alloc_ptp: allocate a PTP for a PMAP 3640 * 3641 * => pmap should already be locked by caller 3642 * => we use the ptp's wire_count to count the number of active mappings 3643 * in the PTP (we start it at one to prevent any chance this PTP 3644 * will ever leak onto the active/inactive queues) 3645 */ 3646 3647 /*__inline */ static struct vm_page * 3648 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3649 { 3650 struct vm_page *ptp; 3651 3652 KASSERT((va & PD_OFFSET) == 0); /* XXX KDASSERT */ 3653 3654 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3655 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3656 if (ptp == NULL) 3657 return (NULL); 3658 3659 /* got one! */ 3660 ptp->flags &= ~PG_BUSY; /* never busy */ 3661 ptp->wire_count = 1; /* no mappings yet */ 3662 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), 3663 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3664 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3665 pmap->pm_ptphint = ptp; 3666 return (ptp); 3667 } 3668 3669 vaddr_t 3670 pmap_growkernel(vaddr_t maxkvaddr) 3671 { 3672 struct pmap *kpm = pmap_kernel(), *pm; 3673 int s; 3674 paddr_t ptaddr; 3675 struct vm_page *ptp; 3676 3677 if (maxkvaddr <= pmap_curmaxkvaddr) 3678 goto out; /* we are OK */ 3679 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3680 pmap_curmaxkvaddr, maxkvaddr)); 3681 3682 /* 3683 * whoops! we need to add kernel PTPs 3684 */ 3685 3686 s = splhigh(); /* to be safe */ 3687 simple_lock(&kpm->pm_obj.vmobjlock); 3688 /* due to the way the arm pmap works we map 4MB at a time */ 3689 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3690 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3691 3692 if (uvm.page_init_done == FALSE) { 3693 3694 /* 3695 * we're growing the kernel pmap early (from 3696 * uvm_pageboot_alloc()). this case must be 3697 * handled a little differently. 3698 */ 3699 3700 if (uvm_page_physget(&ptaddr) == FALSE) 3701 panic("pmap_growkernel: out of memory"); 3702 pmap_zero_page(ptaddr); 3703 3704 /* map this page in */ 3705 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, 3706 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3707 3708 /* count PTP as resident */ 3709 kpm->pm_stats.resident_count++; 3710 continue; 3711 } 3712 3713 /* 3714 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3715 * pmap_initialized == FALSE CASE! WE MAY BE 3716 * INVOKED WHILE pmap_init() IS RUNNING! 3717 */ 3718 3719 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3720 panic("pmap_growkernel: alloc ptp failed"); 3721 3722 /* distribute new kernel PTP to all active pmaps */ 3723 simple_lock(&pmaps_lock); 3724 LIST_FOREACH(pm, &pmaps, pm_list) { 3725 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3726 VM_PAGE_TO_PHYS(ptp), 3727 PMAP_PTP_SELFREF | PMAP_PTP_CACHEABLE); 3728 } 3729 3730 /* Invalidate the PTPT cache. */ 3731 pool_cache_invalidate(&pmap_ptpt_cache); 3732 pmap_ptpt_cache_generation++; 3733 3734 simple_unlock(&pmaps_lock); 3735 } 3736 3737 /* 3738 * flush out the cache, expensive but growkernel will happen so 3739 * rarely 3740 */ 3741 cpu_tlb_flushD(); 3742 cpu_cpwait(); 3743 3744 simple_unlock(&kpm->pm_obj.vmobjlock); 3745 splx(s); 3746 3747 out: 3748 return (pmap_curmaxkvaddr); 3749 } 3750 3751 /************************ Utility routines ****************************/ 3752 3753 /* 3754 * vector_page_setprot: 3755 * 3756 * Manipulate the protection of the vector page. 3757 */ 3758 void 3759 vector_page_setprot(int prot) 3760 { 3761 pt_entry_t *pte; 3762 3763 pte = vtopte(vector_page); 3764 3765 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3766 PTE_SYNC(pte); 3767 cpu_tlb_flushD_SE(vector_page); 3768 cpu_cpwait(); 3769 } 3770 3771 /************************ Bootstrapping routines ****************************/ 3772 3773 /* 3774 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3775 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3776 * find them as necessary. 3777 * 3778 * Note that the data on this list is not valid after initarm() returns. 3779 */ 3780 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3781 3782 static vaddr_t 3783 kernel_pt_lookup(paddr_t pa) 3784 { 3785 pv_addr_t *pv; 3786 3787 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3788 if (pv->pv_pa == pa) 3789 return (pv->pv_va); 3790 } 3791 return (0); 3792 } 3793 3794 /* 3795 * pmap_map_section: 3796 * 3797 * Create a single section mapping. 3798 */ 3799 void 3800 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3801 { 3802 pd_entry_t *pde = (pd_entry_t *) l1pt; 3803 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3804 3805 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3806 3807 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3808 L1_S_PROT(PTE_KERNEL, prot) | fl; 3809 } 3810 3811 /* 3812 * pmap_map_entry: 3813 * 3814 * Create a single page mapping. 3815 */ 3816 void 3817 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3818 { 3819 pd_entry_t *pde = (pd_entry_t *) l1pt; 3820 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3821 pt_entry_t *pte; 3822 3823 KASSERT(((va | pa) & PGOFSET) == 0); 3824 3825 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3826 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3827 3828 pte = (pt_entry_t *) 3829 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3830 if (pte == NULL) 3831 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3832 3833 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3834 L2_S_PROT(PTE_KERNEL, prot) | fl; 3835 } 3836 3837 /* 3838 * pmap_link_l2pt: 3839 * 3840 * Link the L2 page table specified by "pa" into the L1 3841 * page table at the slot for "va". 3842 */ 3843 void 3844 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3845 { 3846 pd_entry_t *pde = (pd_entry_t *) l1pt; 3847 u_int slot = va >> L1_S_SHIFT; 3848 3849 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3850 3851 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3852 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3853 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3854 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3855 3856 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3857 } 3858 3859 /* 3860 * pmap_map_chunk: 3861 * 3862 * Map a chunk of memory using the most efficient mappings 3863 * possible (section, large page, small page) into the 3864 * provided L1 and L2 tables at the specified virtual address. 3865 */ 3866 vsize_t 3867 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3868 int prot, int cache) 3869 { 3870 pd_entry_t *pde = (pd_entry_t *) l1pt; 3871 pt_entry_t *pte, fl; 3872 vsize_t resid; 3873 u_int i; 3874 3875 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3876 3877 if (l1pt == 0) 3878 panic("pmap_map_chunk: no L1 table provided"); 3879 3880 #ifdef VERBOSE_INIT_ARM 3881 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3882 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3883 #endif 3884 3885 size = resid; 3886 3887 while (resid > 0) { 3888 /* See if we can use a section mapping. */ 3889 if (((pa | va) & L1_S_OFFSET) == 0 && 3890 resid >= L1_S_SIZE) { 3891 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3892 #ifdef VERBOSE_INIT_ARM 3893 printf("S"); 3894 #endif 3895 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3896 L1_S_PROT(PTE_KERNEL, prot) | fl; 3897 va += L1_S_SIZE; 3898 pa += L1_S_SIZE; 3899 resid -= L1_S_SIZE; 3900 continue; 3901 } 3902 3903 /* 3904 * Ok, we're going to use an L2 table. Make sure 3905 * one is actually in the corresponding L1 slot 3906 * for the current VA. 3907 */ 3908 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3909 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3910 3911 pte = (pt_entry_t *) 3912 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3913 if (pte == NULL) 3914 panic("pmap_map_chunk: can't find L2 table for VA" 3915 "0x%08lx", va); 3916 3917 /* See if we can use a L2 large page mapping. */ 3918 if (((pa | va) & L2_L_OFFSET) == 0 && 3919 resid >= L2_L_SIZE) { 3920 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3921 #ifdef VERBOSE_INIT_ARM 3922 printf("L"); 3923 #endif 3924 for (i = 0; i < 16; i++) { 3925 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3926 L2_L_PROTO | pa | 3927 L2_L_PROT(PTE_KERNEL, prot) | fl; 3928 } 3929 va += L2_L_SIZE; 3930 pa += L2_L_SIZE; 3931 resid -= L2_L_SIZE; 3932 continue; 3933 } 3934 3935 /* Use a small page mapping. */ 3936 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3937 #ifdef VERBOSE_INIT_ARM 3938 printf("P"); 3939 #endif 3940 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3941 L2_S_PROT(PTE_KERNEL, prot) | fl; 3942 va += NBPG; 3943 pa += NBPG; 3944 resid -= NBPG; 3945 } 3946 #ifdef VERBOSE_INIT_ARM 3947 printf("\n"); 3948 #endif 3949 return (size); 3950 } 3951 3952 /********************** PTE initialization routines **************************/ 3953 3954 /* 3955 * These routines are called when the CPU type is identified to set up 3956 * the PTE prototypes, cache modes, etc. 3957 * 3958 * The variables are always here, just in case LKMs need to reference 3959 * them (though, they shouldn't). 3960 */ 3961 3962 pt_entry_t pte_l1_s_cache_mode; 3963 pt_entry_t pte_l1_s_cache_mask; 3964 3965 pt_entry_t pte_l2_l_cache_mode; 3966 pt_entry_t pte_l2_l_cache_mask; 3967 3968 pt_entry_t pte_l2_s_cache_mode; 3969 pt_entry_t pte_l2_s_cache_mask; 3970 3971 pt_entry_t pte_l2_s_prot_u; 3972 pt_entry_t pte_l2_s_prot_w; 3973 pt_entry_t pte_l2_s_prot_mask; 3974 3975 pt_entry_t pte_l1_s_proto; 3976 pt_entry_t pte_l1_c_proto; 3977 pt_entry_t pte_l2_s_proto; 3978 3979 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3980 void (*pmap_zero_page_func)(paddr_t); 3981 3982 #if ARM_MMU_GENERIC == 1 3983 void 3984 pmap_pte_init_generic(void) 3985 { 3986 3987 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3988 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3989 3990 pte_l2_l_cache_mode = L2_B|L2_C; 3991 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3992 3993 pte_l2_s_cache_mode = L2_B|L2_C; 3994 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3995 3996 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3997 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3998 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3999 4000 pte_l1_s_proto = L1_S_PROTO_generic; 4001 pte_l1_c_proto = L1_C_PROTO_generic; 4002 pte_l2_s_proto = L2_S_PROTO_generic; 4003 4004 pmap_copy_page_func = pmap_copy_page_generic; 4005 pmap_zero_page_func = pmap_zero_page_generic; 4006 } 4007 4008 #if defined(CPU_ARM9) 4009 void 4010 pmap_pte_init_arm9(void) 4011 { 4012 4013 /* 4014 * ARM9 is compatible with generic, but we want to use 4015 * write-through caching for now. 4016 */ 4017 pmap_pte_init_generic(); 4018 4019 pte_l1_s_cache_mode = L1_S_C; 4020 pte_l2_l_cache_mode = L2_C; 4021 pte_l2_s_cache_mode = L2_C; 4022 } 4023 #endif /* CPU_ARM9 */ 4024 #endif /* ARM_MMU_GENERIC == 1 */ 4025 4026 #if ARM_MMU_XSCALE == 1 4027 void 4028 pmap_pte_init_xscale(void) 4029 { 4030 uint32_t auxctl; 4031 4032 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 4033 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 4034 4035 pte_l2_l_cache_mode = L2_B|L2_C; 4036 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 4037 4038 pte_l2_s_cache_mode = L2_B|L2_C; 4039 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 4040 4041 #ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE 4042 /* 4043 * The XScale core has an enhanced mode where writes that 4044 * miss the cache cause a cache line to be allocated. This 4045 * is significantly faster than the traditional, write-through 4046 * behavior of this case. 4047 * 4048 * However, there is a bug lurking in this pmap module, or in 4049 * other parts of the VM system, or both, which causes corruption 4050 * of NFS-backed files when this cache mode is used. We have 4051 * an ugly work-around for this problem (disable r/w-allocate 4052 * for managed kernel mappings), but the bug is still evil enough 4053 * to consider this cache mode "experimental". 4054 */ 4055 pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X); 4056 pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X); 4057 pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X); 4058 #endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */ 4059 4060 #ifdef XSCALE_CACHE_WRITE_THROUGH 4061 /* 4062 * Some versions of the XScale core have various bugs in 4063 * their cache units, the work-around for which is to run 4064 * the cache in write-through mode. Unfortunately, this 4065 * has a major (negative) impact on performance. So, we 4066 * go ahead and run fast-and-loose, in the hopes that we 4067 * don't line up the planets in a way that will trip the 4068 * bugs. 4069 * 4070 * However, we give you the option to be slow-but-correct. 4071 */ 4072 pte_l1_s_cache_mode = L1_S_C; 4073 pte_l2_l_cache_mode = L2_C; 4074 pte_l2_s_cache_mode = L2_C; 4075 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 4076 4077 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 4078 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 4079 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 4080 4081 pte_l1_s_proto = L1_S_PROTO_xscale; 4082 pte_l1_c_proto = L1_C_PROTO_xscale; 4083 pte_l2_s_proto = L2_S_PROTO_xscale; 4084 4085 pmap_copy_page_func = pmap_copy_page_xscale; 4086 pmap_zero_page_func = pmap_zero_page_xscale; 4087 4088 /* 4089 * Disable ECC protection of page table access, for now. 4090 */ 4091 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4092 : "=r" (auxctl)); 4093 auxctl &= ~XSCALE_AUXCTL_P; 4094 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4095 : 4096 : "r" (auxctl)); 4097 } 4098 4099 /* 4100 * xscale_setup_minidata: 4101 * 4102 * Set up the mini-data cache clean area. We require the 4103 * caller to allocate the right amount of physically and 4104 * virtually contiguous space. 4105 */ 4106 void 4107 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 4108 { 4109 extern vaddr_t xscale_minidata_clean_addr; 4110 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 4111 pd_entry_t *pde = (pd_entry_t *) l1pt; 4112 pt_entry_t *pte; 4113 vsize_t size; 4114 uint32_t auxctl; 4115 4116 xscale_minidata_clean_addr = va; 4117 4118 /* Round it to page size. */ 4119 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 4120 4121 for (; size != 0; 4122 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4123 pte = (pt_entry_t *) 4124 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4125 if (pte == NULL) 4126 panic("xscale_setup_minidata: can't find L2 table for " 4127 "VA 0x%08lx", va); 4128 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4129 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4130 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4131 } 4132 4133 /* 4134 * Configure the mini-data cache for write-back with 4135 * read/write-allocate. 4136 * 4137 * NOTE: In order to reconfigure the mini-data cache, we must 4138 * make sure it contains no valid data! In order to do that, 4139 * we must issue a global data cache invalidate command! 4140 * 4141 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4142 * THIS IS VERY IMPORTANT! 4143 */ 4144 4145 /* Invalidate data and mini-data. */ 4146 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4147 : 4148 : "r" (auxctl)); 4149 4150 4151 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4152 : "=r" (auxctl)); 4153 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4154 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4155 : 4156 : "r" (auxctl)); 4157 } 4158 #endif /* ARM_MMU_XSCALE == 1 */ 4159
Indexes created Fri Sep 26 08:10:20 GMT 2025