pmap.c revision 1.92
1 /* $NetBSD: pmap.c,v 1.92 2002/04/10 15:56:21 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.92 2002/04/10 15:56:21 thorpej Exp $"); 147 #ifdef PMAP_DEBUG 148 #define PDEBUG(_lev_,_stat_) \ 149 if (pmap_debug_level >= (_lev_)) \ 150 ((_stat_)) 151 int pmap_debug_level = -2; 152 void pmap_dump_pvlist(vaddr_t phys, char *m); 153 154 /* 155 * for switching to potentially finer grained debugging 156 */ 157 #define PDB_FOLLOW 0x0001 158 #define PDB_INIT 0x0002 159 #define PDB_ENTER 0x0004 160 #define PDB_REMOVE 0x0008 161 #define PDB_CREATE 0x0010 162 #define PDB_PTPAGE 0x0020 163 #define PDB_GROWKERN 0x0040 164 #define PDB_BITS 0x0080 165 #define PDB_COLLECT 0x0100 166 #define PDB_PROTECT 0x0200 167 #define PDB_MAP_L1 0x0400 168 #define PDB_BOOTSTRAP 0x1000 169 #define PDB_PARANOIA 0x2000 170 #define PDB_WIRING 0x4000 171 #define PDB_PVDUMP 0x8000 172 173 int debugmap = 0; 174 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 175 #define NPDEBUG(_lev_,_stat_) \ 176 if (pmapdebug & (_lev_)) \ 177 ((_stat_)) 178 179 #else /* PMAP_DEBUG */ 180 #define PDEBUG(_lev_,_stat_) /* Nothing */ 181 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 182 #endif /* PMAP_DEBUG */ 183 184 struct pmap kernel_pmap_store; 185 186 /* 187 * linked list of all non-kernel pmaps 188 */ 189 190 static LIST_HEAD(, pmap) pmaps; 191 192 /* 193 * pool that pmap structures are allocated from 194 */ 195 196 struct pool pmap_pmap_pool; 197 198 static pt_entry_t *csrc_pte, *cdst_pte; 199 static vaddr_t csrcp, cdstp; 200 201 char *memhook; 202 extern caddr_t msgbufaddr; 203 204 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 205 /* 206 * locking data structures 207 */ 208 209 static struct lock pmap_main_lock; 210 static struct simplelock pvalloc_lock; 211 static struct simplelock pmaps_lock; 212 #ifdef LOCKDEBUG 213 #define PMAP_MAP_TO_HEAD_LOCK() \ 214 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 215 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 216 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 217 218 #define PMAP_HEAD_TO_MAP_LOCK() \ 219 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 220 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 221 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 222 #else 223 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 224 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 225 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 226 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 227 #endif /* LOCKDEBUG */ 228 229 /* 230 * pv_page management structures: locked by pvalloc_lock 231 */ 232 233 TAILQ_HEAD(pv_pagelist, pv_page); 234 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 235 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 236 static int pv_nfpvents; /* # of free pv entries */ 237 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 238 static vaddr_t pv_cachedva; /* cached VA for later use */ 239 240 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 241 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 242 /* high water mark */ 243 244 /* 245 * local prototypes 246 */ 247 248 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 249 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 250 #define ALLOCPV_NEED 0 /* need PV now */ 251 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 252 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 253 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 254 static void pmap_enter_pv __P((struct vm_page *, 255 struct pv_entry *, struct pmap *, 256 vaddr_t, struct vm_page *, int)); 257 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 258 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 259 static void pmap_free_pv_doit __P((struct pv_entry *)); 260 static void pmap_free_pvpage __P((void)); 261 static boolean_t pmap_is_curpmap __P((struct pmap *)); 262 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 263 vaddr_t)); 264 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 265 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 266 267 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 268 u_int, u_int)); 269 270 /* 271 * Structure that describes and L1 table. 272 */ 273 struct l1pt { 274 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 275 struct pglist pt_plist; /* Allocated page list */ 276 vaddr_t pt_va; /* Allocated virtual address */ 277 int pt_flags; /* Flags */ 278 }; 279 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 280 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 281 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 282 283 static void pmap_free_l1pt __P((struct l1pt *)); 284 static int pmap_allocpagedir __P((struct pmap *)); 285 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 286 static void pmap_remove_all __P((struct vm_page *)); 287 288 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 289 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 290 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 291 292 extern paddr_t physical_start; 293 extern paddr_t physical_freestart; 294 extern paddr_t physical_end; 295 extern paddr_t physical_freeend; 296 extern unsigned int free_pages; 297 extern int max_processes; 298 299 vaddr_t virtual_avail; 300 vaddr_t virtual_end; 301 vaddr_t pmap_curmaxkvaddr; 302 303 vaddr_t avail_start; 304 vaddr_t avail_end; 305 306 extern pv_addr_t systempage; 307 308 /* Variables used by the L1 page table queue code */ 309 SIMPLEQ_HEAD(l1pt_queue, l1pt); 310 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 311 static int l1pt_static_queue_count; /* items in the static l1 queue */ 312 static int l1pt_static_create_count; /* static l1 items created */ 313 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 314 static int l1pt_queue_count; /* items in the l1 queue */ 315 static int l1pt_create_count; /* stat - L1's create count */ 316 static int l1pt_reuse_count; /* stat - L1's reused count */ 317 318 /* Local function prototypes (not used outside this file) */ 319 void pmap_pinit __P((struct pmap *)); 320 void pmap_freepagedir __P((struct pmap *)); 321 322 /* Other function prototypes */ 323 extern void bzero_page __P((vaddr_t)); 324 extern void bcopy_page __P((vaddr_t, vaddr_t)); 325 326 struct l1pt *pmap_alloc_l1pt __P((void)); 327 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 328 vaddr_t l2pa, boolean_t)); 329 330 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 331 static void pmap_unmap_ptes __P((struct pmap *)); 332 333 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 334 pt_entry_t *, boolean_t)); 335 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 336 pt_entry_t *, boolean_t)); 337 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 338 pt_entry_t *, boolean_t)); 339 340 /* 341 * real definition of pv_entry. 342 */ 343 344 struct pv_entry { 345 struct pv_entry *pv_next; /* next pv_entry */ 346 struct pmap *pv_pmap; /* pmap where mapping lies */ 347 vaddr_t pv_va; /* virtual address for mapping */ 348 int pv_flags; /* flags */ 349 struct vm_page *pv_ptp; /* vm_page for the ptp */ 350 }; 351 352 /* 353 * pv_entrys are dynamically allocated in chunks from a single page. 354 * we keep track of how many pv_entrys are in use for each page and 355 * we can free pv_entry pages if needed. there is one lock for the 356 * entire allocation system. 357 */ 358 359 struct pv_page_info { 360 TAILQ_ENTRY(pv_page) pvpi_list; 361 struct pv_entry *pvpi_pvfree; 362 int pvpi_nfree; 363 }; 364 365 /* 366 * number of pv_entry's in a pv_page 367 * (note: won't work on systems where NPBG isn't a constant) 368 */ 369 370 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 371 sizeof(struct pv_entry)) 372 373 /* 374 * a pv_page: where pv_entrys are allocated from 375 */ 376 377 struct pv_page { 378 struct pv_page_info pvinfo; 379 struct pv_entry pvents[PVE_PER_PVPAGE]; 380 }; 381 382 #ifdef MYCROFT_HACK 383 int mycroft_hack = 0; 384 #endif 385 386 /* Function to set the debug level of the pmap code */ 387 388 #ifdef PMAP_DEBUG 389 void 390 pmap_debug(int level) 391 { 392 pmap_debug_level = level; 393 printf("pmap_debug: level=%d\n", pmap_debug_level); 394 } 395 #endif /* PMAP_DEBUG */ 396 397 __inline static boolean_t 398 pmap_is_curpmap(struct pmap *pmap) 399 { 400 401 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 402 pmap == pmap_kernel()) 403 return (TRUE); 404 405 return (FALSE); 406 } 407 408 #include "isadma.h" 409 410 #if NISADMA > 0 411 /* 412 * Used to protect memory for ISA DMA bounce buffers. If, when loading 413 * pages into the system, memory intersects with any of these ranges, 414 * the intersecting memory will be loaded into a lower-priority free list. 415 */ 416 bus_dma_segment_t *pmap_isa_dma_ranges; 417 int pmap_isa_dma_nranges; 418 419 /* 420 * Check if a memory range intersects with an ISA DMA range, and 421 * return the page-rounded intersection if it does. The intersection 422 * will be placed on a lower-priority free list. 423 */ 424 static boolean_t 425 pmap_isa_dma_range_intersect(paddr_t pa, psize_t size, paddr_t *pap, 426 psize_t *sizep) 427 { 428 bus_dma_segment_t *ds; 429 int i; 430 431 if (pmap_isa_dma_ranges == NULL) 432 return (FALSE); 433 434 for (i = 0, ds = pmap_isa_dma_ranges; 435 i < pmap_isa_dma_nranges; i++, ds++) { 436 if (ds->ds_addr <= pa && pa < (ds->ds_addr + ds->ds_len)) { 437 /* 438 * Beginning of region intersects with this range. 439 */ 440 *pap = trunc_page(pa); 441 *sizep = round_page(min(pa + size, 442 ds->ds_addr + ds->ds_len) - pa); 443 return (TRUE); 444 } 445 if (pa < ds->ds_addr && ds->ds_addr < (pa + size)) { 446 /* 447 * End of region intersects with this range. 448 */ 449 *pap = trunc_page(ds->ds_addr); 450 *sizep = round_page(min((pa + size) - ds->ds_addr, 451 ds->ds_len)); 452 return (TRUE); 453 } 454 } 455 456 /* 457 * No intersection found. 458 */ 459 return (FALSE); 460 } 461 #endif /* NISADMA > 0 */ 462 463 /* 464 * p v _ e n t r y f u n c t i o n s 465 */ 466 467 /* 468 * pv_entry allocation functions: 469 * the main pv_entry allocation functions are: 470 * pmap_alloc_pv: allocate a pv_entry structure 471 * pmap_free_pv: free one pv_entry 472 * pmap_free_pvs: free a list of pv_entrys 473 * 474 * the rest are helper functions 475 */ 476 477 /* 478 * pmap_alloc_pv: inline function to allocate a pv_entry structure 479 * => we lock pvalloc_lock 480 * => if we fail, we call out to pmap_alloc_pvpage 481 * => 3 modes: 482 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 483 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 484 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 485 * one now 486 * 487 * "try" is for optional functions like pmap_copy(). 488 */ 489 490 __inline static struct pv_entry * 491 pmap_alloc_pv(struct pmap *pmap, int mode) 492 { 493 struct pv_page *pvpage; 494 struct pv_entry *pv; 495 496 simple_lock(&pvalloc_lock); 497 498 pvpage = TAILQ_FIRST(&pv_freepages); 499 500 if (pvpage != NULL) { 501 pvpage->pvinfo.pvpi_nfree--; 502 if (pvpage->pvinfo.pvpi_nfree == 0) { 503 /* nothing left in this one? */ 504 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 505 } 506 pv = pvpage->pvinfo.pvpi_pvfree; 507 KASSERT(pv); 508 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 509 pv_nfpvents--; /* took one from pool */ 510 } else { 511 pv = NULL; /* need more of them */ 512 } 513 514 /* 515 * if below low water mark or we didn't get a pv_entry we try and 516 * create more pv_entrys ... 517 */ 518 519 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 520 if (pv == NULL) 521 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 522 mode : ALLOCPV_NEED); 523 else 524 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 525 } 526 527 simple_unlock(&pvalloc_lock); 528 return(pv); 529 } 530 531 /* 532 * pmap_alloc_pvpage: maybe allocate a new pvpage 533 * 534 * if need_entry is false: try and allocate a new pv_page 535 * if need_entry is true: try and allocate a new pv_page and return a 536 * new pv_entry from it. if we are unable to allocate a pv_page 537 * we make a last ditch effort to steal a pv_page from some other 538 * mapping. if that fails, we panic... 539 * 540 * => we assume that the caller holds pvalloc_lock 541 */ 542 543 static struct pv_entry * 544 pmap_alloc_pvpage(struct pmap *pmap, int mode) 545 { 546 struct vm_page *pg; 547 struct pv_page *pvpage; 548 struct pv_entry *pv; 549 int s; 550 551 /* 552 * if we need_entry and we've got unused pv_pages, allocate from there 553 */ 554 555 pvpage = TAILQ_FIRST(&pv_unusedpgs); 556 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 557 558 /* move it to pv_freepages list */ 559 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 560 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 561 562 /* allocate a pv_entry */ 563 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 564 pv = pvpage->pvinfo.pvpi_pvfree; 565 KASSERT(pv); 566 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 567 568 pv_nfpvents--; /* took one from pool */ 569 return(pv); 570 } 571 572 /* 573 * see if we've got a cached unmapped VA that we can map a page in. 574 * if not, try to allocate one. 575 */ 576 577 578 if (pv_cachedva == 0) { 579 s = splvm(); 580 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 581 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 582 splx(s); 583 if (pv_cachedva == 0) { 584 return (NULL); 585 } 586 } 587 588 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 589 UVM_PGA_USERESERVE); 590 591 if (pg == NULL) 592 return (NULL); 593 pg->flags &= ~PG_BUSY; /* never busy */ 594 595 /* 596 * add a mapping for our new pv_page and free its entrys (save one!) 597 * 598 * NOTE: If we are allocating a PV page for the kernel pmap, the 599 * pmap is already locked! (...but entering the mapping is safe...) 600 */ 601 602 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 603 VM_PROT_READ|VM_PROT_WRITE); 604 pmap_update(pmap_kernel()); 605 pvpage = (struct pv_page *) pv_cachedva; 606 pv_cachedva = 0; 607 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 608 } 609 610 /* 611 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 612 * 613 * => caller must hold pvalloc_lock 614 * => if need_entry is true, we allocate and return one pv_entry 615 */ 616 617 static struct pv_entry * 618 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 619 { 620 int tofree, lcv; 621 622 /* do we need to return one? */ 623 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 624 625 pvp->pvinfo.pvpi_pvfree = NULL; 626 pvp->pvinfo.pvpi_nfree = tofree; 627 for (lcv = 0 ; lcv < tofree ; lcv++) { 628 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 629 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 630 } 631 if (need_entry) 632 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 633 else 634 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 635 pv_nfpvents += tofree; 636 return((need_entry) ? &pvp->pvents[lcv] : NULL); 637 } 638 639 /* 640 * pmap_free_pv_doit: actually free a pv_entry 641 * 642 * => do not call this directly! instead use either 643 * 1. pmap_free_pv ==> free a single pv_entry 644 * 2. pmap_free_pvs => free a list of pv_entrys 645 * => we must be holding pvalloc_lock 646 */ 647 648 __inline static void 649 pmap_free_pv_doit(struct pv_entry *pv) 650 { 651 struct pv_page *pvp; 652 653 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 654 pv_nfpvents++; 655 pvp->pvinfo.pvpi_nfree++; 656 657 /* nfree == 1 => fully allocated page just became partly allocated */ 658 if (pvp->pvinfo.pvpi_nfree == 1) { 659 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 660 } 661 662 /* free it */ 663 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 664 pvp->pvinfo.pvpi_pvfree = pv; 665 666 /* 667 * are all pv_page's pv_entry's free? move it to unused queue. 668 */ 669 670 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 671 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 672 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 673 } 674 } 675 676 /* 677 * pmap_free_pv: free a single pv_entry 678 * 679 * => we gain the pvalloc_lock 680 */ 681 682 __inline static void 683 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 684 { 685 simple_lock(&pvalloc_lock); 686 pmap_free_pv_doit(pv); 687 688 /* 689 * Can't free the PV page if the PV entries were associated with 690 * the kernel pmap; the pmap is already locked. 691 */ 692 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 693 pmap != pmap_kernel()) 694 pmap_free_pvpage(); 695 696 simple_unlock(&pvalloc_lock); 697 } 698 699 /* 700 * pmap_free_pvs: free a list of pv_entrys 701 * 702 * => we gain the pvalloc_lock 703 */ 704 705 __inline static void 706 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 707 { 708 struct pv_entry *nextpv; 709 710 simple_lock(&pvalloc_lock); 711 712 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 713 nextpv = pvs->pv_next; 714 pmap_free_pv_doit(pvs); 715 } 716 717 /* 718 * Can't free the PV page if the PV entries were associated with 719 * the kernel pmap; the pmap is already locked. 720 */ 721 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 722 pmap != pmap_kernel()) 723 pmap_free_pvpage(); 724 725 simple_unlock(&pvalloc_lock); 726 } 727 728 729 /* 730 * pmap_free_pvpage: try and free an unused pv_page structure 731 * 732 * => assume caller is holding the pvalloc_lock and that 733 * there is a page on the pv_unusedpgs list 734 * => if we can't get a lock on the kmem_map we try again later 735 */ 736 737 static void 738 pmap_free_pvpage(void) 739 { 740 int s; 741 struct vm_map *map; 742 struct vm_map_entry *dead_entries; 743 struct pv_page *pvp; 744 745 s = splvm(); /* protect kmem_map */ 746 747 pvp = TAILQ_FIRST(&pv_unusedpgs); 748 749 /* 750 * note: watch out for pv_initpage which is allocated out of 751 * kernel_map rather than kmem_map. 752 */ 753 if (pvp == pv_initpage) 754 map = kernel_map; 755 else 756 map = kmem_map; 757 if (vm_map_lock_try(map)) { 758 759 /* remove pvp from pv_unusedpgs */ 760 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 761 762 /* unmap the page */ 763 dead_entries = NULL; 764 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 765 &dead_entries); 766 vm_map_unlock(map); 767 768 if (dead_entries != NULL) 769 uvm_unmap_detach(dead_entries, 0); 770 771 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 772 } 773 if (pvp == pv_initpage) 774 /* no more initpage, we've freed it */ 775 pv_initpage = NULL; 776 777 splx(s); 778 } 779 780 /* 781 * main pv_entry manipulation functions: 782 * pmap_enter_pv: enter a mapping onto a vm_page list 783 * pmap_remove_pv: remove a mappiing from a vm_page list 784 * 785 * NOTE: pmap_enter_pv expects to lock the pvh itself 786 * pmap_remove_pv expects te caller to lock the pvh before calling 787 */ 788 789 /* 790 * pmap_enter_pv: enter a mapping onto a vm_page lst 791 * 792 * => caller should hold the proper lock on pmap_main_lock 793 * => caller should have pmap locked 794 * => we will gain the lock on the vm_page and allocate the new pv_entry 795 * => caller should adjust ptp's wire_count before calling 796 * => caller should not adjust pmap's wire_count 797 */ 798 799 __inline static void 800 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 801 vaddr_t va, struct vm_page *ptp, int flags) 802 { 803 pve->pv_pmap = pmap; 804 pve->pv_va = va; 805 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 806 pve->pv_flags = flags; 807 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 808 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 809 pg->mdpage.pvh_list = pve; /* ... locked list */ 810 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 811 if (pve->pv_flags & PVF_WIRED) 812 ++pmap->pm_stats.wired_count; 813 } 814 815 /* 816 * pmap_remove_pv: try to remove a mapping from a pv_list 817 * 818 * => caller should hold proper lock on pmap_main_lock 819 * => pmap should be locked 820 * => caller should hold lock on vm_page [so that attrs can be adjusted] 821 * => caller should adjust ptp's wire_count and free PTP if needed 822 * => caller should NOT adjust pmap's wire_count 823 * => we return the removed pve 824 */ 825 826 __inline static struct pv_entry * 827 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 828 { 829 struct pv_entry *pve, **prevptr; 830 831 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 832 pve = *prevptr; 833 while (pve) { 834 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 835 *prevptr = pve->pv_next; /* remove it! */ 836 if (pve->pv_flags & PVF_WIRED) 837 --pmap->pm_stats.wired_count; 838 break; 839 } 840 prevptr = &pve->pv_next; /* previous pointer */ 841 pve = pve->pv_next; /* advance */ 842 } 843 return(pve); /* return removed pve */ 844 } 845 846 /* 847 * 848 * pmap_modify_pv: Update pv flags 849 * 850 * => caller should hold lock on vm_page [so that attrs can be adjusted] 851 * => caller should NOT adjust pmap's wire_count 852 * => caller must call pmap_vac_me_harder() if writable status of a page 853 * may have changed. 854 * => we return the old flags 855 * 856 * Modify a physical-virtual mapping in the pv table 857 */ 858 859 static /* __inline */ u_int 860 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 861 u_int bic_mask, u_int eor_mask) 862 { 863 struct pv_entry *npv; 864 u_int flags, oflags; 865 866 /* 867 * There is at least one VA mapping this page. 868 */ 869 870 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 871 if (pmap == npv->pv_pmap && va == npv->pv_va) { 872 oflags = npv->pv_flags; 873 npv->pv_flags = flags = 874 ((oflags & ~bic_mask) ^ eor_mask); 875 if ((flags ^ oflags) & PVF_WIRED) { 876 if (flags & PVF_WIRED) 877 ++pmap->pm_stats.wired_count; 878 else 879 --pmap->pm_stats.wired_count; 880 } 881 return (oflags); 882 } 883 } 884 return (0); 885 } 886 887 /* 888 * Map the specified level 2 pagetable into the level 1 page table for 889 * the given pmap to cover a chunk of virtual address space starting from the 890 * address specified. 891 */ 892 static __inline void 893 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, boolean_t selfref) 894 { 895 vaddr_t ptva; 896 897 /* Calculate the index into the L1 page table. */ 898 ptva = (va >> L1_S_SHIFT) & ~3; 899 900 /* Map page table into the L1. */ 901 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 902 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 903 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 904 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 905 906 /* Map the page table into the page table area. */ 907 if (selfref) 908 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 909 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 910 } 911 912 #if 0 913 static __inline void 914 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 915 { 916 vaddr_t ptva; 917 918 /* Calculate the index into the L1 page table. */ 919 ptva = (va >> L1_S_SHIFT) & ~3; 920 921 /* Unmap page table from the L1. */ 922 pmap->pm_pdir[ptva + 0] = 0; 923 pmap->pm_pdir[ptva + 1] = 0; 924 pmap->pm_pdir[ptva + 2] = 0; 925 pmap->pm_pdir[ptva + 3] = 0; 926 927 /* Unmap the page table from the page table area. */ 928 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 929 } 930 #endif 931 932 /* 933 * Used to map a range of physical addresses into kernel 934 * virtual address space. 935 * 936 * For now, VM is already on, we only need to map the 937 * specified memory. 938 */ 939 vaddr_t 940 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 941 { 942 while (spa < epa) { 943 pmap_kenter_pa(va, spa, prot); 944 va += NBPG; 945 spa += NBPG; 946 } 947 pmap_update(pmap_kernel()); 948 return(va); 949 } 950 951 952 /* 953 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 954 * 955 * bootstrap the pmap system. This is called from initarm and allows 956 * the pmap system to initailise any structures it requires. 957 * 958 * Currently this sets up the kernel_pmap that is statically allocated 959 * and also allocated virtual addresses for certain page hooks. 960 * Currently the only one page hook is allocated that is used 961 * to zero physical pages of memory. 962 * It also initialises the start and end address of the kernel data space. 963 */ 964 extern paddr_t physical_freestart; 965 extern paddr_t physical_freeend; 966 967 char *boot_head; 968 969 void 970 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 971 { 972 pt_entry_t *pte; 973 int loop; 974 paddr_t start, end; 975 #if NISADMA > 0 976 paddr_t istart; 977 psize_t isize; 978 #endif 979 980 pmap_kernel()->pm_pdir = kernel_l1pt; 981 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 982 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 983 simple_lock_init(&pmap_kernel()->pm_lock); 984 pmap_kernel()->pm_obj.pgops = NULL; 985 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 986 pmap_kernel()->pm_obj.uo_npages = 0; 987 pmap_kernel()->pm_obj.uo_refs = 1; 988 989 /* 990 * Initialize PAGE_SIZE-dependent variables. 991 */ 992 uvm_setpagesize(); 993 994 loop = 0; 995 while (loop < bootconfig.dramblocks) { 996 start = (paddr_t)bootconfig.dram[loop].address; 997 end = start + (bootconfig.dram[loop].pages * NBPG); 998 if (start < physical_freestart) 999 start = physical_freestart; 1000 if (end > physical_freeend) 1001 end = physical_freeend; 1002 #if 0 1003 printf("%d: %lx -> %lx\n", loop, start, end - 1); 1004 #endif 1005 #if NISADMA > 0 1006 if (pmap_isa_dma_range_intersect(start, end - start, 1007 &istart, &isize)) { 1008 /* 1009 * Place the pages that intersect with the 1010 * ISA DMA range onto the ISA DMA free list. 1011 */ 1012 #if 0 1013 printf(" ISADMA 0x%lx -> 0x%lx\n", istart, 1014 istart + isize - 1); 1015 #endif 1016 uvm_page_physload(atop(istart), 1017 atop(istart + isize), atop(istart), 1018 atop(istart + isize), VM_FREELIST_ISADMA); 1019 1020 /* 1021 * Load the pieces that come before 1022 * the intersection into the default 1023 * free list. 1024 */ 1025 if (start < istart) { 1026 #if 0 1027 printf(" BEFORE 0x%lx -> 0x%lx\n", 1028 start, istart - 1); 1029 #endif 1030 uvm_page_physload(atop(start), 1031 atop(istart), atop(start), 1032 atop(istart), VM_FREELIST_DEFAULT); 1033 } 1034 1035 /* 1036 * Load the pieces that come after 1037 * the intersection into the default 1038 * free list. 1039 */ 1040 if ((istart + isize) < end) { 1041 #if 0 1042 printf(" AFTER 0x%lx -> 0x%lx\n", 1043 (istart + isize), end - 1); 1044 #endif 1045 uvm_page_physload(atop(istart + isize), 1046 atop(end), atop(istart + isize), 1047 atop(end), VM_FREELIST_DEFAULT); 1048 } 1049 } else { 1050 uvm_page_physload(atop(start), atop(end), 1051 atop(start), atop(end), VM_FREELIST_DEFAULT); 1052 } 1053 #else /* NISADMA > 0 */ 1054 uvm_page_physload(atop(start), atop(end), 1055 atop(start), atop(end), VM_FREELIST_DEFAULT); 1056 #endif /* NISADMA > 0 */ 1057 ++loop; 1058 } 1059 1060 virtual_avail = KERNEL_VM_BASE; 1061 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1062 1063 /* 1064 * now we allocate the "special" VAs which are used for tmp mappings 1065 * by the pmap (and other modules). we allocate the VAs by advancing 1066 * virtual_avail (note that there are no pages mapped at these VAs). 1067 * we find the PTE that maps the allocated VA via the linear PTE 1068 * mapping. 1069 */ 1070 1071 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1072 1073 csrcp = virtual_avail; csrc_pte = pte; 1074 virtual_avail += PAGE_SIZE; pte++; 1075 1076 cdstp = virtual_avail; cdst_pte = pte; 1077 virtual_avail += PAGE_SIZE; pte++; 1078 1079 memhook = (char *) virtual_avail; /* don't need pte */ 1080 virtual_avail += PAGE_SIZE; pte++; 1081 1082 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1083 virtual_avail += round_page(MSGBUFSIZE); 1084 pte += atop(round_page(MSGBUFSIZE)); 1085 1086 /* 1087 * init the static-global locks and global lists. 1088 */ 1089 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1090 simple_lock_init(&pvalloc_lock); 1091 simple_lock_init(&pmaps_lock); 1092 LIST_INIT(&pmaps); 1093 TAILQ_INIT(&pv_freepages); 1094 TAILQ_INIT(&pv_unusedpgs); 1095 1096 /* 1097 * initialize the pmap pool. 1098 */ 1099 1100 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1101 &pool_allocator_nointr); 1102 1103 cpu_dcache_wbinv_all(); 1104 } 1105 1106 /* 1107 * void pmap_init(void) 1108 * 1109 * Initialize the pmap module. 1110 * Called by vm_init() in vm/vm_init.c in order to initialise 1111 * any structures that the pmap system needs to map virtual memory. 1112 */ 1113 1114 extern int physmem; 1115 1116 void 1117 pmap_init(void) 1118 { 1119 1120 /* 1121 * Set the available memory vars - These do not map to real memory 1122 * addresses and cannot as the physical memory is fragmented. 1123 * They are used by ps for %mem calculations. 1124 * One could argue whether this should be the entire memory or just 1125 * the memory that is useable in a user process. 1126 */ 1127 avail_start = 0; 1128 avail_end = physmem * NBPG; 1129 1130 /* 1131 * now we need to free enough pv_entry structures to allow us to get 1132 * the kmem_map/kmem_object allocated and inited (done after this 1133 * function is finished). to do this we allocate one bootstrap page out 1134 * of kernel_map and use it to provide an initial pool of pv_entry 1135 * structures. we never free this page. 1136 */ 1137 1138 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1139 if (pv_initpage == NULL) 1140 panic("pmap_init: pv_initpage"); 1141 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1142 pv_nfpvents = 0; 1143 (void) pmap_add_pvpage(pv_initpage, FALSE); 1144 1145 pmap_initialized = TRUE; 1146 1147 /* Initialise our L1 page table queues and counters */ 1148 SIMPLEQ_INIT(&l1pt_static_queue); 1149 l1pt_static_queue_count = 0; 1150 l1pt_static_create_count = 0; 1151 SIMPLEQ_INIT(&l1pt_queue); 1152 l1pt_queue_count = 0; 1153 l1pt_create_count = 0; 1154 l1pt_reuse_count = 0; 1155 } 1156 1157 /* 1158 * pmap_postinit() 1159 * 1160 * This routine is called after the vm and kmem subsystems have been 1161 * initialised. This allows the pmap code to perform any initialisation 1162 * that can only be done one the memory allocation is in place. 1163 */ 1164 1165 void 1166 pmap_postinit(void) 1167 { 1168 int loop; 1169 struct l1pt *pt; 1170 1171 #ifdef PMAP_STATIC_L1S 1172 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1173 #else /* PMAP_STATIC_L1S */ 1174 for (loop = 0; loop < max_processes; ++loop) { 1175 #endif /* PMAP_STATIC_L1S */ 1176 /* Allocate a L1 page table */ 1177 pt = pmap_alloc_l1pt(); 1178 if (!pt) 1179 panic("Cannot allocate static L1 page tables\n"); 1180 1181 /* Clean it */ 1182 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1183 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1184 /* Add the page table to the queue */ 1185 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1186 ++l1pt_static_queue_count; 1187 ++l1pt_static_create_count; 1188 } 1189 } 1190 1191 1192 /* 1193 * Create and return a physical map. 1194 * 1195 * If the size specified for the map is zero, the map is an actual physical 1196 * map, and may be referenced by the hardware. 1197 * 1198 * If the size specified is non-zero, the map will be used in software only, 1199 * and is bounded by that size. 1200 */ 1201 1202 pmap_t 1203 pmap_create(void) 1204 { 1205 struct pmap *pmap; 1206 1207 /* 1208 * Fetch pmap entry from the pool 1209 */ 1210 1211 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1212 /* XXX is this really needed! */ 1213 memset(pmap, 0, sizeof(*pmap)); 1214 1215 simple_lock_init(&pmap->pm_obj.vmobjlock); 1216 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1217 TAILQ_INIT(&pmap->pm_obj.memq); 1218 pmap->pm_obj.uo_npages = 0; 1219 pmap->pm_obj.uo_refs = 1; 1220 pmap->pm_stats.wired_count = 0; 1221 pmap->pm_stats.resident_count = 1; 1222 pmap->pm_ptphint = NULL; 1223 1224 /* Now init the machine part of the pmap */ 1225 pmap_pinit(pmap); 1226 return(pmap); 1227 } 1228 1229 /* 1230 * pmap_alloc_l1pt() 1231 * 1232 * This routine allocates physical and virtual memory for a L1 page table 1233 * and wires it. 1234 * A l1pt structure is returned to describe the allocated page table. 1235 * 1236 * This routine is allowed to fail if the required memory cannot be allocated. 1237 * In this case NULL is returned. 1238 */ 1239 1240 struct l1pt * 1241 pmap_alloc_l1pt(void) 1242 { 1243 paddr_t pa; 1244 vaddr_t va; 1245 struct l1pt *pt; 1246 int error; 1247 struct vm_page *m; 1248 pt_entry_t *pte; 1249 1250 /* Allocate virtual address space for the L1 page table */ 1251 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1252 if (va == 0) { 1253 #ifdef DIAGNOSTIC 1254 PDEBUG(0, 1255 printf("pmap: Cannot allocate pageable memory for L1\n")); 1256 #endif /* DIAGNOSTIC */ 1257 return(NULL); 1258 } 1259 1260 /* Allocate memory for the l1pt structure */ 1261 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1262 1263 /* 1264 * Allocate pages from the VM system. 1265 */ 1266 TAILQ_INIT(&pt->pt_plist); 1267 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1268 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1269 if (error) { 1270 #ifdef DIAGNOSTIC 1271 PDEBUG(0, 1272 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1273 error)); 1274 #endif /* DIAGNOSTIC */ 1275 /* Release the resources we already have claimed */ 1276 free(pt, M_VMPMAP); 1277 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1278 return(NULL); 1279 } 1280 1281 /* Map our physical pages into our virtual space */ 1282 pt->pt_va = va; 1283 m = TAILQ_FIRST(&pt->pt_plist); 1284 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1285 pa = VM_PAGE_TO_PHYS(m); 1286 1287 pte = vtopte(va); 1288 1289 /* 1290 * Assert that the PTE is invalid. If it's invalid, 1291 * then we are guaranteed that there won't be an entry 1292 * for this VA in the TLB. 1293 */ 1294 KDASSERT(pmap_pte_v(pte) == 0); 1295 1296 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(m) | 1297 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1298 1299 va += NBPG; 1300 m = m->pageq.tqe_next; 1301 } 1302 1303 #ifdef DIAGNOSTIC 1304 if (m) 1305 panic("pmap_alloc_l1pt: pglist not empty\n"); 1306 #endif /* DIAGNOSTIC */ 1307 1308 pt->pt_flags = 0; 1309 return(pt); 1310 } 1311 1312 /* 1313 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1314 */ 1315 static void 1316 pmap_free_l1pt(struct l1pt *pt) 1317 { 1318 /* Separate the physical memory for the virtual space */ 1319 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1320 pmap_update(pmap_kernel()); 1321 1322 /* Return the physical memory */ 1323 uvm_pglistfree(&pt->pt_plist); 1324 1325 /* Free the virtual space */ 1326 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1327 1328 /* Free the l1pt structure */ 1329 free(pt, M_VMPMAP); 1330 } 1331 1332 /* 1333 * Allocate a page directory. 1334 * This routine will either allocate a new page directory from the pool 1335 * of L1 page tables currently held by the kernel or it will allocate 1336 * a new one via pmap_alloc_l1pt(). 1337 * It will then initialise the l1 page table for use. 1338 * 1339 * XXX must tidy up and fix this code, not happy about how it does the pmaps_locking 1340 */ 1341 static int 1342 pmap_allocpagedir(struct pmap *pmap) 1343 { 1344 paddr_t pa; 1345 struct l1pt *pt; 1346 pt_entry_t *pte; 1347 1348 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1349 1350 /* Do we have any spare L1's lying around ? */ 1351 if (l1pt_static_queue_count) { 1352 --l1pt_static_queue_count; 1353 pt = l1pt_static_queue.sqh_first; 1354 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt, pt_queue); 1355 } else if (l1pt_queue_count) { 1356 --l1pt_queue_count; 1357 pt = l1pt_queue.sqh_first; 1358 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt, pt_queue); 1359 ++l1pt_reuse_count; 1360 } else { 1361 pt = pmap_alloc_l1pt(); 1362 if (!pt) 1363 return(ENOMEM); 1364 ++l1pt_create_count; 1365 } 1366 1367 /* Store the pointer to the l1 descriptor in the pmap. */ 1368 pmap->pm_l1pt = pt; 1369 1370 /* Get the physical address of the start of the l1 */ 1371 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1372 1373 /* Store the virtual address of the l1 in the pmap. */ 1374 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1375 1376 /* Clean the L1 if it is dirty */ 1377 if (!(pt->pt_flags & PTFLAG_CLEAN)) 1378 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1379 1380 /* Allocate a page table to map all the page tables for this pmap */ 1381 1382 #ifdef DIAGNOSTIC 1383 if (pmap->pm_vptpt) { 1384 /* XXX What if we have one already ? */ 1385 panic("pmap_allocpagedir: have pt already\n"); 1386 } 1387 #endif /* DIAGNOSTIC */ 1388 pmap->pm_vptpt = uvm_km_zalloc(kernel_map, NBPG); 1389 if (pmap->pm_vptpt == 0) { 1390 pmap_freepagedir(pmap); 1391 return(ENOMEM); 1392 } 1393 1394 /* need to lock this all up for growkernel */ 1395 simple_lock(&pmaps_lock); 1396 /* wish we didn't have to keep this locked... */ 1397 1398 /* Duplicate the kernel mappings. */ 1399 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1400 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1401 KERNEL_PD_SIZE); 1402 1403 pte = vtopte(pmap->pm_vptpt); 1404 pmap->pm_pptpt = l2pte_pa(*pte); 1405 1406 /* Revoke cacheability and bufferability */ 1407 /* XXX should be done better than this */ 1408 *pte &= ~L2_S_CACHE_MASK; 1409 1410 /* Wire in this page table */ 1411 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, TRUE); 1412 1413 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1414 1415 /* 1416 * Map the kernel page tables into the new PT map. 1417 */ 1418 bcopy((char *)(PTE_BASE 1419 + (PTE_BASE >> (PGSHIFT - 2)) 1420 + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1421 (char *)pmap->pm_vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1422 (KERNEL_PD_SIZE >> 2)); 1423 1424 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1425 simple_unlock(&pmaps_lock); 1426 1427 return(0); 1428 } 1429 1430 1431 /* 1432 * Initialize a preallocated and zeroed pmap structure, 1433 * such as one in a vmspace structure. 1434 */ 1435 1436 void 1437 pmap_pinit(struct pmap *pmap) 1438 { 1439 int backoff = 6; 1440 int retry = 10; 1441 1442 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1443 1444 /* Keep looping until we succeed in allocating a page directory */ 1445 while (pmap_allocpagedir(pmap) != 0) { 1446 /* 1447 * Ok we failed to allocate a suitable block of memory for an 1448 * L1 page table. This means that either: 1449 * 1. 16KB of virtual address space could not be allocated 1450 * 2. 16KB of physically contiguous memory on a 16KB boundary 1451 * could not be allocated. 1452 * 1453 * Since we cannot fail we will sleep for a while and try 1454 * again. 1455 * 1456 * Searching for a suitable L1 PT is expensive: 1457 * to avoid hogging the system when memory is really 1458 * scarce, use an exponential back-off so that 1459 * eventually we won't retry more than once every 8 1460 * seconds. This should allow other processes to run 1461 * to completion and free up resources. 1462 */ 1463 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1464 NULL); 1465 if (--retry == 0) { 1466 retry = 10; 1467 if (backoff) 1468 --backoff; 1469 } 1470 } 1471 1472 if (vector_page < KERNEL_BASE) { 1473 /* 1474 * Map the vector page. This will also allocate and map 1475 * an L2 table for it. 1476 */ 1477 pmap_enter(pmap, vector_page, systempage.pv_pa, 1478 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1479 pmap_update(pmap); 1480 } 1481 } 1482 1483 1484 void 1485 pmap_freepagedir(struct pmap *pmap) 1486 { 1487 /* Free the memory used for the page table mapping */ 1488 if (pmap->pm_vptpt != 0) 1489 uvm_km_free(kernel_map, (vaddr_t)pmap->pm_vptpt, NBPG); 1490 1491 /* junk the L1 page table */ 1492 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1493 /* Add the page table to the queue */ 1494 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pmap->pm_l1pt, pt_queue); 1495 ++l1pt_static_queue_count; 1496 } else if (l1pt_queue_count < 8) { 1497 /* Add the page table to the queue */ 1498 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1499 ++l1pt_queue_count; 1500 } else 1501 pmap_free_l1pt(pmap->pm_l1pt); 1502 } 1503 1504 1505 /* 1506 * Retire the given physical map from service. 1507 * Should only be called if the map contains no valid mappings. 1508 */ 1509 1510 void 1511 pmap_destroy(struct pmap *pmap) 1512 { 1513 struct vm_page *page; 1514 int count; 1515 1516 if (pmap == NULL) 1517 return; 1518 1519 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1520 1521 /* 1522 * Drop reference count 1523 */ 1524 simple_lock(&pmap->pm_obj.vmobjlock); 1525 count = --pmap->pm_obj.uo_refs; 1526 simple_unlock(&pmap->pm_obj.vmobjlock); 1527 if (count > 0) { 1528 return; 1529 } 1530 1531 /* 1532 * reference count is zero, free pmap resources and then free pmap. 1533 */ 1534 1535 /* 1536 * remove it from global list of pmaps 1537 */ 1538 1539 simple_lock(&pmaps_lock); 1540 LIST_REMOVE(pmap, pm_list); 1541 simple_unlock(&pmaps_lock); 1542 1543 if (vector_page < KERNEL_BASE) { 1544 /* Remove the vector page mapping */ 1545 pmap_remove(pmap, vector_page, vector_page + NBPG); 1546 pmap_update(pmap); 1547 } 1548 1549 /* 1550 * Free any page tables still mapped 1551 * This is only temporay until pmap_enter can count the number 1552 * of mappings made in a page table. Then pmap_remove() can 1553 * reduce the count and free the pagetable when the count 1554 * reaches zero. Note that entries in this list should match the 1555 * contents of the ptpt, however this is faster than walking a 1024 1556 * entries looking for pt's 1557 * taken from i386 pmap.c 1558 */ 1559 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1560 KASSERT((page->flags & PG_BUSY) == 0); 1561 page->wire_count = 0; 1562 uvm_pagefree(page); 1563 } 1564 1565 /* Free the page dir */ 1566 pmap_freepagedir(pmap); 1567 1568 /* return the pmap to the pool */ 1569 pool_put(&pmap_pmap_pool, pmap); 1570 } 1571 1572 1573 /* 1574 * void pmap_reference(struct pmap *pmap) 1575 * 1576 * Add a reference to the specified pmap. 1577 */ 1578 1579 void 1580 pmap_reference(struct pmap *pmap) 1581 { 1582 if (pmap == NULL) 1583 return; 1584 1585 simple_lock(&pmap->pm_lock); 1586 pmap->pm_obj.uo_refs++; 1587 simple_unlock(&pmap->pm_lock); 1588 } 1589 1590 /* 1591 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1592 * 1593 * Return the start and end addresses of the kernel's virtual space. 1594 * These values are setup in pmap_bootstrap and are updated as pages 1595 * are allocated. 1596 */ 1597 1598 void 1599 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1600 { 1601 *start = virtual_avail; 1602 *end = virtual_end; 1603 } 1604 1605 /* 1606 * Activate the address space for the specified process. If the process 1607 * is the current process, load the new MMU context. 1608 */ 1609 void 1610 pmap_activate(struct proc *p) 1611 { 1612 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1613 struct pcb *pcb = &p->p_addr->u_pcb; 1614 1615 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1616 (paddr_t *)&pcb->pcb_pagedir); 1617 1618 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1619 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1620 1621 if (p == curproc) { 1622 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1623 setttb((u_int)pcb->pcb_pagedir); 1624 } 1625 } 1626 1627 /* 1628 * Deactivate the address space of the specified process. 1629 */ 1630 void 1631 pmap_deactivate(struct proc *p) 1632 { 1633 } 1634 1635 /* 1636 * Perform any deferred pmap operations. 1637 */ 1638 void 1639 pmap_update(struct pmap *pmap) 1640 { 1641 1642 /* 1643 * We haven't deferred any pmap operations, but we do need to 1644 * make sure TLB/cache operations have completed. 1645 */ 1646 cpu_cpwait(); 1647 } 1648 1649 /* 1650 * pmap_clean_page() 1651 * 1652 * This is a local function used to work out the best strategy to clean 1653 * a single page referenced by its entry in the PV table. It's used by 1654 * pmap_copy_page, pmap_zero page and maybe some others later on. 1655 * 1656 * Its policy is effectively: 1657 * o If there are no mappings, we don't bother doing anything with the cache. 1658 * o If there is one mapping, we clean just that page. 1659 * o If there are multiple mappings, we clean the entire cache. 1660 * 1661 * So that some functions can be further optimised, it returns 0 if it didn't 1662 * clean the entire cache, or 1 if it did. 1663 * 1664 * XXX One bug in this routine is that if the pv_entry has a single page 1665 * mapped at 0x00000000 a whole cache clean will be performed rather than 1666 * just the 1 page. Since this should not occur in everyday use and if it does 1667 * it will just result in not the most efficient clean for the page. 1668 */ 1669 static int 1670 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1671 { 1672 struct pmap *pmap; 1673 struct pv_entry *npv; 1674 int cache_needs_cleaning = 0; 1675 vaddr_t page_to_clean = 0; 1676 1677 if (pv == NULL) 1678 /* nothing mapped in so nothing to flush */ 1679 return (0); 1680 1681 /* Since we flush the cache each time we change curproc, we 1682 * only need to flush the page if it is in the current pmap. 1683 */ 1684 if (curproc) 1685 pmap = curproc->p_vmspace->vm_map.pmap; 1686 else 1687 pmap = pmap_kernel(); 1688 1689 for (npv = pv; npv; npv = npv->pv_next) { 1690 if (npv->pv_pmap == pmap) { 1691 /* The page is mapped non-cacheable in 1692 * this map. No need to flush the cache. 1693 */ 1694 if (npv->pv_flags & PVF_NC) { 1695 #ifdef DIAGNOSTIC 1696 if (cache_needs_cleaning) 1697 panic("pmap_clean_page: " 1698 "cache inconsistency"); 1699 #endif 1700 break; 1701 } 1702 #if 0 1703 /* This doesn't work, because pmap_protect 1704 doesn't flush changes on pages that it 1705 has write-protected. */ 1706 1707 /* If the page is not writable and this 1708 is the source, then there is no need 1709 to flush it from the cache. */ 1710 else if (is_src && ! (npv->pv_flags & PVF_WRITE)) 1711 continue; 1712 #endif 1713 if (cache_needs_cleaning){ 1714 page_to_clean = 0; 1715 break; 1716 } 1717 else 1718 page_to_clean = npv->pv_va; 1719 cache_needs_cleaning = 1; 1720 } 1721 } 1722 1723 if (page_to_clean) 1724 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1725 else if (cache_needs_cleaning) { 1726 cpu_idcache_wbinv_all(); 1727 return (1); 1728 } 1729 return (0); 1730 } 1731 1732 /* 1733 * pmap_zero_page() 1734 * 1735 * Zero a given physical page by mapping it at a page hook point. 1736 * In doing the zero page op, the page we zero is mapped cachable, as with 1737 * StrongARM accesses to non-cached pages are non-burst making writing 1738 * _any_ bulk data very slow. 1739 */ 1740 #if ARM_MMU_GENERIC == 1 1741 void 1742 pmap_zero_page_generic(paddr_t phys) 1743 { 1744 #ifdef DEBUG 1745 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1746 1747 if (pg->mdpage.pvh_list != NULL) 1748 panic("pmap_zero_page: page has mappings"); 1749 #endif 1750 1751 KDASSERT((phys & PGOFSET) == 0); 1752 1753 /* 1754 * Hook in the page, zero it, and purge the cache for that 1755 * zeroed page. Invalidate the TLB as needed. 1756 */ 1757 *cdst_pte = L2_S_PROTO | phys | 1758 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1759 cpu_tlb_flushD_SE(cdstp); 1760 cpu_cpwait(); 1761 bzero_page(cdstp); 1762 cpu_dcache_wbinv_range(cdstp, NBPG); 1763 } 1764 #endif /* ARM_MMU_GENERIC == 1 */ 1765 1766 #if ARM_MMU_XSCALE == 1 1767 void 1768 pmap_zero_page_xscale(paddr_t phys) 1769 { 1770 #ifdef DEBUG 1771 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1772 1773 if (pg->mdpage.pvh_list != NULL) 1774 panic("pmap_zero_page: page has mappings"); 1775 #endif 1776 1777 KDASSERT((phys & PGOFSET) == 0); 1778 1779 /* 1780 * Hook in the page, zero it, and purge the cache for that 1781 * zeroed page. Invalidate the TLB as needed. 1782 */ 1783 *cdst_pte = L2_S_PROTO | phys | 1784 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1785 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1786 cpu_tlb_flushD_SE(cdstp); 1787 cpu_cpwait(); 1788 bzero_page(cdstp); 1789 xscale_cache_clean_minidata(); 1790 } 1791 #endif /* ARM_MMU_XSCALE == 1 */ 1792 1793 /* pmap_pageidlezero() 1794 * 1795 * The same as above, except that we assume that the page is not 1796 * mapped. This means we never have to flush the cache first. Called 1797 * from the idle loop. 1798 */ 1799 boolean_t 1800 pmap_pageidlezero(paddr_t phys) 1801 { 1802 int i, *ptr; 1803 boolean_t rv = TRUE; 1804 #ifdef DEBUG 1805 struct vm_page *pg; 1806 1807 pg = PHYS_TO_VM_PAGE(phys); 1808 if (pg->mdpage.pvh_list != NULL) 1809 panic("pmap_pageidlezero: page has mappings"); 1810 #endif 1811 1812 KDASSERT((phys & PGOFSET) == 0); 1813 1814 /* 1815 * Hook in the page, zero it, and purge the cache for that 1816 * zeroed page. Invalidate the TLB as needed. 1817 */ 1818 *cdst_pte = L2_S_PROTO | phys | 1819 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1820 cpu_tlb_flushD_SE(cdstp); 1821 cpu_cpwait(); 1822 1823 for (i = 0, ptr = (int *)cdstp; 1824 i < (NBPG / sizeof(int)); i++) { 1825 if (sched_whichqs != 0) { 1826 /* 1827 * A process has become ready. Abort now, 1828 * so we don't keep it waiting while we 1829 * do slow memory access to finish this 1830 * page. 1831 */ 1832 rv = FALSE; 1833 break; 1834 } 1835 *ptr++ = 0; 1836 } 1837 1838 if (rv) 1839 /* 1840 * if we aborted we'll rezero this page again later so don't 1841 * purge it unless we finished it 1842 */ 1843 cpu_dcache_wbinv_range(cdstp, NBPG); 1844 return (rv); 1845 } 1846 1847 /* 1848 * pmap_copy_page() 1849 * 1850 * Copy one physical page into another, by mapping the pages into 1851 * hook points. The same comment regarding cachability as in 1852 * pmap_zero_page also applies here. 1853 */ 1854 #if ARM_MMU_GENERIC == 1 1855 void 1856 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1857 { 1858 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1859 #ifdef DEBUG 1860 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1861 1862 if (dst_pg->mdpage.pvh_list != NULL) 1863 panic("pmap_copy_page: dst page has mappings"); 1864 #endif 1865 1866 KDASSERT((src & PGOFSET) == 0); 1867 KDASSERT((dst & PGOFSET) == 0); 1868 1869 /* 1870 * Clean the source page. Hold the source page's lock for 1871 * the duration of the copy so that no other mappings can 1872 * be created while we have a potentially aliased mapping. 1873 */ 1874 simple_lock(&src_pg->mdpage.pvh_slock); 1875 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1876 1877 /* 1878 * Map the pages into the page hook points, copy them, and purge 1879 * the cache for the appropriate page. Invalidate the TLB 1880 * as required. 1881 */ 1882 *csrc_pte = L2_S_PROTO | src | 1883 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1884 *cdst_pte = L2_S_PROTO | dst | 1885 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1886 cpu_tlb_flushD_SE(csrcp); 1887 cpu_tlb_flushD_SE(cdstp); 1888 cpu_cpwait(); 1889 bcopy_page(csrcp, cdstp); 1890 cpu_dcache_inv_range(csrcp, NBPG); 1891 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1892 cpu_dcache_wbinv_range(cdstp, NBPG); 1893 } 1894 #endif /* ARM_MMU_GENERIC == 1 */ 1895 1896 #if ARM_MMU_XSCALE == 1 1897 void 1898 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1899 { 1900 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1901 #ifdef DEBUG 1902 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1903 1904 if (dst_pg->mdpage.pvh_list != NULL) 1905 panic("pmap_copy_page: dst page has mappings"); 1906 #endif 1907 1908 KDASSERT((src & PGOFSET) == 0); 1909 KDASSERT((dst & PGOFSET) == 0); 1910 1911 /* 1912 * Clean the source page. Hold the source page's lock for 1913 * the duration of the copy so that no other mappings can 1914 * be created while we have a potentially aliased mapping. 1915 */ 1916 simple_lock(&src_pg->mdpage.pvh_slock); 1917 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1918 1919 /* 1920 * Map the pages into the page hook points, copy them, and purge 1921 * the cache for the appropriate page. Invalidate the TLB 1922 * as required. 1923 */ 1924 *csrc_pte = L2_S_PROTO | src | 1925 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 1926 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1927 *cdst_pte = L2_S_PROTO | dst | 1928 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1929 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1930 cpu_tlb_flushD_SE(csrcp); 1931 cpu_tlb_flushD_SE(cdstp); 1932 cpu_cpwait(); 1933 bcopy_page(csrcp, cdstp); 1934 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1935 xscale_cache_clean_minidata(); 1936 } 1937 #endif /* ARM_MMU_XSCALE == 1 */ 1938 1939 #if 0 1940 void 1941 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 1942 { 1943 pd_entry_t *pde; 1944 paddr_t pa; 1945 struct vm_page *m; 1946 1947 if (pmap == pmap_kernel()) 1948 return; 1949 1950 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 1951 pa = pmap_pte_pa(pde); 1952 m = PHYS_TO_VM_PAGE(pa); 1953 ++m->wire_count; 1954 #ifdef MYCROFT_HACK 1955 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 1956 pmap, va, pde, pa, m, m->wire_count); 1957 #endif 1958 } 1959 1960 void 1961 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 1962 { 1963 pd_entry_t *pde; 1964 paddr_t pa; 1965 struct vm_page *m; 1966 1967 if (pmap == pmap_kernel()) 1968 return; 1969 1970 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 1971 pa = pmap_pte_pa(pde); 1972 m = PHYS_TO_VM_PAGE(pa); 1973 --m->wire_count; 1974 #ifdef MYCROFT_HACK 1975 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 1976 pmap, va, pde, pa, m, m->wire_count); 1977 #endif 1978 if (m->wire_count == 0) { 1979 #ifdef MYCROFT_HACK 1980 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 1981 pmap, va, pde, pa, m); 1982 #endif 1983 pmap_unmap_in_l1(pmap, va); 1984 uvm_pagefree(m); 1985 --pmap->pm_stats.resident_count; 1986 } 1987 } 1988 #else 1989 #define pmap_pte_addref(pmap, va) 1990 #define pmap_pte_delref(pmap, va) 1991 #endif 1992 1993 /* 1994 * Since we have a virtually indexed cache, we may need to inhibit caching if 1995 * there is more than one mapping and at least one of them is writable. 1996 * Since we purge the cache on every context switch, we only need to check for 1997 * other mappings within the same pmap, or kernel_pmap. 1998 * This function is also called when a page is unmapped, to possibly reenable 1999 * caching on any remaining mappings. 2000 * 2001 * The code implements the following logic, where: 2002 * 2003 * KW = # of kernel read/write pages 2004 * KR = # of kernel read only pages 2005 * UW = # of user read/write pages 2006 * UR = # of user read only pages 2007 * OW = # of user read/write pages in another pmap, then 2008 * 2009 * KC = kernel mapping is cacheable 2010 * UC = user mapping is cacheable 2011 * 2012 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2013 * +--------------------------------------------- 2014 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2015 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2016 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2017 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2018 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2019 * 2020 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2021 */ 2022 __inline static void 2023 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2024 boolean_t clear_cache) 2025 { 2026 if (pmap == pmap_kernel()) 2027 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2028 else 2029 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2030 } 2031 2032 static void 2033 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2034 boolean_t clear_cache) 2035 { 2036 int user_entries = 0; 2037 int user_writable = 0; 2038 int user_cacheable = 0; 2039 int kernel_entries = 0; 2040 int kernel_writable = 0; 2041 int kernel_cacheable = 0; 2042 struct pv_entry *pv; 2043 struct pmap *last_pmap = pmap; 2044 2045 #ifdef DIAGNOSTIC 2046 if (pmap != pmap_kernel()) 2047 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2048 #endif 2049 2050 /* 2051 * Pass one, see if there are both kernel and user pmaps for 2052 * this page. Calculate whether there are user-writable or 2053 * kernel-writable pages. 2054 */ 2055 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2056 if (pv->pv_pmap != pmap) { 2057 user_entries++; 2058 if (pv->pv_flags & PVF_WRITE) 2059 user_writable++; 2060 if ((pv->pv_flags & PVF_NC) == 0) 2061 user_cacheable++; 2062 } else { 2063 kernel_entries++; 2064 if (pv->pv_flags & PVF_WRITE) 2065 kernel_writable++; 2066 if ((pv->pv_flags & PVF_NC) == 0) 2067 kernel_cacheable++; 2068 } 2069 } 2070 2071 /* 2072 * We know we have just been updating a kernel entry, so if 2073 * all user pages are already cacheable, then there is nothing 2074 * further to do. 2075 */ 2076 if (kernel_entries == 0 && 2077 user_cacheable == user_entries) 2078 return; 2079 2080 if (user_entries) { 2081 /* 2082 * Scan over the list again, for each entry, if it 2083 * might not be set correctly, call pmap_vac_me_user 2084 * to recalculate the settings. 2085 */ 2086 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2087 /* 2088 * We know kernel mappings will get set 2089 * correctly in other calls. We also know 2090 * that if the pmap is the same as last_pmap 2091 * then we've just handled this entry. 2092 */ 2093 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2094 continue; 2095 /* 2096 * If there are kernel entries and this page 2097 * is writable but non-cacheable, then we can 2098 * skip this entry also. 2099 */ 2100 if (kernel_entries > 0 && 2101 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2102 (PVF_NC | PVF_WRITE)) 2103 continue; 2104 /* 2105 * Similarly if there are no kernel-writable 2106 * entries and the page is already 2107 * read-only/cacheable. 2108 */ 2109 if (kernel_writable == 0 && 2110 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2111 continue; 2112 /* 2113 * For some of the remaining cases, we know 2114 * that we must recalculate, but for others we 2115 * can't tell if they are correct or not, so 2116 * we recalculate anyway. 2117 */ 2118 pmap_unmap_ptes(last_pmap); 2119 last_pmap = pv->pv_pmap; 2120 ptes = pmap_map_ptes(last_pmap); 2121 pmap_vac_me_user(last_pmap, pg, ptes, 2122 pmap_is_curpmap(last_pmap)); 2123 } 2124 /* Restore the pte mapping that was passed to us. */ 2125 if (last_pmap != pmap) { 2126 pmap_unmap_ptes(last_pmap); 2127 ptes = pmap_map_ptes(pmap); 2128 } 2129 if (kernel_entries == 0) 2130 return; 2131 } 2132 2133 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2134 return; 2135 } 2136 2137 static void 2138 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2139 boolean_t clear_cache) 2140 { 2141 struct pmap *kpmap = pmap_kernel(); 2142 struct pv_entry *pv, *npv; 2143 int entries = 0; 2144 int writable = 0; 2145 int cacheable_entries = 0; 2146 int kern_cacheable = 0; 2147 int other_writable = 0; 2148 2149 pv = pg->mdpage.pvh_list; 2150 KASSERT(ptes != NULL); 2151 2152 /* 2153 * Count mappings and writable mappings in this pmap. 2154 * Include kernel mappings as part of our own. 2155 * Keep a pointer to the first one. 2156 */ 2157 for (npv = pv; npv; npv = npv->pv_next) { 2158 /* Count mappings in the same pmap */ 2159 if (pmap == npv->pv_pmap || 2160 kpmap == npv->pv_pmap) { 2161 if (entries++ == 0) 2162 pv = npv; 2163 /* Cacheable mappings */ 2164 if ((npv->pv_flags & PVF_NC) == 0) { 2165 cacheable_entries++; 2166 if (kpmap == npv->pv_pmap) 2167 kern_cacheable++; 2168 } 2169 /* Writable mappings */ 2170 if (npv->pv_flags & PVF_WRITE) 2171 ++writable; 2172 } else if (npv->pv_flags & PVF_WRITE) 2173 other_writable = 1; 2174 } 2175 2176 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2177 "writable %d cacheable %d %s\n", pmap, entries, writable, 2178 cacheable_entries, clear_cache ? "clean" : "no clean")); 2179 2180 /* 2181 * Enable or disable caching as necessary. 2182 * Note: the first entry might be part of the kernel pmap, 2183 * so we can't assume this is indicative of the state of the 2184 * other (maybe non-kpmap) entries. 2185 */ 2186 if ((entries > 1 && writable) || 2187 (entries > 0 && pmap == kpmap && other_writable)) { 2188 if (cacheable_entries == 0) 2189 return; 2190 for (npv = pv; npv; npv = npv->pv_next) { 2191 if ((pmap == npv->pv_pmap 2192 || kpmap == npv->pv_pmap) && 2193 (npv->pv_flags & PVF_NC) == 0) { 2194 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2195 npv->pv_flags |= PVF_NC; 2196 /* 2197 * If this page needs flushing from the 2198 * cache, and we aren't going to do it 2199 * below, do it now. 2200 */ 2201 if ((cacheable_entries < 4 && 2202 (clear_cache || npv->pv_pmap == kpmap)) || 2203 (npv->pv_pmap == kpmap && 2204 !clear_cache && kern_cacheable < 4)) { 2205 cpu_idcache_wbinv_range(npv->pv_va, 2206 NBPG); 2207 cpu_tlb_flushID_SE(npv->pv_va); 2208 } 2209 } 2210 } 2211 if ((clear_cache && cacheable_entries >= 4) || 2212 kern_cacheable >= 4) { 2213 cpu_idcache_wbinv_all(); 2214 cpu_tlb_flushID(); 2215 } 2216 cpu_cpwait(); 2217 } else if (entries > 0) { 2218 /* 2219 * Turn cacheing back on for some pages. If it is a kernel 2220 * page, only do so if there are no other writable pages. 2221 */ 2222 for (npv = pv; npv; npv = npv->pv_next) { 2223 if ((pmap == npv->pv_pmap || 2224 (kpmap == npv->pv_pmap && other_writable == 0)) && 2225 (npv->pv_flags & PVF_NC)) { 2226 ptes[arm_btop(npv->pv_va)] |= 2227 pte_l2_s_cache_mode; 2228 npv->pv_flags &= ~PVF_NC; 2229 } 2230 } 2231 } 2232 } 2233 2234 /* 2235 * pmap_remove() 2236 * 2237 * pmap_remove is responsible for nuking a number of mappings for a range 2238 * of virtual address space in the current pmap. To do this efficiently 2239 * is interesting, because in a number of cases a wide virtual address 2240 * range may be supplied that contains few actual mappings. So, the 2241 * optimisations are: 2242 * 1. Try and skip over hunks of address space for which an L1 entry 2243 * does not exist. 2244 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2245 * maybe do just a partial cache clean. This path of execution is 2246 * complicated by the fact that the cache must be flushed _before_ 2247 * the PTE is nuked, being a VAC :-) 2248 * 3. Maybe later fast-case a single page, but I don't think this is 2249 * going to make _that_ much difference overall. 2250 */ 2251 2252 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2253 2254 void 2255 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2256 { 2257 int cleanlist_idx = 0; 2258 struct pagelist { 2259 vaddr_t va; 2260 pt_entry_t *pte; 2261 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2262 pt_entry_t *pte = 0, *ptes; 2263 paddr_t pa; 2264 int pmap_active; 2265 struct vm_page *pg; 2266 2267 /* Exit quick if there is no pmap */ 2268 if (!pmap) 2269 return; 2270 2271 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2272 pmap, sva, eva)); 2273 2274 /* 2275 * we lock in the pmap => vm_page direction 2276 */ 2277 PMAP_MAP_TO_HEAD_LOCK(); 2278 2279 ptes = pmap_map_ptes(pmap); 2280 /* Get a page table pointer */ 2281 while (sva < eva) { 2282 if (pmap_pde_page(pmap_pde(pmap, sva))) 2283 break; 2284 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2285 } 2286 2287 pte = &ptes[arm_btop(sva)]; 2288 /* Note if the pmap is active thus require cache and tlb cleans */ 2289 pmap_active = pmap_is_curpmap(pmap); 2290 2291 /* Now loop along */ 2292 while (sva < eva) { 2293 /* Check if we can move to the next PDE (l1 chunk) */ 2294 if (!(sva & L2_ADDR_BITS)) 2295 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2296 sva += L1_S_SIZE; 2297 pte += arm_btop(L1_S_SIZE); 2298 continue; 2299 } 2300 2301 /* We've found a valid PTE, so this page of PTEs has to go. */ 2302 if (pmap_pte_v(pte)) { 2303 /* Update statistics */ 2304 --pmap->pm_stats.resident_count; 2305 2306 /* 2307 * Add this page to our cache remove list, if we can. 2308 * If, however the cache remove list is totally full, 2309 * then do a complete cache invalidation taking note 2310 * to backtrack the PTE table beforehand, and ignore 2311 * the lists in future because there's no longer any 2312 * point in bothering with them (we've paid the 2313 * penalty, so will carry on unhindered). Otherwise, 2314 * when we fall out, we just clean the list. 2315 */ 2316 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2317 pa = pmap_pte_pa(pte); 2318 2319 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2320 /* Add to the clean list. */ 2321 cleanlist[cleanlist_idx].pte = pte; 2322 cleanlist[cleanlist_idx].va = sva; 2323 cleanlist_idx++; 2324 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2325 int cnt; 2326 2327 /* Nuke everything if needed. */ 2328 if (pmap_active) { 2329 cpu_idcache_wbinv_all(); 2330 cpu_tlb_flushID(); 2331 } 2332 2333 /* 2334 * Roll back the previous PTE list, 2335 * and zero out the current PTE. 2336 */ 2337 for (cnt = 0; cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) { 2338 *cleanlist[cnt].pte = 0; 2339 pmap_pte_delref(pmap, cleanlist[cnt].va); 2340 } 2341 *pte = 0; 2342 pmap_pte_delref(pmap, sva); 2343 cleanlist_idx++; 2344 } else { 2345 /* 2346 * We've already nuked the cache and 2347 * TLB, so just carry on regardless, 2348 * and we won't need to do it again 2349 */ 2350 *pte = 0; 2351 pmap_pte_delref(pmap, sva); 2352 } 2353 2354 /* 2355 * Update flags. In a number of circumstances, 2356 * we could cluster a lot of these and do a 2357 * number of sequential pages in one go. 2358 */ 2359 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2360 struct pv_entry *pve; 2361 simple_lock(&pg->mdpage.pvh_slock); 2362 pve = pmap_remove_pv(pg, pmap, sva); 2363 pmap_free_pv(pmap, pve); 2364 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2365 simple_unlock(&pg->mdpage.pvh_slock); 2366 } 2367 } 2368 sva += NBPG; 2369 pte++; 2370 } 2371 2372 pmap_unmap_ptes(pmap); 2373 /* 2374 * Now, if we've fallen through down to here, chances are that there 2375 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2376 */ 2377 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2378 u_int cnt; 2379 2380 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2381 if (pmap_active) { 2382 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2383 NBPG); 2384 *cleanlist[cnt].pte = 0; 2385 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2386 } else 2387 *cleanlist[cnt].pte = 0; 2388 pmap_pte_delref(pmap, cleanlist[cnt].va); 2389 } 2390 } 2391 PMAP_MAP_TO_HEAD_UNLOCK(); 2392 } 2393 2394 /* 2395 * Routine: pmap_remove_all 2396 * Function: 2397 * Removes this physical page from 2398 * all physical maps in which it resides. 2399 * Reflects back modify bits to the pager. 2400 */ 2401 2402 static void 2403 pmap_remove_all(struct vm_page *pg) 2404 { 2405 struct pv_entry *pv, *npv; 2406 struct pmap *pmap; 2407 pt_entry_t *pte, *ptes; 2408 2409 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2410 2411 /* set vm_page => pmap locking */ 2412 PMAP_HEAD_TO_MAP_LOCK(); 2413 2414 simple_lock(&pg->mdpage.pvh_slock); 2415 2416 pv = pg->mdpage.pvh_list; 2417 if (pv == NULL) { 2418 PDEBUG(0, printf("free page\n")); 2419 simple_unlock(&pg->mdpage.pvh_slock); 2420 PMAP_HEAD_TO_MAP_UNLOCK(); 2421 return; 2422 } 2423 pmap_clean_page(pv, FALSE); 2424 2425 while (pv) { 2426 pmap = pv->pv_pmap; 2427 ptes = pmap_map_ptes(pmap); 2428 pte = &ptes[arm_btop(pv->pv_va)]; 2429 2430 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2431 pv->pv_va, pv->pv_flags)); 2432 #ifdef DEBUG 2433 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2434 pmap_pte_v(pte) == 0 || 2435 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2436 panic("pmap_remove_all: bad mapping"); 2437 #endif /* DEBUG */ 2438 2439 /* 2440 * Update statistics 2441 */ 2442 --pmap->pm_stats.resident_count; 2443 2444 /* Wired bit */ 2445 if (pv->pv_flags & PVF_WIRED) 2446 --pmap->pm_stats.wired_count; 2447 2448 /* 2449 * Invalidate the PTEs. 2450 * XXX: should cluster them up and invalidate as many 2451 * as possible at once. 2452 */ 2453 2454 #ifdef needednotdone 2455 reduce wiring count on page table pages as references drop 2456 #endif 2457 2458 *pte = 0; 2459 pmap_pte_delref(pmap, pv->pv_va); 2460 2461 npv = pv->pv_next; 2462 pmap_free_pv(pmap, pv); 2463 pv = npv; 2464 pmap_unmap_ptes(pmap); 2465 } 2466 pg->mdpage.pvh_list = NULL; 2467 simple_unlock(&pg->mdpage.pvh_slock); 2468 PMAP_HEAD_TO_MAP_UNLOCK(); 2469 2470 PDEBUG(0, printf("done\n")); 2471 cpu_tlb_flushID(); 2472 cpu_cpwait(); 2473 } 2474 2475 2476 /* 2477 * Set the physical protection on the specified range of this map as requested. 2478 */ 2479 2480 void 2481 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2482 { 2483 pt_entry_t *pte = NULL, *ptes; 2484 struct vm_page *pg; 2485 int armprot; 2486 int flush = 0; 2487 paddr_t pa; 2488 2489 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2490 pmap, sva, eva, prot)); 2491 2492 if (~prot & VM_PROT_READ) { 2493 /* Just remove the mappings. */ 2494 pmap_remove(pmap, sva, eva); 2495 /* pmap_update not needed as it should be called by the caller 2496 * of pmap_protect */ 2497 return; 2498 } 2499 if (prot & VM_PROT_WRITE) { 2500 /* 2501 * If this is a read->write transition, just ignore it and let 2502 * uvm_fault() take care of it later. 2503 */ 2504 return; 2505 } 2506 2507 /* Need to lock map->head */ 2508 PMAP_MAP_TO_HEAD_LOCK(); 2509 2510 ptes = pmap_map_ptes(pmap); 2511 /* 2512 * We need to acquire a pointer to a page table page before entering 2513 * the following loop. 2514 */ 2515 while (sva < eva) { 2516 if (pmap_pde_page(pmap_pde(pmap, sva))) 2517 break; 2518 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2519 } 2520 2521 pte = &ptes[arm_btop(sva)]; 2522 2523 while (sva < eva) { 2524 /* only check once in a while */ 2525 if ((sva & L2_ADDR_BITS) == 0) { 2526 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2527 /* We can race ahead here, to the next pde. */ 2528 sva += L1_S_SIZE; 2529 pte += arm_btop(L1_S_SIZE); 2530 continue; 2531 } 2532 } 2533 2534 if (!pmap_pte_v(pte)) 2535 goto next; 2536 2537 flush = 1; 2538 2539 armprot = 0; 2540 if (sva < VM_MAXUSER_ADDRESS) 2541 armprot |= L2_S_PROT_U; 2542 else if (sva < VM_MAX_ADDRESS) 2543 armprot |= L2_S_PROT_W; /* XXX Ekk what is this ? */ 2544 *pte = (*pte & 0xfffff00f) | armprot; 2545 2546 pa = pmap_pte_pa(pte); 2547 2548 /* Get the physical page index */ 2549 2550 /* Clear write flag */ 2551 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2552 simple_lock(&pg->mdpage.pvh_slock); 2553 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2554 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2555 simple_unlock(&pg->mdpage.pvh_slock); 2556 } 2557 2558 next: 2559 sva += NBPG; 2560 pte++; 2561 } 2562 pmap_unmap_ptes(pmap); 2563 PMAP_MAP_TO_HEAD_UNLOCK(); 2564 if (flush) 2565 cpu_tlb_flushID(); 2566 } 2567 2568 /* 2569 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2570 * int flags) 2571 * 2572 * Insert the given physical page (p) at 2573 * the specified virtual address (v) in the 2574 * target physical map with the protection requested. 2575 * 2576 * If specified, the page will be wired down, meaning 2577 * that the related pte can not be reclaimed. 2578 * 2579 * NB: This is the only routine which MAY NOT lazy-evaluate 2580 * or lose information. That is, this routine must actually 2581 * insert this page into the given map NOW. 2582 */ 2583 2584 int 2585 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2586 int flags) 2587 { 2588 pt_entry_t *ptes, opte, npte; 2589 paddr_t opa; 2590 boolean_t wired = (flags & PMAP_WIRED) != 0; 2591 struct vm_page *pg; 2592 struct pv_entry *pve; 2593 int error, nflags; 2594 2595 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2596 va, pa, pmap, prot, wired)); 2597 2598 #ifdef DIAGNOSTIC 2599 /* Valid address ? */ 2600 if (va >= (pmap_curmaxkvaddr)) 2601 panic("pmap_enter: too big"); 2602 if (pmap != pmap_kernel() && va != 0) { 2603 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2604 panic("pmap_enter: kernel page in user map"); 2605 } else { 2606 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2607 panic("pmap_enter: user page in kernel map"); 2608 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2609 panic("pmap_enter: entering PT page"); 2610 } 2611 #endif 2612 2613 KDASSERT(((va | pa) & PGOFSET) == 0); 2614 2615 /* 2616 * Get a pointer to the page. Later on in this function, we 2617 * test for a managed page by checking pg != NULL. 2618 */ 2619 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2620 2621 /* get lock */ 2622 PMAP_MAP_TO_HEAD_LOCK(); 2623 2624 /* 2625 * map the ptes. If there's not already an L2 table for this 2626 * address, allocate one. 2627 */ 2628 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2629 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2630 struct vm_page *ptp; 2631 2632 /* kernel should be pre-grown */ 2633 KASSERT(pmap != pmap_kernel()); 2634 2635 /* if failure is allowed then don't try too hard */ 2636 ptp = pmap_get_ptp(pmap, va & L1_S_FRAME); 2637 if (ptp == NULL) { 2638 if (flags & PMAP_CANFAIL) { 2639 error = ENOMEM; 2640 goto out; 2641 } 2642 panic("pmap_enter: get ptp failed"); 2643 } 2644 } 2645 opte = ptes[arm_btop(va)]; 2646 2647 nflags = 0; 2648 if (prot & VM_PROT_WRITE) 2649 nflags |= PVF_WRITE; 2650 if (wired) 2651 nflags |= PVF_WIRED; 2652 2653 /* Is the pte valid ? If so then this page is already mapped */ 2654 if (l2pte_valid(opte)) { 2655 /* Get the physical address of the current page mapped */ 2656 opa = l2pte_pa(opte); 2657 2658 /* Are we mapping the same page ? */ 2659 if (opa == pa) { 2660 /* Has the wiring changed ? */ 2661 if (pg != NULL) { 2662 simple_lock(&pg->mdpage.pvh_slock); 2663 (void) pmap_modify_pv(pmap, va, pg, 2664 PVF_WRITE | PVF_WIRED, nflags); 2665 simple_unlock(&pg->mdpage.pvh_slock); 2666 } 2667 } else { 2668 struct vm_page *opg; 2669 2670 /* We are replacing the page with a new one. */ 2671 cpu_idcache_wbinv_range(va, NBPG); 2672 2673 /* 2674 * If it is part of our managed memory then we 2675 * must remove it from the PV list 2676 */ 2677 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2678 simple_lock(&opg->mdpage.pvh_slock); 2679 pve = pmap_remove_pv(opg, pmap, va); 2680 simple_unlock(&opg->mdpage.pvh_slock); 2681 } else { 2682 pve = NULL; 2683 } 2684 2685 goto enter; 2686 } 2687 } else { 2688 opa = 0; 2689 pve = NULL; 2690 pmap_pte_addref(pmap, va); 2691 2692 /* pte is not valid so we must be hooking in a new page */ 2693 ++pmap->pm_stats.resident_count; 2694 2695 enter: 2696 /* 2697 * Enter on the PV list if part of our managed memory 2698 */ 2699 if (pg != NULL) { 2700 if (pve == NULL) { 2701 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2702 if (pve == NULL) { 2703 if (flags & PMAP_CANFAIL) { 2704 error = ENOMEM; 2705 goto out; 2706 } 2707 panic("pmap_enter: no pv entries " 2708 "available"); 2709 } 2710 } 2711 /* enter_pv locks pvh when adding */ 2712 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2713 } else { 2714 if (pve != NULL) 2715 pmap_free_pv(pmap, pve); 2716 } 2717 } 2718 2719 /* Construct the pte, giving the correct access. */ 2720 npte = pa; 2721 2722 /* VA 0 is magic. */ 2723 if (pmap != pmap_kernel() && va != vector_page) 2724 npte |= L2_S_PROT_U; 2725 2726 if (pg != NULL) { 2727 #ifdef DIAGNOSTIC 2728 if ((flags & VM_PROT_ALL) & ~prot) 2729 panic("pmap_enter: access_type exceeds prot"); 2730 #endif 2731 npte |= pte_l2_s_cache_mode; 2732 if (flags & VM_PROT_WRITE) { 2733 npte |= L2_S_PROTO | L2_S_PROT_W; 2734 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2735 } else if (flags & VM_PROT_ALL) { 2736 npte |= L2_S_PROTO; 2737 pg->mdpage.pvh_attrs |= PVF_REF; 2738 } else 2739 npte |= L2_TYPE_INV; 2740 } else { 2741 if (prot & VM_PROT_WRITE) 2742 npte |= L2_S_PROTO | L2_S_PROT_W; 2743 else if (prot & VM_PROT_ALL) 2744 npte |= L2_S_PROTO; 2745 else 2746 npte |= L2_TYPE_INV; 2747 } 2748 2749 ptes[arm_btop(va)] = npte; 2750 2751 if (pg != NULL) { 2752 simple_lock(&pg->mdpage.pvh_slock); 2753 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2754 simple_unlock(&pg->mdpage.pvh_slock); 2755 } 2756 2757 /* Better flush the TLB ... */ 2758 cpu_tlb_flushID_SE(va); 2759 error = 0; 2760 out: 2761 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2762 PMAP_MAP_TO_HEAD_UNLOCK(); 2763 2764 return error; 2765 } 2766 2767 /* 2768 * pmap_kenter_pa: enter a kernel mapping 2769 * 2770 * => no need to lock anything assume va is already allocated 2771 * => should be faster than normal pmap enter function 2772 */ 2773 void 2774 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2775 { 2776 pt_entry_t *pte; 2777 2778 pte = vtopte(va); 2779 KASSERT(!pmap_pte_v(pte)); 2780 2781 *pte = L2_S_PROTO | pa | 2782 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2783 } 2784 2785 void 2786 pmap_kremove(vaddr_t va, vsize_t len) 2787 { 2788 pt_entry_t *pte; 2789 2790 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2791 2792 /* 2793 * We assume that we will only be called with small 2794 * regions of memory. 2795 */ 2796 2797 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2798 pte = vtopte(va); 2799 cpu_idcache_wbinv_range(va, PAGE_SIZE); 2800 *pte = 0; 2801 cpu_tlb_flushID_SE(va); 2802 } 2803 } 2804 2805 /* 2806 * pmap_page_protect: 2807 * 2808 * Lower the permission for all mappings to a given page. 2809 */ 2810 2811 void 2812 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2813 { 2814 2815 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 2816 VM_PAGE_TO_PHYS(pg), prot)); 2817 2818 switch(prot) { 2819 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 2820 case VM_PROT_READ|VM_PROT_WRITE: 2821 return; 2822 2823 case VM_PROT_READ: 2824 case VM_PROT_READ|VM_PROT_EXECUTE: 2825 pmap_clearbit(pg, PVF_WRITE); 2826 break; 2827 2828 default: 2829 pmap_remove_all(pg); 2830 break; 2831 } 2832 } 2833 2834 2835 /* 2836 * Routine: pmap_unwire 2837 * Function: Clear the wired attribute for a map/virtual-address 2838 * pair. 2839 * In/out conditions: 2840 * The mapping must already exist in the pmap. 2841 */ 2842 2843 void 2844 pmap_unwire(struct pmap *pmap, vaddr_t va) 2845 { 2846 pt_entry_t *ptes; 2847 struct vm_page *pg; 2848 paddr_t pa; 2849 2850 PMAP_MAP_TO_HEAD_LOCK(); 2851 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2852 2853 if (pmap_pde_v(pmap_pde(pmap, va))) { 2854 #ifdef DIAGNOSTIC 2855 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 2856 panic("pmap_unwire: invalid L2 PTE"); 2857 #endif 2858 /* Extract the physical address of the page */ 2859 pa = l2pte_pa(ptes[arm_btop(va)]); 2860 2861 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 2862 goto out; 2863 2864 /* Update the wired bit in the pv entry for this page. */ 2865 simple_lock(&pg->mdpage.pvh_slock); 2866 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 2867 simple_unlock(&pg->mdpage.pvh_slock); 2868 } 2869 #ifdef DIAGNOSTIC 2870 else { 2871 panic("pmap_unwire: invalid L1 PTE"); 2872 } 2873 #endif 2874 out: 2875 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2876 PMAP_MAP_TO_HEAD_UNLOCK(); 2877 } 2878 2879 /* 2880 * Routine: pmap_extract 2881 * Function: 2882 * Extract the physical page address associated 2883 * with the given map/virtual_address pair. 2884 */ 2885 boolean_t 2886 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 2887 { 2888 pd_entry_t *pde; 2889 pt_entry_t *pte, *ptes; 2890 paddr_t pa; 2891 2892 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 2893 2894 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2895 2896 pde = pmap_pde(pmap, va); 2897 pte = &ptes[arm_btop(va)]; 2898 2899 if (pmap_pde_section(pde)) { 2900 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 2901 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 2902 goto out; 2903 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 2904 PDEBUG(5, printf("no mapping\n")); 2905 goto failed; 2906 } 2907 2908 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 2909 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 2910 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 2911 goto out; 2912 } 2913 2914 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 2915 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 2916 2917 out: 2918 if (pap != NULL) 2919 *pap = pa; 2920 2921 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2922 return (TRUE); 2923 2924 failed: 2925 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2926 return (FALSE); 2927 } 2928 2929 2930 /* 2931 * pmap_copy: 2932 * 2933 * Copy the range specified by src_addr/len from the source map to the 2934 * range dst_addr/len in the destination map. 2935 * 2936 * This routine is only advisory and need not do anything. 2937 */ 2938 /* Call deleted in <arm/arm32/pmap.h> */ 2939 2940 #if defined(PMAP_DEBUG) 2941 void 2942 pmap_dump_pvlist(phys, m) 2943 vaddr_t phys; 2944 char *m; 2945 { 2946 struct vm_page *pg; 2947 struct pv_entry *pv; 2948 2949 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 2950 printf("INVALID PA\n"); 2951 return; 2952 } 2953 simple_lock(&pg->mdpage.pvh_slock); 2954 printf("%s %08lx:", m, phys); 2955 if (pg->mdpage.pvh_list == NULL) { 2956 printf(" no mappings\n"); 2957 return; 2958 } 2959 2960 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 2961 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 2962 pv->pv_va, pv->pv_flags); 2963 2964 printf("\n"); 2965 simple_unlock(&pg->mdpage.pvh_slock); 2966 } 2967 2968 #endif /* PMAP_DEBUG */ 2969 2970 static pt_entry_t * 2971 pmap_map_ptes(struct pmap *pmap) 2972 { 2973 struct proc *p; 2974 2975 /* the kernel's pmap is always accessible */ 2976 if (pmap == pmap_kernel()) { 2977 return (pt_entry_t *)PTE_BASE; 2978 } 2979 2980 if (pmap_is_curpmap(pmap)) { 2981 simple_lock(&pmap->pm_obj.vmobjlock); 2982 return (pt_entry_t *)PTE_BASE; 2983 } 2984 2985 p = curproc; 2986 KDASSERT(p != NULL); 2987 2988 /* need to lock both curpmap and pmap: use ordered locking */ 2989 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 2990 simple_lock(&pmap->pm_obj.vmobjlock); 2991 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 2992 } else { 2993 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 2994 simple_lock(&pmap->pm_obj.vmobjlock); 2995 } 2996 2997 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, pmap->pm_pptpt, 2998 FALSE); 2999 cpu_tlb_flushD(); 3000 cpu_cpwait(); 3001 return (pt_entry_t *)APTE_BASE; 3002 } 3003 3004 /* 3005 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3006 */ 3007 3008 static void 3009 pmap_unmap_ptes(struct pmap *pmap) 3010 { 3011 3012 if (pmap == pmap_kernel()) { 3013 return; 3014 } 3015 if (pmap_is_curpmap(pmap)) { 3016 simple_unlock(&pmap->pm_obj.vmobjlock); 3017 } else { 3018 KDASSERT(curproc != NULL); 3019 simple_unlock(&pmap->pm_obj.vmobjlock); 3020 simple_unlock( 3021 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3022 } 3023 } 3024 3025 /* 3026 * Modify pte bits for all ptes corresponding to the given physical address. 3027 * We use `maskbits' rather than `clearbits' because we're always passing 3028 * constants and the latter would require an extra inversion at run-time. 3029 */ 3030 3031 static void 3032 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3033 { 3034 struct pv_entry *pv; 3035 pt_entry_t *ptes; 3036 vaddr_t va; 3037 int tlbentry; 3038 3039 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3040 VM_PAGE_TO_PHYS(pg), maskbits)); 3041 3042 tlbentry = 0; 3043 3044 PMAP_HEAD_TO_MAP_LOCK(); 3045 simple_lock(&pg->mdpage.pvh_slock); 3046 3047 /* 3048 * Clear saved attributes (modify, reference) 3049 */ 3050 pg->mdpage.pvh_attrs &= ~maskbits; 3051 3052 if (pg->mdpage.pvh_list == NULL) { 3053 simple_unlock(&pg->mdpage.pvh_slock); 3054 PMAP_HEAD_TO_MAP_UNLOCK(); 3055 return; 3056 } 3057 3058 /* 3059 * Loop over all current mappings setting/clearing as appropos 3060 */ 3061 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3062 va = pv->pv_va; 3063 pv->pv_flags &= ~maskbits; 3064 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3065 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3066 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3067 if ((pv->pv_flags & PVF_NC)) { 3068 /* 3069 * Entry is not cacheable: reenable 3070 * the cache, nothing to flush 3071 * 3072 * Don't turn caching on again if this 3073 * is a modified emulation. This 3074 * would be inconsitent with the 3075 * settings created by 3076 * pmap_vac_me_harder(). 3077 * 3078 * There's no need to call 3079 * pmap_vac_me_harder() here: all 3080 * pages are loosing their write 3081 * permission. 3082 * 3083 */ 3084 if (maskbits & PVF_WRITE) { 3085 ptes[arm_btop(va)] |= 3086 pte_l2_s_cache_mode; 3087 pv->pv_flags &= ~PVF_NC; 3088 } 3089 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3090 /* 3091 * Entry is cacheable: check if pmap is 3092 * current if it is flush it, 3093 * otherwise it won't be in the cache 3094 */ 3095 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3096 } 3097 3098 /* make the pte read only */ 3099 ptes[arm_btop(va)] &= ~L2_S_PROT_W; 3100 } 3101 3102 if (maskbits & PVF_REF) 3103 ptes[arm_btop(va)] = 3104 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_TYPE_INV; 3105 3106 if (pmap_is_curpmap(pv->pv_pmap)) { 3107 /* 3108 * if we had cacheable pte's we'd clean the 3109 * pte out to memory here 3110 * 3111 * flush tlb entry as it's in the current pmap 3112 */ 3113 cpu_tlb_flushID_SE(pv->pv_va); 3114 } 3115 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3116 } 3117 cpu_cpwait(); 3118 3119 simple_unlock(&pg->mdpage.pvh_slock); 3120 PMAP_HEAD_TO_MAP_UNLOCK(); 3121 } 3122 3123 /* 3124 * pmap_clear_modify: 3125 * 3126 * Clear the "modified" attribute for a page. 3127 */ 3128 boolean_t 3129 pmap_clear_modify(struct vm_page *pg) 3130 { 3131 boolean_t rv; 3132 3133 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3134 rv = TRUE; 3135 pmap_clearbit(pg, PVF_MOD); 3136 } else 3137 rv = FALSE; 3138 3139 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3140 VM_PAGE_TO_PHYS(pg), rv)); 3141 3142 return (rv); 3143 } 3144 3145 /* 3146 * pmap_clear_reference: 3147 * 3148 * Clear the "referenced" attribute for a page. 3149 */ 3150 boolean_t 3151 pmap_clear_reference(struct vm_page *pg) 3152 { 3153 boolean_t rv; 3154 3155 if (pg->mdpage.pvh_attrs & PVF_REF) { 3156 rv = TRUE; 3157 pmap_clearbit(pg, PVF_REF); 3158 } else 3159 rv = FALSE; 3160 3161 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3162 VM_PAGE_TO_PHYS(pg), rv)); 3163 3164 return (rv); 3165 } 3166 3167 /* 3168 * pmap_is_modified: 3169 * 3170 * Test if a page has the "modified" attribute. 3171 */ 3172 /* See <arm/arm32/pmap.h> */ 3173 3174 /* 3175 * pmap_is_referenced: 3176 * 3177 * Test if a page has the "referenced" attribute. 3178 */ 3179 /* See <arm/arm32/pmap.h> */ 3180 3181 int 3182 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3183 { 3184 pt_entry_t *ptes; 3185 struct vm_page *pg; 3186 paddr_t pa; 3187 u_int flags; 3188 int rv = 0; 3189 3190 PDEBUG(2, printf("pmap_modified_emulation\n")); 3191 3192 PMAP_MAP_TO_HEAD_LOCK(); 3193 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3194 3195 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3196 PDEBUG(2, printf("L1 PTE invalid\n")); 3197 goto out; 3198 } 3199 3200 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3201 3202 /* Check for a invalid pte */ 3203 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3204 goto out; 3205 3206 /* This can happen if user code tries to access kernel memory. */ 3207 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3208 goto out; 3209 3210 /* Extract the physical address of the page */ 3211 pa = l2pte_pa(ptes[arm_btop(va)]); 3212 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3213 goto out; 3214 3215 /* Get the current flags for this page. */ 3216 simple_lock(&pg->mdpage.pvh_slock); 3217 3218 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3219 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3220 3221 /* 3222 * Do the flags say this page is writable ? If not then it is a 3223 * genuine write fault. If yes then the write fault is our fault 3224 * as we did not reflect the write access in the PTE. Now we know 3225 * a write has occurred we can correct this and also set the 3226 * modified bit 3227 */ 3228 if (~flags & PVF_WRITE) { 3229 simple_unlock(&pg->mdpage.pvh_slock); 3230 goto out; 3231 } 3232 3233 PDEBUG(0, 3234 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3235 va, ptes[arm_btop(va)])); 3236 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3237 3238 /* 3239 * Re-enable write permissions for the page. No need to call 3240 * pmap_vac_me_harder(), since this is just a 3241 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3242 * We've already set the cacheable bits based on the assumption 3243 * that we can write to this page. 3244 */ 3245 ptes[arm_btop(va)] = 3246 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3247 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3248 3249 simple_unlock(&pg->mdpage.pvh_slock); 3250 3251 cpu_tlb_flushID_SE(va); 3252 cpu_cpwait(); 3253 rv = 1; 3254 out: 3255 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3256 PMAP_MAP_TO_HEAD_UNLOCK(); 3257 return (rv); 3258 } 3259 3260 int 3261 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3262 { 3263 pt_entry_t *ptes; 3264 struct vm_page *pg; 3265 paddr_t pa; 3266 int rv = 0; 3267 3268 PDEBUG(2, printf("pmap_handled_emulation\n")); 3269 3270 PMAP_MAP_TO_HEAD_LOCK(); 3271 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3272 3273 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3274 PDEBUG(2, printf("L1 PTE invalid\n")); 3275 goto out; 3276 } 3277 3278 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3279 3280 /* Check for invalid pte */ 3281 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3282 goto out; 3283 3284 /* This can happen if user code tries to access kernel memory. */ 3285 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3286 goto out; 3287 3288 /* Extract the physical address of the page */ 3289 pa = l2pte_pa(ptes[arm_btop(va)]); 3290 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3291 goto out; 3292 3293 simple_lock(&pg->mdpage.pvh_slock); 3294 3295 /* 3296 * Ok we just enable the pte and mark the attibs as handled 3297 * XXX Should we traverse the PV list and enable all PTEs? 3298 */ 3299 PDEBUG(0, 3300 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3301 va, ptes[arm_btop(va)])); 3302 pg->mdpage.pvh_attrs |= PVF_REF; 3303 3304 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3305 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3306 3307 simple_unlock(&pg->mdpage.pvh_slock); 3308 3309 cpu_tlb_flushID_SE(va); 3310 cpu_cpwait(); 3311 rv = 1; 3312 out: 3313 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3314 PMAP_MAP_TO_HEAD_UNLOCK(); 3315 return (rv); 3316 } 3317 3318 /* 3319 * pmap_collect: free resources held by a pmap 3320 * 3321 * => optional function. 3322 * => called when a process is swapped out to free memory. 3323 */ 3324 3325 void 3326 pmap_collect(struct pmap *pmap) 3327 { 3328 } 3329 3330 /* 3331 * Routine: pmap_procwr 3332 * 3333 * Function: 3334 * Synchronize caches corresponding to [addr, addr+len) in p. 3335 * 3336 */ 3337 void 3338 pmap_procwr(struct proc *p, vaddr_t va, int len) 3339 { 3340 /* We only need to do anything if it is the current process. */ 3341 if (p == curproc) 3342 cpu_icache_sync_range(va, len); 3343 } 3344 /* 3345 * PTP functions 3346 */ 3347 3348 /* 3349 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3350 * 3351 * => pmap should NOT be pmap_kernel() 3352 * => pmap should be locked 3353 */ 3354 3355 static struct vm_page * 3356 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3357 { 3358 struct vm_page *ptp; 3359 3360 if (pmap_pde_page(pmap_pde(pmap, va))) { 3361 3362 /* valid... check hint (saves us a PA->PG lookup) */ 3363 if (pmap->pm_ptphint && 3364 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3365 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3366 return (pmap->pm_ptphint); 3367 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3368 #ifdef DIAGNOSTIC 3369 if (ptp == NULL) 3370 panic("pmap_get_ptp: unmanaged user PTP"); 3371 #endif 3372 pmap->pm_ptphint = ptp; 3373 return(ptp); 3374 } 3375 3376 /* allocate a new PTP (updates ptphint) */ 3377 return(pmap_alloc_ptp(pmap, va)); 3378 } 3379 3380 /* 3381 * pmap_alloc_ptp: allocate a PTP for a PMAP 3382 * 3383 * => pmap should already be locked by caller 3384 * => we use the ptp's wire_count to count the number of active mappings 3385 * in the PTP (we start it at one to prevent any chance this PTP 3386 * will ever leak onto the active/inactive queues) 3387 */ 3388 3389 /*__inline */ static struct vm_page * 3390 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3391 { 3392 struct vm_page *ptp; 3393 3394 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3395 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3396 if (ptp == NULL) 3397 return (NULL); 3398 3399 /* got one! */ 3400 ptp->flags &= ~PG_BUSY; /* never busy */ 3401 ptp->wire_count = 1; /* no mappings yet */ 3402 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), TRUE); 3403 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3404 pmap->pm_ptphint = ptp; 3405 return (ptp); 3406 } 3407 3408 vaddr_t 3409 pmap_growkernel(vaddr_t maxkvaddr) 3410 { 3411 struct pmap *kpm = pmap_kernel(), *pm; 3412 int s; 3413 paddr_t ptaddr; 3414 struct vm_page *ptp; 3415 3416 if (maxkvaddr <= pmap_curmaxkvaddr) 3417 goto out; /* we are OK */ 3418 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3419 pmap_curmaxkvaddr, maxkvaddr)); 3420 3421 /* 3422 * whoops! we need to add kernel PTPs 3423 */ 3424 3425 s = splhigh(); /* to be safe */ 3426 simple_lock(&kpm->pm_obj.vmobjlock); 3427 /* due to the way the arm pmap works we map 4MB at a time */ 3428 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3429 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3430 3431 if (uvm.page_init_done == FALSE) { 3432 3433 /* 3434 * we're growing the kernel pmap early (from 3435 * uvm_pageboot_alloc()). this case must be 3436 * handled a little differently. 3437 */ 3438 3439 if (uvm_page_physget(&ptaddr) == FALSE) 3440 panic("pmap_growkernel: out of memory"); 3441 pmap_zero_page(ptaddr); 3442 3443 /* map this page in */ 3444 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, TRUE); 3445 3446 /* count PTP as resident */ 3447 kpm->pm_stats.resident_count++; 3448 continue; 3449 } 3450 3451 /* 3452 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3453 * pmap_initialized == FALSE CASE! WE MAY BE 3454 * INVOKED WHILE pmap_init() IS RUNNING! 3455 */ 3456 3457 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3458 panic("pmap_growkernel: alloc ptp failed"); 3459 3460 /* distribute new kernel PTP to all active pmaps */ 3461 simple_lock(&pmaps_lock); 3462 LIST_FOREACH(pm, &pmaps, pm_list) { 3463 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3464 VM_PAGE_TO_PHYS(ptp), TRUE); 3465 } 3466 3467 simple_unlock(&pmaps_lock); 3468 } 3469 3470 /* 3471 * flush out the cache, expensive but growkernel will happen so 3472 * rarely 3473 */ 3474 cpu_tlb_flushD(); 3475 cpu_cpwait(); 3476 3477 simple_unlock(&kpm->pm_obj.vmobjlock); 3478 splx(s); 3479 3480 out: 3481 return (pmap_curmaxkvaddr); 3482 } 3483 3484 /************************ Utility routines ****************************/ 3485 3486 /* 3487 * vector_page_setprot: 3488 * 3489 * Manipulate the protection of the vector page. 3490 */ 3491 void 3492 vector_page_setprot(int prot) 3493 { 3494 pt_entry_t *pte; 3495 3496 pte = vtopte(vector_page); 3497 3498 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3499 cpu_tlb_flushD_SE(vector_page); 3500 cpu_cpwait(); 3501 } 3502 3503 /************************ Bootstrapping routines ****************************/ 3504 3505 /* 3506 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3507 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3508 * find them as necessary. 3509 * 3510 * Note that the data on this list is not valid after initarm() returns. 3511 */ 3512 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3513 3514 static vaddr_t 3515 kernel_pt_lookup(paddr_t pa) 3516 { 3517 pv_addr_t *pv; 3518 3519 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3520 if (pv->pv_pa == pa) 3521 return (pv->pv_va); 3522 } 3523 return (0); 3524 } 3525 3526 /* 3527 * pmap_map_section: 3528 * 3529 * Create a single section mapping. 3530 */ 3531 void 3532 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3533 { 3534 pd_entry_t *pde = (pd_entry_t *) l1pt; 3535 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3536 3537 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3538 3539 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3540 L1_S_PROT(PTE_KERNEL, prot) | fl; 3541 } 3542 3543 /* 3544 * pmap_map_entry: 3545 * 3546 * Create a single page mapping. 3547 */ 3548 void 3549 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3550 { 3551 pd_entry_t *pde = (pd_entry_t *) l1pt; 3552 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3553 pt_entry_t *pte; 3554 3555 KASSERT(((va | pa) & PGOFSET) == 0); 3556 3557 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3558 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3559 3560 pte = (pt_entry_t *) 3561 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3562 if (pte == NULL) 3563 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3564 3565 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3566 L2_S_PROT(PTE_KERNEL, prot) | fl; 3567 } 3568 3569 /* 3570 * pmap_link_l2pt: 3571 * 3572 * Link the L2 page table specified by "pa" into the L1 3573 * page table at the slot for "va". 3574 */ 3575 void 3576 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3577 { 3578 pd_entry_t *pde = (pd_entry_t *) l1pt; 3579 u_int slot = va >> L1_S_SHIFT; 3580 3581 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3582 3583 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3584 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3585 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3586 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3587 3588 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3589 } 3590 3591 /* 3592 * pmap_map_chunk: 3593 * 3594 * Map a chunk of memory using the most efficient mappings 3595 * possible (section, large page, small page) into the 3596 * provided L1 and L2 tables at the specified virtual address. 3597 */ 3598 vsize_t 3599 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3600 int prot, int cache) 3601 { 3602 pd_entry_t *pde = (pd_entry_t *) l1pt; 3603 pt_entry_t *pte, fl; 3604 vsize_t resid; 3605 int i; 3606 3607 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3608 3609 if (l1pt == 0) 3610 panic("pmap_map_chunk: no L1 table provided"); 3611 3612 #ifdef VERBOSE_INIT_ARM 3613 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3614 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3615 #endif 3616 3617 size = resid; 3618 3619 while (resid > 0) { 3620 /* See if we can use a section mapping. */ 3621 if (((pa | va) & L1_S_OFFSET) == 0 && 3622 resid >= L1_S_SIZE) { 3623 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3624 #ifdef VERBOSE_INIT_ARM 3625 printf("S"); 3626 #endif 3627 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3628 L1_S_PROT(PTE_KERNEL, prot) | fl; 3629 va += L1_S_SIZE; 3630 pa += L1_S_SIZE; 3631 resid -= L1_S_SIZE; 3632 continue; 3633 } 3634 3635 /* 3636 * Ok, we're going to use an L2 table. Make sure 3637 * one is actually in the corresponding L1 slot 3638 * for the current VA. 3639 */ 3640 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3641 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3642 3643 pte = (pt_entry_t *) 3644 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3645 if (pte == NULL) 3646 panic("pmap_map_chunk: can't find L2 table for VA" 3647 "0x%08lx", va); 3648 3649 /* See if we can use a L2 large page mapping. */ 3650 if (((pa | va) & L2_L_OFFSET) == 0 && 3651 resid >= L2_L_SIZE) { 3652 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3653 #ifdef VERBOSE_INIT_ARM 3654 printf("L"); 3655 #endif 3656 for (i = 0; i < 16; i++) { 3657 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3658 L2_L_PROTO | pa | 3659 L2_L_PROT(PTE_KERNEL, prot) | fl; 3660 } 3661 va += L2_L_SIZE; 3662 pa += L2_L_SIZE; 3663 resid -= L2_L_SIZE; 3664 continue; 3665 } 3666 3667 /* Use a small page mapping. */ 3668 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3669 #ifdef VERBOSE_INIT_ARM 3670 printf("P"); 3671 #endif 3672 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3673 L2_S_PROT(PTE_KERNEL, prot) | fl; 3674 va += NBPG; 3675 pa += NBPG; 3676 resid -= NBPG; 3677 } 3678 #ifdef VERBOSE_INIT_ARM 3679 printf("\n"); 3680 #endif 3681 return (size); 3682 } 3683 3684 /********************** PTE initialization routines **************************/ 3685 3686 /* 3687 * These routines are called when the CPU type is identified to set up 3688 * the PTE prototypes, cache modes, etc. 3689 * 3690 * The variables are always here, just in case LKMs need to reference 3691 * them (though, they shouldn't). 3692 */ 3693 3694 pt_entry_t pte_l1_s_cache_mode; 3695 pt_entry_t pte_l1_s_cache_mask; 3696 3697 pt_entry_t pte_l2_l_cache_mode; 3698 pt_entry_t pte_l2_l_cache_mask; 3699 3700 pt_entry_t pte_l2_s_cache_mode; 3701 pt_entry_t pte_l2_s_cache_mask; 3702 3703 pt_entry_t pte_l2_s_prot_u; 3704 pt_entry_t pte_l2_s_prot_w; 3705 pt_entry_t pte_l2_s_prot_mask; 3706 3707 pt_entry_t pte_l1_s_proto; 3708 pt_entry_t pte_l1_c_proto; 3709 pt_entry_t pte_l2_s_proto; 3710 3711 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3712 void (*pmap_zero_page_func)(paddr_t); 3713 3714 #if ARM_MMU_GENERIC == 1 3715 void 3716 pmap_pte_init_generic(void) 3717 { 3718 3719 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3720 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3721 3722 pte_l2_l_cache_mode = L2_B|L2_C; 3723 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3724 3725 pte_l2_s_cache_mode = L2_B|L2_C; 3726 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3727 3728 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3729 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3730 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3731 3732 pte_l1_s_proto = L1_S_PROTO_generic; 3733 pte_l1_c_proto = L1_C_PROTO_generic; 3734 pte_l2_s_proto = L2_S_PROTO_generic; 3735 3736 pmap_copy_page_func = pmap_copy_page_generic; 3737 pmap_zero_page_func = pmap_zero_page_generic; 3738 } 3739 3740 #if defined(CPU_ARM9) 3741 void 3742 pmap_pte_init_arm9(void) 3743 { 3744 3745 /* 3746 * ARM9 is compatible with generic, but we want to use 3747 * write-through caching for now. 3748 */ 3749 pmap_pte_init_generic(); 3750 3751 pte_l1_s_cache_mode = L1_S_C; 3752 pte_l2_l_cache_mode = L2_C; 3753 pte_l2_s_cache_mode = L2_C; 3754 } 3755 #endif /* CPU_ARM9 */ 3756 #endif /* ARM_MMU_GENERIC == 1 */ 3757 3758 #if ARM_MMU_XSCALE == 1 3759 void 3760 pmap_pte_init_xscale(void) 3761 { 3762 3763 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3764 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 3765 3766 pte_l2_l_cache_mode = L2_B|L2_C; 3767 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 3768 3769 pte_l2_s_cache_mode = L2_B|L2_C; 3770 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 3771 3772 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 3773 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 3774 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 3775 3776 pte_l1_s_proto = L1_S_PROTO_xscale; 3777 pte_l1_c_proto = L1_C_PROTO_xscale; 3778 pte_l2_s_proto = L2_S_PROTO_xscale; 3779 3780 pmap_copy_page_func = pmap_copy_page_xscale; 3781 pmap_zero_page_func = pmap_zero_page_xscale; 3782 } 3783 3784 #if defined(CPU_XSCALE_80200) 3785 void 3786 pmap_pte_init_i80200(void) 3787 { 3788 3789 /* 3790 * Use write-through caching on the i80200. 3791 */ 3792 pmap_pte_init_xscale(); 3793 pte_l1_s_cache_mode = L1_S_C; 3794 pte_l2_l_cache_mode = L2_C; 3795 pte_l2_s_cache_mode = L2_C; 3796 } 3797 #endif /* CPU_XSCALE_80200 */ 3798 3799 /* 3800 * xscale_setup_minidata: 3801 * 3802 * Set up the mini-data cache clean area. We require the 3803 * caller to allocate the right amount of physically and 3804 * virtually contiguous space. 3805 */ 3806 void 3807 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 3808 { 3809 extern vaddr_t xscale_minidata_clean_addr; 3810 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 3811 pd_entry_t *pde = (pd_entry_t *) l1pt; 3812 pt_entry_t *pte; 3813 vsize_t size; 3814 3815 xscale_minidata_clean_addr = va; 3816 3817 /* Round it to page size. */ 3818 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 3819 3820 for (; size != 0; 3821 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 3822 pte = (pt_entry_t *) 3823 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3824 if (pte == NULL) 3825 panic("xscale_setup_minidata: can't find L2 table for " 3826 "VA 0x%08lx", va); 3827 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3828 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 3829 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 3830 } 3831 } 3832 #endif /* ARM_MMU_XSCALE == 1 */ 3833
Indexes created Sat Sep 27 21:09:56 GMT 2025