pmap.c revision 1.96
1 /* $NetBSD: pmap.c,v 1.96 2002/04/24 17:35:10 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.96 2002/04/24 17:35:10 thorpej Exp $"); 147 #ifdef PMAP_DEBUG 148 #define PDEBUG(_lev_,_stat_) \ 149 if (pmap_debug_level >= (_lev_)) \ 150 ((_stat_)) 151 int pmap_debug_level = -2; 152 void pmap_dump_pvlist(vaddr_t phys, char *m); 153 154 /* 155 * for switching to potentially finer grained debugging 156 */ 157 #define PDB_FOLLOW 0x0001 158 #define PDB_INIT 0x0002 159 #define PDB_ENTER 0x0004 160 #define PDB_REMOVE 0x0008 161 #define PDB_CREATE 0x0010 162 #define PDB_PTPAGE 0x0020 163 #define PDB_GROWKERN 0x0040 164 #define PDB_BITS 0x0080 165 #define PDB_COLLECT 0x0100 166 #define PDB_PROTECT 0x0200 167 #define PDB_MAP_L1 0x0400 168 #define PDB_BOOTSTRAP 0x1000 169 #define PDB_PARANOIA 0x2000 170 #define PDB_WIRING 0x4000 171 #define PDB_PVDUMP 0x8000 172 173 int debugmap = 0; 174 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 175 #define NPDEBUG(_lev_,_stat_) \ 176 if (pmapdebug & (_lev_)) \ 177 ((_stat_)) 178 179 #else /* PMAP_DEBUG */ 180 #define PDEBUG(_lev_,_stat_) /* Nothing */ 181 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 182 #endif /* PMAP_DEBUG */ 183 184 struct pmap kernel_pmap_store; 185 186 /* 187 * linked list of all non-kernel pmaps 188 */ 189 190 static LIST_HEAD(, pmap) pmaps; 191 192 /* 193 * pool that pmap structures are allocated from 194 */ 195 196 struct pool pmap_pmap_pool; 197 198 static pt_entry_t *csrc_pte, *cdst_pte; 199 static vaddr_t csrcp, cdstp; 200 201 char *memhook; 202 extern caddr_t msgbufaddr; 203 204 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 205 /* 206 * locking data structures 207 */ 208 209 static struct lock pmap_main_lock; 210 static struct simplelock pvalloc_lock; 211 static struct simplelock pmaps_lock; 212 #ifdef LOCKDEBUG 213 #define PMAP_MAP_TO_HEAD_LOCK() \ 214 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 215 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 216 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 217 218 #define PMAP_HEAD_TO_MAP_LOCK() \ 219 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 220 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 221 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 222 #else 223 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 224 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 225 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 226 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 227 #endif /* LOCKDEBUG */ 228 229 /* 230 * pv_page management structures: locked by pvalloc_lock 231 */ 232 233 TAILQ_HEAD(pv_pagelist, pv_page); 234 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 235 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 236 static int pv_nfpvents; /* # of free pv entries */ 237 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 238 static vaddr_t pv_cachedva; /* cached VA for later use */ 239 240 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 241 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 242 /* high water mark */ 243 244 /* 245 * local prototypes 246 */ 247 248 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 249 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 250 #define ALLOCPV_NEED 0 /* need PV now */ 251 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 252 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 253 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 254 static void pmap_enter_pv __P((struct vm_page *, 255 struct pv_entry *, struct pmap *, 256 vaddr_t, struct vm_page *, int)); 257 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 258 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 259 static void pmap_free_pv_doit __P((struct pv_entry *)); 260 static void pmap_free_pvpage __P((void)); 261 static boolean_t pmap_is_curpmap __P((struct pmap *)); 262 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 263 vaddr_t)); 264 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 265 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 266 267 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 268 u_int, u_int)); 269 270 /* 271 * Structure that describes and L1 table. 272 */ 273 struct l1pt { 274 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 275 struct pglist pt_plist; /* Allocated page list */ 276 vaddr_t pt_va; /* Allocated virtual address */ 277 int pt_flags; /* Flags */ 278 }; 279 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 280 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 281 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 282 283 static void pmap_free_l1pt __P((struct l1pt *)); 284 static int pmap_allocpagedir __P((struct pmap *)); 285 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 286 static void pmap_remove_all __P((struct vm_page *)); 287 288 static int pmap_alloc_ptpt(struct pmap *); 289 static void pmap_free_ptpt(struct pmap *); 290 291 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 292 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 293 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 294 295 extern paddr_t physical_start; 296 extern paddr_t physical_freestart; 297 extern paddr_t physical_end; 298 extern paddr_t physical_freeend; 299 extern unsigned int free_pages; 300 extern int max_processes; 301 302 vaddr_t virtual_avail; 303 vaddr_t virtual_end; 304 vaddr_t pmap_curmaxkvaddr; 305 306 vaddr_t avail_start; 307 vaddr_t avail_end; 308 309 extern pv_addr_t systempage; 310 311 /* Variables used by the L1 page table queue code */ 312 SIMPLEQ_HEAD(l1pt_queue, l1pt); 313 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 314 static int l1pt_static_queue_count; /* items in the static l1 queue */ 315 static int l1pt_static_create_count; /* static l1 items created */ 316 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 317 static int l1pt_queue_count; /* items in the l1 queue */ 318 static int l1pt_create_count; /* stat - L1's create count */ 319 static int l1pt_reuse_count; /* stat - L1's reused count */ 320 321 /* Local function prototypes (not used outside this file) */ 322 void pmap_pinit __P((struct pmap *)); 323 void pmap_freepagedir __P((struct pmap *)); 324 325 /* Other function prototypes */ 326 extern void bzero_page __P((vaddr_t)); 327 extern void bcopy_page __P((vaddr_t, vaddr_t)); 328 329 struct l1pt *pmap_alloc_l1pt __P((void)); 330 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 331 vaddr_t l2pa, boolean_t)); 332 333 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 334 static void pmap_unmap_ptes __P((struct pmap *)); 335 336 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 337 pt_entry_t *, boolean_t)); 338 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 339 pt_entry_t *, boolean_t)); 340 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 341 pt_entry_t *, boolean_t)); 342 343 /* 344 * real definition of pv_entry. 345 */ 346 347 struct pv_entry { 348 struct pv_entry *pv_next; /* next pv_entry */ 349 struct pmap *pv_pmap; /* pmap where mapping lies */ 350 vaddr_t pv_va; /* virtual address for mapping */ 351 int pv_flags; /* flags */ 352 struct vm_page *pv_ptp; /* vm_page for the ptp */ 353 }; 354 355 /* 356 * pv_entrys are dynamically allocated in chunks from a single page. 357 * we keep track of how many pv_entrys are in use for each page and 358 * we can free pv_entry pages if needed. there is one lock for the 359 * entire allocation system. 360 */ 361 362 struct pv_page_info { 363 TAILQ_ENTRY(pv_page) pvpi_list; 364 struct pv_entry *pvpi_pvfree; 365 int pvpi_nfree; 366 }; 367 368 /* 369 * number of pv_entry's in a pv_page 370 * (note: won't work on systems where NPBG isn't a constant) 371 */ 372 373 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 374 sizeof(struct pv_entry)) 375 376 /* 377 * a pv_page: where pv_entrys are allocated from 378 */ 379 380 struct pv_page { 381 struct pv_page_info pvinfo; 382 struct pv_entry pvents[PVE_PER_PVPAGE]; 383 }; 384 385 #ifdef MYCROFT_HACK 386 int mycroft_hack = 0; 387 #endif 388 389 /* Function to set the debug level of the pmap code */ 390 391 #ifdef PMAP_DEBUG 392 void 393 pmap_debug(int level) 394 { 395 pmap_debug_level = level; 396 printf("pmap_debug: level=%d\n", pmap_debug_level); 397 } 398 #endif /* PMAP_DEBUG */ 399 400 __inline static boolean_t 401 pmap_is_curpmap(struct pmap *pmap) 402 { 403 404 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 405 pmap == pmap_kernel()) 406 return (TRUE); 407 408 return (FALSE); 409 } 410 411 #include "isadma.h" 412 413 #if NISADMA > 0 414 /* 415 * Used to protect memory for ISA DMA bounce buffers. If, when loading 416 * pages into the system, memory intersects with any of these ranges, 417 * the intersecting memory will be loaded into a lower-priority free list. 418 */ 419 bus_dma_segment_t *pmap_isa_dma_ranges; 420 int pmap_isa_dma_nranges; 421 422 /* 423 * Check if a memory range intersects with an ISA DMA range, and 424 * return the page-rounded intersection if it does. The intersection 425 * will be placed on a lower-priority free list. 426 */ 427 static boolean_t 428 pmap_isa_dma_range_intersect(paddr_t pa, psize_t size, paddr_t *pap, 429 psize_t *sizep) 430 { 431 bus_dma_segment_t *ds; 432 int i; 433 434 if (pmap_isa_dma_ranges == NULL) 435 return (FALSE); 436 437 for (i = 0, ds = pmap_isa_dma_ranges; 438 i < pmap_isa_dma_nranges; i++, ds++) { 439 if (ds->ds_addr <= pa && pa < (ds->ds_addr + ds->ds_len)) { 440 /* 441 * Beginning of region intersects with this range. 442 */ 443 *pap = trunc_page(pa); 444 *sizep = round_page(min(pa + size, 445 ds->ds_addr + ds->ds_len) - pa); 446 return (TRUE); 447 } 448 if (pa < ds->ds_addr && ds->ds_addr < (pa + size)) { 449 /* 450 * End of region intersects with this range. 451 */ 452 *pap = trunc_page(ds->ds_addr); 453 *sizep = round_page(min((pa + size) - ds->ds_addr, 454 ds->ds_len)); 455 return (TRUE); 456 } 457 } 458 459 /* 460 * No intersection found. 461 */ 462 return (FALSE); 463 } 464 #endif /* NISADMA > 0 */ 465 466 /* 467 * p v _ e n t r y f u n c t i o n s 468 */ 469 470 /* 471 * pv_entry allocation functions: 472 * the main pv_entry allocation functions are: 473 * pmap_alloc_pv: allocate a pv_entry structure 474 * pmap_free_pv: free one pv_entry 475 * pmap_free_pvs: free a list of pv_entrys 476 * 477 * the rest are helper functions 478 */ 479 480 /* 481 * pmap_alloc_pv: inline function to allocate a pv_entry structure 482 * => we lock pvalloc_lock 483 * => if we fail, we call out to pmap_alloc_pvpage 484 * => 3 modes: 485 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 486 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 487 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 488 * one now 489 * 490 * "try" is for optional functions like pmap_copy(). 491 */ 492 493 __inline static struct pv_entry * 494 pmap_alloc_pv(struct pmap *pmap, int mode) 495 { 496 struct pv_page *pvpage; 497 struct pv_entry *pv; 498 499 simple_lock(&pvalloc_lock); 500 501 pvpage = TAILQ_FIRST(&pv_freepages); 502 503 if (pvpage != NULL) { 504 pvpage->pvinfo.pvpi_nfree--; 505 if (pvpage->pvinfo.pvpi_nfree == 0) { 506 /* nothing left in this one? */ 507 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 508 } 509 pv = pvpage->pvinfo.pvpi_pvfree; 510 KASSERT(pv); 511 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 512 pv_nfpvents--; /* took one from pool */ 513 } else { 514 pv = NULL; /* need more of them */ 515 } 516 517 /* 518 * if below low water mark or we didn't get a pv_entry we try and 519 * create more pv_entrys ... 520 */ 521 522 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 523 if (pv == NULL) 524 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 525 mode : ALLOCPV_NEED); 526 else 527 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 528 } 529 530 simple_unlock(&pvalloc_lock); 531 return(pv); 532 } 533 534 /* 535 * pmap_alloc_pvpage: maybe allocate a new pvpage 536 * 537 * if need_entry is false: try and allocate a new pv_page 538 * if need_entry is true: try and allocate a new pv_page and return a 539 * new pv_entry from it. if we are unable to allocate a pv_page 540 * we make a last ditch effort to steal a pv_page from some other 541 * mapping. if that fails, we panic... 542 * 543 * => we assume that the caller holds pvalloc_lock 544 */ 545 546 static struct pv_entry * 547 pmap_alloc_pvpage(struct pmap *pmap, int mode) 548 { 549 struct vm_page *pg; 550 struct pv_page *pvpage; 551 struct pv_entry *pv; 552 int s; 553 554 /* 555 * if we need_entry and we've got unused pv_pages, allocate from there 556 */ 557 558 pvpage = TAILQ_FIRST(&pv_unusedpgs); 559 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 560 561 /* move it to pv_freepages list */ 562 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 563 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 564 565 /* allocate a pv_entry */ 566 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 567 pv = pvpage->pvinfo.pvpi_pvfree; 568 KASSERT(pv); 569 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 570 571 pv_nfpvents--; /* took one from pool */ 572 return(pv); 573 } 574 575 /* 576 * see if we've got a cached unmapped VA that we can map a page in. 577 * if not, try to allocate one. 578 */ 579 580 581 if (pv_cachedva == 0) { 582 s = splvm(); 583 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 584 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 585 splx(s); 586 if (pv_cachedva == 0) { 587 return (NULL); 588 } 589 } 590 591 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 592 UVM_PGA_USERESERVE); 593 594 if (pg == NULL) 595 return (NULL); 596 pg->flags &= ~PG_BUSY; /* never busy */ 597 598 /* 599 * add a mapping for our new pv_page and free its entrys (save one!) 600 * 601 * NOTE: If we are allocating a PV page for the kernel pmap, the 602 * pmap is already locked! (...but entering the mapping is safe...) 603 */ 604 605 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 606 VM_PROT_READ|VM_PROT_WRITE); 607 pmap_update(pmap_kernel()); 608 pvpage = (struct pv_page *) pv_cachedva; 609 pv_cachedva = 0; 610 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 611 } 612 613 /* 614 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 615 * 616 * => caller must hold pvalloc_lock 617 * => if need_entry is true, we allocate and return one pv_entry 618 */ 619 620 static struct pv_entry * 621 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 622 { 623 int tofree, lcv; 624 625 /* do we need to return one? */ 626 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 627 628 pvp->pvinfo.pvpi_pvfree = NULL; 629 pvp->pvinfo.pvpi_nfree = tofree; 630 for (lcv = 0 ; lcv < tofree ; lcv++) { 631 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 632 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 633 } 634 if (need_entry) 635 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 636 else 637 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 638 pv_nfpvents += tofree; 639 return((need_entry) ? &pvp->pvents[lcv] : NULL); 640 } 641 642 /* 643 * pmap_free_pv_doit: actually free a pv_entry 644 * 645 * => do not call this directly! instead use either 646 * 1. pmap_free_pv ==> free a single pv_entry 647 * 2. pmap_free_pvs => free a list of pv_entrys 648 * => we must be holding pvalloc_lock 649 */ 650 651 __inline static void 652 pmap_free_pv_doit(struct pv_entry *pv) 653 { 654 struct pv_page *pvp; 655 656 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 657 pv_nfpvents++; 658 pvp->pvinfo.pvpi_nfree++; 659 660 /* nfree == 1 => fully allocated page just became partly allocated */ 661 if (pvp->pvinfo.pvpi_nfree == 1) { 662 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 663 } 664 665 /* free it */ 666 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 667 pvp->pvinfo.pvpi_pvfree = pv; 668 669 /* 670 * are all pv_page's pv_entry's free? move it to unused queue. 671 */ 672 673 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 674 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 675 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 676 } 677 } 678 679 /* 680 * pmap_free_pv: free a single pv_entry 681 * 682 * => we gain the pvalloc_lock 683 */ 684 685 __inline static void 686 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 687 { 688 simple_lock(&pvalloc_lock); 689 pmap_free_pv_doit(pv); 690 691 /* 692 * Can't free the PV page if the PV entries were associated with 693 * the kernel pmap; the pmap is already locked. 694 */ 695 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 696 pmap != pmap_kernel()) 697 pmap_free_pvpage(); 698 699 simple_unlock(&pvalloc_lock); 700 } 701 702 /* 703 * pmap_free_pvs: free a list of pv_entrys 704 * 705 * => we gain the pvalloc_lock 706 */ 707 708 __inline static void 709 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 710 { 711 struct pv_entry *nextpv; 712 713 simple_lock(&pvalloc_lock); 714 715 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 716 nextpv = pvs->pv_next; 717 pmap_free_pv_doit(pvs); 718 } 719 720 /* 721 * Can't free the PV page if the PV entries were associated with 722 * the kernel pmap; the pmap is already locked. 723 */ 724 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 725 pmap != pmap_kernel()) 726 pmap_free_pvpage(); 727 728 simple_unlock(&pvalloc_lock); 729 } 730 731 732 /* 733 * pmap_free_pvpage: try and free an unused pv_page structure 734 * 735 * => assume caller is holding the pvalloc_lock and that 736 * there is a page on the pv_unusedpgs list 737 * => if we can't get a lock on the kmem_map we try again later 738 */ 739 740 static void 741 pmap_free_pvpage(void) 742 { 743 int s; 744 struct vm_map *map; 745 struct vm_map_entry *dead_entries; 746 struct pv_page *pvp; 747 748 s = splvm(); /* protect kmem_map */ 749 750 pvp = TAILQ_FIRST(&pv_unusedpgs); 751 752 /* 753 * note: watch out for pv_initpage which is allocated out of 754 * kernel_map rather than kmem_map. 755 */ 756 if (pvp == pv_initpage) 757 map = kernel_map; 758 else 759 map = kmem_map; 760 if (vm_map_lock_try(map)) { 761 762 /* remove pvp from pv_unusedpgs */ 763 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 764 765 /* unmap the page */ 766 dead_entries = NULL; 767 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 768 &dead_entries); 769 vm_map_unlock(map); 770 771 if (dead_entries != NULL) 772 uvm_unmap_detach(dead_entries, 0); 773 774 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 775 } 776 if (pvp == pv_initpage) 777 /* no more initpage, we've freed it */ 778 pv_initpage = NULL; 779 780 splx(s); 781 } 782 783 /* 784 * main pv_entry manipulation functions: 785 * pmap_enter_pv: enter a mapping onto a vm_page list 786 * pmap_remove_pv: remove a mappiing from a vm_page list 787 * 788 * NOTE: pmap_enter_pv expects to lock the pvh itself 789 * pmap_remove_pv expects te caller to lock the pvh before calling 790 */ 791 792 /* 793 * pmap_enter_pv: enter a mapping onto a vm_page lst 794 * 795 * => caller should hold the proper lock on pmap_main_lock 796 * => caller should have pmap locked 797 * => we will gain the lock on the vm_page and allocate the new pv_entry 798 * => caller should adjust ptp's wire_count before calling 799 * => caller should not adjust pmap's wire_count 800 */ 801 802 __inline static void 803 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 804 vaddr_t va, struct vm_page *ptp, int flags) 805 { 806 pve->pv_pmap = pmap; 807 pve->pv_va = va; 808 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 809 pve->pv_flags = flags; 810 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 811 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 812 pg->mdpage.pvh_list = pve; /* ... locked list */ 813 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 814 if (pve->pv_flags & PVF_WIRED) 815 ++pmap->pm_stats.wired_count; 816 } 817 818 /* 819 * pmap_remove_pv: try to remove a mapping from a pv_list 820 * 821 * => caller should hold proper lock on pmap_main_lock 822 * => pmap should be locked 823 * => caller should hold lock on vm_page [so that attrs can be adjusted] 824 * => caller should adjust ptp's wire_count and free PTP if needed 825 * => caller should NOT adjust pmap's wire_count 826 * => we return the removed pve 827 */ 828 829 __inline static struct pv_entry * 830 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 831 { 832 struct pv_entry *pve, **prevptr; 833 834 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 835 pve = *prevptr; 836 while (pve) { 837 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 838 *prevptr = pve->pv_next; /* remove it! */ 839 if (pve->pv_flags & PVF_WIRED) 840 --pmap->pm_stats.wired_count; 841 break; 842 } 843 prevptr = &pve->pv_next; /* previous pointer */ 844 pve = pve->pv_next; /* advance */ 845 } 846 return(pve); /* return removed pve */ 847 } 848 849 /* 850 * 851 * pmap_modify_pv: Update pv flags 852 * 853 * => caller should hold lock on vm_page [so that attrs can be adjusted] 854 * => caller should NOT adjust pmap's wire_count 855 * => caller must call pmap_vac_me_harder() if writable status of a page 856 * may have changed. 857 * => we return the old flags 858 * 859 * Modify a physical-virtual mapping in the pv table 860 */ 861 862 static /* __inline */ u_int 863 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 864 u_int bic_mask, u_int eor_mask) 865 { 866 struct pv_entry *npv; 867 u_int flags, oflags; 868 869 /* 870 * There is at least one VA mapping this page. 871 */ 872 873 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 874 if (pmap == npv->pv_pmap && va == npv->pv_va) { 875 oflags = npv->pv_flags; 876 npv->pv_flags = flags = 877 ((oflags & ~bic_mask) ^ eor_mask); 878 if ((flags ^ oflags) & PVF_WIRED) { 879 if (flags & PVF_WIRED) 880 ++pmap->pm_stats.wired_count; 881 else 882 --pmap->pm_stats.wired_count; 883 } 884 return (oflags); 885 } 886 } 887 return (0); 888 } 889 890 /* 891 * Map the specified level 2 pagetable into the level 1 page table for 892 * the given pmap to cover a chunk of virtual address space starting from the 893 * address specified. 894 */ 895 static __inline void 896 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, boolean_t selfref) 897 { 898 vaddr_t ptva; 899 900 /* Calculate the index into the L1 page table. */ 901 ptva = (va >> L1_S_SHIFT) & ~3; 902 903 /* Map page table into the L1. */ 904 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 905 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 906 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 907 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 908 909 /* Map the page table into the page table area. */ 910 if (selfref) 911 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 912 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 913 } 914 915 #if 0 916 static __inline void 917 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 918 { 919 vaddr_t ptva; 920 921 /* Calculate the index into the L1 page table. */ 922 ptva = (va >> L1_S_SHIFT) & ~3; 923 924 /* Unmap page table from the L1. */ 925 pmap->pm_pdir[ptva + 0] = 0; 926 pmap->pm_pdir[ptva + 1] = 0; 927 pmap->pm_pdir[ptva + 2] = 0; 928 pmap->pm_pdir[ptva + 3] = 0; 929 930 /* Unmap the page table from the page table area. */ 931 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 932 } 933 #endif 934 935 /* 936 * Used to map a range of physical addresses into kernel 937 * virtual address space. 938 * 939 * For now, VM is already on, we only need to map the 940 * specified memory. 941 */ 942 vaddr_t 943 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 944 { 945 while (spa < epa) { 946 pmap_kenter_pa(va, spa, prot); 947 va += NBPG; 948 spa += NBPG; 949 } 950 pmap_update(pmap_kernel()); 951 return(va); 952 } 953 954 955 /* 956 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 957 * 958 * bootstrap the pmap system. This is called from initarm and allows 959 * the pmap system to initailise any structures it requires. 960 * 961 * Currently this sets up the kernel_pmap that is statically allocated 962 * and also allocated virtual addresses for certain page hooks. 963 * Currently the only one page hook is allocated that is used 964 * to zero physical pages of memory. 965 * It also initialises the start and end address of the kernel data space. 966 */ 967 extern paddr_t physical_freestart; 968 extern paddr_t physical_freeend; 969 970 char *boot_head; 971 972 void 973 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 974 { 975 pt_entry_t *pte; 976 int loop; 977 paddr_t start, end; 978 #if NISADMA > 0 979 paddr_t istart; 980 psize_t isize; 981 #endif 982 983 pmap_kernel()->pm_pdir = kernel_l1pt; 984 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 985 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 986 simple_lock_init(&pmap_kernel()->pm_lock); 987 pmap_kernel()->pm_obj.pgops = NULL; 988 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 989 pmap_kernel()->pm_obj.uo_npages = 0; 990 pmap_kernel()->pm_obj.uo_refs = 1; 991 992 /* 993 * Initialize PAGE_SIZE-dependent variables. 994 */ 995 uvm_setpagesize(); 996 997 loop = 0; 998 while (loop < bootconfig.dramblocks) { 999 start = (paddr_t)bootconfig.dram[loop].address; 1000 end = start + (bootconfig.dram[loop].pages * NBPG); 1001 if (start < physical_freestart) 1002 start = physical_freestart; 1003 if (end > physical_freeend) 1004 end = physical_freeend; 1005 #if 0 1006 printf("%d: %lx -> %lx\n", loop, start, end - 1); 1007 #endif 1008 #if NISADMA > 0 1009 if (pmap_isa_dma_range_intersect(start, end - start, 1010 &istart, &isize)) { 1011 /* 1012 * Place the pages that intersect with the 1013 * ISA DMA range onto the ISA DMA free list. 1014 */ 1015 #if 0 1016 printf(" ISADMA 0x%lx -> 0x%lx\n", istart, 1017 istart + isize - 1); 1018 #endif 1019 uvm_page_physload(atop(istart), 1020 atop(istart + isize), atop(istart), 1021 atop(istart + isize), VM_FREELIST_ISADMA); 1022 1023 /* 1024 * Load the pieces that come before 1025 * the intersection into the default 1026 * free list. 1027 */ 1028 if (start < istart) { 1029 #if 0 1030 printf(" BEFORE 0x%lx -> 0x%lx\n", 1031 start, istart - 1); 1032 #endif 1033 uvm_page_physload(atop(start), 1034 atop(istart), atop(start), 1035 atop(istart), VM_FREELIST_DEFAULT); 1036 } 1037 1038 /* 1039 * Load the pieces that come after 1040 * the intersection into the default 1041 * free list. 1042 */ 1043 if ((istart + isize) < end) { 1044 #if 0 1045 printf(" AFTER 0x%lx -> 0x%lx\n", 1046 (istart + isize), end - 1); 1047 #endif 1048 uvm_page_physload(atop(istart + isize), 1049 atop(end), atop(istart + isize), 1050 atop(end), VM_FREELIST_DEFAULT); 1051 } 1052 } else { 1053 uvm_page_physload(atop(start), atop(end), 1054 atop(start), atop(end), VM_FREELIST_DEFAULT); 1055 } 1056 #else /* NISADMA > 0 */ 1057 uvm_page_physload(atop(start), atop(end), 1058 atop(start), atop(end), VM_FREELIST_DEFAULT); 1059 #endif /* NISADMA > 0 */ 1060 ++loop; 1061 } 1062 1063 virtual_avail = KERNEL_VM_BASE; 1064 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1065 1066 /* 1067 * now we allocate the "special" VAs which are used for tmp mappings 1068 * by the pmap (and other modules). we allocate the VAs by advancing 1069 * virtual_avail (note that there are no pages mapped at these VAs). 1070 * we find the PTE that maps the allocated VA via the linear PTE 1071 * mapping. 1072 */ 1073 1074 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1075 1076 csrcp = virtual_avail; csrc_pte = pte; 1077 virtual_avail += PAGE_SIZE; pte++; 1078 1079 cdstp = virtual_avail; cdst_pte = pte; 1080 virtual_avail += PAGE_SIZE; pte++; 1081 1082 memhook = (char *) virtual_avail; /* don't need pte */ 1083 virtual_avail += PAGE_SIZE; pte++; 1084 1085 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1086 virtual_avail += round_page(MSGBUFSIZE); 1087 pte += atop(round_page(MSGBUFSIZE)); 1088 1089 /* 1090 * init the static-global locks and global lists. 1091 */ 1092 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1093 simple_lock_init(&pvalloc_lock); 1094 simple_lock_init(&pmaps_lock); 1095 LIST_INIT(&pmaps); 1096 TAILQ_INIT(&pv_freepages); 1097 TAILQ_INIT(&pv_unusedpgs); 1098 1099 /* 1100 * initialize the pmap pool. 1101 */ 1102 1103 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1104 &pool_allocator_nointr); 1105 1106 cpu_dcache_wbinv_all(); 1107 } 1108 1109 /* 1110 * void pmap_init(void) 1111 * 1112 * Initialize the pmap module. 1113 * Called by vm_init() in vm/vm_init.c in order to initialise 1114 * any structures that the pmap system needs to map virtual memory. 1115 */ 1116 1117 extern int physmem; 1118 1119 void 1120 pmap_init(void) 1121 { 1122 1123 /* 1124 * Set the available memory vars - These do not map to real memory 1125 * addresses and cannot as the physical memory is fragmented. 1126 * They are used by ps for %mem calculations. 1127 * One could argue whether this should be the entire memory or just 1128 * the memory that is useable in a user process. 1129 */ 1130 avail_start = 0; 1131 avail_end = physmem * NBPG; 1132 1133 /* 1134 * now we need to free enough pv_entry structures to allow us to get 1135 * the kmem_map/kmem_object allocated and inited (done after this 1136 * function is finished). to do this we allocate one bootstrap page out 1137 * of kernel_map and use it to provide an initial pool of pv_entry 1138 * structures. we never free this page. 1139 */ 1140 1141 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1142 if (pv_initpage == NULL) 1143 panic("pmap_init: pv_initpage"); 1144 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1145 pv_nfpvents = 0; 1146 (void) pmap_add_pvpage(pv_initpage, FALSE); 1147 1148 pmap_initialized = TRUE; 1149 1150 /* Initialise our L1 page table queues and counters */ 1151 SIMPLEQ_INIT(&l1pt_static_queue); 1152 l1pt_static_queue_count = 0; 1153 l1pt_static_create_count = 0; 1154 SIMPLEQ_INIT(&l1pt_queue); 1155 l1pt_queue_count = 0; 1156 l1pt_create_count = 0; 1157 l1pt_reuse_count = 0; 1158 } 1159 1160 /* 1161 * pmap_postinit() 1162 * 1163 * This routine is called after the vm and kmem subsystems have been 1164 * initialised. This allows the pmap code to perform any initialisation 1165 * that can only be done one the memory allocation is in place. 1166 */ 1167 1168 void 1169 pmap_postinit(void) 1170 { 1171 int loop; 1172 struct l1pt *pt; 1173 1174 #ifdef PMAP_STATIC_L1S 1175 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1176 #else /* PMAP_STATIC_L1S */ 1177 for (loop = 0; loop < max_processes; ++loop) { 1178 #endif /* PMAP_STATIC_L1S */ 1179 /* Allocate a L1 page table */ 1180 pt = pmap_alloc_l1pt(); 1181 if (!pt) 1182 panic("Cannot allocate static L1 page tables\n"); 1183 1184 /* Clean it */ 1185 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1186 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1187 /* Add the page table to the queue */ 1188 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1189 ++l1pt_static_queue_count; 1190 ++l1pt_static_create_count; 1191 } 1192 } 1193 1194 1195 /* 1196 * Create and return a physical map. 1197 * 1198 * If the size specified for the map is zero, the map is an actual physical 1199 * map, and may be referenced by the hardware. 1200 * 1201 * If the size specified is non-zero, the map will be used in software only, 1202 * and is bounded by that size. 1203 */ 1204 1205 pmap_t 1206 pmap_create(void) 1207 { 1208 struct pmap *pmap; 1209 1210 /* 1211 * Fetch pmap entry from the pool 1212 */ 1213 1214 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1215 /* XXX is this really needed! */ 1216 memset(pmap, 0, sizeof(*pmap)); 1217 1218 simple_lock_init(&pmap->pm_obj.vmobjlock); 1219 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1220 TAILQ_INIT(&pmap->pm_obj.memq); 1221 pmap->pm_obj.uo_npages = 0; 1222 pmap->pm_obj.uo_refs = 1; 1223 pmap->pm_stats.wired_count = 0; 1224 pmap->pm_stats.resident_count = 1; 1225 pmap->pm_ptphint = NULL; 1226 1227 /* Now init the machine part of the pmap */ 1228 pmap_pinit(pmap); 1229 return(pmap); 1230 } 1231 1232 /* 1233 * pmap_alloc_l1pt() 1234 * 1235 * This routine allocates physical and virtual memory for a L1 page table 1236 * and wires it. 1237 * A l1pt structure is returned to describe the allocated page table. 1238 * 1239 * This routine is allowed to fail if the required memory cannot be allocated. 1240 * In this case NULL is returned. 1241 */ 1242 1243 struct l1pt * 1244 pmap_alloc_l1pt(void) 1245 { 1246 paddr_t pa; 1247 vaddr_t va; 1248 struct l1pt *pt; 1249 int error; 1250 struct vm_page *m; 1251 pt_entry_t *pte; 1252 1253 /* Allocate virtual address space for the L1 page table */ 1254 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1255 if (va == 0) { 1256 #ifdef DIAGNOSTIC 1257 PDEBUG(0, 1258 printf("pmap: Cannot allocate pageable memory for L1\n")); 1259 #endif /* DIAGNOSTIC */ 1260 return(NULL); 1261 } 1262 1263 /* Allocate memory for the l1pt structure */ 1264 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1265 1266 /* 1267 * Allocate pages from the VM system. 1268 */ 1269 TAILQ_INIT(&pt->pt_plist); 1270 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1271 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1272 if (error) { 1273 #ifdef DIAGNOSTIC 1274 PDEBUG(0, 1275 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1276 error)); 1277 #endif /* DIAGNOSTIC */ 1278 /* Release the resources we already have claimed */ 1279 free(pt, M_VMPMAP); 1280 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1281 return(NULL); 1282 } 1283 1284 /* Map our physical pages into our virtual space */ 1285 pt->pt_va = va; 1286 m = TAILQ_FIRST(&pt->pt_plist); 1287 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1288 pa = VM_PAGE_TO_PHYS(m); 1289 1290 pte = vtopte(va); 1291 1292 /* 1293 * Assert that the PTE is invalid. If it's invalid, 1294 * then we are guaranteed that there won't be an entry 1295 * for this VA in the TLB. 1296 */ 1297 KDASSERT(pmap_pte_v(pte) == 0); 1298 1299 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(m) | 1300 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1301 1302 va += NBPG; 1303 m = m->pageq.tqe_next; 1304 } 1305 1306 #ifdef DIAGNOSTIC 1307 if (m) 1308 panic("pmap_alloc_l1pt: pglist not empty\n"); 1309 #endif /* DIAGNOSTIC */ 1310 1311 pt->pt_flags = 0; 1312 return(pt); 1313 } 1314 1315 /* 1316 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1317 */ 1318 static void 1319 pmap_free_l1pt(struct l1pt *pt) 1320 { 1321 /* Separate the physical memory for the virtual space */ 1322 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1323 pmap_update(pmap_kernel()); 1324 1325 /* Return the physical memory */ 1326 uvm_pglistfree(&pt->pt_plist); 1327 1328 /* Free the virtual space */ 1329 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1330 1331 /* Free the l1pt structure */ 1332 free(pt, M_VMPMAP); 1333 } 1334 1335 /* 1336 * pmap_alloc_ptpt: 1337 * 1338 * Allocate the page table that maps the PTE array. 1339 */ 1340 static int 1341 pmap_alloc_ptpt(struct pmap *pmap) 1342 { 1343 struct vm_page *pg; 1344 pt_entry_t *pte; 1345 1346 KASSERT(pmap->pm_vptpt == 0); 1347 1348 pmap->pm_vptpt = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1349 if (pmap->pm_vptpt == 0) { 1350 PDEBUG(0, 1351 printf("pmap_alloc_ptpt: no KVA for PTPT\n")); 1352 return (ENOMEM); 1353 } 1354 1355 for (;;) { 1356 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1357 if (pg != NULL) 1358 break; 1359 uvm_wait("pmap_ptpt"); 1360 } 1361 1362 pmap->pm_pptpt = VM_PAGE_TO_PHYS(pg); 1363 1364 pte = vtopte(pmap->pm_vptpt); 1365 1366 KDASSERT(pmap_pte_v(pte) == 0); 1367 1368 *pte = L2_S_PROTO | pmap->pm_pptpt | 1369 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1370 1371 return (0); 1372 } 1373 1374 /* 1375 * pmap_free_ptpt: 1376 * 1377 * Free the page table that maps the PTE array. 1378 */ 1379 static void 1380 pmap_free_ptpt(struct pmap *pmap) 1381 { 1382 1383 pmap_kremove(pmap->pm_vptpt, L2_TABLE_SIZE); 1384 pmap_update(pmap_kernel()); 1385 1386 uvm_pagefree(PHYS_TO_VM_PAGE(pmap->pm_pptpt)); 1387 1388 uvm_km_free(kernel_map, pmap->pm_vptpt, L2_TABLE_SIZE); 1389 } 1390 1391 /* 1392 * Allocate a page directory. 1393 * This routine will either allocate a new page directory from the pool 1394 * of L1 page tables currently held by the kernel or it will allocate 1395 * a new one via pmap_alloc_l1pt(). 1396 * It will then initialise the l1 page table for use. 1397 */ 1398 static int 1399 pmap_allocpagedir(struct pmap *pmap) 1400 { 1401 paddr_t pa; 1402 struct l1pt *pt; 1403 int error; 1404 1405 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1406 1407 /* Do we have any spare L1's lying around ? */ 1408 if (l1pt_static_queue_count) { 1409 --l1pt_static_queue_count; 1410 pt = l1pt_static_queue.sqh_first; 1411 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt, pt_queue); 1412 } else if (l1pt_queue_count) { 1413 --l1pt_queue_count; 1414 pt = l1pt_queue.sqh_first; 1415 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt, pt_queue); 1416 ++l1pt_reuse_count; 1417 } else { 1418 pt = pmap_alloc_l1pt(); 1419 if (!pt) 1420 return(ENOMEM); 1421 ++l1pt_create_count; 1422 } 1423 1424 /* Store the pointer to the l1 descriptor in the pmap. */ 1425 pmap->pm_l1pt = pt; 1426 1427 /* Get the physical address of the start of the l1 */ 1428 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1429 1430 /* Store the virtual address of the l1 in the pmap. */ 1431 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1432 1433 /* Clean the L1 if it is dirty */ 1434 if (!(pt->pt_flags & PTFLAG_CLEAN)) 1435 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1436 1437 /* Allocate a page table to map all the page tables for this pmap */ 1438 if ((error = pmap_alloc_ptpt(pmap)) != 0) { 1439 pmap_freepagedir(pmap); 1440 return (error); 1441 } 1442 1443 /* need to lock this all up for growkernel */ 1444 simple_lock(&pmaps_lock); 1445 1446 /* Duplicate the kernel mappings. */ 1447 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1448 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1449 KERNEL_PD_SIZE); 1450 1451 /* Wire in this page table */ 1452 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, TRUE); 1453 1454 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1455 1456 /* 1457 * Map the kernel page tables into the new PT map. 1458 */ 1459 bcopy((char *)(PTE_BASE 1460 + (PTE_BASE >> (PGSHIFT - 2)) 1461 + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1462 (char *)pmap->pm_vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1463 (KERNEL_PD_SIZE >> 2)); 1464 1465 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1466 simple_unlock(&pmaps_lock); 1467 1468 return(0); 1469 } 1470 1471 1472 /* 1473 * Initialize a preallocated and zeroed pmap structure, 1474 * such as one in a vmspace structure. 1475 */ 1476 1477 void 1478 pmap_pinit(struct pmap *pmap) 1479 { 1480 int backoff = 6; 1481 int retry = 10; 1482 1483 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1484 1485 /* Keep looping until we succeed in allocating a page directory */ 1486 while (pmap_allocpagedir(pmap) != 0) { 1487 /* 1488 * Ok we failed to allocate a suitable block of memory for an 1489 * L1 page table. This means that either: 1490 * 1. 16KB of virtual address space could not be allocated 1491 * 2. 16KB of physically contiguous memory on a 16KB boundary 1492 * could not be allocated. 1493 * 1494 * Since we cannot fail we will sleep for a while and try 1495 * again. 1496 * 1497 * Searching for a suitable L1 PT is expensive: 1498 * to avoid hogging the system when memory is really 1499 * scarce, use an exponential back-off so that 1500 * eventually we won't retry more than once every 8 1501 * seconds. This should allow other processes to run 1502 * to completion and free up resources. 1503 */ 1504 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1505 NULL); 1506 if (--retry == 0) { 1507 retry = 10; 1508 if (backoff) 1509 --backoff; 1510 } 1511 } 1512 1513 if (vector_page < KERNEL_BASE) { 1514 /* 1515 * Map the vector page. This will also allocate and map 1516 * an L2 table for it. 1517 */ 1518 pmap_enter(pmap, vector_page, systempage.pv_pa, 1519 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1520 pmap_update(pmap); 1521 } 1522 } 1523 1524 1525 void 1526 pmap_freepagedir(struct pmap *pmap) 1527 { 1528 /* Free the memory used for the page table mapping */ 1529 if (pmap->pm_vptpt != 0) 1530 pmap_free_ptpt(pmap); 1531 1532 /* junk the L1 page table */ 1533 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1534 /* Add the page table to the queue */ 1535 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pmap->pm_l1pt, pt_queue); 1536 ++l1pt_static_queue_count; 1537 } else if (l1pt_queue_count < 8) { 1538 /* Add the page table to the queue */ 1539 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1540 ++l1pt_queue_count; 1541 } else 1542 pmap_free_l1pt(pmap->pm_l1pt); 1543 } 1544 1545 1546 /* 1547 * Retire the given physical map from service. 1548 * Should only be called if the map contains no valid mappings. 1549 */ 1550 1551 void 1552 pmap_destroy(struct pmap *pmap) 1553 { 1554 struct vm_page *page; 1555 int count; 1556 1557 if (pmap == NULL) 1558 return; 1559 1560 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1561 1562 /* 1563 * Drop reference count 1564 */ 1565 simple_lock(&pmap->pm_obj.vmobjlock); 1566 count = --pmap->pm_obj.uo_refs; 1567 simple_unlock(&pmap->pm_obj.vmobjlock); 1568 if (count > 0) { 1569 return; 1570 } 1571 1572 /* 1573 * reference count is zero, free pmap resources and then free pmap. 1574 */ 1575 1576 /* 1577 * remove it from global list of pmaps 1578 */ 1579 1580 simple_lock(&pmaps_lock); 1581 LIST_REMOVE(pmap, pm_list); 1582 simple_unlock(&pmaps_lock); 1583 1584 if (vector_page < KERNEL_BASE) { 1585 /* Remove the vector page mapping */ 1586 pmap_remove(pmap, vector_page, vector_page + NBPG); 1587 pmap_update(pmap); 1588 } 1589 1590 /* 1591 * Free any page tables still mapped 1592 * This is only temporay until pmap_enter can count the number 1593 * of mappings made in a page table. Then pmap_remove() can 1594 * reduce the count and free the pagetable when the count 1595 * reaches zero. Note that entries in this list should match the 1596 * contents of the ptpt, however this is faster than walking a 1024 1597 * entries looking for pt's 1598 * taken from i386 pmap.c 1599 */ 1600 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1601 KASSERT((page->flags & PG_BUSY) == 0); 1602 page->wire_count = 0; 1603 uvm_pagefree(page); 1604 } 1605 1606 /* Free the page dir */ 1607 pmap_freepagedir(pmap); 1608 1609 /* return the pmap to the pool */ 1610 pool_put(&pmap_pmap_pool, pmap); 1611 } 1612 1613 1614 /* 1615 * void pmap_reference(struct pmap *pmap) 1616 * 1617 * Add a reference to the specified pmap. 1618 */ 1619 1620 void 1621 pmap_reference(struct pmap *pmap) 1622 { 1623 if (pmap == NULL) 1624 return; 1625 1626 simple_lock(&pmap->pm_lock); 1627 pmap->pm_obj.uo_refs++; 1628 simple_unlock(&pmap->pm_lock); 1629 } 1630 1631 /* 1632 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1633 * 1634 * Return the start and end addresses of the kernel's virtual space. 1635 * These values are setup in pmap_bootstrap and are updated as pages 1636 * are allocated. 1637 */ 1638 1639 void 1640 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1641 { 1642 *start = virtual_avail; 1643 *end = virtual_end; 1644 } 1645 1646 /* 1647 * Activate the address space for the specified process. If the process 1648 * is the current process, load the new MMU context. 1649 */ 1650 void 1651 pmap_activate(struct proc *p) 1652 { 1653 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1654 struct pcb *pcb = &p->p_addr->u_pcb; 1655 1656 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1657 (paddr_t *)&pcb->pcb_pagedir); 1658 1659 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1660 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1661 1662 if (p == curproc) { 1663 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1664 setttb((u_int)pcb->pcb_pagedir); 1665 } 1666 } 1667 1668 /* 1669 * Deactivate the address space of the specified process. 1670 */ 1671 void 1672 pmap_deactivate(struct proc *p) 1673 { 1674 } 1675 1676 /* 1677 * Perform any deferred pmap operations. 1678 */ 1679 void 1680 pmap_update(struct pmap *pmap) 1681 { 1682 1683 /* 1684 * We haven't deferred any pmap operations, but we do need to 1685 * make sure TLB/cache operations have completed. 1686 */ 1687 cpu_cpwait(); 1688 } 1689 1690 /* 1691 * pmap_clean_page() 1692 * 1693 * This is a local function used to work out the best strategy to clean 1694 * a single page referenced by its entry in the PV table. It's used by 1695 * pmap_copy_page, pmap_zero page and maybe some others later on. 1696 * 1697 * Its policy is effectively: 1698 * o If there are no mappings, we don't bother doing anything with the cache. 1699 * o If there is one mapping, we clean just that page. 1700 * o If there are multiple mappings, we clean the entire cache. 1701 * 1702 * So that some functions can be further optimised, it returns 0 if it didn't 1703 * clean the entire cache, or 1 if it did. 1704 * 1705 * XXX One bug in this routine is that if the pv_entry has a single page 1706 * mapped at 0x00000000 a whole cache clean will be performed rather than 1707 * just the 1 page. Since this should not occur in everyday use and if it does 1708 * it will just result in not the most efficient clean for the page. 1709 */ 1710 static int 1711 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1712 { 1713 struct pmap *pmap; 1714 struct pv_entry *npv; 1715 int cache_needs_cleaning = 0; 1716 vaddr_t page_to_clean = 0; 1717 1718 if (pv == NULL) 1719 /* nothing mapped in so nothing to flush */ 1720 return (0); 1721 1722 /* Since we flush the cache each time we change curproc, we 1723 * only need to flush the page if it is in the current pmap. 1724 */ 1725 if (curproc) 1726 pmap = curproc->p_vmspace->vm_map.pmap; 1727 else 1728 pmap = pmap_kernel(); 1729 1730 for (npv = pv; npv; npv = npv->pv_next) { 1731 if (npv->pv_pmap == pmap) { 1732 /* The page is mapped non-cacheable in 1733 * this map. No need to flush the cache. 1734 */ 1735 if (npv->pv_flags & PVF_NC) { 1736 #ifdef DIAGNOSTIC 1737 if (cache_needs_cleaning) 1738 panic("pmap_clean_page: " 1739 "cache inconsistency"); 1740 #endif 1741 break; 1742 } 1743 #if 0 1744 /* 1745 * XXX Can't do this because pmap_protect doesn't 1746 * XXX clean the page when it does a write-protect. 1747 */ 1748 else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1749 continue; 1750 #endif 1751 if (cache_needs_cleaning){ 1752 page_to_clean = 0; 1753 break; 1754 } 1755 else 1756 page_to_clean = npv->pv_va; 1757 cache_needs_cleaning = 1; 1758 } 1759 } 1760 1761 if (page_to_clean) 1762 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1763 else if (cache_needs_cleaning) { 1764 cpu_idcache_wbinv_all(); 1765 return (1); 1766 } 1767 return (0); 1768 } 1769 1770 /* 1771 * pmap_zero_page() 1772 * 1773 * Zero a given physical page by mapping it at a page hook point. 1774 * In doing the zero page op, the page we zero is mapped cachable, as with 1775 * StrongARM accesses to non-cached pages are non-burst making writing 1776 * _any_ bulk data very slow. 1777 */ 1778 #if ARM_MMU_GENERIC == 1 1779 void 1780 pmap_zero_page_generic(paddr_t phys) 1781 { 1782 #ifdef DEBUG 1783 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1784 1785 if (pg->mdpage.pvh_list != NULL) 1786 panic("pmap_zero_page: page has mappings"); 1787 #endif 1788 1789 KDASSERT((phys & PGOFSET) == 0); 1790 1791 /* 1792 * Hook in the page, zero it, and purge the cache for that 1793 * zeroed page. Invalidate the TLB as needed. 1794 */ 1795 *cdst_pte = L2_S_PROTO | phys | 1796 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1797 cpu_tlb_flushD_SE(cdstp); 1798 cpu_cpwait(); 1799 bzero_page(cdstp); 1800 cpu_dcache_wbinv_range(cdstp, NBPG); 1801 } 1802 #endif /* ARM_MMU_GENERIC == 1 */ 1803 1804 #if ARM_MMU_XSCALE == 1 1805 void 1806 pmap_zero_page_xscale(paddr_t phys) 1807 { 1808 #ifdef DEBUG 1809 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1810 1811 if (pg->mdpage.pvh_list != NULL) 1812 panic("pmap_zero_page: page has mappings"); 1813 #endif 1814 1815 KDASSERT((phys & PGOFSET) == 0); 1816 1817 /* 1818 * Hook in the page, zero it, and purge the cache for that 1819 * zeroed page. Invalidate the TLB as needed. 1820 */ 1821 *cdst_pte = L2_S_PROTO | phys | 1822 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1823 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1824 cpu_tlb_flushD_SE(cdstp); 1825 cpu_cpwait(); 1826 bzero_page(cdstp); 1827 xscale_cache_clean_minidata(); 1828 } 1829 #endif /* ARM_MMU_XSCALE == 1 */ 1830 1831 /* pmap_pageidlezero() 1832 * 1833 * The same as above, except that we assume that the page is not 1834 * mapped. This means we never have to flush the cache first. Called 1835 * from the idle loop. 1836 */ 1837 boolean_t 1838 pmap_pageidlezero(paddr_t phys) 1839 { 1840 int i, *ptr; 1841 boolean_t rv = TRUE; 1842 #ifdef DEBUG 1843 struct vm_page *pg; 1844 1845 pg = PHYS_TO_VM_PAGE(phys); 1846 if (pg->mdpage.pvh_list != NULL) 1847 panic("pmap_pageidlezero: page has mappings"); 1848 #endif 1849 1850 KDASSERT((phys & PGOFSET) == 0); 1851 1852 /* 1853 * Hook in the page, zero it, and purge the cache for that 1854 * zeroed page. Invalidate the TLB as needed. 1855 */ 1856 *cdst_pte = L2_S_PROTO | phys | 1857 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1858 cpu_tlb_flushD_SE(cdstp); 1859 cpu_cpwait(); 1860 1861 for (i = 0, ptr = (int *)cdstp; 1862 i < (NBPG / sizeof(int)); i++) { 1863 if (sched_whichqs != 0) { 1864 /* 1865 * A process has become ready. Abort now, 1866 * so we don't keep it waiting while we 1867 * do slow memory access to finish this 1868 * page. 1869 */ 1870 rv = FALSE; 1871 break; 1872 } 1873 *ptr++ = 0; 1874 } 1875 1876 if (rv) 1877 /* 1878 * if we aborted we'll rezero this page again later so don't 1879 * purge it unless we finished it 1880 */ 1881 cpu_dcache_wbinv_range(cdstp, NBPG); 1882 return (rv); 1883 } 1884 1885 /* 1886 * pmap_copy_page() 1887 * 1888 * Copy one physical page into another, by mapping the pages into 1889 * hook points. The same comment regarding cachability as in 1890 * pmap_zero_page also applies here. 1891 */ 1892 #if ARM_MMU_GENERIC == 1 1893 void 1894 pmap_copy_page_generic(paddr_t src, paddr_t dst) 1895 { 1896 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1897 #ifdef DEBUG 1898 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1899 1900 if (dst_pg->mdpage.pvh_list != NULL) 1901 panic("pmap_copy_page: dst page has mappings"); 1902 #endif 1903 1904 KDASSERT((src & PGOFSET) == 0); 1905 KDASSERT((dst & PGOFSET) == 0); 1906 1907 /* 1908 * Clean the source page. Hold the source page's lock for 1909 * the duration of the copy so that no other mappings can 1910 * be created while we have a potentially aliased mapping. 1911 */ 1912 simple_lock(&src_pg->mdpage.pvh_slock); 1913 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1914 1915 /* 1916 * Map the pages into the page hook points, copy them, and purge 1917 * the cache for the appropriate page. Invalidate the TLB 1918 * as required. 1919 */ 1920 *csrc_pte = L2_S_PROTO | src | 1921 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 1922 *cdst_pte = L2_S_PROTO | dst | 1923 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1924 cpu_tlb_flushD_SE(csrcp); 1925 cpu_tlb_flushD_SE(cdstp); 1926 cpu_cpwait(); 1927 bcopy_page(csrcp, cdstp); 1928 cpu_dcache_inv_range(csrcp, NBPG); 1929 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1930 cpu_dcache_wbinv_range(cdstp, NBPG); 1931 } 1932 #endif /* ARM_MMU_GENERIC == 1 */ 1933 1934 #if ARM_MMU_XSCALE == 1 1935 void 1936 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 1937 { 1938 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 1939 #ifdef DEBUG 1940 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 1941 1942 if (dst_pg->mdpage.pvh_list != NULL) 1943 panic("pmap_copy_page: dst page has mappings"); 1944 #endif 1945 1946 KDASSERT((src & PGOFSET) == 0); 1947 KDASSERT((dst & PGOFSET) == 0); 1948 1949 /* 1950 * Clean the source page. Hold the source page's lock for 1951 * the duration of the copy so that no other mappings can 1952 * be created while we have a potentially aliased mapping. 1953 */ 1954 simple_lock(&src_pg->mdpage.pvh_slock); 1955 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 1956 1957 /* 1958 * Map the pages into the page hook points, copy them, and purge 1959 * the cache for the appropriate page. Invalidate the TLB 1960 * as required. 1961 */ 1962 *csrc_pte = L2_S_PROTO | src | 1963 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 1964 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1965 *cdst_pte = L2_S_PROTO | dst | 1966 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1967 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1968 cpu_tlb_flushD_SE(csrcp); 1969 cpu_tlb_flushD_SE(cdstp); 1970 cpu_cpwait(); 1971 bcopy_page(csrcp, cdstp); 1972 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 1973 xscale_cache_clean_minidata(); 1974 } 1975 #endif /* ARM_MMU_XSCALE == 1 */ 1976 1977 #if 0 1978 void 1979 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 1980 { 1981 pd_entry_t *pde; 1982 paddr_t pa; 1983 struct vm_page *m; 1984 1985 if (pmap == pmap_kernel()) 1986 return; 1987 1988 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 1989 pa = pmap_pte_pa(pde); 1990 m = PHYS_TO_VM_PAGE(pa); 1991 ++m->wire_count; 1992 #ifdef MYCROFT_HACK 1993 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 1994 pmap, va, pde, pa, m, m->wire_count); 1995 #endif 1996 } 1997 1998 void 1999 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2000 { 2001 pd_entry_t *pde; 2002 paddr_t pa; 2003 struct vm_page *m; 2004 2005 if (pmap == pmap_kernel()) 2006 return; 2007 2008 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2009 pa = pmap_pte_pa(pde); 2010 m = PHYS_TO_VM_PAGE(pa); 2011 --m->wire_count; 2012 #ifdef MYCROFT_HACK 2013 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2014 pmap, va, pde, pa, m, m->wire_count); 2015 #endif 2016 if (m->wire_count == 0) { 2017 #ifdef MYCROFT_HACK 2018 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2019 pmap, va, pde, pa, m); 2020 #endif 2021 pmap_unmap_in_l1(pmap, va); 2022 uvm_pagefree(m); 2023 --pmap->pm_stats.resident_count; 2024 } 2025 } 2026 #else 2027 #define pmap_pte_addref(pmap, va) 2028 #define pmap_pte_delref(pmap, va) 2029 #endif 2030 2031 /* 2032 * Since we have a virtually indexed cache, we may need to inhibit caching if 2033 * there is more than one mapping and at least one of them is writable. 2034 * Since we purge the cache on every context switch, we only need to check for 2035 * other mappings within the same pmap, or kernel_pmap. 2036 * This function is also called when a page is unmapped, to possibly reenable 2037 * caching on any remaining mappings. 2038 * 2039 * The code implements the following logic, where: 2040 * 2041 * KW = # of kernel read/write pages 2042 * KR = # of kernel read only pages 2043 * UW = # of user read/write pages 2044 * UR = # of user read only pages 2045 * OW = # of user read/write pages in another pmap, then 2046 * 2047 * KC = kernel mapping is cacheable 2048 * UC = user mapping is cacheable 2049 * 2050 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2051 * +--------------------------------------------- 2052 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2053 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2054 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2055 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2056 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2057 * 2058 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2059 */ 2060 __inline static void 2061 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2062 boolean_t clear_cache) 2063 { 2064 if (pmap == pmap_kernel()) 2065 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2066 else 2067 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2068 } 2069 2070 static void 2071 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2072 boolean_t clear_cache) 2073 { 2074 int user_entries = 0; 2075 int user_writable = 0; 2076 int user_cacheable = 0; 2077 int kernel_entries = 0; 2078 int kernel_writable = 0; 2079 int kernel_cacheable = 0; 2080 struct pv_entry *pv; 2081 struct pmap *last_pmap = pmap; 2082 2083 #ifdef DIAGNOSTIC 2084 if (pmap != pmap_kernel()) 2085 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2086 #endif 2087 2088 /* 2089 * Pass one, see if there are both kernel and user pmaps for 2090 * this page. Calculate whether there are user-writable or 2091 * kernel-writable pages. 2092 */ 2093 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2094 if (pv->pv_pmap != pmap) { 2095 user_entries++; 2096 if (pv->pv_flags & PVF_WRITE) 2097 user_writable++; 2098 if ((pv->pv_flags & PVF_NC) == 0) 2099 user_cacheable++; 2100 } else { 2101 kernel_entries++; 2102 if (pv->pv_flags & PVF_WRITE) 2103 kernel_writable++; 2104 if ((pv->pv_flags & PVF_NC) == 0) 2105 kernel_cacheable++; 2106 } 2107 } 2108 2109 /* 2110 * We know we have just been updating a kernel entry, so if 2111 * all user pages are already cacheable, then there is nothing 2112 * further to do. 2113 */ 2114 if (kernel_entries == 0 && 2115 user_cacheable == user_entries) 2116 return; 2117 2118 if (user_entries) { 2119 /* 2120 * Scan over the list again, for each entry, if it 2121 * might not be set correctly, call pmap_vac_me_user 2122 * to recalculate the settings. 2123 */ 2124 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2125 /* 2126 * We know kernel mappings will get set 2127 * correctly in other calls. We also know 2128 * that if the pmap is the same as last_pmap 2129 * then we've just handled this entry. 2130 */ 2131 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2132 continue; 2133 /* 2134 * If there are kernel entries and this page 2135 * is writable but non-cacheable, then we can 2136 * skip this entry also. 2137 */ 2138 if (kernel_entries > 0 && 2139 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2140 (PVF_NC | PVF_WRITE)) 2141 continue; 2142 /* 2143 * Similarly if there are no kernel-writable 2144 * entries and the page is already 2145 * read-only/cacheable. 2146 */ 2147 if (kernel_writable == 0 && 2148 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2149 continue; 2150 /* 2151 * For some of the remaining cases, we know 2152 * that we must recalculate, but for others we 2153 * can't tell if they are correct or not, so 2154 * we recalculate anyway. 2155 */ 2156 pmap_unmap_ptes(last_pmap); 2157 last_pmap = pv->pv_pmap; 2158 ptes = pmap_map_ptes(last_pmap); 2159 pmap_vac_me_user(last_pmap, pg, ptes, 2160 pmap_is_curpmap(last_pmap)); 2161 } 2162 /* Restore the pte mapping that was passed to us. */ 2163 if (last_pmap != pmap) { 2164 pmap_unmap_ptes(last_pmap); 2165 ptes = pmap_map_ptes(pmap); 2166 } 2167 if (kernel_entries == 0) 2168 return; 2169 } 2170 2171 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2172 return; 2173 } 2174 2175 static void 2176 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2177 boolean_t clear_cache) 2178 { 2179 struct pmap *kpmap = pmap_kernel(); 2180 struct pv_entry *pv, *npv; 2181 int entries = 0; 2182 int writable = 0; 2183 int cacheable_entries = 0; 2184 int kern_cacheable = 0; 2185 int other_writable = 0; 2186 2187 pv = pg->mdpage.pvh_list; 2188 KASSERT(ptes != NULL); 2189 2190 /* 2191 * Count mappings and writable mappings in this pmap. 2192 * Include kernel mappings as part of our own. 2193 * Keep a pointer to the first one. 2194 */ 2195 for (npv = pv; npv; npv = npv->pv_next) { 2196 /* Count mappings in the same pmap */ 2197 if (pmap == npv->pv_pmap || 2198 kpmap == npv->pv_pmap) { 2199 if (entries++ == 0) 2200 pv = npv; 2201 /* Cacheable mappings */ 2202 if ((npv->pv_flags & PVF_NC) == 0) { 2203 cacheable_entries++; 2204 if (kpmap == npv->pv_pmap) 2205 kern_cacheable++; 2206 } 2207 /* Writable mappings */ 2208 if (npv->pv_flags & PVF_WRITE) 2209 ++writable; 2210 } else if (npv->pv_flags & PVF_WRITE) 2211 other_writable = 1; 2212 } 2213 2214 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2215 "writable %d cacheable %d %s\n", pmap, entries, writable, 2216 cacheable_entries, clear_cache ? "clean" : "no clean")); 2217 2218 /* 2219 * Enable or disable caching as necessary. 2220 * Note: the first entry might be part of the kernel pmap, 2221 * so we can't assume this is indicative of the state of the 2222 * other (maybe non-kpmap) entries. 2223 */ 2224 if ((entries > 1 && writable) || 2225 (entries > 0 && pmap == kpmap && other_writable)) { 2226 if (cacheable_entries == 0) 2227 return; 2228 for (npv = pv; npv; npv = npv->pv_next) { 2229 if ((pmap == npv->pv_pmap 2230 || kpmap == npv->pv_pmap) && 2231 (npv->pv_flags & PVF_NC) == 0) { 2232 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2233 npv->pv_flags |= PVF_NC; 2234 /* 2235 * If this page needs flushing from the 2236 * cache, and we aren't going to do it 2237 * below, do it now. 2238 */ 2239 if ((cacheable_entries < 4 && 2240 (clear_cache || npv->pv_pmap == kpmap)) || 2241 (npv->pv_pmap == kpmap && 2242 !clear_cache && kern_cacheable < 4)) { 2243 cpu_idcache_wbinv_range(npv->pv_va, 2244 NBPG); 2245 cpu_tlb_flushID_SE(npv->pv_va); 2246 } 2247 } 2248 } 2249 if ((clear_cache && cacheable_entries >= 4) || 2250 kern_cacheable >= 4) { 2251 cpu_idcache_wbinv_all(); 2252 cpu_tlb_flushID(); 2253 } 2254 cpu_cpwait(); 2255 } else if (entries > 0) { 2256 /* 2257 * Turn cacheing back on for some pages. If it is a kernel 2258 * page, only do so if there are no other writable pages. 2259 */ 2260 for (npv = pv; npv; npv = npv->pv_next) { 2261 if ((pmap == npv->pv_pmap || 2262 (kpmap == npv->pv_pmap && other_writable == 0)) && 2263 (npv->pv_flags & PVF_NC)) { 2264 ptes[arm_btop(npv->pv_va)] |= 2265 pte_l2_s_cache_mode; 2266 npv->pv_flags &= ~PVF_NC; 2267 } 2268 } 2269 } 2270 } 2271 2272 /* 2273 * pmap_remove() 2274 * 2275 * pmap_remove is responsible for nuking a number of mappings for a range 2276 * of virtual address space in the current pmap. To do this efficiently 2277 * is interesting, because in a number of cases a wide virtual address 2278 * range may be supplied that contains few actual mappings. So, the 2279 * optimisations are: 2280 * 1. Try and skip over hunks of address space for which an L1 entry 2281 * does not exist. 2282 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2283 * maybe do just a partial cache clean. This path of execution is 2284 * complicated by the fact that the cache must be flushed _before_ 2285 * the PTE is nuked, being a VAC :-) 2286 * 3. Maybe later fast-case a single page, but I don't think this is 2287 * going to make _that_ much difference overall. 2288 */ 2289 2290 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2291 2292 void 2293 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2294 { 2295 int cleanlist_idx = 0; 2296 struct pagelist { 2297 vaddr_t va; 2298 pt_entry_t *pte; 2299 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2300 pt_entry_t *pte = 0, *ptes; 2301 paddr_t pa; 2302 int pmap_active; 2303 struct vm_page *pg; 2304 2305 /* Exit quick if there is no pmap */ 2306 if (!pmap) 2307 return; 2308 2309 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2310 pmap, sva, eva)); 2311 2312 /* 2313 * we lock in the pmap => vm_page direction 2314 */ 2315 PMAP_MAP_TO_HEAD_LOCK(); 2316 2317 ptes = pmap_map_ptes(pmap); 2318 /* Get a page table pointer */ 2319 while (sva < eva) { 2320 if (pmap_pde_page(pmap_pde(pmap, sva))) 2321 break; 2322 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2323 } 2324 2325 pte = &ptes[arm_btop(sva)]; 2326 /* Note if the pmap is active thus require cache and tlb cleans */ 2327 pmap_active = pmap_is_curpmap(pmap); 2328 2329 /* Now loop along */ 2330 while (sva < eva) { 2331 /* Check if we can move to the next PDE (l1 chunk) */ 2332 if (!(sva & L2_ADDR_BITS)) 2333 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2334 sva += L1_S_SIZE; 2335 pte += arm_btop(L1_S_SIZE); 2336 continue; 2337 } 2338 2339 /* We've found a valid PTE, so this page of PTEs has to go. */ 2340 if (pmap_pte_v(pte)) { 2341 /* Update statistics */ 2342 --pmap->pm_stats.resident_count; 2343 2344 /* 2345 * Add this page to our cache remove list, if we can. 2346 * If, however the cache remove list is totally full, 2347 * then do a complete cache invalidation taking note 2348 * to backtrack the PTE table beforehand, and ignore 2349 * the lists in future because there's no longer any 2350 * point in bothering with them (we've paid the 2351 * penalty, so will carry on unhindered). Otherwise, 2352 * when we fall out, we just clean the list. 2353 */ 2354 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2355 pa = pmap_pte_pa(pte); 2356 2357 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2358 /* Add to the clean list. */ 2359 cleanlist[cleanlist_idx].pte = pte; 2360 cleanlist[cleanlist_idx].va = sva; 2361 cleanlist_idx++; 2362 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2363 int cnt; 2364 2365 /* Nuke everything if needed. */ 2366 if (pmap_active) { 2367 cpu_idcache_wbinv_all(); 2368 cpu_tlb_flushID(); 2369 } 2370 2371 /* 2372 * Roll back the previous PTE list, 2373 * and zero out the current PTE. 2374 */ 2375 for (cnt = 0; cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) { 2376 *cleanlist[cnt].pte = 0; 2377 pmap_pte_delref(pmap, cleanlist[cnt].va); 2378 } 2379 *pte = 0; 2380 pmap_pte_delref(pmap, sva); 2381 cleanlist_idx++; 2382 } else { 2383 /* 2384 * We've already nuked the cache and 2385 * TLB, so just carry on regardless, 2386 * and we won't need to do it again 2387 */ 2388 *pte = 0; 2389 pmap_pte_delref(pmap, sva); 2390 } 2391 2392 /* 2393 * Update flags. In a number of circumstances, 2394 * we could cluster a lot of these and do a 2395 * number of sequential pages in one go. 2396 */ 2397 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2398 struct pv_entry *pve; 2399 simple_lock(&pg->mdpage.pvh_slock); 2400 pve = pmap_remove_pv(pg, pmap, sva); 2401 pmap_free_pv(pmap, pve); 2402 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2403 simple_unlock(&pg->mdpage.pvh_slock); 2404 } 2405 } 2406 sva += NBPG; 2407 pte++; 2408 } 2409 2410 pmap_unmap_ptes(pmap); 2411 /* 2412 * Now, if we've fallen through down to here, chances are that there 2413 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2414 */ 2415 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2416 u_int cnt; 2417 2418 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2419 if (pmap_active) { 2420 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2421 NBPG); 2422 *cleanlist[cnt].pte = 0; 2423 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2424 } else 2425 *cleanlist[cnt].pte = 0; 2426 pmap_pte_delref(pmap, cleanlist[cnt].va); 2427 } 2428 } 2429 PMAP_MAP_TO_HEAD_UNLOCK(); 2430 } 2431 2432 /* 2433 * Routine: pmap_remove_all 2434 * Function: 2435 * Removes this physical page from 2436 * all physical maps in which it resides. 2437 * Reflects back modify bits to the pager. 2438 */ 2439 2440 static void 2441 pmap_remove_all(struct vm_page *pg) 2442 { 2443 struct pv_entry *pv, *npv; 2444 struct pmap *pmap; 2445 pt_entry_t *pte, *ptes; 2446 2447 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2448 2449 /* set vm_page => pmap locking */ 2450 PMAP_HEAD_TO_MAP_LOCK(); 2451 2452 simple_lock(&pg->mdpage.pvh_slock); 2453 2454 pv = pg->mdpage.pvh_list; 2455 if (pv == NULL) { 2456 PDEBUG(0, printf("free page\n")); 2457 simple_unlock(&pg->mdpage.pvh_slock); 2458 PMAP_HEAD_TO_MAP_UNLOCK(); 2459 return; 2460 } 2461 pmap_clean_page(pv, FALSE); 2462 2463 while (pv) { 2464 pmap = pv->pv_pmap; 2465 ptes = pmap_map_ptes(pmap); 2466 pte = &ptes[arm_btop(pv->pv_va)]; 2467 2468 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2469 pv->pv_va, pv->pv_flags)); 2470 #ifdef DEBUG 2471 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2472 pmap_pte_v(pte) == 0 || 2473 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2474 panic("pmap_remove_all: bad mapping"); 2475 #endif /* DEBUG */ 2476 2477 /* 2478 * Update statistics 2479 */ 2480 --pmap->pm_stats.resident_count; 2481 2482 /* Wired bit */ 2483 if (pv->pv_flags & PVF_WIRED) 2484 --pmap->pm_stats.wired_count; 2485 2486 /* 2487 * Invalidate the PTEs. 2488 * XXX: should cluster them up and invalidate as many 2489 * as possible at once. 2490 */ 2491 2492 #ifdef needednotdone 2493 reduce wiring count on page table pages as references drop 2494 #endif 2495 2496 *pte = 0; 2497 pmap_pte_delref(pmap, pv->pv_va); 2498 2499 npv = pv->pv_next; 2500 pmap_free_pv(pmap, pv); 2501 pv = npv; 2502 pmap_unmap_ptes(pmap); 2503 } 2504 pg->mdpage.pvh_list = NULL; 2505 simple_unlock(&pg->mdpage.pvh_slock); 2506 PMAP_HEAD_TO_MAP_UNLOCK(); 2507 2508 PDEBUG(0, printf("done\n")); 2509 cpu_tlb_flushID(); 2510 cpu_cpwait(); 2511 } 2512 2513 2514 /* 2515 * Set the physical protection on the specified range of this map as requested. 2516 */ 2517 2518 void 2519 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2520 { 2521 pt_entry_t *pte = NULL, *ptes; 2522 struct vm_page *pg; 2523 int armprot; 2524 int flush = 0; 2525 paddr_t pa; 2526 2527 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2528 pmap, sva, eva, prot)); 2529 2530 if (~prot & VM_PROT_READ) { 2531 /* Just remove the mappings. */ 2532 pmap_remove(pmap, sva, eva); 2533 /* pmap_update not needed as it should be called by the caller 2534 * of pmap_protect */ 2535 return; 2536 } 2537 if (prot & VM_PROT_WRITE) { 2538 /* 2539 * If this is a read->write transition, just ignore it and let 2540 * uvm_fault() take care of it later. 2541 */ 2542 return; 2543 } 2544 2545 /* Need to lock map->head */ 2546 PMAP_MAP_TO_HEAD_LOCK(); 2547 2548 ptes = pmap_map_ptes(pmap); 2549 2550 /* 2551 * OK, at this point, we know we're doing write-protect operation. 2552 * If the pmap is active, write-back the range. 2553 */ 2554 if (pmap_is_curpmap(pmap)) 2555 cpu_dcache_wb_range(sva, eva - sva); 2556 2557 /* 2558 * We need to acquire a pointer to a page table page before entering 2559 * the following loop. 2560 */ 2561 while (sva < eva) { 2562 if (pmap_pde_page(pmap_pde(pmap, sva))) 2563 break; 2564 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2565 } 2566 2567 pte = &ptes[arm_btop(sva)]; 2568 2569 while (sva < eva) { 2570 /* only check once in a while */ 2571 if ((sva & L2_ADDR_BITS) == 0) { 2572 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2573 /* We can race ahead here, to the next pde. */ 2574 sva += L1_S_SIZE; 2575 pte += arm_btop(L1_S_SIZE); 2576 continue; 2577 } 2578 } 2579 2580 if (!pmap_pte_v(pte)) 2581 goto next; 2582 2583 flush = 1; 2584 2585 armprot = 0; 2586 if (sva < VM_MAXUSER_ADDRESS) 2587 armprot |= L2_S_PROT_U; 2588 else if (sva < VM_MAX_ADDRESS) 2589 armprot |= L2_S_PROT_W; /* XXX Ekk what is this ? */ 2590 *pte = (*pte & 0xfffff00f) | armprot; 2591 2592 pa = pmap_pte_pa(pte); 2593 2594 /* Get the physical page index */ 2595 2596 /* Clear write flag */ 2597 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2598 simple_lock(&pg->mdpage.pvh_slock); 2599 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2600 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2601 simple_unlock(&pg->mdpage.pvh_slock); 2602 } 2603 2604 next: 2605 sva += NBPG; 2606 pte++; 2607 } 2608 pmap_unmap_ptes(pmap); 2609 PMAP_MAP_TO_HEAD_UNLOCK(); 2610 if (flush) 2611 cpu_tlb_flushID(); 2612 } 2613 2614 /* 2615 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2616 * int flags) 2617 * 2618 * Insert the given physical page (p) at 2619 * the specified virtual address (v) in the 2620 * target physical map with the protection requested. 2621 * 2622 * If specified, the page will be wired down, meaning 2623 * that the related pte can not be reclaimed. 2624 * 2625 * NB: This is the only routine which MAY NOT lazy-evaluate 2626 * or lose information. That is, this routine must actually 2627 * insert this page into the given map NOW. 2628 */ 2629 2630 int 2631 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2632 int flags) 2633 { 2634 pt_entry_t *ptes, opte, npte; 2635 paddr_t opa; 2636 boolean_t wired = (flags & PMAP_WIRED) != 0; 2637 struct vm_page *pg; 2638 struct pv_entry *pve; 2639 int error, nflags; 2640 2641 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2642 va, pa, pmap, prot, wired)); 2643 2644 #ifdef DIAGNOSTIC 2645 /* Valid address ? */ 2646 if (va >= (pmap_curmaxkvaddr)) 2647 panic("pmap_enter: too big"); 2648 if (pmap != pmap_kernel() && va != 0) { 2649 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2650 panic("pmap_enter: kernel page in user map"); 2651 } else { 2652 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2653 panic("pmap_enter: user page in kernel map"); 2654 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2655 panic("pmap_enter: entering PT page"); 2656 } 2657 #endif 2658 2659 KDASSERT(((va | pa) & PGOFSET) == 0); 2660 2661 /* 2662 * Get a pointer to the page. Later on in this function, we 2663 * test for a managed page by checking pg != NULL. 2664 */ 2665 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2666 2667 /* get lock */ 2668 PMAP_MAP_TO_HEAD_LOCK(); 2669 2670 /* 2671 * map the ptes. If there's not already an L2 table for this 2672 * address, allocate one. 2673 */ 2674 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2675 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2676 struct vm_page *ptp; 2677 2678 /* kernel should be pre-grown */ 2679 KASSERT(pmap != pmap_kernel()); 2680 2681 /* if failure is allowed then don't try too hard */ 2682 ptp = pmap_get_ptp(pmap, va & L1_S_FRAME); 2683 if (ptp == NULL) { 2684 if (flags & PMAP_CANFAIL) { 2685 error = ENOMEM; 2686 goto out; 2687 } 2688 panic("pmap_enter: get ptp failed"); 2689 } 2690 } 2691 opte = ptes[arm_btop(va)]; 2692 2693 nflags = 0; 2694 if (prot & VM_PROT_WRITE) 2695 nflags |= PVF_WRITE; 2696 if (wired) 2697 nflags |= PVF_WIRED; 2698 2699 /* Is the pte valid ? If so then this page is already mapped */ 2700 if (l2pte_valid(opte)) { 2701 /* Get the physical address of the current page mapped */ 2702 opa = l2pte_pa(opte); 2703 2704 /* Are we mapping the same page ? */ 2705 if (opa == pa) { 2706 /* Has the wiring changed ? */ 2707 if (pg != NULL) { 2708 simple_lock(&pg->mdpage.pvh_slock); 2709 (void) pmap_modify_pv(pmap, va, pg, 2710 PVF_WRITE | PVF_WIRED, nflags); 2711 simple_unlock(&pg->mdpage.pvh_slock); 2712 } 2713 } else { 2714 struct vm_page *opg; 2715 2716 /* We are replacing the page with a new one. */ 2717 cpu_idcache_wbinv_range(va, NBPG); 2718 2719 /* 2720 * If it is part of our managed memory then we 2721 * must remove it from the PV list 2722 */ 2723 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2724 simple_lock(&opg->mdpage.pvh_slock); 2725 pve = pmap_remove_pv(opg, pmap, va); 2726 simple_unlock(&opg->mdpage.pvh_slock); 2727 } else { 2728 pve = NULL; 2729 } 2730 2731 goto enter; 2732 } 2733 } else { 2734 opa = 0; 2735 pve = NULL; 2736 pmap_pte_addref(pmap, va); 2737 2738 /* pte is not valid so we must be hooking in a new page */ 2739 ++pmap->pm_stats.resident_count; 2740 2741 enter: 2742 /* 2743 * Enter on the PV list if part of our managed memory 2744 */ 2745 if (pg != NULL) { 2746 if (pve == NULL) { 2747 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2748 if (pve == NULL) { 2749 if (flags & PMAP_CANFAIL) { 2750 error = ENOMEM; 2751 goto out; 2752 } 2753 panic("pmap_enter: no pv entries " 2754 "available"); 2755 } 2756 } 2757 /* enter_pv locks pvh when adding */ 2758 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2759 } else { 2760 if (pve != NULL) 2761 pmap_free_pv(pmap, pve); 2762 } 2763 } 2764 2765 /* Construct the pte, giving the correct access. */ 2766 npte = pa; 2767 2768 /* VA 0 is magic. */ 2769 if (pmap != pmap_kernel() && va != vector_page) 2770 npte |= L2_S_PROT_U; 2771 2772 if (pg != NULL) { 2773 #ifdef DIAGNOSTIC 2774 if ((flags & VM_PROT_ALL) & ~prot) 2775 panic("pmap_enter: access_type exceeds prot"); 2776 #endif 2777 npte |= pte_l2_s_cache_mode; 2778 if (flags & VM_PROT_WRITE) { 2779 npte |= L2_S_PROTO | L2_S_PROT_W; 2780 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2781 } else if (flags & VM_PROT_ALL) { 2782 npte |= L2_S_PROTO; 2783 pg->mdpage.pvh_attrs |= PVF_REF; 2784 } else 2785 npte |= L2_TYPE_INV; 2786 } else { 2787 if (prot & VM_PROT_WRITE) 2788 npte |= L2_S_PROTO | L2_S_PROT_W; 2789 else if (prot & VM_PROT_ALL) 2790 npte |= L2_S_PROTO; 2791 else 2792 npte |= L2_TYPE_INV; 2793 } 2794 2795 ptes[arm_btop(va)] = npte; 2796 2797 if (pg != NULL) { 2798 simple_lock(&pg->mdpage.pvh_slock); 2799 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2800 simple_unlock(&pg->mdpage.pvh_slock); 2801 } 2802 2803 /* Better flush the TLB ... */ 2804 cpu_tlb_flushID_SE(va); 2805 error = 0; 2806 out: 2807 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2808 PMAP_MAP_TO_HEAD_UNLOCK(); 2809 2810 return error; 2811 } 2812 2813 /* 2814 * pmap_kenter_pa: enter a kernel mapping 2815 * 2816 * => no need to lock anything assume va is already allocated 2817 * => should be faster than normal pmap enter function 2818 */ 2819 void 2820 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2821 { 2822 pt_entry_t *pte; 2823 2824 pte = vtopte(va); 2825 KASSERT(!pmap_pte_v(pte)); 2826 2827 *pte = L2_S_PROTO | pa | 2828 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2829 } 2830 2831 void 2832 pmap_kremove(vaddr_t va, vsize_t len) 2833 { 2834 pt_entry_t *pte; 2835 2836 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 2837 2838 /* 2839 * We assume that we will only be called with small 2840 * regions of memory. 2841 */ 2842 2843 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 2844 pte = vtopte(va); 2845 cpu_idcache_wbinv_range(va, PAGE_SIZE); 2846 *pte = 0; 2847 cpu_tlb_flushID_SE(va); 2848 } 2849 } 2850 2851 /* 2852 * pmap_page_protect: 2853 * 2854 * Lower the permission for all mappings to a given page. 2855 */ 2856 2857 void 2858 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2859 { 2860 2861 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 2862 VM_PAGE_TO_PHYS(pg), prot)); 2863 2864 switch(prot) { 2865 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 2866 case VM_PROT_READ|VM_PROT_WRITE: 2867 return; 2868 2869 case VM_PROT_READ: 2870 case VM_PROT_READ|VM_PROT_EXECUTE: 2871 pmap_clearbit(pg, PVF_WRITE); 2872 break; 2873 2874 default: 2875 pmap_remove_all(pg); 2876 break; 2877 } 2878 } 2879 2880 2881 /* 2882 * Routine: pmap_unwire 2883 * Function: Clear the wired attribute for a map/virtual-address 2884 * pair. 2885 * In/out conditions: 2886 * The mapping must already exist in the pmap. 2887 */ 2888 2889 void 2890 pmap_unwire(struct pmap *pmap, vaddr_t va) 2891 { 2892 pt_entry_t *ptes; 2893 struct vm_page *pg; 2894 paddr_t pa; 2895 2896 PMAP_MAP_TO_HEAD_LOCK(); 2897 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2898 2899 if (pmap_pde_v(pmap_pde(pmap, va))) { 2900 #ifdef DIAGNOSTIC 2901 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 2902 panic("pmap_unwire: invalid L2 PTE"); 2903 #endif 2904 /* Extract the physical address of the page */ 2905 pa = l2pte_pa(ptes[arm_btop(va)]); 2906 2907 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 2908 goto out; 2909 2910 /* Update the wired bit in the pv entry for this page. */ 2911 simple_lock(&pg->mdpage.pvh_slock); 2912 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 2913 simple_unlock(&pg->mdpage.pvh_slock); 2914 } 2915 #ifdef DIAGNOSTIC 2916 else { 2917 panic("pmap_unwire: invalid L1 PTE"); 2918 } 2919 #endif 2920 out: 2921 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2922 PMAP_MAP_TO_HEAD_UNLOCK(); 2923 } 2924 2925 /* 2926 * Routine: pmap_extract 2927 * Function: 2928 * Extract the physical page address associated 2929 * with the given map/virtual_address pair. 2930 */ 2931 boolean_t 2932 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 2933 { 2934 pd_entry_t *pde; 2935 pt_entry_t *pte, *ptes; 2936 paddr_t pa; 2937 2938 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 2939 2940 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2941 2942 pde = pmap_pde(pmap, va); 2943 pte = &ptes[arm_btop(va)]; 2944 2945 if (pmap_pde_section(pde)) { 2946 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 2947 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 2948 goto out; 2949 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 2950 PDEBUG(5, printf("no mapping\n")); 2951 goto failed; 2952 } 2953 2954 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 2955 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 2956 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 2957 goto out; 2958 } 2959 2960 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 2961 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 2962 2963 out: 2964 if (pap != NULL) 2965 *pap = pa; 2966 2967 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2968 return (TRUE); 2969 2970 failed: 2971 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2972 return (FALSE); 2973 } 2974 2975 2976 /* 2977 * pmap_copy: 2978 * 2979 * Copy the range specified by src_addr/len from the source map to the 2980 * range dst_addr/len in the destination map. 2981 * 2982 * This routine is only advisory and need not do anything. 2983 */ 2984 /* Call deleted in <arm/arm32/pmap.h> */ 2985 2986 #if defined(PMAP_DEBUG) 2987 void 2988 pmap_dump_pvlist(phys, m) 2989 vaddr_t phys; 2990 char *m; 2991 { 2992 struct vm_page *pg; 2993 struct pv_entry *pv; 2994 2995 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 2996 printf("INVALID PA\n"); 2997 return; 2998 } 2999 simple_lock(&pg->mdpage.pvh_slock); 3000 printf("%s %08lx:", m, phys); 3001 if (pg->mdpage.pvh_list == NULL) { 3002 printf(" no mappings\n"); 3003 return; 3004 } 3005 3006 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3007 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3008 pv->pv_va, pv->pv_flags); 3009 3010 printf("\n"); 3011 simple_unlock(&pg->mdpage.pvh_slock); 3012 } 3013 3014 #endif /* PMAP_DEBUG */ 3015 3016 static pt_entry_t * 3017 pmap_map_ptes(struct pmap *pmap) 3018 { 3019 struct proc *p; 3020 3021 /* the kernel's pmap is always accessible */ 3022 if (pmap == pmap_kernel()) { 3023 return (pt_entry_t *)PTE_BASE; 3024 } 3025 3026 if (pmap_is_curpmap(pmap)) { 3027 simple_lock(&pmap->pm_obj.vmobjlock); 3028 return (pt_entry_t *)PTE_BASE; 3029 } 3030 3031 p = curproc; 3032 KDASSERT(p != NULL); 3033 3034 /* need to lock both curpmap and pmap: use ordered locking */ 3035 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3036 simple_lock(&pmap->pm_obj.vmobjlock); 3037 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3038 } else { 3039 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3040 simple_lock(&pmap->pm_obj.vmobjlock); 3041 } 3042 3043 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, pmap->pm_pptpt, 3044 FALSE); 3045 cpu_tlb_flushD(); 3046 cpu_cpwait(); 3047 return (pt_entry_t *)APTE_BASE; 3048 } 3049 3050 /* 3051 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3052 */ 3053 3054 static void 3055 pmap_unmap_ptes(struct pmap *pmap) 3056 { 3057 3058 if (pmap == pmap_kernel()) { 3059 return; 3060 } 3061 if (pmap_is_curpmap(pmap)) { 3062 simple_unlock(&pmap->pm_obj.vmobjlock); 3063 } else { 3064 KDASSERT(curproc != NULL); 3065 simple_unlock(&pmap->pm_obj.vmobjlock); 3066 simple_unlock( 3067 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3068 } 3069 } 3070 3071 /* 3072 * Modify pte bits for all ptes corresponding to the given physical address. 3073 * We use `maskbits' rather than `clearbits' because we're always passing 3074 * constants and the latter would require an extra inversion at run-time. 3075 */ 3076 3077 static void 3078 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3079 { 3080 struct pv_entry *pv; 3081 pt_entry_t *ptes; 3082 vaddr_t va; 3083 int tlbentry; 3084 3085 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3086 VM_PAGE_TO_PHYS(pg), maskbits)); 3087 3088 tlbentry = 0; 3089 3090 PMAP_HEAD_TO_MAP_LOCK(); 3091 simple_lock(&pg->mdpage.pvh_slock); 3092 3093 /* 3094 * Clear saved attributes (modify, reference) 3095 */ 3096 pg->mdpage.pvh_attrs &= ~maskbits; 3097 3098 if (pg->mdpage.pvh_list == NULL) { 3099 simple_unlock(&pg->mdpage.pvh_slock); 3100 PMAP_HEAD_TO_MAP_UNLOCK(); 3101 return; 3102 } 3103 3104 /* 3105 * Loop over all current mappings setting/clearing as appropos 3106 */ 3107 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3108 va = pv->pv_va; 3109 pv->pv_flags &= ~maskbits; 3110 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3111 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3112 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3113 if ((pv->pv_flags & PVF_NC)) { 3114 /* 3115 * Entry is not cacheable: reenable 3116 * the cache, nothing to flush 3117 * 3118 * Don't turn caching on again if this 3119 * is a modified emulation. This 3120 * would be inconsitent with the 3121 * settings created by 3122 * pmap_vac_me_harder(). 3123 * 3124 * There's no need to call 3125 * pmap_vac_me_harder() here: all 3126 * pages are loosing their write 3127 * permission. 3128 * 3129 */ 3130 if (maskbits & PVF_WRITE) { 3131 ptes[arm_btop(va)] |= 3132 pte_l2_s_cache_mode; 3133 pv->pv_flags &= ~PVF_NC; 3134 } 3135 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3136 /* 3137 * Entry is cacheable: check if pmap is 3138 * current if it is flush it, 3139 * otherwise it won't be in the cache 3140 */ 3141 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3142 } 3143 3144 /* make the pte read only */ 3145 ptes[arm_btop(va)] &= ~L2_S_PROT_W; 3146 } 3147 3148 if (maskbits & PVF_REF) 3149 ptes[arm_btop(va)] = 3150 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_TYPE_INV; 3151 3152 if (pmap_is_curpmap(pv->pv_pmap)) { 3153 /* 3154 * if we had cacheable pte's we'd clean the 3155 * pte out to memory here 3156 * 3157 * flush tlb entry as it's in the current pmap 3158 */ 3159 cpu_tlb_flushID_SE(pv->pv_va); 3160 } 3161 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3162 } 3163 cpu_cpwait(); 3164 3165 simple_unlock(&pg->mdpage.pvh_slock); 3166 PMAP_HEAD_TO_MAP_UNLOCK(); 3167 } 3168 3169 /* 3170 * pmap_clear_modify: 3171 * 3172 * Clear the "modified" attribute for a page. 3173 */ 3174 boolean_t 3175 pmap_clear_modify(struct vm_page *pg) 3176 { 3177 boolean_t rv; 3178 3179 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3180 rv = TRUE; 3181 pmap_clearbit(pg, PVF_MOD); 3182 } else 3183 rv = FALSE; 3184 3185 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3186 VM_PAGE_TO_PHYS(pg), rv)); 3187 3188 return (rv); 3189 } 3190 3191 /* 3192 * pmap_clear_reference: 3193 * 3194 * Clear the "referenced" attribute for a page. 3195 */ 3196 boolean_t 3197 pmap_clear_reference(struct vm_page *pg) 3198 { 3199 boolean_t rv; 3200 3201 if (pg->mdpage.pvh_attrs & PVF_REF) { 3202 rv = TRUE; 3203 pmap_clearbit(pg, PVF_REF); 3204 } else 3205 rv = FALSE; 3206 3207 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3208 VM_PAGE_TO_PHYS(pg), rv)); 3209 3210 return (rv); 3211 } 3212 3213 /* 3214 * pmap_is_modified: 3215 * 3216 * Test if a page has the "modified" attribute. 3217 */ 3218 /* See <arm/arm32/pmap.h> */ 3219 3220 /* 3221 * pmap_is_referenced: 3222 * 3223 * Test if a page has the "referenced" attribute. 3224 */ 3225 /* See <arm/arm32/pmap.h> */ 3226 3227 int 3228 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3229 { 3230 pt_entry_t *ptes; 3231 struct vm_page *pg; 3232 paddr_t pa; 3233 u_int flags; 3234 int rv = 0; 3235 3236 PDEBUG(2, printf("pmap_modified_emulation\n")); 3237 3238 PMAP_MAP_TO_HEAD_LOCK(); 3239 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3240 3241 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3242 PDEBUG(2, printf("L1 PTE invalid\n")); 3243 goto out; 3244 } 3245 3246 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3247 3248 /* Check for a invalid pte */ 3249 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3250 goto out; 3251 3252 /* This can happen if user code tries to access kernel memory. */ 3253 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3254 goto out; 3255 3256 /* Extract the physical address of the page */ 3257 pa = l2pte_pa(ptes[arm_btop(va)]); 3258 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3259 goto out; 3260 3261 /* Get the current flags for this page. */ 3262 simple_lock(&pg->mdpage.pvh_slock); 3263 3264 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3265 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3266 3267 /* 3268 * Do the flags say this page is writable ? If not then it is a 3269 * genuine write fault. If yes then the write fault is our fault 3270 * as we did not reflect the write access in the PTE. Now we know 3271 * a write has occurred we can correct this and also set the 3272 * modified bit 3273 */ 3274 if (~flags & PVF_WRITE) { 3275 simple_unlock(&pg->mdpage.pvh_slock); 3276 goto out; 3277 } 3278 3279 PDEBUG(0, 3280 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3281 va, ptes[arm_btop(va)])); 3282 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3283 3284 /* 3285 * Re-enable write permissions for the page. No need to call 3286 * pmap_vac_me_harder(), since this is just a 3287 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3288 * We've already set the cacheable bits based on the assumption 3289 * that we can write to this page. 3290 */ 3291 ptes[arm_btop(va)] = 3292 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3293 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3294 3295 simple_unlock(&pg->mdpage.pvh_slock); 3296 3297 cpu_tlb_flushID_SE(va); 3298 cpu_cpwait(); 3299 rv = 1; 3300 out: 3301 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3302 PMAP_MAP_TO_HEAD_UNLOCK(); 3303 return (rv); 3304 } 3305 3306 int 3307 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3308 { 3309 pt_entry_t *ptes; 3310 struct vm_page *pg; 3311 paddr_t pa; 3312 int rv = 0; 3313 3314 PDEBUG(2, printf("pmap_handled_emulation\n")); 3315 3316 PMAP_MAP_TO_HEAD_LOCK(); 3317 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3318 3319 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3320 PDEBUG(2, printf("L1 PTE invalid\n")); 3321 goto out; 3322 } 3323 3324 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3325 3326 /* Check for invalid pte */ 3327 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3328 goto out; 3329 3330 /* This can happen if user code tries to access kernel memory. */ 3331 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3332 goto out; 3333 3334 /* Extract the physical address of the page */ 3335 pa = l2pte_pa(ptes[arm_btop(va)]); 3336 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3337 goto out; 3338 3339 simple_lock(&pg->mdpage.pvh_slock); 3340 3341 /* 3342 * Ok we just enable the pte and mark the attibs as handled 3343 * XXX Should we traverse the PV list and enable all PTEs? 3344 */ 3345 PDEBUG(0, 3346 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3347 va, ptes[arm_btop(va)])); 3348 pg->mdpage.pvh_attrs |= PVF_REF; 3349 3350 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3351 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3352 3353 simple_unlock(&pg->mdpage.pvh_slock); 3354 3355 cpu_tlb_flushID_SE(va); 3356 cpu_cpwait(); 3357 rv = 1; 3358 out: 3359 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3360 PMAP_MAP_TO_HEAD_UNLOCK(); 3361 return (rv); 3362 } 3363 3364 /* 3365 * pmap_collect: free resources held by a pmap 3366 * 3367 * => optional function. 3368 * => called when a process is swapped out to free memory. 3369 */ 3370 3371 void 3372 pmap_collect(struct pmap *pmap) 3373 { 3374 } 3375 3376 /* 3377 * Routine: pmap_procwr 3378 * 3379 * Function: 3380 * Synchronize caches corresponding to [addr, addr+len) in p. 3381 * 3382 */ 3383 void 3384 pmap_procwr(struct proc *p, vaddr_t va, int len) 3385 { 3386 /* We only need to do anything if it is the current process. */ 3387 if (p == curproc) 3388 cpu_icache_sync_range(va, len); 3389 } 3390 /* 3391 * PTP functions 3392 */ 3393 3394 /* 3395 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3396 * 3397 * => pmap should NOT be pmap_kernel() 3398 * => pmap should be locked 3399 */ 3400 3401 static struct vm_page * 3402 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3403 { 3404 struct vm_page *ptp; 3405 3406 if (pmap_pde_page(pmap_pde(pmap, va))) { 3407 3408 /* valid... check hint (saves us a PA->PG lookup) */ 3409 if (pmap->pm_ptphint && 3410 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3411 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3412 return (pmap->pm_ptphint); 3413 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3414 #ifdef DIAGNOSTIC 3415 if (ptp == NULL) 3416 panic("pmap_get_ptp: unmanaged user PTP"); 3417 #endif 3418 pmap->pm_ptphint = ptp; 3419 return(ptp); 3420 } 3421 3422 /* allocate a new PTP (updates ptphint) */ 3423 return(pmap_alloc_ptp(pmap, va)); 3424 } 3425 3426 /* 3427 * pmap_alloc_ptp: allocate a PTP for a PMAP 3428 * 3429 * => pmap should already be locked by caller 3430 * => we use the ptp's wire_count to count the number of active mappings 3431 * in the PTP (we start it at one to prevent any chance this PTP 3432 * will ever leak onto the active/inactive queues) 3433 */ 3434 3435 /*__inline */ static struct vm_page * 3436 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3437 { 3438 struct vm_page *ptp; 3439 3440 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3441 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3442 if (ptp == NULL) 3443 return (NULL); 3444 3445 /* got one! */ 3446 ptp->flags &= ~PG_BUSY; /* never busy */ 3447 ptp->wire_count = 1; /* no mappings yet */ 3448 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), TRUE); 3449 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3450 pmap->pm_ptphint = ptp; 3451 return (ptp); 3452 } 3453 3454 vaddr_t 3455 pmap_growkernel(vaddr_t maxkvaddr) 3456 { 3457 struct pmap *kpm = pmap_kernel(), *pm; 3458 int s; 3459 paddr_t ptaddr; 3460 struct vm_page *ptp; 3461 3462 if (maxkvaddr <= pmap_curmaxkvaddr) 3463 goto out; /* we are OK */ 3464 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3465 pmap_curmaxkvaddr, maxkvaddr)); 3466 3467 /* 3468 * whoops! we need to add kernel PTPs 3469 */ 3470 3471 s = splhigh(); /* to be safe */ 3472 simple_lock(&kpm->pm_obj.vmobjlock); 3473 /* due to the way the arm pmap works we map 4MB at a time */ 3474 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3475 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3476 3477 if (uvm.page_init_done == FALSE) { 3478 3479 /* 3480 * we're growing the kernel pmap early (from 3481 * uvm_pageboot_alloc()). this case must be 3482 * handled a little differently. 3483 */ 3484 3485 if (uvm_page_physget(&ptaddr) == FALSE) 3486 panic("pmap_growkernel: out of memory"); 3487 pmap_zero_page(ptaddr); 3488 3489 /* map this page in */ 3490 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, TRUE); 3491 3492 /* count PTP as resident */ 3493 kpm->pm_stats.resident_count++; 3494 continue; 3495 } 3496 3497 /* 3498 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3499 * pmap_initialized == FALSE CASE! WE MAY BE 3500 * INVOKED WHILE pmap_init() IS RUNNING! 3501 */ 3502 3503 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3504 panic("pmap_growkernel: alloc ptp failed"); 3505 3506 /* distribute new kernel PTP to all active pmaps */ 3507 simple_lock(&pmaps_lock); 3508 LIST_FOREACH(pm, &pmaps, pm_list) { 3509 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3510 VM_PAGE_TO_PHYS(ptp), TRUE); 3511 } 3512 3513 simple_unlock(&pmaps_lock); 3514 } 3515 3516 /* 3517 * flush out the cache, expensive but growkernel will happen so 3518 * rarely 3519 */ 3520 cpu_tlb_flushD(); 3521 cpu_cpwait(); 3522 3523 simple_unlock(&kpm->pm_obj.vmobjlock); 3524 splx(s); 3525 3526 out: 3527 return (pmap_curmaxkvaddr); 3528 } 3529 3530 /************************ Utility routines ****************************/ 3531 3532 /* 3533 * vector_page_setprot: 3534 * 3535 * Manipulate the protection of the vector page. 3536 */ 3537 void 3538 vector_page_setprot(int prot) 3539 { 3540 pt_entry_t *pte; 3541 3542 pte = vtopte(vector_page); 3543 3544 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3545 cpu_tlb_flushD_SE(vector_page); 3546 cpu_cpwait(); 3547 } 3548 3549 /************************ Bootstrapping routines ****************************/ 3550 3551 /* 3552 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3553 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3554 * find them as necessary. 3555 * 3556 * Note that the data on this list is not valid after initarm() returns. 3557 */ 3558 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3559 3560 static vaddr_t 3561 kernel_pt_lookup(paddr_t pa) 3562 { 3563 pv_addr_t *pv; 3564 3565 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3566 if (pv->pv_pa == pa) 3567 return (pv->pv_va); 3568 } 3569 return (0); 3570 } 3571 3572 /* 3573 * pmap_map_section: 3574 * 3575 * Create a single section mapping. 3576 */ 3577 void 3578 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3579 { 3580 pd_entry_t *pde = (pd_entry_t *) l1pt; 3581 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3582 3583 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3584 3585 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3586 L1_S_PROT(PTE_KERNEL, prot) | fl; 3587 } 3588 3589 /* 3590 * pmap_map_entry: 3591 * 3592 * Create a single page mapping. 3593 */ 3594 void 3595 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3596 { 3597 pd_entry_t *pde = (pd_entry_t *) l1pt; 3598 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3599 pt_entry_t *pte; 3600 3601 KASSERT(((va | pa) & PGOFSET) == 0); 3602 3603 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3604 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3605 3606 pte = (pt_entry_t *) 3607 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3608 if (pte == NULL) 3609 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3610 3611 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3612 L2_S_PROT(PTE_KERNEL, prot) | fl; 3613 } 3614 3615 /* 3616 * pmap_link_l2pt: 3617 * 3618 * Link the L2 page table specified by "pa" into the L1 3619 * page table at the slot for "va". 3620 */ 3621 void 3622 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3623 { 3624 pd_entry_t *pde = (pd_entry_t *) l1pt; 3625 u_int slot = va >> L1_S_SHIFT; 3626 3627 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3628 3629 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3630 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3631 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3632 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3633 3634 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3635 } 3636 3637 /* 3638 * pmap_map_chunk: 3639 * 3640 * Map a chunk of memory using the most efficient mappings 3641 * possible (section, large page, small page) into the 3642 * provided L1 and L2 tables at the specified virtual address. 3643 */ 3644 vsize_t 3645 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3646 int prot, int cache) 3647 { 3648 pd_entry_t *pde = (pd_entry_t *) l1pt; 3649 pt_entry_t *pte, fl; 3650 vsize_t resid; 3651 int i; 3652 3653 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3654 3655 if (l1pt == 0) 3656 panic("pmap_map_chunk: no L1 table provided"); 3657 3658 #ifdef VERBOSE_INIT_ARM 3659 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3660 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3661 #endif 3662 3663 size = resid; 3664 3665 while (resid > 0) { 3666 /* See if we can use a section mapping. */ 3667 if (((pa | va) & L1_S_OFFSET) == 0 && 3668 resid >= L1_S_SIZE) { 3669 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3670 #ifdef VERBOSE_INIT_ARM 3671 printf("S"); 3672 #endif 3673 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3674 L1_S_PROT(PTE_KERNEL, prot) | fl; 3675 va += L1_S_SIZE; 3676 pa += L1_S_SIZE; 3677 resid -= L1_S_SIZE; 3678 continue; 3679 } 3680 3681 /* 3682 * Ok, we're going to use an L2 table. Make sure 3683 * one is actually in the corresponding L1 slot 3684 * for the current VA. 3685 */ 3686 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3687 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3688 3689 pte = (pt_entry_t *) 3690 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3691 if (pte == NULL) 3692 panic("pmap_map_chunk: can't find L2 table for VA" 3693 "0x%08lx", va); 3694 3695 /* See if we can use a L2 large page mapping. */ 3696 if (((pa | va) & L2_L_OFFSET) == 0 && 3697 resid >= L2_L_SIZE) { 3698 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3699 #ifdef VERBOSE_INIT_ARM 3700 printf("L"); 3701 #endif 3702 for (i = 0; i < 16; i++) { 3703 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3704 L2_L_PROTO | pa | 3705 L2_L_PROT(PTE_KERNEL, prot) | fl; 3706 } 3707 va += L2_L_SIZE; 3708 pa += L2_L_SIZE; 3709 resid -= L2_L_SIZE; 3710 continue; 3711 } 3712 3713 /* Use a small page mapping. */ 3714 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3715 #ifdef VERBOSE_INIT_ARM 3716 printf("P"); 3717 #endif 3718 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3719 L2_S_PROT(PTE_KERNEL, prot) | fl; 3720 va += NBPG; 3721 pa += NBPG; 3722 resid -= NBPG; 3723 } 3724 #ifdef VERBOSE_INIT_ARM 3725 printf("\n"); 3726 #endif 3727 return (size); 3728 } 3729 3730 /********************** PTE initialization routines **************************/ 3731 3732 /* 3733 * These routines are called when the CPU type is identified to set up 3734 * the PTE prototypes, cache modes, etc. 3735 * 3736 * The variables are always here, just in case LKMs need to reference 3737 * them (though, they shouldn't). 3738 */ 3739 3740 pt_entry_t pte_l1_s_cache_mode; 3741 pt_entry_t pte_l1_s_cache_mask; 3742 3743 pt_entry_t pte_l2_l_cache_mode; 3744 pt_entry_t pte_l2_l_cache_mask; 3745 3746 pt_entry_t pte_l2_s_cache_mode; 3747 pt_entry_t pte_l2_s_cache_mask; 3748 3749 pt_entry_t pte_l2_s_prot_u; 3750 pt_entry_t pte_l2_s_prot_w; 3751 pt_entry_t pte_l2_s_prot_mask; 3752 3753 pt_entry_t pte_l1_s_proto; 3754 pt_entry_t pte_l1_c_proto; 3755 pt_entry_t pte_l2_s_proto; 3756 3757 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3758 void (*pmap_zero_page_func)(paddr_t); 3759 3760 #if ARM_MMU_GENERIC == 1 3761 void 3762 pmap_pte_init_generic(void) 3763 { 3764 3765 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3766 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3767 3768 pte_l2_l_cache_mode = L2_B|L2_C; 3769 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3770 3771 pte_l2_s_cache_mode = L2_B|L2_C; 3772 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3773 3774 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3775 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3776 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3777 3778 pte_l1_s_proto = L1_S_PROTO_generic; 3779 pte_l1_c_proto = L1_C_PROTO_generic; 3780 pte_l2_s_proto = L2_S_PROTO_generic; 3781 3782 pmap_copy_page_func = pmap_copy_page_generic; 3783 pmap_zero_page_func = pmap_zero_page_generic; 3784 } 3785 3786 #if defined(CPU_ARM9) 3787 void 3788 pmap_pte_init_arm9(void) 3789 { 3790 3791 /* 3792 * ARM9 is compatible with generic, but we want to use 3793 * write-through caching for now. 3794 */ 3795 pmap_pte_init_generic(); 3796 3797 pte_l1_s_cache_mode = L1_S_C; 3798 pte_l2_l_cache_mode = L2_C; 3799 pte_l2_s_cache_mode = L2_C; 3800 } 3801 #endif /* CPU_ARM9 */ 3802 #endif /* ARM_MMU_GENERIC == 1 */ 3803 3804 #if ARM_MMU_XSCALE == 1 3805 void 3806 pmap_pte_init_xscale(void) 3807 { 3808 uint32_t auxctl; 3809 3810 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3811 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 3812 3813 pte_l2_l_cache_mode = L2_B|L2_C; 3814 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 3815 3816 pte_l2_s_cache_mode = L2_B|L2_C; 3817 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 3818 3819 #ifdef XSCALE_CACHE_WRITE_THROUGH 3820 /* 3821 * Some versions of the XScale core have various bugs in 3822 * their cache units, the work-around for which is to run 3823 * the cache in write-through mode. Unfortunately, this 3824 * has a major (negative) impact on performance. So, we 3825 * go ahead and run fast-and-loose, in the hopes that we 3826 * don't line up the planets in a way that will trip the 3827 * bugs. 3828 * 3829 * However, we give you the option to be slow-but-correct. 3830 */ 3831 pte_l1_s_cache_mode = L1_S_C; 3832 pte_l2_l_cache_mode = L2_C; 3833 pte_l2_s_cache_mode = L2_C; 3834 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 3835 3836 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 3837 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 3838 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 3839 3840 pte_l1_s_proto = L1_S_PROTO_xscale; 3841 pte_l1_c_proto = L1_C_PROTO_xscale; 3842 pte_l2_s_proto = L2_S_PROTO_xscale; 3843 3844 pmap_copy_page_func = pmap_copy_page_xscale; 3845 pmap_zero_page_func = pmap_zero_page_xscale; 3846 3847 /* 3848 * Disable ECC protection of page table access, for now. 3849 */ 3850 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 3851 : "=r" (auxctl)); 3852 auxctl &= ~XSCALE_AUXCTL_P; 3853 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 3854 : 3855 : "r" (auxctl)); 3856 } 3857 3858 /* 3859 * xscale_setup_minidata: 3860 * 3861 * Set up the mini-data cache clean area. We require the 3862 * caller to allocate the right amount of physically and 3863 * virtually contiguous space. 3864 */ 3865 void 3866 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 3867 { 3868 extern vaddr_t xscale_minidata_clean_addr; 3869 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 3870 pd_entry_t *pde = (pd_entry_t *) l1pt; 3871 pt_entry_t *pte; 3872 vsize_t size; 3873 uint32_t auxctl; 3874 3875 xscale_minidata_clean_addr = va; 3876 3877 /* Round it to page size. */ 3878 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 3879 3880 for (; size != 0; 3881 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 3882 pte = (pt_entry_t *) 3883 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3884 if (pte == NULL) 3885 panic("xscale_setup_minidata: can't find L2 table for " 3886 "VA 0x%08lx", va); 3887 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3888 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 3889 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 3890 } 3891 3892 /* 3893 * Configure the mini-data cache for write-back with 3894 * read/write-allocate. 3895 * 3896 * NOTE: In order to reconfigure the mini-data cache, we must 3897 * make sure it contains no valid data! In order to do that, 3898 * we must issue a global data cache invalidate command! 3899 * 3900 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 3901 * THIS IS VERY IMPORTANT! 3902 */ 3903 3904 /* Invalidate data and mini-data. */ 3905 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 3906 : 3907 : "r" (auxctl)); 3908 3909 3910 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 3911 : "=r" (auxctl)); 3912 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 3913 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 3914 : 3915 : "r" (auxctl)); 3916 } 3917 #endif /* ARM_MMU_XSCALE == 1 */ 3918
Indexes created Sat Sep 27 22:09:54 GMT 2025