pmap.c revision 1.97.4.6
1 /* $NetBSD: pmap.c,v 1.97.4.6 2003/02/14 22:21:16 he Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * Copyright (c) 2001 Richard Earnshaw 6 * Copyright (c) 2001 Christopher Gilbert 7 * All rights reserved. 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the company nor the name of the author may be used to 15 * endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1994-1998 Mark Brinicombe. 69 * Copyright (c) 1994 Brini. 70 * All rights reserved. 71 * 72 * This code is derived from software written for Brini by Mark Brinicombe 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed by Mark Brinicombe. 85 * 4. The name of the author may not be used to endorse or promote products 86 * derived from this software without specific prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 89 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 90 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 92 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 93 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 94 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 95 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 96 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 97 * 98 * RiscBSD kernel project 99 * 100 * pmap.c 101 * 102 * Machine dependant vm stuff 103 * 104 * Created : 20/09/94 105 */ 106 107 /* 108 * Performance improvements, UVM changes, overhauls and part-rewrites 109 * were contributed by Neil A. Carson <neil (at) causality.com>. 110 */ 111 112 /* 113 * The dram block info is currently referenced from the bootconfig. 114 * This should be placed in a separate structure. 115 */ 116 117 /* 118 * Special compilation symbols 119 * PMAP_DEBUG - Build in pmap_debug_level code 120 */ 121 122 /* Include header files */ 123 124 #include "opt_pmap_debug.h" 125 #include "opt_ddb.h" 126 127 #include <sys/types.h> 128 #include <sys/param.h> 129 #include <sys/kernel.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/malloc.h> 133 #include <sys/user.h> 134 #include <sys/pool.h> 135 #include <sys/cdefs.h> 136 137 #include <uvm/uvm.h> 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/pmap.h> 142 #include <machine/pcb.h> 143 #include <machine/param.h> 144 #include <arm/arm32/katelib.h> 145 146 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.97.4.6 2003/02/14 22:21:16 he Exp $"); 147 #ifdef PMAP_DEBUG 148 #define PDEBUG(_lev_,_stat_) \ 149 if (pmap_debug_level >= (_lev_)) \ 150 ((_stat_)) 151 int pmap_debug_level = -2; 152 void pmap_dump_pvlist(vaddr_t phys, char *m); 153 154 /* 155 * for switching to potentially finer grained debugging 156 */ 157 #define PDB_FOLLOW 0x0001 158 #define PDB_INIT 0x0002 159 #define PDB_ENTER 0x0004 160 #define PDB_REMOVE 0x0008 161 #define PDB_CREATE 0x0010 162 #define PDB_PTPAGE 0x0020 163 #define PDB_GROWKERN 0x0040 164 #define PDB_BITS 0x0080 165 #define PDB_COLLECT 0x0100 166 #define PDB_PROTECT 0x0200 167 #define PDB_MAP_L1 0x0400 168 #define PDB_BOOTSTRAP 0x1000 169 #define PDB_PARANOIA 0x2000 170 #define PDB_WIRING 0x4000 171 #define PDB_PVDUMP 0x8000 172 173 int debugmap = 0; 174 int pmapdebug = PDB_PARANOIA | PDB_FOLLOW; 175 #define NPDEBUG(_lev_,_stat_) \ 176 if (pmapdebug & (_lev_)) \ 177 ((_stat_)) 178 179 #else /* PMAP_DEBUG */ 180 #define PDEBUG(_lev_,_stat_) /* Nothing */ 181 #define NPDEBUG(_lev_,_stat_) /* Nothing */ 182 #endif /* PMAP_DEBUG */ 183 184 struct pmap kernel_pmap_store; 185 186 /* 187 * linked list of all non-kernel pmaps 188 */ 189 190 static LIST_HEAD(, pmap) pmaps; 191 192 /* 193 * pool that pmap structures are allocated from 194 */ 195 196 struct pool pmap_pmap_pool; 197 198 /* 199 * pool/cache that PT-PT's are allocated from 200 */ 201 202 struct pool pmap_ptpt_pool; 203 struct pool_cache pmap_ptpt_cache; 204 u_int pmap_ptpt_cache_generation; 205 206 static void *pmap_ptpt_page_alloc(struct pool *, int); 207 static void pmap_ptpt_page_free(struct pool *, void *); 208 209 struct pool_allocator pmap_ptpt_allocator = { 210 pmap_ptpt_page_alloc, pmap_ptpt_page_free, 211 }; 212 213 static int pmap_ptpt_ctor(void *, void *, int); 214 215 static pt_entry_t *csrc_pte, *cdst_pte; 216 static vaddr_t csrcp, cdstp; 217 218 char *memhook; 219 extern caddr_t msgbufaddr; 220 221 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 222 /* 223 * locking data structures 224 */ 225 226 static struct lock pmap_main_lock; 227 static struct simplelock pvalloc_lock; 228 static struct simplelock pmaps_lock; 229 #ifdef LOCKDEBUG 230 #define PMAP_MAP_TO_HEAD_LOCK() \ 231 (void) spinlockmgr(&pmap_main_lock, LK_SHARED, NULL) 232 #define PMAP_MAP_TO_HEAD_UNLOCK() \ 233 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 234 235 #define PMAP_HEAD_TO_MAP_LOCK() \ 236 (void) spinlockmgr(&pmap_main_lock, LK_EXCLUSIVE, NULL) 237 #define PMAP_HEAD_TO_MAP_UNLOCK() \ 238 (void) spinlockmgr(&pmap_main_lock, LK_RELEASE, NULL) 239 #else 240 #define PMAP_MAP_TO_HEAD_LOCK() /* nothing */ 241 #define PMAP_MAP_TO_HEAD_UNLOCK() /* nothing */ 242 #define PMAP_HEAD_TO_MAP_LOCK() /* nothing */ 243 #define PMAP_HEAD_TO_MAP_UNLOCK() /* nothing */ 244 #endif /* LOCKDEBUG */ 245 246 /* 247 * pv_page management structures: locked by pvalloc_lock 248 */ 249 250 TAILQ_HEAD(pv_pagelist, pv_page); 251 static struct pv_pagelist pv_freepages; /* list of pv_pages with free entrys */ 252 static struct pv_pagelist pv_unusedpgs; /* list of unused pv_pages */ 253 static int pv_nfpvents; /* # of free pv entries */ 254 static struct pv_page *pv_initpage; /* bootstrap page from kernel_map */ 255 static vaddr_t pv_cachedva; /* cached VA for later use */ 256 257 #define PVE_LOWAT (PVE_PER_PVPAGE / 2) /* free pv_entry low water mark */ 258 #define PVE_HIWAT (PVE_LOWAT + (PVE_PER_PVPAGE * 2)) 259 /* high water mark */ 260 261 /* 262 * local prototypes 263 */ 264 265 static struct pv_entry *pmap_add_pvpage __P((struct pv_page *, boolean_t)); 266 static struct pv_entry *pmap_alloc_pv __P((struct pmap *, int)); /* see codes below */ 267 #define ALLOCPV_NEED 0 /* need PV now */ 268 #define ALLOCPV_TRY 1 /* just try to allocate, don't steal */ 269 #define ALLOCPV_NONEED 2 /* don't need PV, just growing cache */ 270 static struct pv_entry *pmap_alloc_pvpage __P((struct pmap *, int)); 271 static void pmap_enter_pv __P((struct vm_page *, 272 struct pv_entry *, struct pmap *, 273 vaddr_t, struct vm_page *, int)); 274 static void pmap_free_pv __P((struct pmap *, struct pv_entry *)); 275 static void pmap_free_pvs __P((struct pmap *, struct pv_entry *)); 276 static void pmap_free_pv_doit __P((struct pv_entry *)); 277 static void pmap_free_pvpage __P((void)); 278 static boolean_t pmap_is_curpmap __P((struct pmap *)); 279 static struct pv_entry *pmap_remove_pv __P((struct vm_page *, struct pmap *, 280 vaddr_t)); 281 #define PMAP_REMOVE_ALL 0 /* remove all mappings */ 282 #define PMAP_REMOVE_SKIPWIRED 1 /* skip wired mappings */ 283 284 static u_int pmap_modify_pv __P((struct pmap *, vaddr_t, struct vm_page *, 285 u_int, u_int)); 286 287 /* 288 * Structure that describes and L1 table. 289 */ 290 struct l1pt { 291 SIMPLEQ_ENTRY(l1pt) pt_queue; /* Queue pointers */ 292 struct pglist pt_plist; /* Allocated page list */ 293 vaddr_t pt_va; /* Allocated virtual address */ 294 int pt_flags; /* Flags */ 295 }; 296 #define PTFLAG_STATIC 0x01 /* Statically allocated */ 297 #define PTFLAG_KPT 0x02 /* Kernel pt's are mapped */ 298 #define PTFLAG_CLEAN 0x04 /* L1 is clean */ 299 300 static void pmap_free_l1pt __P((struct l1pt *)); 301 static int pmap_allocpagedir __P((struct pmap *)); 302 static int pmap_clean_page __P((struct pv_entry *, boolean_t)); 303 static void pmap_remove_all __P((struct vm_page *)); 304 305 static struct vm_page *pmap_alloc_ptp __P((struct pmap *, vaddr_t)); 306 static struct vm_page *pmap_get_ptp __P((struct pmap *, vaddr_t)); 307 __inline static void pmap_clearbit __P((struct vm_page *, unsigned int)); 308 309 extern paddr_t physical_start; 310 extern paddr_t physical_freestart; 311 extern paddr_t physical_end; 312 extern paddr_t physical_freeend; 313 extern unsigned int free_pages; 314 extern int max_processes; 315 316 vaddr_t virtual_avail; 317 vaddr_t virtual_end; 318 vaddr_t pmap_curmaxkvaddr; 319 320 vaddr_t avail_start; 321 vaddr_t avail_end; 322 323 extern pv_addr_t systempage; 324 325 /* Variables used by the L1 page table queue code */ 326 SIMPLEQ_HEAD(l1pt_queue, l1pt); 327 static struct l1pt_queue l1pt_static_queue; /* head of our static l1 queue */ 328 static int l1pt_static_queue_count; /* items in the static l1 queue */ 329 static int l1pt_static_create_count; /* static l1 items created */ 330 static struct l1pt_queue l1pt_queue; /* head of our l1 queue */ 331 static int l1pt_queue_count; /* items in the l1 queue */ 332 static int l1pt_create_count; /* stat - L1's create count */ 333 static int l1pt_reuse_count; /* stat - L1's reused count */ 334 335 /* Local function prototypes (not used outside this file) */ 336 void pmap_pinit __P((struct pmap *)); 337 void pmap_freepagedir __P((struct pmap *)); 338 339 /* Other function prototypes */ 340 extern void bzero_page __P((vaddr_t)); 341 extern void bcopy_page __P((vaddr_t, vaddr_t)); 342 343 struct l1pt *pmap_alloc_l1pt __P((void)); 344 static __inline void pmap_map_in_l1 __P((struct pmap *pmap, vaddr_t va, 345 vaddr_t l2pa, boolean_t)); 346 347 static pt_entry_t *pmap_map_ptes __P((struct pmap *)); 348 static void pmap_unmap_ptes __P((struct pmap *)); 349 350 __inline static void pmap_vac_me_harder __P((struct pmap *, struct vm_page *, 351 pt_entry_t *, boolean_t)); 352 static void pmap_vac_me_kpmap __P((struct pmap *, struct vm_page *, 353 pt_entry_t *, boolean_t)); 354 static void pmap_vac_me_user __P((struct pmap *, struct vm_page *, 355 pt_entry_t *, boolean_t)); 356 357 /* 358 * real definition of pv_entry. 359 */ 360 361 struct pv_entry { 362 struct pv_entry *pv_next; /* next pv_entry */ 363 struct pmap *pv_pmap; /* pmap where mapping lies */ 364 vaddr_t pv_va; /* virtual address for mapping */ 365 int pv_flags; /* flags */ 366 struct vm_page *pv_ptp; /* vm_page for the ptp */ 367 }; 368 369 /* 370 * pv_entrys are dynamically allocated in chunks from a single page. 371 * we keep track of how many pv_entrys are in use for each page and 372 * we can free pv_entry pages if needed. there is one lock for the 373 * entire allocation system. 374 */ 375 376 struct pv_page_info { 377 TAILQ_ENTRY(pv_page) pvpi_list; 378 struct pv_entry *pvpi_pvfree; 379 int pvpi_nfree; 380 }; 381 382 /* 383 * number of pv_entry's in a pv_page 384 * (note: won't work on systems where NPBG isn't a constant) 385 */ 386 387 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \ 388 sizeof(struct pv_entry)) 389 390 /* 391 * a pv_page: where pv_entrys are allocated from 392 */ 393 394 struct pv_page { 395 struct pv_page_info pvinfo; 396 struct pv_entry pvents[PVE_PER_PVPAGE]; 397 }; 398 399 #ifdef MYCROFT_HACK 400 int mycroft_hack = 0; 401 #endif 402 403 /* Function to set the debug level of the pmap code */ 404 405 #ifdef PMAP_DEBUG 406 void 407 pmap_debug(int level) 408 { 409 pmap_debug_level = level; 410 printf("pmap_debug: level=%d\n", pmap_debug_level); 411 } 412 #endif /* PMAP_DEBUG */ 413 414 __inline static boolean_t 415 pmap_is_curpmap(struct pmap *pmap) 416 { 417 418 if ((curproc && curproc->p_vmspace->vm_map.pmap == pmap) || 419 pmap == pmap_kernel()) 420 return (TRUE); 421 422 return (FALSE); 423 } 424 425 #include "isadma.h" 426 427 #if NISADMA > 0 428 /* 429 * Used to protect memory for ISA DMA bounce buffers. If, when loading 430 * pages into the system, memory intersects with any of these ranges, 431 * the intersecting memory will be loaded into a lower-priority free list. 432 */ 433 bus_dma_segment_t *pmap_isa_dma_ranges; 434 int pmap_isa_dma_nranges; 435 436 /* 437 * Check if a memory range intersects with an ISA DMA range, and 438 * return the page-rounded intersection if it does. The intersection 439 * will be placed on a lower-priority free list. 440 */ 441 static boolean_t 442 pmap_isa_dma_range_intersect(paddr_t pa, psize_t size, paddr_t *pap, 443 psize_t *sizep) 444 { 445 bus_dma_segment_t *ds; 446 int i; 447 448 if (pmap_isa_dma_ranges == NULL) 449 return (FALSE); 450 451 for (i = 0, ds = pmap_isa_dma_ranges; 452 i < pmap_isa_dma_nranges; i++, ds++) { 453 if (ds->ds_addr <= pa && pa < (ds->ds_addr + ds->ds_len)) { 454 /* 455 * Beginning of region intersects with this range. 456 */ 457 *pap = trunc_page(pa); 458 *sizep = round_page(min(pa + size, 459 ds->ds_addr + ds->ds_len) - pa); 460 return (TRUE); 461 } 462 if (pa < ds->ds_addr && ds->ds_addr < (pa + size)) { 463 /* 464 * End of region intersects with this range. 465 */ 466 *pap = trunc_page(ds->ds_addr); 467 *sizep = round_page(min((pa + size) - ds->ds_addr, 468 ds->ds_len)); 469 return (TRUE); 470 } 471 } 472 473 /* 474 * No intersection found. 475 */ 476 return (FALSE); 477 } 478 #endif /* NISADMA > 0 */ 479 480 /* 481 * p v _ e n t r y f u n c t i o n s 482 */ 483 484 /* 485 * pv_entry allocation functions: 486 * the main pv_entry allocation functions are: 487 * pmap_alloc_pv: allocate a pv_entry structure 488 * pmap_free_pv: free one pv_entry 489 * pmap_free_pvs: free a list of pv_entrys 490 * 491 * the rest are helper functions 492 */ 493 494 /* 495 * pmap_alloc_pv: inline function to allocate a pv_entry structure 496 * => we lock pvalloc_lock 497 * => if we fail, we call out to pmap_alloc_pvpage 498 * => 3 modes: 499 * ALLOCPV_NEED = we really need a pv_entry, even if we have to steal it 500 * ALLOCPV_TRY = we want a pv_entry, but not enough to steal 501 * ALLOCPV_NONEED = we are trying to grow our free list, don't really need 502 * one now 503 * 504 * "try" is for optional functions like pmap_copy(). 505 */ 506 507 __inline static struct pv_entry * 508 pmap_alloc_pv(struct pmap *pmap, int mode) 509 { 510 struct pv_page *pvpage; 511 struct pv_entry *pv; 512 513 simple_lock(&pvalloc_lock); 514 515 pvpage = TAILQ_FIRST(&pv_freepages); 516 517 if (pvpage != NULL) { 518 pvpage->pvinfo.pvpi_nfree--; 519 if (pvpage->pvinfo.pvpi_nfree == 0) { 520 /* nothing left in this one? */ 521 TAILQ_REMOVE(&pv_freepages, pvpage, pvinfo.pvpi_list); 522 } 523 pv = pvpage->pvinfo.pvpi_pvfree; 524 KASSERT(pv); 525 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 526 pv_nfpvents--; /* took one from pool */ 527 } else { 528 pv = NULL; /* need more of them */ 529 } 530 531 /* 532 * if below low water mark or we didn't get a pv_entry we try and 533 * create more pv_entrys ... 534 */ 535 536 if (pv_nfpvents < PVE_LOWAT || pv == NULL) { 537 if (pv == NULL) 538 pv = pmap_alloc_pvpage(pmap, (mode == ALLOCPV_TRY) ? 539 mode : ALLOCPV_NEED); 540 else 541 (void) pmap_alloc_pvpage(pmap, ALLOCPV_NONEED); 542 } 543 544 simple_unlock(&pvalloc_lock); 545 return(pv); 546 } 547 548 /* 549 * pmap_alloc_pvpage: maybe allocate a new pvpage 550 * 551 * if need_entry is false: try and allocate a new pv_page 552 * if need_entry is true: try and allocate a new pv_page and return a 553 * new pv_entry from it. if we are unable to allocate a pv_page 554 * we make a last ditch effort to steal a pv_page from some other 555 * mapping. if that fails, we panic... 556 * 557 * => we assume that the caller holds pvalloc_lock 558 */ 559 560 static struct pv_entry * 561 pmap_alloc_pvpage(struct pmap *pmap, int mode) 562 { 563 struct vm_page *pg; 564 struct pv_page *pvpage; 565 struct pv_entry *pv; 566 int s; 567 568 /* 569 * if we need_entry and we've got unused pv_pages, allocate from there 570 */ 571 572 pvpage = TAILQ_FIRST(&pv_unusedpgs); 573 if (mode != ALLOCPV_NONEED && pvpage != NULL) { 574 575 /* move it to pv_freepages list */ 576 TAILQ_REMOVE(&pv_unusedpgs, pvpage, pvinfo.pvpi_list); 577 TAILQ_INSERT_HEAD(&pv_freepages, pvpage, pvinfo.pvpi_list); 578 579 /* allocate a pv_entry */ 580 pvpage->pvinfo.pvpi_nfree--; /* can't go to zero */ 581 pv = pvpage->pvinfo.pvpi_pvfree; 582 KASSERT(pv); 583 pvpage->pvinfo.pvpi_pvfree = pv->pv_next; 584 585 pv_nfpvents--; /* took one from pool */ 586 return(pv); 587 } 588 589 /* 590 * see if we've got a cached unmapped VA that we can map a page in. 591 * if not, try to allocate one. 592 */ 593 594 595 if (pv_cachedva == 0) { 596 s = splvm(); 597 pv_cachedva = uvm_km_kmemalloc(kmem_map, NULL, 598 PAGE_SIZE, UVM_KMF_TRYLOCK|UVM_KMF_VALLOC); 599 splx(s); 600 if (pv_cachedva == 0) { 601 return (NULL); 602 } 603 } 604 605 pg = uvm_pagealloc(NULL, pv_cachedva - vm_map_min(kernel_map), NULL, 606 UVM_PGA_USERESERVE); 607 608 if (pg == NULL) 609 return (NULL); 610 pg->flags &= ~PG_BUSY; /* never busy */ 611 612 /* 613 * add a mapping for our new pv_page and free its entrys (save one!) 614 * 615 * NOTE: If we are allocating a PV page for the kernel pmap, the 616 * pmap is already locked! (...but entering the mapping is safe...) 617 */ 618 619 pmap_kenter_pa(pv_cachedva, VM_PAGE_TO_PHYS(pg), 620 VM_PROT_READ|VM_PROT_WRITE); 621 pmap_update(pmap_kernel()); 622 pvpage = (struct pv_page *) pv_cachedva; 623 pv_cachedva = 0; 624 return (pmap_add_pvpage(pvpage, mode != ALLOCPV_NONEED)); 625 } 626 627 /* 628 * pmap_add_pvpage: add a pv_page's pv_entrys to the free list 629 * 630 * => caller must hold pvalloc_lock 631 * => if need_entry is true, we allocate and return one pv_entry 632 */ 633 634 static struct pv_entry * 635 pmap_add_pvpage(struct pv_page *pvp, boolean_t need_entry) 636 { 637 int tofree, lcv; 638 639 /* do we need to return one? */ 640 tofree = (need_entry) ? PVE_PER_PVPAGE - 1 : PVE_PER_PVPAGE; 641 642 pvp->pvinfo.pvpi_pvfree = NULL; 643 pvp->pvinfo.pvpi_nfree = tofree; 644 for (lcv = 0 ; lcv < tofree ; lcv++) { 645 pvp->pvents[lcv].pv_next = pvp->pvinfo.pvpi_pvfree; 646 pvp->pvinfo.pvpi_pvfree = &pvp->pvents[lcv]; 647 } 648 if (need_entry) 649 TAILQ_INSERT_TAIL(&pv_freepages, pvp, pvinfo.pvpi_list); 650 else 651 TAILQ_INSERT_TAIL(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 652 pv_nfpvents += tofree; 653 return((need_entry) ? &pvp->pvents[lcv] : NULL); 654 } 655 656 /* 657 * pmap_free_pv_doit: actually free a pv_entry 658 * 659 * => do not call this directly! instead use either 660 * 1. pmap_free_pv ==> free a single pv_entry 661 * 2. pmap_free_pvs => free a list of pv_entrys 662 * => we must be holding pvalloc_lock 663 */ 664 665 __inline static void 666 pmap_free_pv_doit(struct pv_entry *pv) 667 { 668 struct pv_page *pvp; 669 670 pvp = (struct pv_page *) arm_trunc_page((vaddr_t)pv); 671 pv_nfpvents++; 672 pvp->pvinfo.pvpi_nfree++; 673 674 /* nfree == 1 => fully allocated page just became partly allocated */ 675 if (pvp->pvinfo.pvpi_nfree == 1) { 676 TAILQ_INSERT_HEAD(&pv_freepages, pvp, pvinfo.pvpi_list); 677 } 678 679 /* free it */ 680 pv->pv_next = pvp->pvinfo.pvpi_pvfree; 681 pvp->pvinfo.pvpi_pvfree = pv; 682 683 /* 684 * are all pv_page's pv_entry's free? move it to unused queue. 685 */ 686 687 if (pvp->pvinfo.pvpi_nfree == PVE_PER_PVPAGE) { 688 TAILQ_REMOVE(&pv_freepages, pvp, pvinfo.pvpi_list); 689 TAILQ_INSERT_HEAD(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 690 } 691 } 692 693 /* 694 * pmap_free_pv: free a single pv_entry 695 * 696 * => we gain the pvalloc_lock 697 */ 698 699 __inline static void 700 pmap_free_pv(struct pmap *pmap, struct pv_entry *pv) 701 { 702 simple_lock(&pvalloc_lock); 703 pmap_free_pv_doit(pv); 704 705 /* 706 * Can't free the PV page if the PV entries were associated with 707 * the kernel pmap; the pmap is already locked. 708 */ 709 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 710 pmap != pmap_kernel()) 711 pmap_free_pvpage(); 712 713 simple_unlock(&pvalloc_lock); 714 } 715 716 /* 717 * pmap_free_pvs: free a list of pv_entrys 718 * 719 * => we gain the pvalloc_lock 720 */ 721 722 __inline static void 723 pmap_free_pvs(struct pmap *pmap, struct pv_entry *pvs) 724 { 725 struct pv_entry *nextpv; 726 727 simple_lock(&pvalloc_lock); 728 729 for ( /* null */ ; pvs != NULL ; pvs = nextpv) { 730 nextpv = pvs->pv_next; 731 pmap_free_pv_doit(pvs); 732 } 733 734 /* 735 * Can't free the PV page if the PV entries were associated with 736 * the kernel pmap; the pmap is already locked. 737 */ 738 if (pv_nfpvents > PVE_HIWAT && TAILQ_FIRST(&pv_unusedpgs) != NULL && 739 pmap != pmap_kernel()) 740 pmap_free_pvpage(); 741 742 simple_unlock(&pvalloc_lock); 743 } 744 745 746 /* 747 * pmap_free_pvpage: try and free an unused pv_page structure 748 * 749 * => assume caller is holding the pvalloc_lock and that 750 * there is a page on the pv_unusedpgs list 751 * => if we can't get a lock on the kmem_map we try again later 752 */ 753 754 static void 755 pmap_free_pvpage(void) 756 { 757 int s; 758 struct vm_map *map; 759 struct vm_map_entry *dead_entries; 760 struct pv_page *pvp; 761 762 s = splvm(); /* protect kmem_map */ 763 764 pvp = TAILQ_FIRST(&pv_unusedpgs); 765 766 /* 767 * note: watch out for pv_initpage which is allocated out of 768 * kernel_map rather than kmem_map. 769 */ 770 if (pvp == pv_initpage) 771 map = kernel_map; 772 else 773 map = kmem_map; 774 if (vm_map_lock_try(map)) { 775 776 /* remove pvp from pv_unusedpgs */ 777 TAILQ_REMOVE(&pv_unusedpgs, pvp, pvinfo.pvpi_list); 778 779 /* unmap the page */ 780 dead_entries = NULL; 781 uvm_unmap_remove(map, (vaddr_t)pvp, ((vaddr_t)pvp) + PAGE_SIZE, 782 &dead_entries); 783 vm_map_unlock(map); 784 785 if (dead_entries != NULL) 786 uvm_unmap_detach(dead_entries, 0); 787 788 pv_nfpvents -= PVE_PER_PVPAGE; /* update free count */ 789 } 790 if (pvp == pv_initpage) 791 /* no more initpage, we've freed it */ 792 pv_initpage = NULL; 793 794 splx(s); 795 } 796 797 /* 798 * main pv_entry manipulation functions: 799 * pmap_enter_pv: enter a mapping onto a vm_page list 800 * pmap_remove_pv: remove a mappiing from a vm_page list 801 * 802 * NOTE: pmap_enter_pv expects to lock the pvh itself 803 * pmap_remove_pv expects te caller to lock the pvh before calling 804 */ 805 806 /* 807 * pmap_enter_pv: enter a mapping onto a vm_page lst 808 * 809 * => caller should hold the proper lock on pmap_main_lock 810 * => caller should have pmap locked 811 * => we will gain the lock on the vm_page and allocate the new pv_entry 812 * => caller should adjust ptp's wire_count before calling 813 * => caller should not adjust pmap's wire_count 814 */ 815 816 __inline static void 817 pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, struct pmap *pmap, 818 vaddr_t va, struct vm_page *ptp, int flags) 819 { 820 pve->pv_pmap = pmap; 821 pve->pv_va = va; 822 pve->pv_ptp = ptp; /* NULL for kernel pmap */ 823 pve->pv_flags = flags; 824 simple_lock(&pg->mdpage.pvh_slock); /* lock vm_page */ 825 pve->pv_next = pg->mdpage.pvh_list; /* add to ... */ 826 pg->mdpage.pvh_list = pve; /* ... locked list */ 827 simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */ 828 if (pve->pv_flags & PVF_WIRED) 829 ++pmap->pm_stats.wired_count; 830 #ifdef PMAP_ALIAS_DEBUG 831 { 832 int s = splhigh(); 833 if (pve->pv_flags & PVF_WRITE) 834 pg->mdpage.rw_mappings++; 835 else 836 pg->mdpage.ro_mappings++; 837 if (pg->mdpage.rw_mappings != 0 && 838 (pg->mdpage.kro_mappings != 0 || pg->mdpage.krw_mappings != 0)) { 839 printf("pmap_enter_pv: rw %u, kro %u, krw %u\n", 840 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 841 pg->mdpage.krw_mappings); 842 } 843 splx(s); 844 } 845 #endif /* PMAP_ALIAS_DEBUG */ 846 } 847 848 /* 849 * pmap_remove_pv: try to remove a mapping from a pv_list 850 * 851 * => caller should hold proper lock on pmap_main_lock 852 * => pmap should be locked 853 * => caller should hold lock on vm_page [so that attrs can be adjusted] 854 * => caller should adjust ptp's wire_count and free PTP if needed 855 * => caller should NOT adjust pmap's wire_count 856 * => we return the removed pve 857 */ 858 859 __inline static struct pv_entry * 860 pmap_remove_pv(struct vm_page *pg, struct pmap *pmap, vaddr_t va) 861 { 862 struct pv_entry *pve, **prevptr; 863 864 prevptr = &pg->mdpage.pvh_list; /* previous pv_entry pointer */ 865 pve = *prevptr; 866 while (pve) { 867 if (pve->pv_pmap == pmap && pve->pv_va == va) { /* match? */ 868 *prevptr = pve->pv_next; /* remove it! */ 869 if (pve->pv_flags & PVF_WIRED) 870 --pmap->pm_stats.wired_count; 871 #ifdef PMAP_ALIAS_DEBUG 872 { 873 int s = splhigh(); 874 if (pve->pv_flags & PVF_WRITE) { 875 KASSERT(pg->mdpage.rw_mappings != 0); 876 pg->mdpage.rw_mappings--; 877 } else { 878 KASSERT(pg->mdpage.ro_mappings != 0); 879 pg->mdpage.ro_mappings--; 880 } 881 splx(s); 882 } 883 #endif /* PMAP_ALIAS_DEBUG */ 884 break; 885 } 886 prevptr = &pve->pv_next; /* previous pointer */ 887 pve = pve->pv_next; /* advance */ 888 } 889 return(pve); /* return removed pve */ 890 } 891 892 /* 893 * 894 * pmap_modify_pv: Update pv flags 895 * 896 * => caller should hold lock on vm_page [so that attrs can be adjusted] 897 * => caller should NOT adjust pmap's wire_count 898 * => caller must call pmap_vac_me_harder() if writable status of a page 899 * may have changed. 900 * => we return the old flags 901 * 902 * Modify a physical-virtual mapping in the pv table 903 */ 904 905 static /* __inline */ u_int 906 pmap_modify_pv(struct pmap *pmap, vaddr_t va, struct vm_page *pg, 907 u_int bic_mask, u_int eor_mask) 908 { 909 struct pv_entry *npv; 910 u_int flags, oflags; 911 912 /* 913 * There is at least one VA mapping this page. 914 */ 915 916 for (npv = pg->mdpage.pvh_list; npv; npv = npv->pv_next) { 917 if (pmap == npv->pv_pmap && va == npv->pv_va) { 918 oflags = npv->pv_flags; 919 npv->pv_flags = flags = 920 ((oflags & ~bic_mask) ^ eor_mask); 921 if ((flags ^ oflags) & PVF_WIRED) { 922 if (flags & PVF_WIRED) 923 ++pmap->pm_stats.wired_count; 924 else 925 --pmap->pm_stats.wired_count; 926 } 927 #ifdef PMAP_ALIAS_DEBUG 928 { 929 int s = splhigh(); 930 if ((flags ^ oflags) & PVF_WRITE) { 931 if (flags & PVF_WRITE) { 932 pg->mdpage.rw_mappings++; 933 pg->mdpage.ro_mappings--; 934 if (pg->mdpage.rw_mappings != 0 && 935 (pg->mdpage.kro_mappings != 0 || 936 pg->mdpage.krw_mappings != 0)) { 937 printf("pmap_modify_pv: rw %u, " 938 "kro %u, krw %u\n", 939 pg->mdpage.rw_mappings, 940 pg->mdpage.kro_mappings, 941 pg->mdpage.krw_mappings); 942 } 943 } else { 944 KASSERT(pg->mdpage.rw_mappings != 0); 945 pg->mdpage.rw_mappings--; 946 pg->mdpage.ro_mappings++; 947 } 948 } 949 splx(s); 950 } 951 #endif /* PMAP_ALIAS_DEBUG */ 952 return (oflags); 953 } 954 } 955 return (0); 956 } 957 958 /* 959 * Map the specified level 2 pagetable into the level 1 page table for 960 * the given pmap to cover a chunk of virtual address space starting from the 961 * address specified. 962 */ 963 static __inline void 964 pmap_map_in_l1(struct pmap *pmap, vaddr_t va, paddr_t l2pa, boolean_t selfref) 965 { 966 vaddr_t ptva; 967 968 /* Calculate the index into the L1 page table. */ 969 ptva = (va >> L1_S_SHIFT) & ~3; 970 971 /* Map page table into the L1. */ 972 pmap->pm_pdir[ptva + 0] = L1_C_PROTO | (l2pa + 0x000); 973 pmap->pm_pdir[ptva + 1] = L1_C_PROTO | (l2pa + 0x400); 974 pmap->pm_pdir[ptva + 2] = L1_C_PROTO | (l2pa + 0x800); 975 pmap->pm_pdir[ptva + 3] = L1_C_PROTO | (l2pa + 0xc00); 976 977 /* Map the page table into the page table area. */ 978 if (selfref) 979 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = L2_S_PROTO | l2pa | 980 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 981 } 982 983 #if 0 984 static __inline void 985 pmap_unmap_in_l1(struct pmap *pmap, vaddr_t va) 986 { 987 vaddr_t ptva; 988 989 /* Calculate the index into the L1 page table. */ 990 ptva = (va >> L1_S_SHIFT) & ~3; 991 992 /* Unmap page table from the L1. */ 993 pmap->pm_pdir[ptva + 0] = 0; 994 pmap->pm_pdir[ptva + 1] = 0; 995 pmap->pm_pdir[ptva + 2] = 0; 996 pmap->pm_pdir[ptva + 3] = 0; 997 998 /* Unmap the page table from the page table area. */ 999 *((pt_entry_t *)(pmap->pm_vptpt + ptva)) = 0; 1000 } 1001 #endif 1002 1003 /* 1004 * Used to map a range of physical addresses into kernel 1005 * virtual address space. 1006 * 1007 * For now, VM is already on, we only need to map the 1008 * specified memory. 1009 * 1010 * XXX This routine should eventually go away; it's only used 1011 * XXX by machine-dependent crash dump code. 1012 */ 1013 vaddr_t 1014 pmap_map(vaddr_t va, paddr_t spa, paddr_t epa, vm_prot_t prot) 1015 { 1016 pt_entry_t *pte; 1017 1018 while (spa < epa) { 1019 pte = vtopte(va); 1020 1021 *pte = L2_S_PROTO | spa | 1022 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 1023 cpu_tlb_flushID_SE(va); 1024 va += NBPG; 1025 spa += NBPG; 1026 } 1027 pmap_update(pmap_kernel()); 1028 return(va); 1029 } 1030 1031 1032 /* 1033 * void pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1034 * 1035 * bootstrap the pmap system. This is called from initarm and allows 1036 * the pmap system to initailise any structures it requires. 1037 * 1038 * Currently this sets up the kernel_pmap that is statically allocated 1039 * and also allocated virtual addresses for certain page hooks. 1040 * Currently the only one page hook is allocated that is used 1041 * to zero physical pages of memory. 1042 * It also initialises the start and end address of the kernel data space. 1043 */ 1044 extern paddr_t physical_freestart; 1045 extern paddr_t physical_freeend; 1046 1047 char *boot_head; 1048 1049 void 1050 pmap_bootstrap(pd_entry_t *kernel_l1pt, pv_addr_t kernel_ptpt) 1051 { 1052 pt_entry_t *pte; 1053 int loop; 1054 paddr_t start, end; 1055 #if NISADMA > 0 1056 paddr_t istart; 1057 psize_t isize; 1058 #endif 1059 1060 pmap_kernel()->pm_pdir = kernel_l1pt; 1061 pmap_kernel()->pm_pptpt = kernel_ptpt.pv_pa; 1062 pmap_kernel()->pm_vptpt = kernel_ptpt.pv_va; 1063 simple_lock_init(&pmap_kernel()->pm_lock); 1064 pmap_kernel()->pm_obj.pgops = NULL; 1065 TAILQ_INIT(&(pmap_kernel()->pm_obj.memq)); 1066 pmap_kernel()->pm_obj.uo_npages = 0; 1067 pmap_kernel()->pm_obj.uo_refs = 1; 1068 1069 /* 1070 * Initialize PAGE_SIZE-dependent variables. 1071 */ 1072 uvm_setpagesize(); 1073 1074 loop = 0; 1075 while (loop < bootconfig.dramblocks) { 1076 start = (paddr_t)bootconfig.dram[loop].address; 1077 end = start + (bootconfig.dram[loop].pages * NBPG); 1078 if (start < physical_freestart) 1079 start = physical_freestart; 1080 if (end > physical_freeend) 1081 end = physical_freeend; 1082 #if 0 1083 printf("%d: %lx -> %lx\n", loop, start, end - 1); 1084 #endif 1085 #if NISADMA > 0 1086 if (pmap_isa_dma_range_intersect(start, end - start, 1087 &istart, &isize)) { 1088 /* 1089 * Place the pages that intersect with the 1090 * ISA DMA range onto the ISA DMA free list. 1091 */ 1092 #if 0 1093 printf(" ISADMA 0x%lx -> 0x%lx\n", istart, 1094 istart + isize - 1); 1095 #endif 1096 uvm_page_physload(atop(istart), 1097 atop(istart + isize), atop(istart), 1098 atop(istart + isize), VM_FREELIST_ISADMA); 1099 1100 /* 1101 * Load the pieces that come before 1102 * the intersection into the default 1103 * free list. 1104 */ 1105 if (start < istart) { 1106 #if 0 1107 printf(" BEFORE 0x%lx -> 0x%lx\n", 1108 start, istart - 1); 1109 #endif 1110 uvm_page_physload(atop(start), 1111 atop(istart), atop(start), 1112 atop(istart), VM_FREELIST_DEFAULT); 1113 } 1114 1115 /* 1116 * Load the pieces that come after 1117 * the intersection into the default 1118 * free list. 1119 */ 1120 if ((istart + isize) < end) { 1121 #if 0 1122 printf(" AFTER 0x%lx -> 0x%lx\n", 1123 (istart + isize), end - 1); 1124 #endif 1125 uvm_page_physload(atop(istart + isize), 1126 atop(end), atop(istart + isize), 1127 atop(end), VM_FREELIST_DEFAULT); 1128 } 1129 } else { 1130 uvm_page_physload(atop(start), atop(end), 1131 atop(start), atop(end), VM_FREELIST_DEFAULT); 1132 } 1133 #else /* NISADMA > 0 */ 1134 uvm_page_physload(atop(start), atop(end), 1135 atop(start), atop(end), VM_FREELIST_DEFAULT); 1136 #endif /* NISADMA > 0 */ 1137 ++loop; 1138 } 1139 1140 virtual_avail = KERNEL_VM_BASE; 1141 virtual_end = KERNEL_VM_BASE + KERNEL_VM_SIZE; 1142 1143 /* 1144 * now we allocate the "special" VAs which are used for tmp mappings 1145 * by the pmap (and other modules). we allocate the VAs by advancing 1146 * virtual_avail (note that there are no pages mapped at these VAs). 1147 * we find the PTE that maps the allocated VA via the linear PTE 1148 * mapping. 1149 */ 1150 1151 pte = ((pt_entry_t *) PTE_BASE) + atop(virtual_avail); 1152 1153 csrcp = virtual_avail; csrc_pte = pte; 1154 virtual_avail += PAGE_SIZE; pte++; 1155 1156 cdstp = virtual_avail; cdst_pte = pte; 1157 virtual_avail += PAGE_SIZE; pte++; 1158 1159 memhook = (char *) virtual_avail; /* don't need pte */ 1160 virtual_avail += PAGE_SIZE; pte++; 1161 1162 msgbufaddr = (caddr_t) virtual_avail; /* don't need pte */ 1163 virtual_avail += round_page(MSGBUFSIZE); 1164 pte += atop(round_page(MSGBUFSIZE)); 1165 1166 /* 1167 * init the static-global locks and global lists. 1168 */ 1169 spinlockinit(&pmap_main_lock, "pmaplk", 0); 1170 simple_lock_init(&pvalloc_lock); 1171 simple_lock_init(&pmaps_lock); 1172 LIST_INIT(&pmaps); 1173 TAILQ_INIT(&pv_freepages); 1174 TAILQ_INIT(&pv_unusedpgs); 1175 1176 /* 1177 * initialize the pmap pool. 1178 */ 1179 1180 pool_init(&pmap_pmap_pool, sizeof(struct pmap), 0, 0, 0, "pmappl", 1181 &pool_allocator_nointr); 1182 1183 /* 1184 * initialize the PT-PT pool and cache. 1185 */ 1186 1187 pool_init(&pmap_ptpt_pool, PAGE_SIZE, 0, 0, 0, "ptptpl", 1188 &pmap_ptpt_allocator); 1189 pool_cache_init(&pmap_ptpt_cache, &pmap_ptpt_pool, 1190 pmap_ptpt_ctor, NULL, NULL); 1191 1192 cpu_dcache_wbinv_all(); 1193 } 1194 1195 /* 1196 * void pmap_init(void) 1197 * 1198 * Initialize the pmap module. 1199 * Called by vm_init() in vm/vm_init.c in order to initialise 1200 * any structures that the pmap system needs to map virtual memory. 1201 */ 1202 1203 extern int physmem; 1204 1205 void 1206 pmap_init(void) 1207 { 1208 1209 /* 1210 * Set the available memory vars - These do not map to real memory 1211 * addresses and cannot as the physical memory is fragmented. 1212 * They are used by ps for %mem calculations. 1213 * One could argue whether this should be the entire memory or just 1214 * the memory that is useable in a user process. 1215 */ 1216 avail_start = 0; 1217 avail_end = physmem * NBPG; 1218 1219 /* 1220 * now we need to free enough pv_entry structures to allow us to get 1221 * the kmem_map/kmem_object allocated and inited (done after this 1222 * function is finished). to do this we allocate one bootstrap page out 1223 * of kernel_map and use it to provide an initial pool of pv_entry 1224 * structures. we never free this page. 1225 */ 1226 1227 pv_initpage = (struct pv_page *) uvm_km_alloc(kernel_map, PAGE_SIZE); 1228 if (pv_initpage == NULL) 1229 panic("pmap_init: pv_initpage"); 1230 pv_cachedva = 0; /* a VA we have allocated but not used yet */ 1231 pv_nfpvents = 0; 1232 (void) pmap_add_pvpage(pv_initpage, FALSE); 1233 1234 pmap_initialized = TRUE; 1235 1236 /* Initialise our L1 page table queues and counters */ 1237 SIMPLEQ_INIT(&l1pt_static_queue); 1238 l1pt_static_queue_count = 0; 1239 l1pt_static_create_count = 0; 1240 SIMPLEQ_INIT(&l1pt_queue); 1241 l1pt_queue_count = 0; 1242 l1pt_create_count = 0; 1243 l1pt_reuse_count = 0; 1244 } 1245 1246 /* 1247 * pmap_postinit() 1248 * 1249 * This routine is called after the vm and kmem subsystems have been 1250 * initialised. This allows the pmap code to perform any initialisation 1251 * that can only be done one the memory allocation is in place. 1252 */ 1253 1254 void 1255 pmap_postinit(void) 1256 { 1257 int loop; 1258 struct l1pt *pt; 1259 1260 #ifdef PMAP_STATIC_L1S 1261 for (loop = 0; loop < PMAP_STATIC_L1S; ++loop) { 1262 #else /* PMAP_STATIC_L1S */ 1263 for (loop = 0; loop < max_processes; ++loop) { 1264 #endif /* PMAP_STATIC_L1S */ 1265 /* Allocate a L1 page table */ 1266 pt = pmap_alloc_l1pt(); 1267 if (!pt) 1268 panic("Cannot allocate static L1 page tables\n"); 1269 1270 /* Clean it */ 1271 bzero((void *)pt->pt_va, L1_TABLE_SIZE); 1272 pt->pt_flags |= (PTFLAG_STATIC | PTFLAG_CLEAN); 1273 /* Add the page table to the queue */ 1274 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, pt, pt_queue); 1275 ++l1pt_static_queue_count; 1276 ++l1pt_static_create_count; 1277 } 1278 } 1279 1280 1281 /* 1282 * Create and return a physical map. 1283 * 1284 * If the size specified for the map is zero, the map is an actual physical 1285 * map, and may be referenced by the hardware. 1286 * 1287 * If the size specified is non-zero, the map will be used in software only, 1288 * and is bounded by that size. 1289 */ 1290 1291 pmap_t 1292 pmap_create(void) 1293 { 1294 struct pmap *pmap; 1295 1296 /* 1297 * Fetch pmap entry from the pool 1298 */ 1299 1300 pmap = pool_get(&pmap_pmap_pool, PR_WAITOK); 1301 /* XXX is this really needed! */ 1302 memset(pmap, 0, sizeof(*pmap)); 1303 1304 simple_lock_init(&pmap->pm_obj.vmobjlock); 1305 pmap->pm_obj.pgops = NULL; /* currently not a mappable object */ 1306 TAILQ_INIT(&pmap->pm_obj.memq); 1307 pmap->pm_obj.uo_npages = 0; 1308 pmap->pm_obj.uo_refs = 1; 1309 pmap->pm_stats.wired_count = 0; 1310 pmap->pm_stats.resident_count = 1; 1311 pmap->pm_ptphint = NULL; 1312 1313 /* Now init the machine part of the pmap */ 1314 pmap_pinit(pmap); 1315 return(pmap); 1316 } 1317 1318 /* 1319 * pmap_alloc_l1pt() 1320 * 1321 * This routine allocates physical and virtual memory for a L1 page table 1322 * and wires it. 1323 * A l1pt structure is returned to describe the allocated page table. 1324 * 1325 * This routine is allowed to fail if the required memory cannot be allocated. 1326 * In this case NULL is returned. 1327 */ 1328 1329 struct l1pt * 1330 pmap_alloc_l1pt(void) 1331 { 1332 paddr_t pa; 1333 vaddr_t va; 1334 struct l1pt *pt; 1335 int error; 1336 struct vm_page *m; 1337 pt_entry_t *pte; 1338 1339 /* Allocate virtual address space for the L1 page table */ 1340 va = uvm_km_valloc(kernel_map, L1_TABLE_SIZE); 1341 if (va == 0) { 1342 #ifdef DIAGNOSTIC 1343 PDEBUG(0, 1344 printf("pmap: Cannot allocate pageable memory for L1\n")); 1345 #endif /* DIAGNOSTIC */ 1346 return(NULL); 1347 } 1348 1349 /* Allocate memory for the l1pt structure */ 1350 pt = (struct l1pt *)malloc(sizeof(struct l1pt), M_VMPMAP, M_WAITOK); 1351 1352 /* 1353 * Allocate pages from the VM system. 1354 */ 1355 TAILQ_INIT(&pt->pt_plist); 1356 error = uvm_pglistalloc(L1_TABLE_SIZE, physical_start, physical_end, 1357 L1_TABLE_SIZE, 0, &pt->pt_plist, 1, M_WAITOK); 1358 if (error) { 1359 #ifdef DIAGNOSTIC 1360 PDEBUG(0, 1361 printf("pmap: Cannot allocate physical mem for L1 (%d)\n", 1362 error)); 1363 #endif /* DIAGNOSTIC */ 1364 /* Release the resources we already have claimed */ 1365 free(pt, M_VMPMAP); 1366 uvm_km_free(kernel_map, va, L1_TABLE_SIZE); 1367 return(NULL); 1368 } 1369 1370 /* Map our physical pages into our virtual space */ 1371 pt->pt_va = va; 1372 m = TAILQ_FIRST(&pt->pt_plist); 1373 while (m && va < (pt->pt_va + L1_TABLE_SIZE)) { 1374 pa = VM_PAGE_TO_PHYS(m); 1375 1376 pte = vtopte(va); 1377 1378 /* 1379 * Assert that the PTE is invalid. If it's invalid, 1380 * then we are guaranteed that there won't be an entry 1381 * for this VA in the TLB. 1382 */ 1383 KDASSERT(pmap_pte_v(pte) == 0); 1384 1385 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(m) | 1386 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1387 1388 va += NBPG; 1389 m = m->pageq.tqe_next; 1390 } 1391 1392 #ifdef DIAGNOSTIC 1393 if (m) 1394 panic("pmap_alloc_l1pt: pglist not empty\n"); 1395 #endif /* DIAGNOSTIC */ 1396 1397 pt->pt_flags = 0; 1398 return(pt); 1399 } 1400 1401 /* 1402 * Free a L1 page table previously allocated with pmap_alloc_l1pt(). 1403 */ 1404 static void 1405 pmap_free_l1pt(struct l1pt *pt) 1406 { 1407 /* Separate the physical memory for the virtual space */ 1408 pmap_kremove(pt->pt_va, L1_TABLE_SIZE); 1409 pmap_update(pmap_kernel()); 1410 1411 /* Return the physical memory */ 1412 uvm_pglistfree(&pt->pt_plist); 1413 1414 /* Free the virtual space */ 1415 uvm_km_free(kernel_map, pt->pt_va, L1_TABLE_SIZE); 1416 1417 /* Free the l1pt structure */ 1418 free(pt, M_VMPMAP); 1419 } 1420 1421 /* 1422 * pmap_ptpt_page_alloc: 1423 * 1424 * Back-end page allocator for the PT-PT pool. 1425 */ 1426 static void * 1427 pmap_ptpt_page_alloc(struct pool *pp, int flags) 1428 { 1429 struct vm_page *pg; 1430 pt_entry_t *pte; 1431 vaddr_t va; 1432 1433 /* XXX PR_WAITOK? */ 1434 va = uvm_km_valloc(kernel_map, L2_TABLE_SIZE); 1435 if (va == 0) 1436 return (NULL); 1437 1438 for (;;) { 1439 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO); 1440 if (pg != NULL) 1441 break; 1442 if ((flags & PR_WAITOK) == 0) { 1443 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1444 return (NULL); 1445 } 1446 uvm_wait("pmap_ptpt"); 1447 } 1448 1449 pte = vtopte(va); 1450 KDASSERT(pmap_pte_v(pte) == 0); 1451 1452 *pte = L2_S_PROTO | VM_PAGE_TO_PHYS(pg) | 1453 L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE); 1454 #ifdef PMAP_ALIAS_DEBUG 1455 { 1456 int s = splhigh(); 1457 pg->mdpage.krw_mappings++; 1458 splx(s); 1459 } 1460 #endif /* PMAP_ALIAS_DEBUG */ 1461 1462 return ((void *) va); 1463 } 1464 1465 /* 1466 * pmap_ptpt_page_free: 1467 * 1468 * Back-end page free'er for the PT-PT pool. 1469 */ 1470 static void 1471 pmap_ptpt_page_free(struct pool *pp, void *v) 1472 { 1473 vaddr_t va = (vaddr_t) v; 1474 paddr_t pa; 1475 1476 pa = vtophys(va); 1477 1478 pmap_kremove(va, L2_TABLE_SIZE); 1479 pmap_update(pmap_kernel()); 1480 1481 uvm_pagefree(PHYS_TO_VM_PAGE(pa)); 1482 1483 uvm_km_free(kernel_map, va, L2_TABLE_SIZE); 1484 } 1485 1486 /* 1487 * pmap_ptpt_ctor: 1488 * 1489 * Constructor for the PT-PT cache. 1490 */ 1491 static int 1492 pmap_ptpt_ctor(void *arg, void *object, int flags) 1493 { 1494 caddr_t vptpt = object; 1495 1496 /* Page is already zero'd. */ 1497 1498 /* 1499 * Map in kernel PTs. 1500 * 1501 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1502 */ 1503 memcpy(vptpt + ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2), 1504 (char *)(PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)) + 1505 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)), 1506 (KERNEL_PD_SIZE >> 2)); 1507 1508 return (0); 1509 } 1510 1511 /* 1512 * Allocate a page directory. 1513 * This routine will either allocate a new page directory from the pool 1514 * of L1 page tables currently held by the kernel or it will allocate 1515 * a new one via pmap_alloc_l1pt(). 1516 * It will then initialise the l1 page table for use. 1517 */ 1518 static int 1519 pmap_allocpagedir(struct pmap *pmap) 1520 { 1521 vaddr_t vptpt; 1522 paddr_t pa; 1523 struct l1pt *pt; 1524 u_int gen; 1525 1526 PDEBUG(0, printf("pmap_allocpagedir(%p)\n", pmap)); 1527 1528 /* Do we have any spare L1's lying around ? */ 1529 if (l1pt_static_queue_count) { 1530 --l1pt_static_queue_count; 1531 pt = l1pt_static_queue.sqh_first; 1532 SIMPLEQ_REMOVE_HEAD(&l1pt_static_queue, pt, pt_queue); 1533 } else if (l1pt_queue_count) { 1534 --l1pt_queue_count; 1535 pt = l1pt_queue.sqh_first; 1536 SIMPLEQ_REMOVE_HEAD(&l1pt_queue, pt, pt_queue); 1537 ++l1pt_reuse_count; 1538 } else { 1539 pt = pmap_alloc_l1pt(); 1540 if (!pt) 1541 return(ENOMEM); 1542 ++l1pt_create_count; 1543 } 1544 1545 /* Store the pointer to the l1 descriptor in the pmap. */ 1546 pmap->pm_l1pt = pt; 1547 1548 /* Get the physical address of the start of the l1 */ 1549 pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pt->pt_plist)); 1550 1551 /* Store the virtual address of the l1 in the pmap. */ 1552 pmap->pm_pdir = (pd_entry_t *)pt->pt_va; 1553 1554 /* Clean the L1 if it is dirty */ 1555 if (!(pt->pt_flags & PTFLAG_CLEAN)) 1556 bzero((void *)pmap->pm_pdir, (L1_TABLE_SIZE - KERNEL_PD_SIZE)); 1557 1558 /* Allocate a page table to map all the page tables for this pmap */ 1559 KASSERT(pmap->pm_vptpt == 0); 1560 1561 try_again: 1562 gen = pmap_ptpt_cache_generation; 1563 vptpt = (vaddr_t) pool_cache_get(&pmap_ptpt_cache, PR_WAITOK); 1564 if (vptpt == NULL) { 1565 PDEBUG(0, printf("pmap_alloc_pagedir: no KVA for PTPT\n")); 1566 pmap_freepagedir(pmap); 1567 return (ENOMEM); 1568 } 1569 1570 /* need to lock this all up for growkernel */ 1571 simple_lock(&pmaps_lock); 1572 1573 if (gen != pmap_ptpt_cache_generation) { 1574 simple_unlock(&pmaps_lock); 1575 pool_cache_destruct_object(&pmap_ptpt_cache, (void *) vptpt); 1576 goto try_again; 1577 } 1578 1579 pmap->pm_vptpt = vptpt; 1580 pmap->pm_pptpt = vtophys(vptpt); 1581 1582 /* Duplicate the kernel mappings. */ 1583 bcopy((char *)pmap_kernel()->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1584 (char *)pmap->pm_pdir + (L1_TABLE_SIZE - KERNEL_PD_SIZE), 1585 KERNEL_PD_SIZE); 1586 1587 /* Wire in this page table */ 1588 pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, TRUE); 1589 1590 pt->pt_flags &= ~PTFLAG_CLEAN; /* L1 is dirty now */ 1591 1592 LIST_INSERT_HEAD(&pmaps, pmap, pm_list); 1593 simple_unlock(&pmaps_lock); 1594 1595 return(0); 1596 } 1597 1598 1599 /* 1600 * Initialize a preallocated and zeroed pmap structure, 1601 * such as one in a vmspace structure. 1602 */ 1603 1604 void 1605 pmap_pinit(struct pmap *pmap) 1606 { 1607 int backoff = 6; 1608 int retry = 10; 1609 1610 PDEBUG(0, printf("pmap_pinit(%p)\n", pmap)); 1611 1612 /* Keep looping until we succeed in allocating a page directory */ 1613 while (pmap_allocpagedir(pmap) != 0) { 1614 /* 1615 * Ok we failed to allocate a suitable block of memory for an 1616 * L1 page table. This means that either: 1617 * 1. 16KB of virtual address space could not be allocated 1618 * 2. 16KB of physically contiguous memory on a 16KB boundary 1619 * could not be allocated. 1620 * 1621 * Since we cannot fail we will sleep for a while and try 1622 * again. 1623 * 1624 * Searching for a suitable L1 PT is expensive: 1625 * to avoid hogging the system when memory is really 1626 * scarce, use an exponential back-off so that 1627 * eventually we won't retry more than once every 8 1628 * seconds. This should allow other processes to run 1629 * to completion and free up resources. 1630 */ 1631 (void) ltsleep(&lbolt, PVM, "l1ptwait", (hz << 3) >> backoff, 1632 NULL); 1633 if (--retry == 0) { 1634 retry = 10; 1635 if (backoff) 1636 --backoff; 1637 } 1638 } 1639 1640 if (vector_page < KERNEL_BASE) { 1641 /* 1642 * Map the vector page. This will also allocate and map 1643 * an L2 table for it. 1644 */ 1645 pmap_enter(pmap, vector_page, systempage.pv_pa, 1646 VM_PROT_READ, VM_PROT_READ | PMAP_WIRED); 1647 pmap_update(pmap); 1648 } 1649 } 1650 1651 void 1652 pmap_freepagedir(struct pmap *pmap) 1653 { 1654 /* Free the memory used for the page table mapping */ 1655 if (pmap->pm_vptpt != 0) { 1656 /* 1657 * XXX Objects freed to a pool cache must be in constructed 1658 * XXX form when freed, but we don't free page tables as we 1659 * XXX go, so we need to zap the mappings here. 1660 * 1661 * XXX THIS IS CURRENTLY DONE AS UNCACHED MEMORY ACCESS. 1662 */ 1663 memset((caddr_t) pmap->pm_vptpt, 0, 1664 ((L1_TABLE_SIZE - KERNEL_PD_SIZE) >> 2)); 1665 pool_cache_put(&pmap_ptpt_cache, (void *) pmap->pm_vptpt); 1666 } 1667 1668 /* junk the L1 page table */ 1669 if (pmap->pm_l1pt->pt_flags & PTFLAG_STATIC) { 1670 /* Add the page table to the queue */ 1671 SIMPLEQ_INSERT_TAIL(&l1pt_static_queue, 1672 pmap->pm_l1pt, pt_queue); 1673 ++l1pt_static_queue_count; 1674 } else if (l1pt_queue_count < 8) { 1675 /* Add the page table to the queue */ 1676 SIMPLEQ_INSERT_TAIL(&l1pt_queue, pmap->pm_l1pt, pt_queue); 1677 ++l1pt_queue_count; 1678 } else 1679 pmap_free_l1pt(pmap->pm_l1pt); 1680 } 1681 1682 /* 1683 * Retire the given physical map from service. 1684 * Should only be called if the map contains no valid mappings. 1685 */ 1686 1687 void 1688 pmap_destroy(struct pmap *pmap) 1689 { 1690 struct vm_page *page; 1691 int count; 1692 1693 if (pmap == NULL) 1694 return; 1695 1696 PDEBUG(0, printf("pmap_destroy(%p)\n", pmap)); 1697 1698 /* 1699 * Drop reference count 1700 */ 1701 simple_lock(&pmap->pm_obj.vmobjlock); 1702 count = --pmap->pm_obj.uo_refs; 1703 simple_unlock(&pmap->pm_obj.vmobjlock); 1704 if (count > 0) { 1705 return; 1706 } 1707 1708 /* 1709 * reference count is zero, free pmap resources and then free pmap. 1710 */ 1711 1712 /* 1713 * remove it from global list of pmaps 1714 */ 1715 1716 simple_lock(&pmaps_lock); 1717 LIST_REMOVE(pmap, pm_list); 1718 simple_unlock(&pmaps_lock); 1719 1720 if (vector_page < KERNEL_BASE) { 1721 /* Remove the vector page mapping */ 1722 pmap_remove(pmap, vector_page, vector_page + NBPG); 1723 pmap_update(pmap); 1724 } 1725 1726 /* 1727 * Free any page tables still mapped 1728 * This is only temporay until pmap_enter can count the number 1729 * of mappings made in a page table. Then pmap_remove() can 1730 * reduce the count and free the pagetable when the count 1731 * reaches zero. Note that entries in this list should match the 1732 * contents of the ptpt, however this is faster than walking a 1024 1733 * entries looking for pt's 1734 * taken from i386 pmap.c 1735 */ 1736 /* 1737 * vmobjlock must be held while freeing pages 1738 */ 1739 simple_lock(&pmap->pm_obj.vmobjlock); 1740 while ((page = TAILQ_FIRST(&pmap->pm_obj.memq)) != NULL) { 1741 KASSERT((page->flags & PG_BUSY) == 0); 1742 page->wire_count = 0; 1743 uvm_pagefree(page); 1744 } 1745 simple_unlock(&pmap->pm_obj.vmobjlock); 1746 1747 /* Free the page dir */ 1748 pmap_freepagedir(pmap); 1749 1750 /* return the pmap to the pool */ 1751 pool_put(&pmap_pmap_pool, pmap); 1752 } 1753 1754 1755 /* 1756 * void pmap_reference(struct pmap *pmap) 1757 * 1758 * Add a reference to the specified pmap. 1759 */ 1760 1761 void 1762 pmap_reference(struct pmap *pmap) 1763 { 1764 if (pmap == NULL) 1765 return; 1766 1767 simple_lock(&pmap->pm_lock); 1768 pmap->pm_obj.uo_refs++; 1769 simple_unlock(&pmap->pm_lock); 1770 } 1771 1772 /* 1773 * void pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1774 * 1775 * Return the start and end addresses of the kernel's virtual space. 1776 * These values are setup in pmap_bootstrap and are updated as pages 1777 * are allocated. 1778 */ 1779 1780 void 1781 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1782 { 1783 *start = virtual_avail; 1784 *end = virtual_end; 1785 } 1786 1787 /* 1788 * Activate the address space for the specified process. If the process 1789 * is the current process, load the new MMU context. 1790 */ 1791 void 1792 pmap_activate(struct proc *p) 1793 { 1794 struct pmap *pmap = p->p_vmspace->vm_map.pmap; 1795 struct pcb *pcb = &p->p_addr->u_pcb; 1796 1797 (void) pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_pdir, 1798 (paddr_t *)&pcb->pcb_pagedir); 1799 1800 PDEBUG(0, printf("pmap_activate: p=%p pmap=%p pcb=%p pdir=%p l1=%p\n", 1801 p, pmap, pcb, pmap->pm_pdir, pcb->pcb_pagedir)); 1802 1803 if (p == curproc) { 1804 PDEBUG(0, printf("pmap_activate: setting TTB\n")); 1805 setttb((u_int)pcb->pcb_pagedir); 1806 } 1807 } 1808 1809 /* 1810 * Deactivate the address space of the specified process. 1811 */ 1812 void 1813 pmap_deactivate(struct proc *p) 1814 { 1815 } 1816 1817 /* 1818 * Perform any deferred pmap operations. 1819 */ 1820 void 1821 pmap_update(struct pmap *pmap) 1822 { 1823 1824 /* 1825 * We haven't deferred any pmap operations, but we do need to 1826 * make sure TLB/cache operations have completed. 1827 */ 1828 cpu_cpwait(); 1829 } 1830 1831 /* 1832 * pmap_clean_page() 1833 * 1834 * This is a local function used to work out the best strategy to clean 1835 * a single page referenced by its entry in the PV table. It's used by 1836 * pmap_copy_page, pmap_zero page and maybe some others later on. 1837 * 1838 * Its policy is effectively: 1839 * o If there are no mappings, we don't bother doing anything with the cache. 1840 * o If there is one mapping, we clean just that page. 1841 * o If there are multiple mappings, we clean the entire cache. 1842 * 1843 * So that some functions can be further optimised, it returns 0 if it didn't 1844 * clean the entire cache, or 1 if it did. 1845 * 1846 * XXX One bug in this routine is that if the pv_entry has a single page 1847 * mapped at 0x00000000 a whole cache clean will be performed rather than 1848 * just the 1 page. Since this should not occur in everyday use and if it does 1849 * it will just result in not the most efficient clean for the page. 1850 */ 1851 static int 1852 pmap_clean_page(struct pv_entry *pv, boolean_t is_src) 1853 { 1854 struct pmap *pmap; 1855 struct pv_entry *npv; 1856 int cache_needs_cleaning = 0; 1857 vaddr_t page_to_clean = 0; 1858 1859 if (pv == NULL) 1860 /* nothing mapped in so nothing to flush */ 1861 return (0); 1862 1863 /* Since we flush the cache each time we change curproc, we 1864 * only need to flush the page if it is in the current pmap. 1865 */ 1866 if (curproc) 1867 pmap = curproc->p_vmspace->vm_map.pmap; 1868 else 1869 pmap = pmap_kernel(); 1870 1871 for (npv = pv; npv; npv = npv->pv_next) { 1872 if (npv->pv_pmap == pmap) { 1873 /* The page is mapped non-cacheable in 1874 * this map. No need to flush the cache. 1875 */ 1876 if (npv->pv_flags & PVF_NC) { 1877 #ifdef DIAGNOSTIC 1878 if (cache_needs_cleaning) 1879 panic("pmap_clean_page: " 1880 "cache inconsistency"); 1881 #endif 1882 break; 1883 } 1884 #if 0 1885 /* 1886 * XXX Can't do this because pmap_protect doesn't 1887 * XXX clean the page when it does a write-protect. 1888 */ 1889 else if (is_src && (npv->pv_flags & PVF_WRITE) == 0) 1890 continue; 1891 #endif 1892 if (cache_needs_cleaning){ 1893 page_to_clean = 0; 1894 break; 1895 } 1896 else 1897 page_to_clean = npv->pv_va; 1898 cache_needs_cleaning = 1; 1899 } 1900 } 1901 1902 if (page_to_clean) 1903 cpu_idcache_wbinv_range(page_to_clean, NBPG); 1904 else if (cache_needs_cleaning) { 1905 cpu_idcache_wbinv_all(); 1906 return (1); 1907 } 1908 return (0); 1909 } 1910 1911 /* 1912 * pmap_zero_page() 1913 * 1914 * Zero a given physical page by mapping it at a page hook point. 1915 * In doing the zero page op, the page we zero is mapped cachable, as with 1916 * StrongARM accesses to non-cached pages are non-burst making writing 1917 * _any_ bulk data very slow. 1918 */ 1919 #if ARM_MMU_GENERIC == 1 1920 void 1921 pmap_zero_page_generic(paddr_t phys) 1922 { 1923 #ifdef DEBUG 1924 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1925 1926 if (pg->mdpage.pvh_list != NULL) 1927 panic("pmap_zero_page: page has mappings"); 1928 #endif 1929 1930 KDASSERT((phys & PGOFSET) == 0); 1931 1932 /* 1933 * Hook in the page, zero it, and purge the cache for that 1934 * zeroed page. Invalidate the TLB as needed. 1935 */ 1936 *cdst_pte = L2_S_PROTO | phys | 1937 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1938 cpu_tlb_flushD_SE(cdstp); 1939 cpu_cpwait(); 1940 bzero_page(cdstp); 1941 cpu_dcache_wbinv_range(cdstp, NBPG); 1942 } 1943 #endif /* ARM_MMU_GENERIC == 1 */ 1944 1945 #if ARM_MMU_XSCALE == 1 1946 void 1947 pmap_zero_page_xscale(paddr_t phys) 1948 { 1949 #ifdef DEBUG 1950 struct vm_page *pg = PHYS_TO_VM_PAGE(phys); 1951 1952 if (pg->mdpage.pvh_list != NULL) 1953 panic("pmap_zero_page: page has mappings"); 1954 #endif 1955 1956 KDASSERT((phys & PGOFSET) == 0); 1957 1958 /* 1959 * Hook in the page, zero it, and purge the cache for that 1960 * zeroed page. Invalidate the TLB as needed. 1961 */ 1962 *cdst_pte = L2_S_PROTO | phys | 1963 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 1964 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 1965 cpu_tlb_flushD_SE(cdstp); 1966 cpu_cpwait(); 1967 bzero_page(cdstp); 1968 xscale_cache_clean_minidata(); 1969 } 1970 #endif /* ARM_MMU_XSCALE == 1 */ 1971 1972 /* pmap_pageidlezero() 1973 * 1974 * The same as above, except that we assume that the page is not 1975 * mapped. This means we never have to flush the cache first. Called 1976 * from the idle loop. 1977 */ 1978 boolean_t 1979 pmap_pageidlezero(paddr_t phys) 1980 { 1981 int i, *ptr; 1982 boolean_t rv = TRUE; 1983 #ifdef DEBUG 1984 struct vm_page *pg; 1985 1986 pg = PHYS_TO_VM_PAGE(phys); 1987 if (pg->mdpage.pvh_list != NULL) 1988 panic("pmap_pageidlezero: page has mappings"); 1989 #endif 1990 1991 KDASSERT((phys & PGOFSET) == 0); 1992 1993 /* 1994 * Hook in the page, zero it, and purge the cache for that 1995 * zeroed page. Invalidate the TLB as needed. 1996 */ 1997 *cdst_pte = L2_S_PROTO | phys | 1998 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 1999 cpu_tlb_flushD_SE(cdstp); 2000 cpu_cpwait(); 2001 2002 for (i = 0, ptr = (int *)cdstp; 2003 i < (NBPG / sizeof(int)); i++) { 2004 if (sched_whichqs != 0) { 2005 /* 2006 * A process has become ready. Abort now, 2007 * so we don't keep it waiting while we 2008 * do slow memory access to finish this 2009 * page. 2010 */ 2011 rv = FALSE; 2012 break; 2013 } 2014 *ptr++ = 0; 2015 } 2016 2017 if (rv) 2018 /* 2019 * if we aborted we'll rezero this page again later so don't 2020 * purge it unless we finished it 2021 */ 2022 cpu_dcache_wbinv_range(cdstp, NBPG); 2023 return (rv); 2024 } 2025 2026 /* 2027 * pmap_copy_page() 2028 * 2029 * Copy one physical page into another, by mapping the pages into 2030 * hook points. The same comment regarding cachability as in 2031 * pmap_zero_page also applies here. 2032 */ 2033 #if ARM_MMU_GENERIC == 1 2034 void 2035 pmap_copy_page_generic(paddr_t src, paddr_t dst) 2036 { 2037 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 2038 #ifdef DEBUG 2039 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 2040 2041 if (dst_pg->mdpage.pvh_list != NULL) 2042 panic("pmap_copy_page: dst page has mappings"); 2043 #endif 2044 2045 KDASSERT((src & PGOFSET) == 0); 2046 KDASSERT((dst & PGOFSET) == 0); 2047 2048 /* 2049 * Clean the source page. Hold the source page's lock for 2050 * the duration of the copy so that no other mappings can 2051 * be created while we have a potentially aliased mapping. 2052 */ 2053 simple_lock(&src_pg->mdpage.pvh_slock); 2054 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2055 2056 /* 2057 * Map the pages into the page hook points, copy them, and purge 2058 * the cache for the appropriate page. Invalidate the TLB 2059 * as required. 2060 */ 2061 *csrc_pte = L2_S_PROTO | src | 2062 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 2063 *cdst_pte = L2_S_PROTO | dst | 2064 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode; 2065 cpu_tlb_flushD_SE(csrcp); 2066 cpu_tlb_flushD_SE(cdstp); 2067 cpu_cpwait(); 2068 bcopy_page(csrcp, cdstp); 2069 cpu_dcache_inv_range(csrcp, NBPG); 2070 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2071 cpu_dcache_wbinv_range(cdstp, NBPG); 2072 } 2073 #endif /* ARM_MMU_GENERIC == 1 */ 2074 2075 #if ARM_MMU_XSCALE == 1 2076 void 2077 pmap_copy_page_xscale(paddr_t src, paddr_t dst) 2078 { 2079 struct vm_page *src_pg = PHYS_TO_VM_PAGE(src); 2080 #ifdef DEBUG 2081 struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst); 2082 2083 if (dst_pg->mdpage.pvh_list != NULL) 2084 panic("pmap_copy_page: dst page has mappings"); 2085 #endif 2086 2087 KDASSERT((src & PGOFSET) == 0); 2088 KDASSERT((dst & PGOFSET) == 0); 2089 2090 /* 2091 * Clean the source page. Hold the source page's lock for 2092 * the duration of the copy so that no other mappings can 2093 * be created while we have a potentially aliased mapping. 2094 */ 2095 simple_lock(&src_pg->mdpage.pvh_slock); 2096 (void) pmap_clean_page(src_pg->mdpage.pvh_list, TRUE); 2097 2098 /* 2099 * Map the pages into the page hook points, copy them, and purge 2100 * the cache for the appropriate page. Invalidate the TLB 2101 * as required. 2102 */ 2103 *csrc_pte = L2_S_PROTO | src | 2104 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 2105 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2106 *cdst_pte = L2_S_PROTO | dst | 2107 L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | 2108 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */ 2109 cpu_tlb_flushD_SE(csrcp); 2110 cpu_tlb_flushD_SE(cdstp); 2111 cpu_cpwait(); 2112 bcopy_page(csrcp, cdstp); 2113 simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */ 2114 xscale_cache_clean_minidata(); 2115 } 2116 #endif /* ARM_MMU_XSCALE == 1 */ 2117 2118 #if 0 2119 void 2120 pmap_pte_addref(struct pmap *pmap, vaddr_t va) 2121 { 2122 pd_entry_t *pde; 2123 paddr_t pa; 2124 struct vm_page *m; 2125 2126 if (pmap == pmap_kernel()) 2127 return; 2128 2129 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2130 pa = pmap_pte_pa(pde); 2131 m = PHYS_TO_VM_PAGE(pa); 2132 ++m->wire_count; 2133 #ifdef MYCROFT_HACK 2134 printf("addref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2135 pmap, va, pde, pa, m, m->wire_count); 2136 #endif 2137 } 2138 2139 void 2140 pmap_pte_delref(struct pmap *pmap, vaddr_t va) 2141 { 2142 pd_entry_t *pde; 2143 paddr_t pa; 2144 struct vm_page *m; 2145 2146 if (pmap == pmap_kernel()) 2147 return; 2148 2149 pde = pmap_pde(pmap, va & ~(3 << L1_S_SHIFT)); 2150 pa = pmap_pte_pa(pde); 2151 m = PHYS_TO_VM_PAGE(pa); 2152 --m->wire_count; 2153 #ifdef MYCROFT_HACK 2154 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p wire=%d\n", 2155 pmap, va, pde, pa, m, m->wire_count); 2156 #endif 2157 if (m->wire_count == 0) { 2158 #ifdef MYCROFT_HACK 2159 printf("delref pmap=%p va=%08lx pde=%p pa=%08lx m=%p\n", 2160 pmap, va, pde, pa, m); 2161 #endif 2162 pmap_unmap_in_l1(pmap, va); 2163 uvm_pagefree(m); 2164 --pmap->pm_stats.resident_count; 2165 } 2166 } 2167 #else 2168 #define pmap_pte_addref(pmap, va) 2169 #define pmap_pte_delref(pmap, va) 2170 #endif 2171 2172 /* 2173 * Since we have a virtually indexed cache, we may need to inhibit caching if 2174 * there is more than one mapping and at least one of them is writable. 2175 * Since we purge the cache on every context switch, we only need to check for 2176 * other mappings within the same pmap, or kernel_pmap. 2177 * This function is also called when a page is unmapped, to possibly reenable 2178 * caching on any remaining mappings. 2179 * 2180 * The code implements the following logic, where: 2181 * 2182 * KW = # of kernel read/write pages 2183 * KR = # of kernel read only pages 2184 * UW = # of user read/write pages 2185 * UR = # of user read only pages 2186 * OW = # of user read/write pages in another pmap, then 2187 * 2188 * KC = kernel mapping is cacheable 2189 * UC = user mapping is cacheable 2190 * 2191 * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0 2192 * +--------------------------------------------- 2193 * UW=0,UR=0,OW=0 | --- KC=1 KC=1 KC=0 2194 * UW=0,UR>0,OW=0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0 2195 * UW=0,UR>0,OW>0 | UC=1 KC=0,UC=1 KC=0,UC=0 KC=0,UC=0 2196 * UW=1,UR=0,OW=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2197 * UW>1,UR>=0,OW>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0 2198 * 2199 * Note that the pmap must have it's ptes mapped in, and passed with ptes. 2200 */ 2201 __inline static void 2202 pmap_vac_me_harder(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2203 boolean_t clear_cache) 2204 { 2205 if (pmap == pmap_kernel()) 2206 pmap_vac_me_kpmap(pmap, pg, ptes, clear_cache); 2207 else 2208 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2209 } 2210 2211 static void 2212 pmap_vac_me_kpmap(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2213 boolean_t clear_cache) 2214 { 2215 int user_entries = 0; 2216 int user_writable = 0; 2217 int user_cacheable = 0; 2218 int kernel_entries = 0; 2219 int kernel_writable = 0; 2220 int kernel_cacheable = 0; 2221 struct pv_entry *pv; 2222 struct pmap *last_pmap = pmap; 2223 2224 #ifdef DIAGNOSTIC 2225 if (pmap != pmap_kernel()) 2226 panic("pmap_vac_me_kpmap: pmap != pmap_kernel()"); 2227 #endif 2228 2229 /* 2230 * Pass one, see if there are both kernel and user pmaps for 2231 * this page. Calculate whether there are user-writable or 2232 * kernel-writable pages. 2233 */ 2234 for (pv = pg->mdpage.pvh_list; pv != NULL; pv = pv->pv_next) { 2235 if (pv->pv_pmap != pmap) { 2236 user_entries++; 2237 if (pv->pv_flags & PVF_WRITE) 2238 user_writable++; 2239 if ((pv->pv_flags & PVF_NC) == 0) 2240 user_cacheable++; 2241 } else { 2242 kernel_entries++; 2243 if (pv->pv_flags & PVF_WRITE) 2244 kernel_writable++; 2245 if ((pv->pv_flags & PVF_NC) == 0) 2246 kernel_cacheable++; 2247 } 2248 } 2249 2250 /* 2251 * We know we have just been updating a kernel entry, so if 2252 * all user pages are already cacheable, then there is nothing 2253 * further to do. 2254 */ 2255 if (kernel_entries == 0 && 2256 user_cacheable == user_entries) 2257 return; 2258 2259 if (user_entries) { 2260 /* 2261 * Scan over the list again, for each entry, if it 2262 * might not be set correctly, call pmap_vac_me_user 2263 * to recalculate the settings. 2264 */ 2265 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 2266 /* 2267 * We know kernel mappings will get set 2268 * correctly in other calls. We also know 2269 * that if the pmap is the same as last_pmap 2270 * then we've just handled this entry. 2271 */ 2272 if (pv->pv_pmap == pmap || pv->pv_pmap == last_pmap) 2273 continue; 2274 /* 2275 * If there are kernel entries and this page 2276 * is writable but non-cacheable, then we can 2277 * skip this entry also. 2278 */ 2279 if (kernel_entries > 0 && 2280 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 2281 (PVF_NC | PVF_WRITE)) 2282 continue; 2283 /* 2284 * Similarly if there are no kernel-writable 2285 * entries and the page is already 2286 * read-only/cacheable. 2287 */ 2288 if (kernel_writable == 0 && 2289 (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0) 2290 continue; 2291 /* 2292 * For some of the remaining cases, we know 2293 * that we must recalculate, but for others we 2294 * can't tell if they are correct or not, so 2295 * we recalculate anyway. 2296 */ 2297 pmap_unmap_ptes(last_pmap); 2298 last_pmap = pv->pv_pmap; 2299 ptes = pmap_map_ptes(last_pmap); 2300 pmap_vac_me_user(last_pmap, pg, ptes, 2301 pmap_is_curpmap(last_pmap)); 2302 } 2303 /* Restore the pte mapping that was passed to us. */ 2304 if (last_pmap != pmap) { 2305 pmap_unmap_ptes(last_pmap); 2306 ptes = pmap_map_ptes(pmap); 2307 } 2308 if (kernel_entries == 0) 2309 return; 2310 } 2311 2312 pmap_vac_me_user(pmap, pg, ptes, clear_cache); 2313 return; 2314 } 2315 2316 static void 2317 pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes, 2318 boolean_t clear_cache) 2319 { 2320 struct pmap *kpmap = pmap_kernel(); 2321 struct pv_entry *pv, *npv; 2322 int entries = 0; 2323 int writable = 0; 2324 int cacheable_entries = 0; 2325 int kern_cacheable = 0; 2326 int other_writable = 0; 2327 2328 pv = pg->mdpage.pvh_list; 2329 KASSERT(ptes != NULL); 2330 2331 /* 2332 * Count mappings and writable mappings in this pmap. 2333 * Include kernel mappings as part of our own. 2334 * Keep a pointer to the first one. 2335 */ 2336 for (npv = pv; npv; npv = npv->pv_next) { 2337 /* Count mappings in the same pmap */ 2338 if (pmap == npv->pv_pmap || 2339 kpmap == npv->pv_pmap) { 2340 if (entries++ == 0) 2341 pv = npv; 2342 /* Cacheable mappings */ 2343 if ((npv->pv_flags & PVF_NC) == 0) { 2344 cacheable_entries++; 2345 if (kpmap == npv->pv_pmap) 2346 kern_cacheable++; 2347 } 2348 /* Writable mappings */ 2349 if (npv->pv_flags & PVF_WRITE) 2350 ++writable; 2351 } else if (npv->pv_flags & PVF_WRITE) 2352 other_writable = 1; 2353 } 2354 2355 PDEBUG(3,printf("pmap_vac_me_harder: pmap %p Entries %d, " 2356 "writable %d cacheable %d %s\n", pmap, entries, writable, 2357 cacheable_entries, clear_cache ? "clean" : "no clean")); 2358 2359 /* 2360 * Enable or disable caching as necessary. 2361 * Note: the first entry might be part of the kernel pmap, 2362 * so we can't assume this is indicative of the state of the 2363 * other (maybe non-kpmap) entries. 2364 */ 2365 if ((entries > 1 && writable) || 2366 (entries > 0 && pmap == kpmap && other_writable)) { 2367 if (cacheable_entries == 0) 2368 return; 2369 for (npv = pv; npv; npv = npv->pv_next) { 2370 if ((pmap == npv->pv_pmap 2371 || kpmap == npv->pv_pmap) && 2372 (npv->pv_flags & PVF_NC) == 0) { 2373 ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK; 2374 npv->pv_flags |= PVF_NC; 2375 /* 2376 * If this page needs flushing from the 2377 * cache, and we aren't going to do it 2378 * below, do it now. 2379 */ 2380 if ((cacheable_entries < 4 && 2381 (clear_cache || npv->pv_pmap == kpmap)) || 2382 (npv->pv_pmap == kpmap && 2383 !clear_cache && kern_cacheable < 4)) { 2384 cpu_idcache_wbinv_range(npv->pv_va, 2385 NBPG); 2386 cpu_tlb_flushID_SE(npv->pv_va); 2387 } 2388 } 2389 } 2390 if ((clear_cache && cacheable_entries >= 4) || 2391 kern_cacheable >= 4) { 2392 cpu_idcache_wbinv_all(); 2393 cpu_tlb_flushID(); 2394 } 2395 cpu_cpwait(); 2396 } else if (entries > 0) { 2397 /* 2398 * Turn cacheing back on for some pages. If it is a kernel 2399 * page, only do so if there are no other writable pages. 2400 */ 2401 for (npv = pv; npv; npv = npv->pv_next) { 2402 if ((pmap == npv->pv_pmap || 2403 (kpmap == npv->pv_pmap && other_writable == 0)) && 2404 (npv->pv_flags & PVF_NC)) { 2405 ptes[arm_btop(npv->pv_va)] |= 2406 pte_l2_s_cache_mode; 2407 npv->pv_flags &= ~PVF_NC; 2408 } 2409 } 2410 } 2411 } 2412 2413 /* 2414 * pmap_remove() 2415 * 2416 * pmap_remove is responsible for nuking a number of mappings for a range 2417 * of virtual address space in the current pmap. To do this efficiently 2418 * is interesting, because in a number of cases a wide virtual address 2419 * range may be supplied that contains few actual mappings. So, the 2420 * optimisations are: 2421 * 1. Try and skip over hunks of address space for which an L1 entry 2422 * does not exist. 2423 * 2. Build up a list of pages we've hit, up to a maximum, so we can 2424 * maybe do just a partial cache clean. This path of execution is 2425 * complicated by the fact that the cache must be flushed _before_ 2426 * the PTE is nuked, being a VAC :-) 2427 * 3. Maybe later fast-case a single page, but I don't think this is 2428 * going to make _that_ much difference overall. 2429 */ 2430 2431 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3 2432 2433 void 2434 pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva) 2435 { 2436 int cleanlist_idx = 0; 2437 struct pagelist { 2438 vaddr_t va; 2439 pt_entry_t *pte; 2440 } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE]; 2441 pt_entry_t *pte = 0, *ptes; 2442 paddr_t pa; 2443 int pmap_active; 2444 struct vm_page *pg; 2445 2446 /* Exit quick if there is no pmap */ 2447 if (!pmap) 2448 return; 2449 2450 PDEBUG(0, printf("pmap_remove: pmap=%p sva=%08lx eva=%08lx\n", 2451 pmap, sva, eva)); 2452 2453 /* 2454 * we lock in the pmap => vm_page direction 2455 */ 2456 PMAP_MAP_TO_HEAD_LOCK(); 2457 2458 ptes = pmap_map_ptes(pmap); 2459 /* Get a page table pointer */ 2460 while (sva < eva) { 2461 if (pmap_pde_page(pmap_pde(pmap, sva))) 2462 break; 2463 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2464 } 2465 2466 pte = &ptes[arm_btop(sva)]; 2467 /* Note if the pmap is active thus require cache and tlb cleans */ 2468 pmap_active = pmap_is_curpmap(pmap); 2469 2470 /* Now loop along */ 2471 while (sva < eva) { 2472 /* Check if we can move to the next PDE (l1 chunk) */ 2473 if (!(sva & L2_ADDR_BITS)) 2474 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2475 sva += L1_S_SIZE; 2476 pte += arm_btop(L1_S_SIZE); 2477 continue; 2478 } 2479 2480 /* We've found a valid PTE, so this page of PTEs has to go. */ 2481 if (pmap_pte_v(pte)) { 2482 /* Update statistics */ 2483 --pmap->pm_stats.resident_count; 2484 2485 /* 2486 * Add this page to our cache remove list, if we can. 2487 * If, however the cache remove list is totally full, 2488 * then do a complete cache invalidation taking note 2489 * to backtrack the PTE table beforehand, and ignore 2490 * the lists in future because there's no longer any 2491 * point in bothering with them (we've paid the 2492 * penalty, so will carry on unhindered). Otherwise, 2493 * when we fall out, we just clean the list. 2494 */ 2495 PDEBUG(10, printf("remove: inv pte at %p(%x) ", pte, *pte)); 2496 pa = pmap_pte_pa(pte); 2497 2498 if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) { 2499 /* Add to the clean list. */ 2500 cleanlist[cleanlist_idx].pte = pte; 2501 cleanlist[cleanlist_idx].va = sva; 2502 cleanlist_idx++; 2503 } else if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) { 2504 int cnt; 2505 2506 /* Nuke everything if needed. */ 2507 if (pmap_active) { 2508 cpu_idcache_wbinv_all(); 2509 cpu_tlb_flushID(); 2510 } 2511 2512 /* 2513 * Roll back the previous PTE list, 2514 * and zero out the current PTE. 2515 */ 2516 for (cnt = 0; cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) { 2517 *cleanlist[cnt].pte = 0; 2518 pmap_pte_delref(pmap, cleanlist[cnt].va); 2519 } 2520 *pte = 0; 2521 pmap_pte_delref(pmap, sva); 2522 cleanlist_idx++; 2523 } else { 2524 /* 2525 * We've already nuked the cache and 2526 * TLB, so just carry on regardless, 2527 * and we won't need to do it again 2528 */ 2529 *pte = 0; 2530 pmap_pte_delref(pmap, sva); 2531 } 2532 2533 /* 2534 * Update flags. In a number of circumstances, 2535 * we could cluster a lot of these and do a 2536 * number of sequential pages in one go. 2537 */ 2538 if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) { 2539 struct pv_entry *pve; 2540 simple_lock(&pg->mdpage.pvh_slock); 2541 pve = pmap_remove_pv(pg, pmap, sva); 2542 pmap_free_pv(pmap, pve); 2543 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2544 simple_unlock(&pg->mdpage.pvh_slock); 2545 } 2546 } 2547 sva += NBPG; 2548 pte++; 2549 } 2550 2551 pmap_unmap_ptes(pmap); 2552 /* 2553 * Now, if we've fallen through down to here, chances are that there 2554 * are less than PMAP_REMOVE_CLEAN_LIST_SIZE mappings left. 2555 */ 2556 if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) { 2557 u_int cnt; 2558 2559 for (cnt = 0; cnt < cleanlist_idx; cnt++) { 2560 if (pmap_active) { 2561 cpu_idcache_wbinv_range(cleanlist[cnt].va, 2562 NBPG); 2563 *cleanlist[cnt].pte = 0; 2564 cpu_tlb_flushID_SE(cleanlist[cnt].va); 2565 } else 2566 *cleanlist[cnt].pte = 0; 2567 pmap_pte_delref(pmap, cleanlist[cnt].va); 2568 } 2569 } 2570 PMAP_MAP_TO_HEAD_UNLOCK(); 2571 } 2572 2573 /* 2574 * Routine: pmap_remove_all 2575 * Function: 2576 * Removes this physical page from 2577 * all physical maps in which it resides. 2578 * Reflects back modify bits to the pager. 2579 */ 2580 2581 static void 2582 pmap_remove_all(struct vm_page *pg) 2583 { 2584 struct pv_entry *pv, *npv; 2585 struct pmap *pmap; 2586 pt_entry_t *pte, *ptes; 2587 2588 PDEBUG(0, printf("pmap_remove_all: pa=%lx ", VM_PAGE_TO_PHYS(pg))); 2589 2590 /* set vm_page => pmap locking */ 2591 PMAP_HEAD_TO_MAP_LOCK(); 2592 2593 simple_lock(&pg->mdpage.pvh_slock); 2594 2595 pv = pg->mdpage.pvh_list; 2596 if (pv == NULL) { 2597 PDEBUG(0, printf("free page\n")); 2598 simple_unlock(&pg->mdpage.pvh_slock); 2599 PMAP_HEAD_TO_MAP_UNLOCK(); 2600 return; 2601 } 2602 pmap_clean_page(pv, FALSE); 2603 2604 while (pv) { 2605 pmap = pv->pv_pmap; 2606 ptes = pmap_map_ptes(pmap); 2607 pte = &ptes[arm_btop(pv->pv_va)]; 2608 2609 PDEBUG(0, printf("[%p,%08x,%08lx,%08x] ", pmap, *pte, 2610 pv->pv_va, pv->pv_flags)); 2611 #ifdef DEBUG 2612 if (pmap_pde_page(pmap_pde(pmap, pv->pv_va)) == 0 || 2613 pmap_pte_v(pte) == 0 || 2614 pmap_pte_pa(pte) != VM_PAGE_TO_PHYS(pg)) 2615 panic("pmap_remove_all: bad mapping"); 2616 #endif /* DEBUG */ 2617 2618 /* 2619 * Update statistics 2620 */ 2621 --pmap->pm_stats.resident_count; 2622 2623 /* Wired bit */ 2624 if (pv->pv_flags & PVF_WIRED) 2625 --pmap->pm_stats.wired_count; 2626 2627 /* 2628 * Invalidate the PTEs. 2629 * XXX: should cluster them up and invalidate as many 2630 * as possible at once. 2631 */ 2632 2633 #ifdef needednotdone 2634 reduce wiring count on page table pages as references drop 2635 #endif 2636 2637 *pte = 0; 2638 pmap_pte_delref(pmap, pv->pv_va); 2639 2640 npv = pv->pv_next; 2641 pmap_free_pv(pmap, pv); 2642 pv = npv; 2643 pmap_unmap_ptes(pmap); 2644 } 2645 pg->mdpage.pvh_list = NULL; 2646 simple_unlock(&pg->mdpage.pvh_slock); 2647 PMAP_HEAD_TO_MAP_UNLOCK(); 2648 2649 PDEBUG(0, printf("done\n")); 2650 cpu_tlb_flushID(); 2651 cpu_cpwait(); 2652 } 2653 2654 2655 /* 2656 * Set the physical protection on the specified range of this map as requested. 2657 */ 2658 2659 void 2660 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 2661 { 2662 pt_entry_t *pte = NULL, *ptes; 2663 struct vm_page *pg; 2664 int flush = 0; 2665 2666 PDEBUG(0, printf("pmap_protect: pmap=%p %08lx->%08lx %x\n", 2667 pmap, sva, eva, prot)); 2668 2669 if (~prot & VM_PROT_READ) { 2670 /* 2671 * Just remove the mappings. pmap_update() is not required 2672 * here since the caller should do it. 2673 */ 2674 pmap_remove(pmap, sva, eva); 2675 return; 2676 } 2677 if (prot & VM_PROT_WRITE) { 2678 /* 2679 * If this is a read->write transition, just ignore it and let 2680 * uvm_fault() take care of it later. 2681 */ 2682 return; 2683 } 2684 2685 /* Need to lock map->head */ 2686 PMAP_MAP_TO_HEAD_LOCK(); 2687 2688 ptes = pmap_map_ptes(pmap); 2689 2690 /* 2691 * OK, at this point, we know we're doing write-protect operation. 2692 * If the pmap is active, write-back the range. 2693 */ 2694 if (pmap_is_curpmap(pmap)) 2695 cpu_dcache_wb_range(sva, eva - sva); 2696 2697 /* 2698 * We need to acquire a pointer to a page table page before entering 2699 * the following loop. 2700 */ 2701 while (sva < eva) { 2702 if (pmap_pde_page(pmap_pde(pmap, sva))) 2703 break; 2704 sva = (sva & L1_S_FRAME) + L1_S_SIZE; 2705 } 2706 2707 pte = &ptes[arm_btop(sva)]; 2708 2709 while (sva < eva) { 2710 /* only check once in a while */ 2711 if ((sva & L2_ADDR_BITS) == 0) { 2712 if (!pmap_pde_page(pmap_pde(pmap, sva))) { 2713 /* We can race ahead here, to the next pde. */ 2714 sva += L1_S_SIZE; 2715 pte += arm_btop(L1_S_SIZE); 2716 continue; 2717 } 2718 } 2719 2720 if (!pmap_pte_v(pte)) 2721 goto next; 2722 2723 flush = 1; 2724 2725 *pte &= ~L2_S_PROT_W; /* clear write bit */ 2726 2727 /* Clear write flag */ 2728 if ((pg = PHYS_TO_VM_PAGE(pmap_pte_pa(pte))) != NULL) { 2729 simple_lock(&pg->mdpage.pvh_slock); 2730 (void) pmap_modify_pv(pmap, sva, pg, PVF_WRITE, 0); 2731 pmap_vac_me_harder(pmap, pg, ptes, FALSE); 2732 simple_unlock(&pg->mdpage.pvh_slock); 2733 } 2734 2735 next: 2736 sva += NBPG; 2737 pte++; 2738 } 2739 pmap_unmap_ptes(pmap); 2740 PMAP_MAP_TO_HEAD_UNLOCK(); 2741 if (flush) 2742 cpu_tlb_flushID(); 2743 } 2744 2745 /* 2746 * void pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2747 * int flags) 2748 * 2749 * Insert the given physical page (p) at 2750 * the specified virtual address (v) in the 2751 * target physical map with the protection requested. 2752 * 2753 * If specified, the page will be wired down, meaning 2754 * that the related pte can not be reclaimed. 2755 * 2756 * NB: This is the only routine which MAY NOT lazy-evaluate 2757 * or lose information. That is, this routine must actually 2758 * insert this page into the given map NOW. 2759 */ 2760 2761 int 2762 pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot, 2763 int flags) 2764 { 2765 pt_entry_t *ptes, opte, npte; 2766 paddr_t opa; 2767 boolean_t wired = (flags & PMAP_WIRED) != 0; 2768 struct vm_page *pg; 2769 struct pv_entry *pve; 2770 int error, nflags; 2771 2772 PDEBUG(5, printf("pmap_enter: V%08lx P%08lx in pmap %p prot=%08x, wired = %d\n", 2773 va, pa, pmap, prot, wired)); 2774 2775 #ifdef DIAGNOSTIC 2776 /* Valid address ? */ 2777 if (va >= (pmap_curmaxkvaddr)) 2778 panic("pmap_enter: too big"); 2779 if (pmap != pmap_kernel() && va != 0) { 2780 if (va < VM_MIN_ADDRESS || va >= VM_MAXUSER_ADDRESS) 2781 panic("pmap_enter: kernel page in user map"); 2782 } else { 2783 if (va >= VM_MIN_ADDRESS && va < VM_MAXUSER_ADDRESS) 2784 panic("pmap_enter: user page in kernel map"); 2785 if (va >= VM_MAXUSER_ADDRESS && va < VM_MAX_ADDRESS) 2786 panic("pmap_enter: entering PT page"); 2787 } 2788 #endif 2789 2790 KDASSERT(((va | pa) & PGOFSET) == 0); 2791 2792 /* 2793 * Get a pointer to the page. Later on in this function, we 2794 * test for a managed page by checking pg != NULL. 2795 */ 2796 pg = pmap_initialized ? PHYS_TO_VM_PAGE(pa) : NULL; 2797 2798 /* get lock */ 2799 PMAP_MAP_TO_HEAD_LOCK(); 2800 2801 /* 2802 * map the ptes. If there's not already an L2 table for this 2803 * address, allocate one. 2804 */ 2805 ptes = pmap_map_ptes(pmap); /* locks pmap */ 2806 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 2807 struct vm_page *ptp; 2808 2809 /* kernel should be pre-grown */ 2810 KASSERT(pmap != pmap_kernel()); 2811 2812 /* if failure is allowed then don't try too hard */ 2813 ptp = pmap_get_ptp(pmap, va & L1_S_FRAME); 2814 if (ptp == NULL) { 2815 if (flags & PMAP_CANFAIL) { 2816 error = ENOMEM; 2817 goto out; 2818 } 2819 panic("pmap_enter: get ptp failed"); 2820 } 2821 } 2822 opte = ptes[arm_btop(va)]; 2823 2824 nflags = 0; 2825 if (prot & VM_PROT_WRITE) 2826 nflags |= PVF_WRITE; 2827 if (wired) 2828 nflags |= PVF_WIRED; 2829 2830 /* Is the pte valid ? If so then this page is already mapped */ 2831 if (l2pte_valid(opte)) { 2832 /* Get the physical address of the current page mapped */ 2833 opa = l2pte_pa(opte); 2834 2835 /* Are we mapping the same page ? */ 2836 if (opa == pa) { 2837 /* Has the wiring changed ? */ 2838 if (pg != NULL) { 2839 simple_lock(&pg->mdpage.pvh_slock); 2840 (void) pmap_modify_pv(pmap, va, pg, 2841 PVF_WRITE | PVF_WIRED, nflags); 2842 simple_unlock(&pg->mdpage.pvh_slock); 2843 } 2844 } else { 2845 struct vm_page *opg; 2846 2847 /* We are replacing the page with a new one. */ 2848 cpu_idcache_wbinv_range(va, NBPG); 2849 2850 /* 2851 * If it is part of our managed memory then we 2852 * must remove it from the PV list 2853 */ 2854 if ((opg = PHYS_TO_VM_PAGE(opa)) != NULL) { 2855 simple_lock(&opg->mdpage.pvh_slock); 2856 pve = pmap_remove_pv(opg, pmap, va); 2857 simple_unlock(&opg->mdpage.pvh_slock); 2858 } else { 2859 pve = NULL; 2860 } 2861 2862 goto enter; 2863 } 2864 } else { 2865 opa = 0; 2866 pve = NULL; 2867 pmap_pte_addref(pmap, va); 2868 2869 /* pte is not valid so we must be hooking in a new page */ 2870 ++pmap->pm_stats.resident_count; 2871 2872 enter: 2873 /* 2874 * Enter on the PV list if part of our managed memory 2875 */ 2876 if (pg != NULL) { 2877 if (pve == NULL) { 2878 pve = pmap_alloc_pv(pmap, ALLOCPV_NEED); 2879 if (pve == NULL) { 2880 if (flags & PMAP_CANFAIL) { 2881 error = ENOMEM; 2882 goto out; 2883 } 2884 panic("pmap_enter: no pv entries " 2885 "available"); 2886 } 2887 } 2888 /* enter_pv locks pvh when adding */ 2889 pmap_enter_pv(pg, pve, pmap, va, NULL, nflags); 2890 } else { 2891 if (pve != NULL) 2892 pmap_free_pv(pmap, pve); 2893 } 2894 } 2895 2896 /* Construct the pte, giving the correct access. */ 2897 npte = pa; 2898 2899 /* VA 0 is magic. */ 2900 if (pmap != pmap_kernel() && va != vector_page) 2901 npte |= L2_S_PROT_U; 2902 2903 if (pg != NULL) { 2904 #ifdef DIAGNOSTIC 2905 if ((flags & VM_PROT_ALL) & ~prot) 2906 panic("pmap_enter: access_type exceeds prot"); 2907 #endif 2908 npte |= pte_l2_s_cache_mode; 2909 if (flags & VM_PROT_WRITE) { 2910 npte |= L2_S_PROTO | L2_S_PROT_W; 2911 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 2912 } else if (flags & VM_PROT_ALL) { 2913 npte |= L2_S_PROTO; 2914 pg->mdpage.pvh_attrs |= PVF_REF; 2915 } else 2916 npte |= L2_TYPE_INV; 2917 } else { 2918 if (prot & VM_PROT_WRITE) 2919 npte |= L2_S_PROTO | L2_S_PROT_W; 2920 else if (prot & VM_PROT_ALL) 2921 npte |= L2_S_PROTO; 2922 else 2923 npte |= L2_TYPE_INV; 2924 } 2925 2926 ptes[arm_btop(va)] = npte; 2927 2928 if (pg != NULL) { 2929 simple_lock(&pg->mdpage.pvh_slock); 2930 pmap_vac_me_harder(pmap, pg, ptes, pmap_is_curpmap(pmap)); 2931 simple_unlock(&pg->mdpage.pvh_slock); 2932 } 2933 2934 /* Better flush the TLB ... */ 2935 cpu_tlb_flushID_SE(va); 2936 error = 0; 2937 out: 2938 pmap_unmap_ptes(pmap); /* unlocks pmap */ 2939 PMAP_MAP_TO_HEAD_UNLOCK(); 2940 2941 return error; 2942 } 2943 2944 /* 2945 * pmap_kenter_pa: enter a kernel mapping 2946 * 2947 * => no need to lock anything assume va is already allocated 2948 * => should be faster than normal pmap enter function 2949 */ 2950 void 2951 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2952 { 2953 pt_entry_t *pte; 2954 2955 pte = vtopte(va); 2956 KASSERT(!pmap_pte_v(pte)); 2957 2958 #ifdef PMAP_ALIAS_DEBUG 2959 { 2960 struct vm_page *pg; 2961 int s; 2962 2963 pg = PHYS_TO_VM_PAGE(pa); 2964 if (pg != NULL) { 2965 s = splhigh(); 2966 if (pg->mdpage.ro_mappings == 0 && 2967 pg->mdpage.rw_mappings == 0 && 2968 pg->mdpage.kro_mappings == 0 && 2969 pg->mdpage.krw_mappings == 0) { 2970 /* This case is okay. */ 2971 } else if (pg->mdpage.rw_mappings == 0 && 2972 pg->mdpage.krw_mappings == 0 && 2973 (prot & VM_PROT_WRITE) == 0) { 2974 /* This case is okay. */ 2975 } else { 2976 /* Something is awry. */ 2977 printf("pmap_kenter_pa: ro %u, rw %u, kro %u, krw %u " 2978 "prot 0x%x\n", pg->mdpage.ro_mappings, 2979 pg->mdpage.rw_mappings, pg->mdpage.kro_mappings, 2980 pg->mdpage.krw_mappings, prot); 2981 Debugger(); 2982 } 2983 if (prot & VM_PROT_WRITE) 2984 pg->mdpage.krw_mappings++; 2985 else 2986 pg->mdpage.kro_mappings++; 2987 splx(s); 2988 } 2989 } 2990 #endif /* PMAP_ALIAS_DEBUG */ 2991 2992 *pte = L2_S_PROTO | pa | 2993 L2_S_PROT(PTE_KERNEL, prot) | pte_l2_s_cache_mode; 2994 } 2995 2996 void 2997 pmap_kremove(vaddr_t va, vsize_t len) 2998 { 2999 pt_entry_t *pte; 3000 3001 for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) { 3002 3003 /* 3004 * We assume that we will only be called with small 3005 * regions of memory. 3006 */ 3007 3008 KASSERT(pmap_pde_page(pmap_pde(pmap_kernel(), va))); 3009 pte = vtopte(va); 3010 #ifdef PMAP_ALIAS_DEBUG 3011 { 3012 struct vm_page *pg; 3013 int s; 3014 3015 if ((*pte & L2_TYPE_MASK) != L2_TYPE_INV && 3016 (pg = PHYS_TO_VM_PAGE(*pte & L2_S_FRAME)) != NULL) { 3017 s = splhigh(); 3018 if (*pte & L2_S_PROT_W) { 3019 KASSERT(pg->mdpage.krw_mappings != 0); 3020 pg->mdpage.krw_mappings--; 3021 } else { 3022 KASSERT(pg->mdpage.kro_mappings != 0); 3023 pg->mdpage.kro_mappings--; 3024 } 3025 splx(s); 3026 } 3027 } 3028 #endif /* PMAP_ALIAS_DEBUG */ 3029 cpu_idcache_wbinv_range(va, PAGE_SIZE); 3030 *pte = 0; 3031 cpu_tlb_flushID_SE(va); 3032 } 3033 } 3034 3035 /* 3036 * pmap_page_protect: 3037 * 3038 * Lower the permission for all mappings to a given page. 3039 */ 3040 3041 void 3042 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 3043 { 3044 3045 PDEBUG(0, printf("pmap_page_protect(pa=%lx, prot=%d)\n", 3046 VM_PAGE_TO_PHYS(pg), prot)); 3047 3048 switch(prot) { 3049 case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE: 3050 case VM_PROT_READ|VM_PROT_WRITE: 3051 return; 3052 3053 case VM_PROT_READ: 3054 case VM_PROT_READ|VM_PROT_EXECUTE: 3055 pmap_clearbit(pg, PVF_WRITE); 3056 break; 3057 3058 default: 3059 pmap_remove_all(pg); 3060 break; 3061 } 3062 } 3063 3064 3065 /* 3066 * Routine: pmap_unwire 3067 * Function: Clear the wired attribute for a map/virtual-address 3068 * pair. 3069 * In/out conditions: 3070 * The mapping must already exist in the pmap. 3071 */ 3072 3073 void 3074 pmap_unwire(struct pmap *pmap, vaddr_t va) 3075 { 3076 pt_entry_t *ptes; 3077 struct vm_page *pg; 3078 paddr_t pa; 3079 3080 PMAP_MAP_TO_HEAD_LOCK(); 3081 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3082 3083 if (pmap_pde_v(pmap_pde(pmap, va))) { 3084 #ifdef DIAGNOSTIC 3085 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3086 panic("pmap_unwire: invalid L2 PTE"); 3087 #endif 3088 /* Extract the physical address of the page */ 3089 pa = l2pte_pa(ptes[arm_btop(va)]); 3090 3091 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3092 goto out; 3093 3094 /* Update the wired bit in the pv entry for this page. */ 3095 simple_lock(&pg->mdpage.pvh_slock); 3096 (void) pmap_modify_pv(pmap, va, pg, PVF_WIRED, 0); 3097 simple_unlock(&pg->mdpage.pvh_slock); 3098 } 3099 #ifdef DIAGNOSTIC 3100 else { 3101 panic("pmap_unwire: invalid L1 PTE"); 3102 } 3103 #endif 3104 out: 3105 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3106 PMAP_MAP_TO_HEAD_UNLOCK(); 3107 } 3108 3109 /* 3110 * Routine: pmap_extract 3111 * Function: 3112 * Extract the physical page address associated 3113 * with the given map/virtual_address pair. 3114 */ 3115 boolean_t 3116 pmap_extract(struct pmap *pmap, vaddr_t va, paddr_t *pap) 3117 { 3118 pd_entry_t *pde; 3119 pt_entry_t *pte, *ptes; 3120 paddr_t pa; 3121 3122 PDEBUG(5, printf("pmap_extract: pmap=%p, va=0x%08lx -> ", pmap, va)); 3123 3124 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3125 3126 pde = pmap_pde(pmap, va); 3127 pte = &ptes[arm_btop(va)]; 3128 3129 if (pmap_pde_section(pde)) { 3130 pa = (*pde & L1_S_FRAME) | (va & L1_S_OFFSET); 3131 PDEBUG(5, printf("section pa=0x%08lx\n", pa)); 3132 goto out; 3133 } else if (pmap_pde_page(pde) == 0 || pmap_pte_v(pte) == 0) { 3134 PDEBUG(5, printf("no mapping\n")); 3135 goto failed; 3136 } 3137 3138 if ((*pte & L2_TYPE_MASK) == L2_TYPE_L) { 3139 pa = (*pte & L2_L_FRAME) | (va & L2_L_OFFSET); 3140 PDEBUG(5, printf("large page pa=0x%08lx\n", pa)); 3141 goto out; 3142 } 3143 3144 pa = (*pte & L2_S_FRAME) | (va & L2_S_OFFSET); 3145 PDEBUG(5, printf("small page pa=0x%08lx\n", pa)); 3146 3147 out: 3148 if (pap != NULL) 3149 *pap = pa; 3150 3151 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3152 return (TRUE); 3153 3154 failed: 3155 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3156 return (FALSE); 3157 } 3158 3159 3160 /* 3161 * pmap_copy: 3162 * 3163 * Copy the range specified by src_addr/len from the source map to the 3164 * range dst_addr/len in the destination map. 3165 * 3166 * This routine is only advisory and need not do anything. 3167 */ 3168 /* Call deleted in <arm/arm32/pmap.h> */ 3169 3170 #if defined(PMAP_DEBUG) 3171 void 3172 pmap_dump_pvlist(phys, m) 3173 vaddr_t phys; 3174 char *m; 3175 { 3176 struct vm_page *pg; 3177 struct pv_entry *pv; 3178 3179 if ((pg = PHYS_TO_VM_PAGE(phys)) == NULL) { 3180 printf("INVALID PA\n"); 3181 return; 3182 } 3183 simple_lock(&pg->mdpage.pvh_slock); 3184 printf("%s %08lx:", m, phys); 3185 if (pg->mdpage.pvh_list == NULL) { 3186 simple_unlock(&pg->mdpage.pvh_slock); 3187 printf(" no mappings\n"); 3188 return; 3189 } 3190 3191 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) 3192 printf(" pmap %p va %08lx flags %08x", pv->pv_pmap, 3193 pv->pv_va, pv->pv_flags); 3194 3195 printf("\n"); 3196 simple_unlock(&pg->mdpage.pvh_slock); 3197 } 3198 3199 #endif /* PMAP_DEBUG */ 3200 3201 static pt_entry_t * 3202 pmap_map_ptes(struct pmap *pmap) 3203 { 3204 struct proc *p; 3205 3206 /* the kernel's pmap is always accessible */ 3207 if (pmap == pmap_kernel()) { 3208 return (pt_entry_t *)PTE_BASE; 3209 } 3210 3211 if (pmap_is_curpmap(pmap)) { 3212 simple_lock(&pmap->pm_obj.vmobjlock); 3213 return (pt_entry_t *)PTE_BASE; 3214 } 3215 3216 p = curproc; 3217 KDASSERT(p != NULL); 3218 3219 /* need to lock both curpmap and pmap: use ordered locking */ 3220 if ((vaddr_t) pmap < (vaddr_t) p->p_vmspace->vm_map.pmap) { 3221 simple_lock(&pmap->pm_obj.vmobjlock); 3222 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3223 } else { 3224 simple_lock(&p->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3225 simple_lock(&pmap->pm_obj.vmobjlock); 3226 } 3227 3228 pmap_map_in_l1(p->p_vmspace->vm_map.pmap, APTE_BASE, pmap->pm_pptpt, 3229 FALSE); 3230 cpu_tlb_flushD(); 3231 cpu_cpwait(); 3232 return (pt_entry_t *)APTE_BASE; 3233 } 3234 3235 /* 3236 * pmap_unmap_ptes: unlock the PTE mapping of "pmap" 3237 */ 3238 3239 static void 3240 pmap_unmap_ptes(struct pmap *pmap) 3241 { 3242 3243 if (pmap == pmap_kernel()) { 3244 return; 3245 } 3246 if (pmap_is_curpmap(pmap)) { 3247 simple_unlock(&pmap->pm_obj.vmobjlock); 3248 } else { 3249 KDASSERT(curproc != NULL); 3250 simple_unlock(&pmap->pm_obj.vmobjlock); 3251 simple_unlock( 3252 &curproc->p_vmspace->vm_map.pmap->pm_obj.vmobjlock); 3253 } 3254 } 3255 3256 /* 3257 * Modify pte bits for all ptes corresponding to the given physical address. 3258 * We use `maskbits' rather than `clearbits' because we're always passing 3259 * constants and the latter would require an extra inversion at run-time. 3260 */ 3261 3262 static void 3263 pmap_clearbit(struct vm_page *pg, u_int maskbits) 3264 { 3265 struct pv_entry *pv; 3266 pt_entry_t *ptes; 3267 vaddr_t va; 3268 int tlbentry; 3269 3270 PDEBUG(1, printf("pmap_clearbit: pa=%08lx mask=%08x\n", 3271 VM_PAGE_TO_PHYS(pg), maskbits)); 3272 3273 tlbentry = 0; 3274 3275 PMAP_HEAD_TO_MAP_LOCK(); 3276 simple_lock(&pg->mdpage.pvh_slock); 3277 3278 /* 3279 * Clear saved attributes (modify, reference) 3280 */ 3281 pg->mdpage.pvh_attrs &= ~maskbits; 3282 3283 if (pg->mdpage.pvh_list == NULL) { 3284 simple_unlock(&pg->mdpage.pvh_slock); 3285 PMAP_HEAD_TO_MAP_UNLOCK(); 3286 return; 3287 } 3288 3289 /* 3290 * Loop over all current mappings setting/clearing as appropos 3291 */ 3292 for (pv = pg->mdpage.pvh_list; pv; pv = pv->pv_next) { 3293 #ifdef PMAP_ALIAS_DEBUG 3294 { 3295 int s = splhigh(); 3296 if ((maskbits & PVF_WRITE) != 0 && 3297 (pv->pv_flags & PVF_WRITE) != 0) { 3298 KASSERT(pg->mdpage.rw_mappings != 0); 3299 pg->mdpage.rw_mappings--; 3300 pg->mdpage.ro_mappings++; 3301 } 3302 splx(s); 3303 } 3304 #endif /* PMAP_ALIAS_DEBUG */ 3305 va = pv->pv_va; 3306 pv->pv_flags &= ~maskbits; 3307 ptes = pmap_map_ptes(pv->pv_pmap); /* locks pmap */ 3308 KASSERT(pmap_pde_v(pmap_pde(pv->pv_pmap, va))); 3309 if (maskbits & (PVF_WRITE|PVF_MOD)) { 3310 if ((pv->pv_flags & PVF_NC)) { 3311 /* 3312 * Entry is not cacheable: reenable 3313 * the cache, nothing to flush 3314 * 3315 * Don't turn caching on again if this 3316 * is a modified emulation. This 3317 * would be inconsitent with the 3318 * settings created by 3319 * pmap_vac_me_harder(). 3320 * 3321 * There's no need to call 3322 * pmap_vac_me_harder() here: all 3323 * pages are loosing their write 3324 * permission. 3325 * 3326 */ 3327 if (maskbits & PVF_WRITE) { 3328 ptes[arm_btop(va)] |= 3329 pte_l2_s_cache_mode; 3330 pv->pv_flags &= ~PVF_NC; 3331 } 3332 } else if (pmap_is_curpmap(pv->pv_pmap)) { 3333 /* 3334 * Entry is cacheable: check if pmap is 3335 * current if it is flush it, 3336 * otherwise it won't be in the cache 3337 */ 3338 cpu_idcache_wbinv_range(pv->pv_va, NBPG); 3339 } 3340 3341 /* make the pte read only */ 3342 ptes[arm_btop(va)] &= ~L2_S_PROT_W; 3343 } 3344 3345 if (maskbits & PVF_REF) 3346 ptes[arm_btop(va)] = 3347 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_TYPE_INV; 3348 3349 if (pmap_is_curpmap(pv->pv_pmap)) { 3350 /* 3351 * if we had cacheable pte's we'd clean the 3352 * pte out to memory here 3353 * 3354 * flush tlb entry as it's in the current pmap 3355 */ 3356 cpu_tlb_flushID_SE(pv->pv_va); 3357 } 3358 pmap_unmap_ptes(pv->pv_pmap); /* unlocks pmap */ 3359 } 3360 cpu_cpwait(); 3361 3362 simple_unlock(&pg->mdpage.pvh_slock); 3363 PMAP_HEAD_TO_MAP_UNLOCK(); 3364 } 3365 3366 /* 3367 * pmap_clear_modify: 3368 * 3369 * Clear the "modified" attribute for a page. 3370 */ 3371 boolean_t 3372 pmap_clear_modify(struct vm_page *pg) 3373 { 3374 boolean_t rv; 3375 3376 if (pg->mdpage.pvh_attrs & PVF_MOD) { 3377 rv = TRUE; 3378 pmap_clearbit(pg, PVF_MOD); 3379 } else 3380 rv = FALSE; 3381 3382 PDEBUG(0, printf("pmap_clear_modify pa=%08lx -> %d\n", 3383 VM_PAGE_TO_PHYS(pg), rv)); 3384 3385 return (rv); 3386 } 3387 3388 /* 3389 * pmap_clear_reference: 3390 * 3391 * Clear the "referenced" attribute for a page. 3392 */ 3393 boolean_t 3394 pmap_clear_reference(struct vm_page *pg) 3395 { 3396 boolean_t rv; 3397 3398 if (pg->mdpage.pvh_attrs & PVF_REF) { 3399 rv = TRUE; 3400 pmap_clearbit(pg, PVF_REF); 3401 } else 3402 rv = FALSE; 3403 3404 PDEBUG(0, printf("pmap_clear_reference pa=%08lx -> %d\n", 3405 VM_PAGE_TO_PHYS(pg), rv)); 3406 3407 return (rv); 3408 } 3409 3410 /* 3411 * pmap_is_modified: 3412 * 3413 * Test if a page has the "modified" attribute. 3414 */ 3415 /* See <arm/arm32/pmap.h> */ 3416 3417 /* 3418 * pmap_is_referenced: 3419 * 3420 * Test if a page has the "referenced" attribute. 3421 */ 3422 /* See <arm/arm32/pmap.h> */ 3423 3424 int 3425 pmap_modified_emulation(struct pmap *pmap, vaddr_t va) 3426 { 3427 pt_entry_t *ptes; 3428 struct vm_page *pg; 3429 paddr_t pa; 3430 u_int flags; 3431 int rv = 0; 3432 3433 PDEBUG(2, printf("pmap_modified_emulation\n")); 3434 3435 PMAP_MAP_TO_HEAD_LOCK(); 3436 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3437 3438 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3439 PDEBUG(2, printf("L1 PTE invalid\n")); 3440 goto out; 3441 } 3442 3443 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3444 3445 /* Check for a invalid pte */ 3446 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3447 goto out; 3448 3449 /* This can happen if user code tries to access kernel memory. */ 3450 if ((ptes[arm_btop(va)] & L2_S_PROT_W) != 0) 3451 goto out; 3452 3453 /* Extract the physical address of the page */ 3454 pa = l2pte_pa(ptes[arm_btop(va)]); 3455 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3456 goto out; 3457 3458 /* Get the current flags for this page. */ 3459 simple_lock(&pg->mdpage.pvh_slock); 3460 3461 flags = pmap_modify_pv(pmap, va, pg, 0, 0); 3462 PDEBUG(2, printf("pmap_modified_emulation: flags = %08x\n", flags)); 3463 3464 /* 3465 * Do the flags say this page is writable ? If not then it is a 3466 * genuine write fault. If yes then the write fault is our fault 3467 * as we did not reflect the write access in the PTE. Now we know 3468 * a write has occurred we can correct this and also set the 3469 * modified bit 3470 */ 3471 if (~flags & PVF_WRITE) { 3472 simple_unlock(&pg->mdpage.pvh_slock); 3473 goto out; 3474 } 3475 3476 PDEBUG(0, 3477 printf("pmap_modified_emulation: Got a hit va=%08lx, pte = %08x\n", 3478 va, ptes[arm_btop(va)])); 3479 pg->mdpage.pvh_attrs |= PVF_REF | PVF_MOD; 3480 3481 /* 3482 * Re-enable write permissions for the page. No need to call 3483 * pmap_vac_me_harder(), since this is just a 3484 * modified-emulation fault, and the PVF_WRITE bit isn't changing. 3485 * We've already set the cacheable bits based on the assumption 3486 * that we can write to this page. 3487 */ 3488 ptes[arm_btop(va)] = 3489 (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W; 3490 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3491 3492 simple_unlock(&pg->mdpage.pvh_slock); 3493 3494 cpu_tlb_flushID_SE(va); 3495 cpu_cpwait(); 3496 rv = 1; 3497 out: 3498 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3499 PMAP_MAP_TO_HEAD_UNLOCK(); 3500 return (rv); 3501 } 3502 3503 int 3504 pmap_handled_emulation(struct pmap *pmap, vaddr_t va) 3505 { 3506 pt_entry_t *ptes; 3507 struct vm_page *pg; 3508 paddr_t pa; 3509 int rv = 0; 3510 3511 PDEBUG(2, printf("pmap_handled_emulation\n")); 3512 3513 PMAP_MAP_TO_HEAD_LOCK(); 3514 ptes = pmap_map_ptes(pmap); /* locks pmap */ 3515 3516 if (pmap_pde_v(pmap_pde(pmap, va)) == 0) { 3517 PDEBUG(2, printf("L1 PTE invalid\n")); 3518 goto out; 3519 } 3520 3521 PDEBUG(1, printf("pte=%08x\n", ptes[arm_btop(va)])); 3522 3523 /* Check for invalid pte */ 3524 if (l2pte_valid(ptes[arm_btop(va)]) == 0) 3525 goto out; 3526 3527 /* This can happen if user code tries to access kernel memory. */ 3528 if ((ptes[arm_btop(va)] & L2_TYPE_MASK) != L2_TYPE_INV) 3529 goto out; 3530 3531 /* Extract the physical address of the page */ 3532 pa = l2pte_pa(ptes[arm_btop(va)]); 3533 if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) 3534 goto out; 3535 3536 simple_lock(&pg->mdpage.pvh_slock); 3537 3538 /* 3539 * Ok we just enable the pte and mark the attibs as handled 3540 * XXX Should we traverse the PV list and enable all PTEs? 3541 */ 3542 PDEBUG(0, 3543 printf("pmap_handled_emulation: Got a hit va=%08lx pte = %08x\n", 3544 va, ptes[arm_btop(va)])); 3545 pg->mdpage.pvh_attrs |= PVF_REF; 3546 3547 ptes[arm_btop(va)] = (ptes[arm_btop(va)] & ~L2_TYPE_MASK) | L2_S_PROTO; 3548 PDEBUG(0, printf("->(%08x)\n", ptes[arm_btop(va)])); 3549 3550 simple_unlock(&pg->mdpage.pvh_slock); 3551 3552 cpu_tlb_flushID_SE(va); 3553 cpu_cpwait(); 3554 rv = 1; 3555 out: 3556 pmap_unmap_ptes(pmap); /* unlocks pmap */ 3557 PMAP_MAP_TO_HEAD_UNLOCK(); 3558 return (rv); 3559 } 3560 3561 /* 3562 * pmap_collect: free resources held by a pmap 3563 * 3564 * => optional function. 3565 * => called when a process is swapped out to free memory. 3566 */ 3567 3568 void 3569 pmap_collect(struct pmap *pmap) 3570 { 3571 } 3572 3573 /* 3574 * Routine: pmap_procwr 3575 * 3576 * Function: 3577 * Synchronize caches corresponding to [addr, addr+len) in p. 3578 * 3579 */ 3580 void 3581 pmap_procwr(struct proc *p, vaddr_t va, int len) 3582 { 3583 /* We only need to do anything if it is the current process. */ 3584 if (p == curproc) 3585 cpu_icache_sync_range(va, len); 3586 } 3587 /* 3588 * PTP functions 3589 */ 3590 3591 /* 3592 * pmap_get_ptp: get a PTP (if there isn't one, allocate a new one) 3593 * 3594 * => pmap should NOT be pmap_kernel() 3595 * => pmap should be locked 3596 */ 3597 3598 static struct vm_page * 3599 pmap_get_ptp(struct pmap *pmap, vaddr_t va) 3600 { 3601 struct vm_page *ptp; 3602 3603 if (pmap_pde_page(pmap_pde(pmap, va))) { 3604 3605 /* valid... check hint (saves us a PA->PG lookup) */ 3606 if (pmap->pm_ptphint && 3607 (pmap->pm_pdir[pmap_pdei(va)] & L2_S_FRAME) == 3608 VM_PAGE_TO_PHYS(pmap->pm_ptphint)) 3609 return (pmap->pm_ptphint); 3610 ptp = uvm_pagelookup(&pmap->pm_obj, va); 3611 #ifdef DIAGNOSTIC 3612 if (ptp == NULL) 3613 panic("pmap_get_ptp: unmanaged user PTP"); 3614 #endif 3615 pmap->pm_ptphint = ptp; 3616 return(ptp); 3617 } 3618 3619 /* allocate a new PTP (updates ptphint) */ 3620 return(pmap_alloc_ptp(pmap, va)); 3621 } 3622 3623 /* 3624 * pmap_alloc_ptp: allocate a PTP for a PMAP 3625 * 3626 * => pmap should already be locked by caller 3627 * => we use the ptp's wire_count to count the number of active mappings 3628 * in the PTP (we start it at one to prevent any chance this PTP 3629 * will ever leak onto the active/inactive queues) 3630 */ 3631 3632 /*__inline */ static struct vm_page * 3633 pmap_alloc_ptp(struct pmap *pmap, vaddr_t va) 3634 { 3635 struct vm_page *ptp; 3636 3637 ptp = uvm_pagealloc(&pmap->pm_obj, va, NULL, 3638 UVM_PGA_USERESERVE|UVM_PGA_ZERO); 3639 if (ptp == NULL) 3640 return (NULL); 3641 3642 /* got one! */ 3643 ptp->flags &= ~PG_BUSY; /* never busy */ 3644 ptp->wire_count = 1; /* no mappings yet */ 3645 pmap_map_in_l1(pmap, va, VM_PAGE_TO_PHYS(ptp), TRUE); 3646 pmap->pm_stats.resident_count++; /* count PTP as resident */ 3647 pmap->pm_ptphint = ptp; 3648 return (ptp); 3649 } 3650 3651 vaddr_t 3652 pmap_growkernel(vaddr_t maxkvaddr) 3653 { 3654 struct pmap *kpm = pmap_kernel(), *pm; 3655 int s; 3656 paddr_t ptaddr; 3657 struct vm_page *ptp; 3658 3659 if (maxkvaddr <= pmap_curmaxkvaddr) 3660 goto out; /* we are OK */ 3661 NPDEBUG(PDB_GROWKERN, printf("pmap_growkernel: growing kernel from %lx to %lx\n", 3662 pmap_curmaxkvaddr, maxkvaddr)); 3663 3664 /* 3665 * whoops! we need to add kernel PTPs 3666 */ 3667 3668 s = splhigh(); /* to be safe */ 3669 simple_lock(&kpm->pm_obj.vmobjlock); 3670 /* due to the way the arm pmap works we map 4MB at a time */ 3671 for (/*null*/ ; pmap_curmaxkvaddr < maxkvaddr; 3672 pmap_curmaxkvaddr += 4 * L1_S_SIZE) { 3673 3674 if (uvm.page_init_done == FALSE) { 3675 3676 /* 3677 * we're growing the kernel pmap early (from 3678 * uvm_pageboot_alloc()). this case must be 3679 * handled a little differently. 3680 */ 3681 3682 if (uvm_page_physget(&ptaddr) == FALSE) 3683 panic("pmap_growkernel: out of memory"); 3684 pmap_zero_page(ptaddr); 3685 3686 /* map this page in */ 3687 pmap_map_in_l1(kpm, pmap_curmaxkvaddr, ptaddr, TRUE); 3688 3689 /* count PTP as resident */ 3690 kpm->pm_stats.resident_count++; 3691 continue; 3692 } 3693 3694 /* 3695 * THIS *MUST* BE CODED SO AS TO WORK IN THE 3696 * pmap_initialized == FALSE CASE! WE MAY BE 3697 * INVOKED WHILE pmap_init() IS RUNNING! 3698 */ 3699 3700 if ((ptp = pmap_alloc_ptp(kpm, pmap_curmaxkvaddr)) == NULL) 3701 panic("pmap_growkernel: alloc ptp failed"); 3702 3703 /* distribute new kernel PTP to all active pmaps */ 3704 simple_lock(&pmaps_lock); 3705 LIST_FOREACH(pm, &pmaps, pm_list) { 3706 pmap_map_in_l1(pm, pmap_curmaxkvaddr, 3707 VM_PAGE_TO_PHYS(ptp), TRUE); 3708 } 3709 3710 /* Invalidate the PTPT cache. */ 3711 pool_cache_invalidate(&pmap_ptpt_cache); 3712 pmap_ptpt_cache_generation++; 3713 3714 simple_unlock(&pmaps_lock); 3715 } 3716 3717 /* 3718 * flush out the cache, expensive but growkernel will happen so 3719 * rarely 3720 */ 3721 cpu_tlb_flushD(); 3722 cpu_cpwait(); 3723 3724 simple_unlock(&kpm->pm_obj.vmobjlock); 3725 splx(s); 3726 3727 out: 3728 return (pmap_curmaxkvaddr); 3729 } 3730 3731 /************************ Utility routines ****************************/ 3732 3733 /* 3734 * vector_page_setprot: 3735 * 3736 * Manipulate the protection of the vector page. 3737 */ 3738 void 3739 vector_page_setprot(int prot) 3740 { 3741 pt_entry_t *pte; 3742 3743 pte = vtopte(vector_page); 3744 3745 *pte = (*pte & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot); 3746 cpu_tlb_flushD_SE(vector_page); 3747 cpu_cpwait(); 3748 } 3749 3750 /************************ Bootstrapping routines ****************************/ 3751 3752 /* 3753 * This list exists for the benefit of pmap_map_chunk(). It keeps track 3754 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can 3755 * find them as necessary. 3756 * 3757 * Note that the data on this list is not valid after initarm() returns. 3758 */ 3759 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list); 3760 3761 static vaddr_t 3762 kernel_pt_lookup(paddr_t pa) 3763 { 3764 pv_addr_t *pv; 3765 3766 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { 3767 if (pv->pv_pa == pa) 3768 return (pv->pv_va); 3769 } 3770 return (0); 3771 } 3772 3773 /* 3774 * pmap_map_section: 3775 * 3776 * Create a single section mapping. 3777 */ 3778 void 3779 pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3780 { 3781 pd_entry_t *pde = (pd_entry_t *) l1pt; 3782 pd_entry_t fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3783 3784 KASSERT(((va | pa) & L1_S_OFFSET) == 0); 3785 3786 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3787 L1_S_PROT(PTE_KERNEL, prot) | fl; 3788 } 3789 3790 /* 3791 * pmap_map_entry: 3792 * 3793 * Create a single page mapping. 3794 */ 3795 void 3796 pmap_map_entry(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache) 3797 { 3798 pd_entry_t *pde = (pd_entry_t *) l1pt; 3799 pt_entry_t fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3800 pt_entry_t *pte; 3801 3802 KASSERT(((va | pa) & PGOFSET) == 0); 3803 3804 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3805 panic("pmap_map_entry: no L2 table for VA 0x%08lx", va); 3806 3807 pte = (pt_entry_t *) 3808 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3809 if (pte == NULL) 3810 panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va); 3811 3812 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3813 L2_S_PROT(PTE_KERNEL, prot) | fl; 3814 } 3815 3816 /* 3817 * pmap_link_l2pt: 3818 * 3819 * Link the L2 page table specified by "pa" into the L1 3820 * page table at the slot for "va". 3821 */ 3822 void 3823 pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv) 3824 { 3825 pd_entry_t *pde = (pd_entry_t *) l1pt; 3826 u_int slot = va >> L1_S_SHIFT; 3827 3828 KASSERT((l2pv->pv_pa & PGOFSET) == 0); 3829 3830 pde[slot + 0] = L1_C_PROTO | (l2pv->pv_pa + 0x000); 3831 pde[slot + 1] = L1_C_PROTO | (l2pv->pv_pa + 0x400); 3832 pde[slot + 2] = L1_C_PROTO | (l2pv->pv_pa + 0x800); 3833 pde[slot + 3] = L1_C_PROTO | (l2pv->pv_pa + 0xc00); 3834 3835 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); 3836 } 3837 3838 /* 3839 * pmap_map_chunk: 3840 * 3841 * Map a chunk of memory using the most efficient mappings 3842 * possible (section, large page, small page) into the 3843 * provided L1 and L2 tables at the specified virtual address. 3844 */ 3845 vsize_t 3846 pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size, 3847 int prot, int cache) 3848 { 3849 pd_entry_t *pde = (pd_entry_t *) l1pt; 3850 pt_entry_t *pte, fl; 3851 vsize_t resid; 3852 int i; 3853 3854 resid = (size + (NBPG - 1)) & ~(NBPG - 1); 3855 3856 if (l1pt == 0) 3857 panic("pmap_map_chunk: no L1 table provided"); 3858 3859 #ifdef VERBOSE_INIT_ARM 3860 printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx " 3861 "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache); 3862 #endif 3863 3864 size = resid; 3865 3866 while (resid > 0) { 3867 /* See if we can use a section mapping. */ 3868 if (((pa | va) & L1_S_OFFSET) == 0 && 3869 resid >= L1_S_SIZE) { 3870 fl = (cache == PTE_CACHE) ? pte_l1_s_cache_mode : 0; 3871 #ifdef VERBOSE_INIT_ARM 3872 printf("S"); 3873 #endif 3874 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | 3875 L1_S_PROT(PTE_KERNEL, prot) | fl; 3876 va += L1_S_SIZE; 3877 pa += L1_S_SIZE; 3878 resid -= L1_S_SIZE; 3879 continue; 3880 } 3881 3882 /* 3883 * Ok, we're going to use an L2 table. Make sure 3884 * one is actually in the corresponding L1 slot 3885 * for the current VA. 3886 */ 3887 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C) 3888 panic("pmap_map_chunk: no L2 table for VA 0x%08lx", va); 3889 3890 pte = (pt_entry_t *) 3891 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 3892 if (pte == NULL) 3893 panic("pmap_map_chunk: can't find L2 table for VA" 3894 "0x%08lx", va); 3895 3896 /* See if we can use a L2 large page mapping. */ 3897 if (((pa | va) & L2_L_OFFSET) == 0 && 3898 resid >= L2_L_SIZE) { 3899 fl = (cache == PTE_CACHE) ? pte_l2_l_cache_mode : 0; 3900 #ifdef VERBOSE_INIT_ARM 3901 printf("L"); 3902 #endif 3903 for (i = 0; i < 16; i++) { 3904 pte[((va >> PGSHIFT) & 0x3f0) + i] = 3905 L2_L_PROTO | pa | 3906 L2_L_PROT(PTE_KERNEL, prot) | fl; 3907 } 3908 va += L2_L_SIZE; 3909 pa += L2_L_SIZE; 3910 resid -= L2_L_SIZE; 3911 continue; 3912 } 3913 3914 /* Use a small page mapping. */ 3915 fl = (cache == PTE_CACHE) ? pte_l2_s_cache_mode : 0; 3916 #ifdef VERBOSE_INIT_ARM 3917 printf("P"); 3918 #endif 3919 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 3920 L2_S_PROT(PTE_KERNEL, prot) | fl; 3921 va += NBPG; 3922 pa += NBPG; 3923 resid -= NBPG; 3924 } 3925 #ifdef VERBOSE_INIT_ARM 3926 printf("\n"); 3927 #endif 3928 return (size); 3929 } 3930 3931 /********************** PTE initialization routines **************************/ 3932 3933 /* 3934 * These routines are called when the CPU type is identified to set up 3935 * the PTE prototypes, cache modes, etc. 3936 * 3937 * The variables are always here, just in case LKMs need to reference 3938 * them (though, they shouldn't). 3939 */ 3940 3941 pt_entry_t pte_l1_s_cache_mode; 3942 pt_entry_t pte_l1_s_cache_mask; 3943 3944 pt_entry_t pte_l2_l_cache_mode; 3945 pt_entry_t pte_l2_l_cache_mask; 3946 3947 pt_entry_t pte_l2_s_cache_mode; 3948 pt_entry_t pte_l2_s_cache_mask; 3949 3950 pt_entry_t pte_l2_s_prot_u; 3951 pt_entry_t pte_l2_s_prot_w; 3952 pt_entry_t pte_l2_s_prot_mask; 3953 3954 pt_entry_t pte_l1_s_proto; 3955 pt_entry_t pte_l1_c_proto; 3956 pt_entry_t pte_l2_s_proto; 3957 3958 void (*pmap_copy_page_func)(paddr_t, paddr_t); 3959 void (*pmap_zero_page_func)(paddr_t); 3960 3961 #if ARM_MMU_GENERIC == 1 3962 void 3963 pmap_pte_init_generic(void) 3964 { 3965 3966 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 3967 pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic; 3968 3969 pte_l2_l_cache_mode = L2_B|L2_C; 3970 pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic; 3971 3972 pte_l2_s_cache_mode = L2_B|L2_C; 3973 pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic; 3974 3975 pte_l2_s_prot_u = L2_S_PROT_U_generic; 3976 pte_l2_s_prot_w = L2_S_PROT_W_generic; 3977 pte_l2_s_prot_mask = L2_S_PROT_MASK_generic; 3978 3979 pte_l1_s_proto = L1_S_PROTO_generic; 3980 pte_l1_c_proto = L1_C_PROTO_generic; 3981 pte_l2_s_proto = L2_S_PROTO_generic; 3982 3983 pmap_copy_page_func = pmap_copy_page_generic; 3984 pmap_zero_page_func = pmap_zero_page_generic; 3985 } 3986 3987 #if defined(CPU_ARM9) 3988 void 3989 pmap_pte_init_arm9(void) 3990 { 3991 3992 /* 3993 * ARM9 is compatible with generic, but we want to use 3994 * write-through caching for now. 3995 */ 3996 pmap_pte_init_generic(); 3997 3998 pte_l1_s_cache_mode = L1_S_C; 3999 pte_l2_l_cache_mode = L2_C; 4000 pte_l2_s_cache_mode = L2_C; 4001 } 4002 #endif /* CPU_ARM9 */ 4003 #endif /* ARM_MMU_GENERIC == 1 */ 4004 4005 #if ARM_MMU_XSCALE == 1 4006 void 4007 pmap_pte_init_xscale(void) 4008 { 4009 uint32_t auxctl; 4010 4011 pte_l1_s_cache_mode = L1_S_B|L1_S_C; 4012 pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale; 4013 4014 pte_l2_l_cache_mode = L2_B|L2_C; 4015 pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale; 4016 4017 pte_l2_s_cache_mode = L2_B|L2_C; 4018 pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale; 4019 4020 #ifdef XSCALE_CACHE_WRITE_THROUGH 4021 /* 4022 * Some versions of the XScale core have various bugs in 4023 * their cache units, the work-around for which is to run 4024 * the cache in write-through mode. Unfortunately, this 4025 * has a major (negative) impact on performance. So, we 4026 * go ahead and run fast-and-loose, in the hopes that we 4027 * don't line up the planets in a way that will trip the 4028 * bugs. 4029 * 4030 * However, we give you the option to be slow-but-correct. 4031 */ 4032 pte_l1_s_cache_mode = L1_S_C; 4033 pte_l2_l_cache_mode = L2_C; 4034 pte_l2_s_cache_mode = L2_C; 4035 #endif /* XSCALE_CACHE_WRITE_THROUGH */ 4036 4037 pte_l2_s_prot_u = L2_S_PROT_U_xscale; 4038 pte_l2_s_prot_w = L2_S_PROT_W_xscale; 4039 pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale; 4040 4041 pte_l1_s_proto = L1_S_PROTO_xscale; 4042 pte_l1_c_proto = L1_C_PROTO_xscale; 4043 pte_l2_s_proto = L2_S_PROTO_xscale; 4044 4045 pmap_copy_page_func = pmap_copy_page_xscale; 4046 pmap_zero_page_func = pmap_zero_page_xscale; 4047 4048 /* 4049 * Disable ECC protection of page table access, for now. 4050 */ 4051 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4052 : "=r" (auxctl)); 4053 auxctl &= ~XSCALE_AUXCTL_P; 4054 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4055 : 4056 : "r" (auxctl)); 4057 } 4058 4059 /* 4060 * xscale_setup_minidata: 4061 * 4062 * Set up the mini-data cache clean area. We require the 4063 * caller to allocate the right amount of physically and 4064 * virtually contiguous space. 4065 */ 4066 void 4067 xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa) 4068 { 4069 extern vaddr_t xscale_minidata_clean_addr; 4070 extern vsize_t xscale_minidata_clean_size; /* already initialized */ 4071 pd_entry_t *pde = (pd_entry_t *) l1pt; 4072 pt_entry_t *pte; 4073 vsize_t size; 4074 uint32_t auxctl; 4075 4076 xscale_minidata_clean_addr = va; 4077 4078 /* Round it to page size. */ 4079 size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME; 4080 4081 for (; size != 0; 4082 va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { 4083 pte = (pt_entry_t *) 4084 kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); 4085 if (pte == NULL) 4086 panic("xscale_setup_minidata: can't find L2 table for " 4087 "VA 0x%08lx", va); 4088 pte[(va >> PGSHIFT) & 0x3ff] = L2_S_PROTO | pa | 4089 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | 4090 L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); 4091 } 4092 4093 /* 4094 * Configure the mini-data cache for write-back with 4095 * read/write-allocate. 4096 * 4097 * NOTE: In order to reconfigure the mini-data cache, we must 4098 * make sure it contains no valid data! In order to do that, 4099 * we must issue a global data cache invalidate command! 4100 * 4101 * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED! 4102 * THIS IS VERY IMPORTANT! 4103 */ 4104 4105 /* Invalidate data and mini-data. */ 4106 __asm __volatile("mcr p15, 0, %0, c7, c6, 0" 4107 : 4108 : "r" (auxctl)); 4109 4110 4111 __asm __volatile("mrc p15, 0, %0, c1, c0, 1" 4112 : "=r" (auxctl)); 4113 auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA; 4114 __asm __volatile("mcr p15, 0, %0, c1, c0, 1" 4115 : 4116 : "r" (auxctl)); 4117 } 4118 #endif /* ARM_MMU_XSCALE == 1 */ 4119
Indexes created Sat Oct 25 10:09:55 GMT 2025