at91pdcreg.h revision 1.2.4.2 1 /* $NetBSD: at91pdcreg.h,v 1.2.4.2 2008/09/18 04:33:19 wrstuden Exp $ */
2
3 /*
4 * Copyright (c) 2007 Embedtronics Oy.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Ichiro FUKUHARA.
18 * 4. The name of the company nor the name of the author may be used to
19 * endorse or promote products derived from this software without specific
20 * prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 #ifndef _AT91PDCREG_H_
36 #define _AT91PDCREG_H_
37
38 #define PDC_RPR 0x00UL /* Receive Pointer Register */
39 #define PDC_RCR 0x04UL /* Receive Counter Register */
40 #define PDC_TPR 0x08UL /* Transmit Pointer Register */
41 #define PDC_TCR 0x0CUL /* Transmit Counter Register */
42 #define PDC_RNPR 0x10UL /* Receive Next Pointer Reg */
43 #define PDC_RNCR 0x14UL /* Receive Next Counter Reg */
44 #define PDC_TNPR 0x18UL /* Transmit Next Ptt Register */
45 #define PDC_TNCR 0x1CUL /* Transmit Next Counter Reg */
46 #define PDC_PTCR 0x20UL /* PDC Transfer Ctl Reg PDC_ */
47 #define PDC_PTSR 0x24UL /* PDC Transfer Status Reg */
48
49 /* Transfer Control Register bits: */
50 #define PDC_PTCR_TXTDIS 0x200 /* disable transmitter */
51 #define PDC_PTCR_TXTEN 0x100 /* enable transmitter */
52 #define PDC_PTCR_RXTDIS 0x002 /* disable receiver */
53 #define PDC_PTCR_RXTEN 0x001 /* enable receiver */
54
55 /* Transfer Status Register bits: */
56 #define PDC_PTSR_TXTEN PDC_PTCR_TXTEN
57 #define PDC_PTSR_RXTEN PDC_PTCR_RXTEN
58
59 #endif // _AT91PDCREG_H_
60
61