at91pmc.c revision 1.1.22.1 1 1.1.22.1 simonb /* $Id: at91pmc.c,v 1.1.22.1 2008/07/03 18:37:51 simonb Exp $ */
2 1.1.22.1 simonb /* $NetBSD: at91pmc.c,v 1.1.22.1 2008/07/03 18:37:51 simonb Exp $ */
3 1.1.22.1 simonb
4 1.1.22.1 simonb /*
5 1.1.22.1 simonb * Copyright (c) 2007 Embedtronics Oy
6 1.1.22.1 simonb * All rights reserved.
7 1.1.22.1 simonb *
8 1.1.22.1 simonb * Redistribution and use in source and binary forms, with or without
9 1.1.22.1 simonb * modification, are permitted provided that the following conditions
10 1.1.22.1 simonb * are met:
11 1.1.22.1 simonb * 1. Redistributions of source code must retain the above copyright
12 1.1.22.1 simonb * notice, this list of conditions and the following disclaimer.
13 1.1.22.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
14 1.1.22.1 simonb * notice, this list of conditions and the following disclaimer in the
15 1.1.22.1 simonb * documentation and/or other materials provided with the distribution.
16 1.1.22.1 simonb * 3. All advertising materials mentioning features or use of this software
17 1.1.22.1 simonb * must display the following acknowledgement:
18 1.1.22.1 simonb * This product includes software developed by the NetBSD
19 1.1.22.1 simonb * Foundation, Inc. and its contributors.
20 1.1.22.1 simonb * 4. Neither the name of The NetBSD Foundation nor the names of its
21 1.1.22.1 simonb * contributors may be used to endorse or promote products derived
22 1.1.22.1 simonb * from this software without specific prior written permission.
23 1.1.22.1 simonb *
24 1.1.22.1 simonb * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.1.22.1 simonb * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.1.22.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.1.22.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.1.22.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.1.22.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.1.22.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.1.22.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.1.22.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.1.22.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.1.22.1 simonb * POSSIBILITY OF SUCH DAMAGE.
35 1.1.22.1 simonb */
36 1.1.22.1 simonb
37 1.1.22.1 simonb #include <sys/cdefs.h>
38 1.1.22.1 simonb __KERNEL_RCSID(0, "$NetBSD");
39 1.1.22.1 simonb
40 1.1.22.1 simonb #include <sys/types.h>
41 1.1.22.1 simonb #include <sys/param.h>
42 1.1.22.1 simonb #include <sys/systm.h>
43 1.1.22.1 simonb #include <sys/kernel.h>
44 1.1.22.1 simonb #include <sys/time.h>
45 1.1.22.1 simonb #include <sys/device.h>
46 1.1.22.1 simonb
47 1.1.22.1 simonb #include <machine/bus.h>
48 1.1.22.1 simonb #include <machine/intr.h>
49 1.1.22.1 simonb
50 1.1.22.1 simonb #include <arm/cpufunc.h>
51 1.1.22.1 simonb
52 1.1.22.1 simonb #include <arm/at91/at91reg.h>
53 1.1.22.1 simonb #include <arm/at91/at91var.h>
54 1.1.22.1 simonb #include <arm/at91/at91pmcreg.h>
55 1.1.22.1 simonb #include <arm/at91/at91pmcvar.h>
56 1.1.22.1 simonb
57 1.1.22.1 simonb #define SLOW_CLOCK 32768LU
58 1.1.22.1 simonb
59 1.1.22.1 simonb void
60 1.1.22.1 simonb at91pmc_get_clocks(struct at91bus_clocks *clocks)
61 1.1.22.1 simonb {
62 1.1.22.1 simonb u_int64_t mclk, pllaclk, pllbclk, pclk, mstclk;
63 1.1.22.1 simonb u_int32_t reg;
64 1.1.22.1 simonb
65 1.1.22.1 simonb if (!((reg = PMCREG(PMC_MOR)) & PMC_MOR_MOSCEN))
66 1.1.22.1 simonb panic("%s: main oscillator not enabled (MOR=0x%#X)", __FUNCTION__, reg);
67 1.1.22.1 simonb
68 1.1.22.1 simonb if (!((reg = PMCREG(PMC_MCFR)) & PMC_MCFR_MAINRDY))
69 1.1.22.1 simonb panic("%s: main oscillator not ready (MCFR=0x%#X)", __FUNCTION__, reg);
70 1.1.22.1 simonb
71 1.1.22.1 simonb mclk = ((reg & PMC_MCFR_MAINF) * SLOW_CLOCK) / 16U;
72 1.1.22.1 simonb
73 1.1.22.1 simonb // try to guess some nice MHz value
74 1.1.22.1 simonb if (((mclk / 1000) % 1000) >= 990) {
75 1.1.22.1 simonb mclk += 1000000U - (mclk % 1000000U);
76 1.1.22.1 simonb } else if (((mclk / 1000) % 1000) <= 10) {
77 1.1.22.1 simonb mclk -= (mclk % 1000000U);
78 1.1.22.1 simonb }
79 1.1.22.1 simonb
80 1.1.22.1 simonb reg = PMCREG(PMC_PLLAR); pllaclk = 0;
81 1.1.22.1 simonb if (reg & PMC_PLL_DIV) {
82 1.1.22.1 simonb pllaclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
83 1.1.22.1 simonb pllaclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
84 1.1.22.1 simonb }
85 1.1.22.1 simonb
86 1.1.22.1 simonb reg = PMCREG(PMC_PLLBR); pllbclk = 0;
87 1.1.22.1 simonb if (reg & PMC_PLL_DIV) {
88 1.1.22.1 simonb pllbclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
89 1.1.22.1 simonb pllbclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
90 1.1.22.1 simonb if (reg & PMC_PLLBR_USB_96M) {
91 1.1.22.1 simonb pllbclk /= 2;
92 1.1.22.1 simonb }
93 1.1.22.1 simonb }
94 1.1.22.1 simonb
95 1.1.22.1 simonb reg = PMCREG(PMC_MCKR);
96 1.1.22.1 simonb switch ((reg & PMC_MCKR_CSS)) {
97 1.1.22.1 simonb case PMC_MCKR_CSS_SLOW_CLK:
98 1.1.22.1 simonb pclk = SLOW_CLOCK;
99 1.1.22.1 simonb break;
100 1.1.22.1 simonb default:
101 1.1.22.1 simonb case PMC_MCKR_CSS_MAIN_CLK:
102 1.1.22.1 simonb pclk = mclk;
103 1.1.22.1 simonb break;
104 1.1.22.1 simonb case PMC_MCKR_CSS_PLLA:
105 1.1.22.1 simonb pclk = pllaclk;
106 1.1.22.1 simonb break;
107 1.1.22.1 simonb case PMC_MCKR_CSS_PLLB:
108 1.1.22.1 simonb pclk = pllbclk;
109 1.1.22.1 simonb break;
110 1.1.22.1 simonb }
111 1.1.22.1 simonb pclk >>= (reg & PMC_MCKR_PRES) >> PMC_MCKR_PRES_SHIFT;
112 1.1.22.1 simonb mstclk = pclk / (((reg & PMC_MCKR_MDIV) >> PMC_MCKR_MDIV_SHIFT) + 1);
113 1.1.22.1 simonb
114 1.1.22.1 simonb clocks->slow = SLOW_CLOCK;
115 1.1.22.1 simonb clocks->main = mclk;
116 1.1.22.1 simonb clocks->cpu = pclk;
117 1.1.22.1 simonb clocks->master = mstclk;
118 1.1.22.1 simonb clocks->plla = pllaclk;
119 1.1.22.1 simonb clocks->pllb = pllbclk;
120 1.1.22.1 simonb }
121 1.1.22.1 simonb
122 1.1.22.1 simonb
123 1.1.22.1 simonb #define PID_COUNT 32
124 1.1.22.1 simonb static int pid_enable_count[PID_COUNT] = {0};
125 1.1.22.1 simonb
126 1.1.22.1 simonb void
127 1.1.22.1 simonb at91pmc_peripheral_clock(int pid, int enable)
128 1.1.22.1 simonb {
129 1.1.22.1 simonb int s;
130 1.1.22.1 simonb
131 1.1.22.1 simonb if (pid < 0 || pid >= PID_COUNT)
132 1.1.22.1 simonb panic("%s: pid %d out of range", __FUNCTION__, pid);
133 1.1.22.1 simonb
134 1.1.22.1 simonb s = splhigh();
135 1.1.22.1 simonb
136 1.1.22.1 simonb if (enable) {
137 1.1.22.1 simonb pid_enable_count[pid]++;
138 1.1.22.1 simonb PMCREG(PMC_PCER) = (1U << pid);
139 1.1.22.1 simonb } else {
140 1.1.22.1 simonb if (--pid_enable_count[pid] < 0)
141 1.1.22.1 simonb panic("%s: pid %d enable count got negative (%d)",
142 1.1.22.1 simonb __FUNCTION__, pid, pid_enable_count[pid]);
143 1.1.22.1 simonb if (pid_enable_count[pid] == 0)
144 1.1.22.1 simonb PMCREG(PMC_PCDR) = (1U << pid);
145 1.1.22.1 simonb }
146 1.1.22.1 simonb
147 1.1.22.1 simonb splx(s);
148 1.1.22.1 simonb
149 1.1.22.1 simonb if (enable) {
150 1.1.22.1 simonb int c;
151 1.1.22.1 simonb for (c = 0; c < 10000; c++) {
152 1.1.22.1 simonb __insn_barrier();
153 1.1.22.1 simonb }
154 1.1.22.1 simonb }
155 1.1.22.1 simonb }
156