at91pmc.c revision 1.2.4.2
1 1.2.4.2 wrstuden /* $Id: at91pmc.c,v 1.2.4.2 2008/09/18 04:33:19 wrstuden Exp $ */ 2 1.2.4.2 wrstuden /* $NetBSD: at91pmc.c,v 1.2.4.2 2008/09/18 04:33:19 wrstuden Exp $ */ 3 1.2.4.2 wrstuden 4 1.2.4.2 wrstuden /* 5 1.2.4.2 wrstuden * Copyright (c) 2007 Embedtronics Oy 6 1.2.4.2 wrstuden * All rights reserved. 7 1.2.4.2 wrstuden * 8 1.2.4.2 wrstuden * Redistribution and use in source and binary forms, with or without 9 1.2.4.2 wrstuden * modification, are permitted provided that the following conditions 10 1.2.4.2 wrstuden * are met: 11 1.2.4.2 wrstuden * 1. Redistributions of source code must retain the above copyright 12 1.2.4.2 wrstuden * notice, this list of conditions and the following disclaimer. 13 1.2.4.2 wrstuden * 2. Redistributions in binary form must reproduce the above copyright 14 1.2.4.2 wrstuden * notice, this list of conditions and the following disclaimer in the 15 1.2.4.2 wrstuden * documentation and/or other materials provided with the distribution. 16 1.2.4.2 wrstuden * 3. All advertising materials mentioning features or use of this software 17 1.2.4.2 wrstuden * must display the following acknowledgement: 18 1.2.4.2 wrstuden * This product includes software developed by the NetBSD 19 1.2.4.2 wrstuden * Foundation, Inc. and its contributors. 20 1.2.4.2 wrstuden * 4. Neither the name of The NetBSD Foundation nor the names of its 21 1.2.4.2 wrstuden * contributors may be used to endorse or promote products derived 22 1.2.4.2 wrstuden * from this software without specific prior written permission. 23 1.2.4.2 wrstuden * 24 1.2.4.2 wrstuden * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 1.2.4.2 wrstuden * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 1.2.4.2 wrstuden * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 1.2.4.2 wrstuden * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 1.2.4.2 wrstuden * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 1.2.4.2 wrstuden * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 1.2.4.2 wrstuden * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 1.2.4.2 wrstuden * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 1.2.4.2 wrstuden * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 1.2.4.2 wrstuden * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 1.2.4.2 wrstuden * POSSIBILITY OF SUCH DAMAGE. 35 1.2.4.2 wrstuden */ 36 1.2.4.2 wrstuden 37 1.2.4.2 wrstuden #include <sys/cdefs.h> 38 1.2.4.2 wrstuden __KERNEL_RCSID(0, "$NetBSD"); 39 1.2.4.2 wrstuden 40 1.2.4.2 wrstuden #include <sys/types.h> 41 1.2.4.2 wrstuden #include <sys/param.h> 42 1.2.4.2 wrstuden #include <sys/systm.h> 43 1.2.4.2 wrstuden #include <sys/kernel.h> 44 1.2.4.2 wrstuden #include <sys/time.h> 45 1.2.4.2 wrstuden #include <sys/device.h> 46 1.2.4.2 wrstuden 47 1.2.4.2 wrstuden #include <machine/bus.h> 48 1.2.4.2 wrstuden #include <machine/intr.h> 49 1.2.4.2 wrstuden 50 1.2.4.2 wrstuden #include <arm/cpufunc.h> 51 1.2.4.2 wrstuden 52 1.2.4.2 wrstuden #include <arm/at91/at91reg.h> 53 1.2.4.2 wrstuden #include <arm/at91/at91var.h> 54 1.2.4.2 wrstuden #include <arm/at91/at91pmcreg.h> 55 1.2.4.2 wrstuden #include <arm/at91/at91pmcvar.h> 56 1.2.4.2 wrstuden 57 1.2.4.2 wrstuden #define SLOW_CLOCK 32768LU 58 1.2.4.2 wrstuden 59 1.2.4.2 wrstuden void 60 1.2.4.2 wrstuden at91pmc_get_clocks(struct at91bus_clocks *clocks) 61 1.2.4.2 wrstuden { 62 1.2.4.2 wrstuden u_int64_t mclk, pllaclk, pllbclk, pclk, mstclk; 63 1.2.4.2 wrstuden u_int32_t reg; 64 1.2.4.2 wrstuden 65 1.2.4.2 wrstuden if (!((reg = PMCREG(PMC_MOR)) & PMC_MOR_MOSCEN)) 66 1.2.4.2 wrstuden panic("%s: main oscillator not enabled (MOR=0x%#X)", __FUNCTION__, reg); 67 1.2.4.2 wrstuden 68 1.2.4.2 wrstuden if (!((reg = PMCREG(PMC_MCFR)) & PMC_MCFR_MAINRDY)) 69 1.2.4.2 wrstuden panic("%s: main oscillator not ready (MCFR=0x%#X)", __FUNCTION__, reg); 70 1.2.4.2 wrstuden 71 1.2.4.2 wrstuden mclk = ((reg & PMC_MCFR_MAINF) * SLOW_CLOCK) / 16U; 72 1.2.4.2 wrstuden 73 1.2.4.2 wrstuden // try to guess some nice MHz value 74 1.2.4.2 wrstuden if (((mclk / 1000) % 1000) >= 990) { 75 1.2.4.2 wrstuden mclk += 1000000U - (mclk % 1000000U); 76 1.2.4.2 wrstuden } else if (((mclk / 1000) % 1000) <= 10) { 77 1.2.4.2 wrstuden mclk -= (mclk % 1000000U); 78 1.2.4.2 wrstuden } 79 1.2.4.2 wrstuden 80 1.2.4.2 wrstuden reg = PMCREG(PMC_PLLAR); pllaclk = 0; 81 1.2.4.2 wrstuden if (reg & PMC_PLL_DIV) { 82 1.2.4.2 wrstuden pllaclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1); 83 1.2.4.2 wrstuden pllaclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT; 84 1.2.4.2 wrstuden } 85 1.2.4.2 wrstuden 86 1.2.4.2 wrstuden reg = PMCREG(PMC_PLLBR); pllbclk = 0; 87 1.2.4.2 wrstuden if (reg & PMC_PLL_DIV) { 88 1.2.4.2 wrstuden pllbclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1); 89 1.2.4.2 wrstuden pllbclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT; 90 1.2.4.2 wrstuden if (reg & PMC_PLLBR_USB_96M) { 91 1.2.4.2 wrstuden pllbclk /= 2; 92 1.2.4.2 wrstuden } 93 1.2.4.2 wrstuden } 94 1.2.4.2 wrstuden 95 1.2.4.2 wrstuden reg = PMCREG(PMC_MCKR); 96 1.2.4.2 wrstuden switch ((reg & PMC_MCKR_CSS)) { 97 1.2.4.2 wrstuden case PMC_MCKR_CSS_SLOW_CLK: 98 1.2.4.2 wrstuden pclk = SLOW_CLOCK; 99 1.2.4.2 wrstuden break; 100 1.2.4.2 wrstuden default: 101 1.2.4.2 wrstuden case PMC_MCKR_CSS_MAIN_CLK: 102 1.2.4.2 wrstuden pclk = mclk; 103 1.2.4.2 wrstuden break; 104 1.2.4.2 wrstuden case PMC_MCKR_CSS_PLLA: 105 1.2.4.2 wrstuden pclk = pllaclk; 106 1.2.4.2 wrstuden break; 107 1.2.4.2 wrstuden case PMC_MCKR_CSS_PLLB: 108 1.2.4.2 wrstuden pclk = pllbclk; 109 1.2.4.2 wrstuden break; 110 1.2.4.2 wrstuden } 111 1.2.4.2 wrstuden pclk >>= (reg & PMC_MCKR_PRES) >> PMC_MCKR_PRES_SHIFT; 112 1.2.4.2 wrstuden mstclk = pclk / (((reg & PMC_MCKR_MDIV) >> PMC_MCKR_MDIV_SHIFT) + 1); 113 1.2.4.2 wrstuden 114 1.2.4.2 wrstuden clocks->slow = SLOW_CLOCK; 115 1.2.4.2 wrstuden clocks->main = mclk; 116 1.2.4.2 wrstuden clocks->cpu = pclk; 117 1.2.4.2 wrstuden clocks->master = mstclk; 118 1.2.4.2 wrstuden clocks->plla = pllaclk; 119 1.2.4.2 wrstuden clocks->pllb = pllbclk; 120 1.2.4.2 wrstuden } 121 1.2.4.2 wrstuden 122 1.2.4.2 wrstuden 123 1.2.4.2 wrstuden #define PID_COUNT 32 124 1.2.4.2 wrstuden static int pid_enable_count[PID_COUNT] = {0}; 125 1.2.4.2 wrstuden 126 1.2.4.2 wrstuden void 127 1.2.4.2 wrstuden at91pmc_peripheral_clock(int pid, int enable) 128 1.2.4.2 wrstuden { 129 1.2.4.2 wrstuden int s; 130 1.2.4.2 wrstuden 131 1.2.4.2 wrstuden if (pid < 0 || pid >= PID_COUNT) 132 1.2.4.2 wrstuden panic("%s: pid %d out of range", __FUNCTION__, pid); 133 1.2.4.2 wrstuden 134 1.2.4.2 wrstuden s = splhigh(); 135 1.2.4.2 wrstuden 136 1.2.4.2 wrstuden if (enable) { 137 1.2.4.2 wrstuden pid_enable_count[pid]++; 138 1.2.4.2 wrstuden PMCREG(PMC_PCER) = (1U << pid); 139 1.2.4.2 wrstuden } else { 140 1.2.4.2 wrstuden if (--pid_enable_count[pid] < 0) 141 1.2.4.2 wrstuden panic("%s: pid %d enable count got negative (%d)", 142 1.2.4.2 wrstuden __FUNCTION__, pid, pid_enable_count[pid]); 143 1.2.4.2 wrstuden if (pid_enable_count[pid] == 0) 144 1.2.4.2 wrstuden PMCREG(PMC_PCDR) = (1U << pid); 145 1.2.4.2 wrstuden } 146 1.2.4.2 wrstuden 147 1.2.4.2 wrstuden splx(s); 148 1.2.4.2 wrstuden 149 1.2.4.2 wrstuden if (enable) { 150 1.2.4.2 wrstuden int c; 151 1.2.4.2 wrstuden for (c = 0; c < 10000; c++) { 152 1.2.4.2 wrstuden __insn_barrier(); 153 1.2.4.2 wrstuden } 154 1.2.4.2 wrstuden } 155 1.2.4.2 wrstuden } 156
Indexes created Tue Oct 14 11:09:46 GMT 2025