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at91pmc.c revision 1.4 
      1 /*	$Id: at91pmc.c,v 1.4 2011/07/01 19:31:17 dyoung Exp $	*/
      2 /*	$NetBSD: at91pmc.c,v 1.4 2011/07/01 19:31:17 dyoung Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 2007 Embedtronics Oy
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     21  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     27  * POSSIBILITY OF SUCH DAMAGE.
     28  */
     29 
     30 #include <sys/cdefs.h>
     31 __KERNEL_RCSID(0, "$NetBSD");
     32 
     33 #include <sys/types.h>
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/kernel.h>
     37 #include <sys/time.h>
     38 #include <sys/device.h>
     39 
     40 #include <sys/bus.h>
     41 #include <machine/intr.h>
     42 
     43 #include <arm/cpufunc.h>
     44 
     45 #include <arm/at91/at91reg.h>
     46 #include <arm/at91/at91var.h>
     47 #include <arm/at91/at91pmcreg.h>
     48 #include <arm/at91/at91pmcvar.h>
     49 
     50 #define	SLOW_CLOCK	32768LU
     51 
     52 void
     53 at91pmc_get_clocks(struct at91bus_clocks *clocks)
     54 {
     55 	u_int64_t		mclk, pllaclk, pllbclk, pclk, mstclk;
     56 	u_int32_t		reg;
     57 
     58 	if (!((reg = PMCREG(PMC_MOR)) & PMC_MOR_MOSCEN))
     59 		panic("%s: main oscillator not enabled (MOR=0x%#X)", __FUNCTION__, reg);
     60 
     61 	if (!((reg = PMCREG(PMC_MCFR)) & PMC_MCFR_MAINRDY))
     62 		panic("%s: main oscillator not ready (MCFR=0x%#X)", __FUNCTION__, reg);
     63 
     64 	mclk  = ((reg & PMC_MCFR_MAINF) * SLOW_CLOCK) / 16U;
     65 
     66 	// try to guess some nice MHz value
     67 	if (((mclk / 1000) % 1000) >= 990) {
     68 	  mclk += 1000000U - (mclk % 1000000U);
     69 	} else if (((mclk / 1000) % 1000) <= 10) {
     70 	  mclk -= (mclk % 1000000U);
     71 	}
     72 
     73 	reg = PMCREG(PMC_PLLAR); pllaclk = 0;
     74 	if (reg & PMC_PLL_DIV) {
     75 		pllaclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
     76 		pllaclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
     77 	}
     78 
     79 	reg = PMCREG(PMC_PLLBR); pllbclk = 0;
     80 	if (reg & PMC_PLL_DIV) {
     81 		pllbclk = mclk * (((reg & PMC_PLL_MUL) >> PMC_PLL_MUL_SHIFT) + 1);
     82 		pllbclk /= (reg & PMC_PLL_DIV) >> PMC_PLL_DIV_SHIFT;
     83 		if (reg & PMC_PLLBR_USB_96M) {
     84 			pllbclk /= 2;
     85 		}
     86 	}
     87 
     88 	reg = PMCREG(PMC_MCKR);
     89 	switch ((reg & PMC_MCKR_CSS)) {
     90 	case PMC_MCKR_CSS_SLOW_CLK:
     91 	  pclk = SLOW_CLOCK;
     92 	  break;
     93 	default:
     94 	case PMC_MCKR_CSS_MAIN_CLK:
     95 	  pclk = mclk;
     96 	  break;
     97 	case PMC_MCKR_CSS_PLLA:
     98 	  pclk = pllaclk;
     99 	  break;
    100 	case PMC_MCKR_CSS_PLLB:
    101 	  pclk = pllbclk;
    102 	  break;
    103 	}
    104 	pclk >>= (reg & PMC_MCKR_PRES) >> PMC_MCKR_PRES_SHIFT;
    105 	mstclk = pclk / (((reg & PMC_MCKR_MDIV) >> PMC_MCKR_MDIV_SHIFT) + 1);
    106 
    107 	clocks->slow = SLOW_CLOCK;
    108 	clocks->main = mclk;
    109 	clocks->cpu = pclk;
    110 	clocks->master = mstclk;
    111 	clocks->plla = pllaclk;
    112 	clocks->pllb = pllbclk;
    113 }
    114 
    115 
    116 #define	PID_COUNT	32
    117 static int pid_enable_count[PID_COUNT] = {0};
    118 
    119 void
    120 at91pmc_peripheral_clock(int pid, int enable)
    121 {
    122 	int s;
    123 
    124 	if (pid < 0 || pid >= PID_COUNT)
    125 		panic("%s: pid %d out of range", __FUNCTION__, pid);
    126 
    127 	s = splhigh();
    128 
    129 	if (enable) {
    130 		pid_enable_count[pid]++;
    131 		PMCREG(PMC_PCER) = (1U << pid);
    132 	} else {
    133 		if (--pid_enable_count[pid] < 0)
    134 			panic("%s: pid %d enable count got negative (%d)",
    135 			      __FUNCTION__, pid, pid_enable_count[pid]);
    136 		if (pid_enable_count[pid] == 0)
    137 			PMCREG(PMC_PCDR) = (1U << pid);
    138 	}
    139 
    140 	splx(s);
    141 
    142 	if (enable) {
    143 		int c;
    144 		for (c = 0; c < 10000; c++) {
    145 		  __insn_barrier();
    146 		}
    147 	}
    148 }
    149