at91st.c revision 1.2 1 1.2 matt /*$NetBSD: at91st.c,v 1.2 2008/07/03 01:15:38 matt Exp $*/
2 1.2 matt
3 1.2 matt /*
4 1.2 matt * AT91RM9200 clock functions
5 1.2 matt * Copyright (c) 2007, Embedtronics Oy
6 1.2 matt * All rights reserved.
7 1.2 matt *
8 1.2 matt * Based on vx115_clk.c,
9 1.2 matt * Copyright (c) 2006, Jon Sevy <jsevy (at) cs.drexel.edu>
10 1.2 matt *
11 1.2 matt * Based on epclk.c
12 1.2 matt * Copyright (c) 2004 Jesse Off
13 1.2 matt * All rights reserved.
14 1.2 matt *
15 1.2 matt * Redistribution and use in source and binary forms, with or without
16 1.2 matt * modification, are permitted provided that the following conditions
17 1.2 matt * are met:
18 1.2 matt * 1. Redistributions of source code must retain the above copyright
19 1.2 matt * notice, this list of conditions and the following disclaimer.
20 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
21 1.2 matt * notice, this list of conditions and the following disclaimer in the
22 1.2 matt * documentation and/or other materials provided with the distribution.
23 1.2 matt * 3. All advertising materials mentioning features or use of this software
24 1.2 matt * must display the following acknowledgement:
25 1.2 matt *This product includes software developed by the NetBSD
26 1.2 matt *Foundation, Inc. and its contributors.
27 1.2 matt * 4. Neither the name of The NetBSD Foundation nor the names of its
28 1.2 matt * contributors may be used to endorse or promote products derived
29 1.2 matt * from this software without specific prior written permission.
30 1.2 matt *
31 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
32 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
33 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
34 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
35 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
36 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
37 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
38 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
39 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
42 1.2 matt */
43 1.2 matt
44 1.2 matt /*
45 1.2 matt * Driver for the AT91RM9200 clock tick.
46 1.2 matt * We use Timer 1 for the system clock
47 1.2 matt */
48 1.2 matt
49 1.2 matt #include <sys/cdefs.h>
50 1.2 matt __KERNEL_RCSID(0, "$NetBSD: at91st.c,v 1.2 2008/07/03 01:15:38 matt Exp $");
51 1.2 matt
52 1.2 matt #include <sys/types.h>
53 1.2 matt #include <sys/param.h>
54 1.2 matt #include <sys/systm.h>
55 1.2 matt #include <sys/kernel.h>
56 1.2 matt #include <sys/time.h>
57 1.2 matt #include <sys/device.h>
58 1.2 matt
59 1.2 matt #include <dev/clock_subr.h>
60 1.2 matt
61 1.2 matt #include <machine/bus.h>
62 1.2 matt #include <machine/intr.h>
63 1.2 matt
64 1.2 matt #include <arm/cpufunc.h>
65 1.2 matt #include <arm/at91/at91reg.h>
66 1.2 matt #include <arm/at91/at91var.h>
67 1.2 matt #include <arm/at91/at91streg.h>
68 1.2 matt
69 1.2 matt #include <opt_hz.h> /* for HZ */
70 1.2 matt
71 1.2 matt
72 1.2 matt //#define DEBUG_CLK
73 1.2 matt #ifdef DEBUG_CLK
74 1.2 matt #define DPRINTF(fmt...) printf(fmt)
75 1.2 matt #else
76 1.2 matt #define DPRINTF(fmt...)
77 1.2 matt #endif
78 1.2 matt
79 1.2 matt
80 1.2 matt static int at91st_match(device_t, cfdata_t, void *);
81 1.2 matt static void at91st_attach(device_t, device_t, void *);
82 1.2 matt
83 1.2 matt void rtcinit(void);
84 1.2 matt
85 1.2 matt /* callback functions for intr_functions */
86 1.2 matt static int at91st_intr(void* arg);
87 1.2 matt
88 1.2 matt struct at91st_softc {
89 1.2 matt struct device sc_dev;
90 1.2 matt bus_space_tag_t sc_iot;
91 1.2 matt bus_space_handle_t sc_ioh;
92 1.2 matt int sc_pid;
93 1.2 matt int sc_initialized;
94 1.2 matt };
95 1.2 matt
96 1.2 matt static struct at91st_softc *at91st_sc = NULL;
97 1.2 matt static struct timeval lasttv;
98 1.2 matt
99 1.2 matt
100 1.2 matt
101 1.2 matt /* Match value for clock timer; running at 32.768kHz, want HZ ticks per second */
102 1.2 matt /* BTW, we use HZ == 64 or HZ == 128 so have a nice divisor */
103 1.2 matt /* NOTE: don't change there without visiting the functions below which */
104 1.2 matt /* convert between timer counts and microseconds */
105 1.2 matt #define AT91ST_DIVIDER (AT91_SCLK / HZ)
106 1.2 matt #define USEC_PER_TICK (1000000 / (AT91_SCLK / AT91ST_DIVIDER))
107 1.2 matt
108 1.2 matt #if 0
109 1.2 matt static uint32_t at91st_count_to_usec(uint32_t count)
110 1.2 matt {
111 1.2 matt uint32_t result;
112 1.2 matt
113 1.2 matt /* convert specified number of ticks to usec, and round up */
114 1.2 matt /* note that with 16 kHz tick rate, maximum count will be */
115 1.2 matt /* 256 (for HZ = 64), so we won't have overflow issues */
116 1.2 matt result = (1000000 * count) / AT91_SCLK;
117 1.2 matt
118 1.2 matt if ((result * AT91_SCLK) != (count * 1000000))
119 1.2 matt {
120 1.2 matt /* round up */
121 1.2 matt result += 1;
122 1.2 matt }
123 1.2 matt
124 1.2 matt return result;
125 1.2 matt }
126 1.2 matt
127 1.2 matt /* This may only be called when overflow is avoided; typically, */
128 1.2 matt /* it will be used when usec < USEC_PER_TICK */
129 1.2 matt static uint32_t usec_to_timer_count(uint32_t usec)
130 1.2 matt {
131 1.2 matt uint32_t result;
132 1.2 matt
133 1.2 matt /* convert specified number of usec to timer ticks, and round up */
134 1.2 matt result = (AT91_SCLK * usec) / 1000000;
135 1.2 matt
136 1.2 matt if ((result * 1000000) != (usec * AT91_SCLK))
137 1.2 matt {
138 1.2 matt /* round up */
139 1.2 matt result += 1;
140 1.2 matt }
141 1.2 matt
142 1.2 matt return result;
143 1.2 matt
144 1.2 matt }
145 1.2 matt #endif
146 1.2 matt
147 1.2 matt /* macros to simplify writing to the timer controller */
148 1.2 matt #define READ_ST(offset) STREG(offset)
149 1.2 matt //bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset)
150 1.2 matt #define WRITE_ST(offset, value) do { \
151 1.2 matt STREG(offset) = (value); \
152 1.2 matt } while (/*CONSTCOND*/0)
153 1.2 matt //bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value)
154 1.2 matt
155 1.2 matt
156 1.2 matt
157 1.2 matt CFATTACH_DECL(at91st, sizeof(struct at91st_softc), at91st_match, at91st_attach, NULL, NULL);
158 1.2 matt
159 1.2 matt
160 1.2 matt
161 1.2 matt static int
162 1.2 matt at91st_match(device_t parent, cfdata_t match, void *aux)
163 1.2 matt {
164 1.2 matt if (strcmp(match->cf_name, "at91st") == 0)
165 1.2 matt return 2;
166 1.2 matt return 0;
167 1.2 matt }
168 1.2 matt
169 1.2 matt static void
170 1.2 matt at91st_attach(device_t parent, device_t self, void *aux)
171 1.2 matt {
172 1.2 matt struct at91st_softc *sc = (struct at91st_softc*) self;
173 1.2 matt struct at91bus_attach_args *sa = (struct at91bus_attach_args*) aux;
174 1.2 matt
175 1.2 matt printf("\n");
176 1.2 matt
177 1.2 matt sc->sc_iot = sa->sa_iot;
178 1.2 matt sc->sc_pid = sa->sa_pid;
179 1.2 matt
180 1.2 matt #if 0
181 1.2 matt DPRINTF("-> bus_space_map()\n");
182 1.2 matt
183 1.2 matt /* map bus space and get handle */
184 1.2 matt if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh) != 0)
185 1.2 matt panic("%s: Cannot map registers", self->dv_xname);
186 1.2 matt #endif
187 1.2 matt
188 1.2 matt if (at91st_sc == NULL)
189 1.2 matt at91st_sc = sc;
190 1.2 matt
191 1.2 matt at91_peripheral_clock(sc->sc_pid, 1);
192 1.2 matt
193 1.2 matt WRITE_ST(ST_IDR, -1); /* make sure interrupts are disabled */
194 1.2 matt
195 1.2 matt /* set up and enable interval timer 1 as kernel timer, */
196 1.2 matt /* using 32kHz clock source */
197 1.2 matt WRITE_ST(ST_PIMR, AT91ST_DIVIDER);
198 1.2 matt WRITE_ST(ST_RTMR, 1);
199 1.2 matt
200 1.2 matt sc->sc_initialized = 1;
201 1.2 matt
202 1.2 matt DPRINTF("%s: done\n", __FUNCTION__);
203 1.2 matt
204 1.2 matt }
205 1.2 matt
206 1.2 matt /*
207 1.2 matt * at91st_intr:
208 1.2 matt *
209 1.2 matt *Handle the hardclock interrupt.
210 1.2 matt */
211 1.2 matt static int
212 1.2 matt at91st_intr(void *arg)
213 1.2 matt {
214 1.2 matt // struct at91st_softc *sc = at91st_sc;
215 1.2 matt
216 1.2 matt /* make sure it's the kernel timer that generated the interrupt */
217 1.2 matt /* need to do this since the interrupt line is shared by the */
218 1.2 matt /* other interval and PWM timers */
219 1.2 matt if (READ_ST(ST_SR) & ST_SR_PITS)
220 1.2 matt {
221 1.2 matt /* call the kernel timer handler */
222 1.2 matt hardclock((struct clockframe*) arg);
223 1.2 matt #if 0
224 1.2 matt if (hardclock_ticks % (HZ * 10) == 0)
225 1.2 matt printf("time %i sec\n", hardclock_ticks/HZ);
226 1.2 matt #endif
227 1.2 matt return 1;
228 1.2 matt }
229 1.2 matt else
230 1.2 matt {
231 1.2 matt /* it's one of the other timers; just pass it on */
232 1.2 matt return 0;
233 1.2 matt }
234 1.2 matt
235 1.2 matt }
236 1.2 matt
237 1.2 matt /*
238 1.2 matt * setstatclockrate:
239 1.2 matt *
240 1.2 matt *Set the rate of the statistics clock.
241 1.2 matt *
242 1.2 matt *We assume that hz is either stathz or profhz, and that neither
243 1.2 matt *will change after being set by cpu_initclocks(). We could
244 1.2 matt *recalculate the intervals here, but that would be a pain.
245 1.2 matt */
246 1.2 matt void
247 1.2 matt setstatclockrate(int hzz)
248 1.2 matt {
249 1.2 matt /* use hardclock */
250 1.2 matt (void)hzz;
251 1.2 matt }
252 1.2 matt
253 1.2 matt /*
254 1.2 matt * cpu_initclocks:
255 1.2 matt *
256 1.2 matt *Initialize the clock and get it going.
257 1.2 matt */
258 1.2 matt static void udelay(unsigned int usec);
259 1.2 matt
260 1.2 matt void
261 1.2 matt cpu_initclocks(void)
262 1.2 matt {
263 1.2 matt struct at91st_softc *sc = at91st_sc;
264 1.2 matt
265 1.2 matt if (!sc || !sc->sc_initialized)
266 1.2 matt panic("%s: driver has not been initialized! (sc=%p)", __FUNCTION__, sc);
267 1.2 matt
268 1.2 matt stathz = profhz = 0;
269 1.2 matt
270 1.2 matt /* set up and enable interval timer 1 as kernel timer, */
271 1.2 matt /* using 32kHz clock source */
272 1.2 matt WRITE_ST(ST_PIMR, AT91ST_DIVIDER);
273 1.2 matt
274 1.2 matt /* register interrupt handler */
275 1.2 matt at91_intr_establish(sc->sc_pid, IPL_CLOCK, INTR_HIGH_LEVEL, at91st_intr, NULL);
276 1.2 matt
277 1.2 matt /* enable interrupts from timer */
278 1.2 matt WRITE_ST(ST_IER, ST_SR_PITS);
279 1.2 matt }
280 1.2 matt
281 1.2 matt
282 1.2 matt
283 1.2 matt
284 1.2 matt /*
285 1.2 matt * microtime:
286 1.2 matt *
287 1.2 matt *Fill in the specified timeval struct with the current time
288 1.2 matt *accurate to the microsecond.
289 1.2 matt */
290 1.2 matt void
291 1.2 matt microtime(register struct timeval *tvp)
292 1.2 matt {
293 1.2 matt // struct at91st_softc *sc = at91st_sc;
294 1.2 matt u_int oldirqstate;
295 1.2 matt u_int current_count;
296 1.2 matt
297 1.2 matt #ifdef DEBUG
298 1.2 matt if (at91st_sc == NULL) {
299 1.2 matt printf("microtime: called before initialize at91st\n");
300 1.2 matt tvp->tv_sec = 0;
301 1.2 matt tvp->tv_usec = 0;
302 1.2 matt return;
303 1.2 matt }
304 1.2 matt #endif
305 1.2 matt
306 1.2 matt oldirqstate = disable_interrupts(I32_bit);
307 1.2 matt
308 1.2 matt /* get current timer count */
309 1.2 matt current_count = READ_ST(ST_CRTR);
310 1.2 matt
311 1.2 matt /* Fill in the timeval struct. */
312 1.2 matt *tvp = time;
313 1.2 matt
314 1.2 matt #if 0
315 1.2 matt /* Refine the usec field using current timer count */
316 1.2 matt tvp->tv_usec += at91st_count_to_usec(AT91ST_DIVIDER - current_count);
317 1.2 matt
318 1.2 matt /* Make sure microseconds doesn't overflow. */
319 1.2 matt while (__predict_false(tvp->tv_usec >= 1000000))
320 1.2 matt {
321 1.2 matt tvp->tv_usec -= 1000000;
322 1.2 matt tvp->tv_sec++;
323 1.2 matt }
324 1.2 matt #endif
325 1.2 matt
326 1.2 matt /* Make sure the time has advanced. */
327 1.2 matt if (__predict_false(tvp->tv_sec == lasttv.tv_sec && tvp->tv_usec <= lasttv.tv_usec))
328 1.2 matt {
329 1.2 matt tvp->tv_usec = lasttv.tv_usec + 1;
330 1.2 matt if (tvp->tv_usec >= 1000000)
331 1.2 matt {
332 1.2 matt tvp->tv_usec -= 1000000;
333 1.2 matt tvp->tv_sec++;
334 1.2 matt }
335 1.2 matt }
336 1.2 matt
337 1.2 matt lasttv = *tvp;
338 1.2 matt
339 1.2 matt restore_interrupts(oldirqstate);
340 1.2 matt }
341 1.2 matt
342 1.2 matt
343 1.2 matt #if 0
344 1.2 matt extern int hardclock_ticks;
345 1.2 matt static void tdelay(unsigned int ticks)
346 1.2 matt {
347 1.2 matt u_int32_t start, end, current;
348 1.2 matt
349 1.2 matt current = hardclock_ticks;
350 1.2 matt start = current;
351 1.2 matt end = start + ticks;
352 1.2 matt
353 1.2 matt /* just loop for the specified number of ticks */
354 1.2 matt while (current < end)
355 1.2 matt current = hardclock_ticks;
356 1.2 matt }
357 1.2 matt #endif
358 1.2 matt
359 1.2 matt static void udelay(unsigned int usec)
360 1.2 matt {
361 1.2 matt // struct at91st_softc *sc = at91st_sc;
362 1.2 matt u_int32_t crtv, t, diff;
363 1.2 matt
364 1.2 matt usec = (usec * 1000 + AT91_SCLK - 1) / AT91_SCLK + 1;
365 1.2 matt
366 1.2 matt for (crtv = READ_ST(ST_CRTR);;) {
367 1.2 matt while (crtv == (t = READ_ST(ST_CRTR))) ;
368 1.2 matt diff = (t - crtv) & ST_CRTR_CRTV;
369 1.2 matt if (diff >= usec) {
370 1.2 matt break;
371 1.2 matt }
372 1.2 matt crtv = t;
373 1.2 matt usec -= diff;
374 1.2 matt }
375 1.2 matt }
376 1.2 matt
377 1.2 matt
378 1.2 matt
379 1.2 matt /*
380 1.2 matt * delay:
381 1.2 matt *
382 1.2 matt *Delay for at least N microseconds. Note that due to our coarse clock,
383 1.2 matt * our resolution is 61 us. But we round up so we'll wait at least as
384 1.2 matt * long as requested.
385 1.2 matt */
386 1.2 matt void
387 1.2 matt delay(unsigned int usec)
388 1.2 matt {
389 1.2 matt
390 1.2 matt #ifdef DEBUG
391 1.2 matt if (at91st_sc == NULL) {
392 1.2 matt printf("delay: called before start at91st\n");
393 1.2 matt return;
394 1.2 matt }
395 1.2 matt #endif
396 1.2 matt
397 1.2 matt if (usec >= USEC_PER_TICK)
398 1.2 matt {
399 1.2 matt /* have more than 1 tick; just do in ticks */
400 1.2 matt unsigned int ticks = usec / USEC_PER_TICK;
401 1.2 matt if (ticks*USEC_PER_TICK != usec)
402 1.2 matt ticks += 1;
403 1.2 matt while (ticks-- > 0) {
404 1.2 matt udelay(USEC_PER_TICK);
405 1.2 matt }
406 1.2 matt }
407 1.2 matt else
408 1.2 matt {
409 1.2 matt /* less than 1 tick; can do as usec */
410 1.2 matt udelay(usec);
411 1.2 matt }
412 1.2 matt
413 1.2 matt }
414 1.2 matt
415