at91twi.c revision 1.3
1 /* $Id: at91twi.c,v 1.3 2009/03/14 15:36:01 dsl Exp $ */ 2 /* $NetBSD: at91twi.c,v 1.3 2009/03/14 15:36:01 dsl Exp $ */ 3 4 /*- 5 * Copyright (c) 2007 Embedtronics Oy. All rights reserved. 6 * 7 * Based on arch/macppc/dev/ki2c.c, 8 * Copyright (c) 2001 Tsubai Masanari. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: at91twi.c,v 1.3 2009/03/14 15:36:01 dsl Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/device.h> 38 #include <sys/systm.h> 39 40 #include <machine/bus.h> 41 #include <sys/lock.h> 42 43 #include <arm/at91/at91var.h> 44 #include <arm/at91/at91reg.h> 45 46 #include <dev/i2c/i2cvar.h> 47 #include <arm/at91/at91twivar.h> 48 #include <arm/at91/at91twireg.h> 49 50 int at91twi_match(device_t, cfdata_t, void *); 51 void at91twi_attach(device_t, device_t, void *); 52 inline u_int at91twi_readreg(struct at91twi_softc *, int); 53 inline void at91twi_writereg(struct at91twi_softc *, int, u_int); 54 int at91twi_intr(void *); 55 int at91twi_poll(struct at91twi_softc *, int, int); 56 int at91twi_start(struct at91twi_softc *, int, void *, int, int); 57 int at91twi_read(struct at91twi_softc *, int, void *, int, int); 58 int at91twi_write(struct at91twi_softc *, int, void *, int, int); 59 60 /* I2C glue */ 61 static int at91twi_i2c_acquire_bus(void *, int); 62 static void at91twi_i2c_release_bus(void *, int); 63 static int at91twi_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 64 void *, size_t, int); 65 66 67 CFATTACH_DECL_NEW(at91twi, sizeof(struct at91twi_softc), 68 at91twi_match, at91twi_attach, NULL, NULL); 69 70 int 71 at91twi_match(device_t parent, cfdata_t match, void *aux) 72 { 73 if (strcmp(match->cf_name, "at91twi") == 0) 74 return 2; 75 return 0; 76 } 77 78 void 79 at91twi_attach(device_t parent, device_t self, void *aux) 80 { 81 struct at91twi_softc *sc = device_private(self); 82 struct at91bus_attach_args *sa = aux; 83 struct i2cbus_attach_args iba; 84 unsigned ckdiv, cxdiv; 85 86 // gather attach data: 87 sc->sc_dev = self; 88 sc->sc_iot = sa->sa_iot; 89 sc->sc_pid = sa->sa_pid; 90 91 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh)) 92 panic("%s: Cannot map registers", self->dv_xname); 93 94 printf(": I2C controller\n"); 95 96 /* initialize I2C controller */ 97 at91_peripheral_clock(sc->sc_pid, 1); 98 99 at91twi_writereg(sc, TWI_CR, TWI_CR_SWRST); 100 delay(1000); 101 #if 1 102 // target to 100 kHz 103 for (ckdiv = 0; ckdiv < 8; ckdiv++) { 104 if ((cxdiv = (AT91_MSTCLK / (1U << ckdiv)) / (2 * 50000U)) < 256) { 105 goto found_ckdiv; 106 } 107 } 108 panic("%s: Cannot calculate clock divider!", __FUNCTION__); 109 110 found_ckdiv: 111 #else 112 ckdiv = 5; cxdiv = 0xFF; 113 #endif 114 at91twi_writereg(sc, TWI_CWGR, (ckdiv << 16) | (cxdiv << 8) | cxdiv); 115 at91twi_writereg(sc, TWI_CR, TWI_CR_MSEN); 116 117 //#ifdef AT91TWI_DEBUG 118 printf("%s: ckdiv=%d cxdiv=%d CWGR=0x%08X SR=0x%08X\n", self->dv_xname, ckdiv, cxdiv, at91twi_readreg(sc, TWI_CWGR), at91twi_readreg(sc, TWI_SR)); 119 //#endif 120 121 /* initialize rest */ 122 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 123 sc->sc_ih = at91_intr_establish(sc->sc_pid, IPL_SERIAL, INTR_HIGH_LEVEL, 124 at91twi_intr, sc); 125 126 /* fill in the i2c tag */ 127 sc->sc_i2c.ic_cookie = sc; 128 sc->sc_i2c.ic_acquire_bus = at91twi_i2c_acquire_bus; 129 sc->sc_i2c.ic_release_bus = at91twi_i2c_release_bus; 130 sc->sc_i2c.ic_send_start = NULL; 131 sc->sc_i2c.ic_send_stop = NULL; 132 sc->sc_i2c.ic_initiate_xfer = NULL; 133 sc->sc_i2c.ic_read_byte = NULL; 134 sc->sc_i2c.ic_write_byte = NULL; 135 sc->sc_i2c.ic_exec = at91twi_i2c_exec; 136 137 iba.iba_tag = &sc->sc_i2c; 138 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 139 } 140 141 u_int 142 at91twi_readreg(struct at91twi_softc *sc, int reg) 143 { 144 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg); 145 } 146 147 void 148 at91twi_writereg(struct at91twi_softc *sc, int reg, u_int val) 149 { 150 bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val); 151 } 152 153 int 154 at91twi_intr(void *arg) 155 { 156 struct at91twi_softc *sc = arg; 157 u_int sr, isr, imr; 158 159 sr = at91twi_readreg(sc, TWI_SR); 160 imr = at91twi_readreg(sc, TWI_IMR); 161 isr = sr & imr; 162 163 if (!isr) { 164 #ifdef AT91TWI_DEBUG 165 // printf("%s(%s): interrupts are disabled (sr=%08X imr=%08X)\n", __FUNCTION__, device_xname(sc->sc_dev), sr, imr); 166 #endif 167 return 0; 168 } 169 170 if (isr & TWI_SR_TXCOMP) { 171 // transmission has completed! 172 if (sr & (TWI_SR_NACK | TWI_SR_UNRE | TWI_SR_OVRE)) { 173 // failed! 174 #ifdef AT91TWI_DEBUG 175 printf("%s(%s): FAILED (sr=%08X)\n", __FUNCTION__, 176 device_xname(sc->sc_dev), sr); 177 #endif 178 sc->sc_flags |= I2C_ERROR; 179 } else { 180 #ifdef AT91TWI_DEBUG 181 printf("%s(%s): SUCCESS (sr=%08X)\n", __FUNCTION__, 182 device_xname(sc->sc_dev), sr); 183 #endif 184 } 185 if (sc->sc_flags & I2C_READING && sr & TWI_SR_RXRDY) { 186 *sc->sc_data++ = at91twi_readreg(sc, TWI_RHR); 187 sc->sc_resid--; 188 } 189 sc->sc_flags &= ~I2C_BUSY; 190 at91twi_writereg(sc, TWI_IDR, -1); 191 goto out; 192 } 193 194 if (isr & TWI_SR_TXRDY) { 195 if (--sc->sc_resid > 0) 196 at91twi_writereg(sc, TWI_THR, *sc->sc_data++); 197 } 198 199 if (isr & TWI_SR_RXRDY) { 200 // data has been received 201 *sc->sc_data++ = at91twi_readreg(sc, TWI_RHR); 202 sc->sc_resid--; 203 } 204 205 if (isr & (TWI_SR_TXRDY | TWI_SR_RXRDY) && sc->sc_resid <= 0) { 206 // all bytes have been transmitted, send stop condition 207 at91twi_writereg(sc, TWI_IDR, TWI_SR_RXRDY | TWI_SR_TXRDY); 208 at91twi_writereg(sc, TWI_CR, TWI_CR_STOP); 209 } 210 out: 211 return 1; 212 } 213 214 int 215 at91twi_poll(sc, timo, flags) 216 struct at91twi_softc *sc; 217 int timo, flags; 218 { 219 220 timo = 1000000U; 221 222 while (sc->sc_flags & I2C_BUSY) { 223 if (timo < 0) { 224 printf("i2c_poll: timeout\n"); 225 return -1; 226 } 227 if (flags & I2C_F_POLL) { 228 at91_intr_poll(sc->sc_ih, 1); 229 delay(1); 230 timo--; 231 } else { 232 delay(100); // @@@ sleep!? 233 timo -= 100; 234 } 235 } 236 return 0; 237 } 238 239 int 240 at91twi_start(struct at91twi_softc *sc, int addr, void *data, int len, 241 int flags) 242 { 243 int rd = (sc->sc_flags & I2C_READING); 244 int timo, s; 245 246 KASSERT((addr & 1) == 0); 247 248 sc->sc_data = data; 249 sc->sc_resid = len; 250 sc->sc_flags |= I2C_BUSY; 251 252 timo = 1000 + len * 200; 253 254 s = splserial(); 255 // if writing, queue first byte immediately 256 if (!rd) 257 at91twi_writereg(sc, TWI_THR, *sc->sc_data++); 258 // if there's just one byte to transmit, we must set STOP-bit too 259 if (sc->sc_resid == 1) { 260 at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP); 261 at91twi_writereg(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP); 262 } else { 263 at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP 264 | (rd ? TWI_SR_RXRDY : TWI_SR_TXRDY)); 265 at91twi_writereg(sc, TWI_CR, TWI_CR_START); 266 } 267 splx(s); 268 269 if (at91twi_poll(sc, timo, flags)) 270 return -1; 271 if (sc->sc_flags & I2C_ERROR) { 272 printf("I2C_ERROR\n"); 273 return -1; 274 } 275 return 0; 276 } 277 278 int 279 at91twi_read(sc, addr, data, len, flags) 280 struct at91twi_softc *sc; 281 int addr, len; 282 void *data; 283 int flags; 284 { 285 sc->sc_flags = I2C_READING; 286 #ifdef AT91TWI_DEBUG 287 printf("at91twi_read: %02x %d\n", addr, len); 288 #endif 289 return at91twi_start(sc, addr, data, len, flags); 290 } 291 292 int 293 at91twi_write(sc, addr, data, len, flags) 294 struct at91twi_softc *sc; 295 int addr, len; 296 void *data; 297 int flags; 298 { 299 sc->sc_flags = 0; 300 #ifdef AT91TWI_DEBUG 301 printf("at91twi_write: %02x %d\n", addr, len); 302 #endif 303 return at91twi_start(sc, addr, data, len, flags); 304 } 305 306 static int 307 at91twi_i2c_acquire_bus(void *cookie, int flags) 308 { 309 struct at91twi_softc *sc = cookie; 310 311 if (flags & I2C_F_POLL) 312 return 0; 313 314 mutex_enter(&sc->sc_buslock); 315 return 0; 316 } 317 318 static void 319 at91twi_i2c_release_bus(void *cookie, int flags) 320 { 321 struct at91twi_softc *sc = cookie; 322 323 if (flags & I2C_F_POLL) 324 return; 325 326 mutex_exit(&sc->sc_buslock); 327 } 328 329 int 330 at91twi_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd, 331 size_t cmdlen, void *vbuf, size_t buflen, int flags) 332 { 333 struct at91twi_softc *sc = cookie; 334 335 if (I2C_OP_READ_P(op)) 336 { 337 u_int iadr = 0; 338 if (vcmd) { 339 const uint8_t *cmd = (const uint8_t *)vcmd; 340 if (cmdlen > 3) { 341 // we're in trouble.. 342 return -1; 343 } 344 iadr = cmd[0]; 345 if (cmdlen > 1) { 346 iadr <<= 8; 347 iadr |= cmd[1]; 348 } 349 if (cmdlen > 2) { 350 iadr <<= 8; 351 iadr |= cmd[2]; 352 } 353 } 354 at91twi_writereg(sc, TWI_MMR, (addr << 16) | TWI_MMR_MREAD | (cmdlen << 8)); 355 if (cmdlen > 0) { 356 #ifdef AT91TWI_DEBUG 357 printf("at91twi_read: %02x iadr=%08X mmr=%08X\n", 358 addr, iadr, at91twi_readreg(sc, TWI_MMR)); 359 #endif 360 at91twi_writereg(sc, TWI_IADR, iadr); 361 } 362 if (at91twi_read(sc, addr, vbuf, buflen, flags) != 0) 363 return -1; 364 } else if (vcmd) { 365 at91twi_writereg(sc, TWI_MMR, addr << 16); 366 if (at91twi_write(sc, addr, __UNCONST(vcmd), cmdlen, flags) !=0) 367 return -1; 368 } 369 return 0; 370 } 371
Indexes created Thu Oct 02 01:09:59 GMT 2025