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bcm2835_spi.c revision 1.5.8.1 
      1 /*	$NetBSD: bcm2835_spi.c,v 1.5.8.1 2020/08/11 19:13:43 martin Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2012 Jonathan A. Kollasch
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
     20  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: bcm2835_spi.c,v 1.5.8.1 2020/08/11 19:13:43 martin Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/device.h>
     34 #include <sys/systm.h>
     35 #include <sys/mutex.h>
     36 #include <sys/bus.h>
     37 #include <sys/intr.h>
     38 #include <sys/kernel.h>
     39 
     40 #include <sys/bitops.h>
     41 #include <dev/spi/spivar.h>
     42 
     43 #include <arm/broadcom/bcm2835reg.h>
     44 #include <arm/broadcom/bcm2835_spireg.h>
     45 
     46 #include <dev/fdt/fdtvar.h>
     47 
     48 #include <arm/fdt/arm_fdtvar.h>
     49 
     50 struct bcmspi_softc {
     51 	device_t		sc_dev;
     52 	bus_space_tag_t		sc_iot;
     53 	bus_space_handle_t	sc_ioh;
     54 	void			*sc_intrh;
     55 	struct spi_controller	sc_spi;
     56 	kmutex_t                sc_mutex;
     57 	SIMPLEQ_HEAD(,spi_transfer) sc_q;
     58 	struct spi_transfer	*sc_transfer;
     59 	struct spi_chunk	*sc_wchunk;
     60 	struct spi_chunk	*sc_rchunk;
     61 	uint32_t		sc_CS;
     62 	volatile bool		sc_running;
     63 };
     64 
     65 static int bcmspi_match(device_t, cfdata_t, void *);
     66 static void bcmspi_attach(device_t, device_t, void *);
     67 
     68 static int bcmspi_configure(void *, int, int, int);
     69 static int bcmspi_transfer(void *, struct spi_transfer *);
     70 
     71 static void bcmspi_start(struct bcmspi_softc * const);
     72 static int bcmspi_intr(void *);
     73 
     74 static void bcmspi_send(struct bcmspi_softc * const);
     75 static void bcmspi_recv(struct bcmspi_softc * const);
     76 
     77 CFATTACH_DECL_NEW(bcmspi, sizeof(struct bcmspi_softc),
     78     bcmspi_match, bcmspi_attach, NULL, NULL);
     79 
     80 static int
     81 bcmspi_match(device_t parent, cfdata_t cf, void *aux)
     82 {
     83 	const char * const compatible[] = {
     84 		"brcm,bcm2835-spi",
     85 		NULL
     86 	};
     87 	struct fdt_attach_args * const faa = aux;
     88 
     89 	return of_match_compatible(faa->faa_phandle, compatible);
     90 }
     91 
     92 static void
     93 bcmspi_attach(device_t parent, device_t self, void *aux)
     94 {
     95 	struct bcmspi_softc * const sc = device_private(self);
     96 	struct fdt_attach_args * const faa = aux;
     97 	struct spibus_attach_args sba;
     98 
     99 	aprint_naive("\n");
    100 	aprint_normal(": SPI\n");
    101 
    102 	sc->sc_dev = self;
    103 	sc->sc_iot = faa->faa_bst;
    104 	SIMPLEQ_INIT(&sc->sc_q);
    105 
    106 	const int phandle = faa->faa_phandle;
    107 	bus_addr_t addr;
    108 	bus_size_t size;
    109 
    110 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    111 		aprint_error(": missing 'reg' property\n");
    112 		return;
    113 	}
    114 
    115 	if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh) != 0) {
    116 		aprint_error_dev(sc->sc_dev, "unable to map device\n");
    117 		return;
    118 	}
    119 
    120 	char intrstr[128];
    121 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
    122 		aprint_error(": failed to decode interrupt\n");
    123 		return;
    124 	}
    125 
    126 	sc->sc_intrh = fdtbus_intr_establish(phandle, 0, IPL_VM, 0,
    127 	    bcmspi_intr, sc);
    128 	if (sc->sc_intrh == NULL) {
    129 		aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n");
    130 		return;
    131 	}
    132 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    133 
    134 	sc->sc_spi.sct_cookie = sc;
    135 	mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
    136 	sc->sc_spi.sct_configure = bcmspi_configure;
    137 	sc->sc_spi.sct_transfer = bcmspi_transfer;
    138 	sc->sc_spi.sct_nslaves = 3;
    139 
    140 	sba.sba_controller = &sc->sc_spi;
    141 
    142 	(void) config_found_ia(self, "spibus", &sba, spibus_print);
    143 }
    144 
    145 static int
    146 bcmspi_configure(void *cookie, int slave, int mode, int speed)
    147 {
    148 	struct bcmspi_softc * const sc = cookie;
    149 	uint32_t cs, clk;
    150 
    151 	cs = SPI_CS_INTR | SPI_CS_INTD;
    152 
    153 	if (slave > 2)
    154 		return EINVAL;
    155 
    156 	if (speed <= 0)
    157 		return EINVAL;
    158 
    159 	switch (mode) {
    160 	case SPI_MODE_0:
    161 		cs |= 0;
    162 		break;
    163 	case SPI_MODE_1:
    164 		cs |= SPI_CS_CPHA;
    165 		break;
    166 	case SPI_MODE_2:
    167 		cs |= SPI_CS_CPOL;
    168 		break;
    169 	case SPI_MODE_3:
    170 		cs |= SPI_CS_CPHA|SPI_CS_CPOL;
    171 		break;
    172 	default:
    173 		return EINVAL;
    174 	}
    175 
    176 	sc->sc_CS = cs;
    177 
    178 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SPI_CS, cs);
    179 
    180 	clk = 2 * 250000000 / speed; /* XXX 250MHz */
    181 	clk = (clk / 2) + (clk & 1);
    182 	clk = roundup(clk, 2);
    183 	clk = __SHIFTIN(clk, SPI_CLK_CDIV);
    184 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SPI_CLK, clk);
    185 
    186 	return 0;
    187 }
    188 
    189 static int
    190 bcmspi_transfer(void *cookie, struct spi_transfer *st)
    191 {
    192 	struct bcmspi_softc * const sc = cookie;
    193 
    194 	mutex_enter(&sc->sc_mutex);
    195 	spi_transq_enqueue(&sc->sc_q, st);
    196 	if (sc->sc_running == false) {
    197 		bcmspi_start(sc);
    198 	}
    199 	mutex_exit(&sc->sc_mutex);
    200 	return 0;
    201 }
    202 
    203 static void
    204 bcmspi_start(struct bcmspi_softc * const sc)
    205 {
    206 	struct spi_transfer *st;
    207 	uint32_t cs;
    208 
    209 	while ((st = spi_transq_first(&sc->sc_q)) != NULL) {
    210 
    211 		spi_transq_dequeue(&sc->sc_q);
    212 
    213 		KASSERT(sc->sc_transfer == NULL);
    214 		sc->sc_transfer = st;
    215 		sc->sc_rchunk = sc->sc_wchunk = st->st_chunks;
    216 
    217 		cs = sc->sc_CS;
    218 		cs |= SPI_CS_TA;
    219 		cs |= SPI_CS_CLEAR_TX;
    220 		cs |= SPI_CS_CLEAR_RX;
    221 		KASSERT(st->st_slave <= 2);
    222 		cs |= __SHIFTIN(st->st_slave, SPI_CS_CS);
    223 		sc->sc_running = true;
    224 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, SPI_CS, cs);
    225 
    226 		if (!cold)
    227 			return;
    228 
    229 		for (;;) {
    230 		        mutex_exit(&sc->sc_mutex);
    231 			bcmspi_intr(sc);
    232 			mutex_enter(&sc->sc_mutex);
    233 			if (ISSET(st->st_flags, SPI_F_DONE))
    234 				break;
    235 		}
    236 	}
    237 
    238 	sc->sc_running = false;
    239 }
    240 
    241 static void
    242 bcmspi_send(struct bcmspi_softc * const sc)
    243 {
    244 	uint32_t fd;
    245 	uint32_t cs;
    246 	struct spi_chunk *chunk;
    247 
    248 	while ((chunk = sc->sc_wchunk) != NULL) {
    249 		while (chunk->chunk_wresid) {
    250 			cs = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SPI_CS);
    251 			if ((cs & SPI_CS_TXD) == 0)
    252 				return;
    253 			if (chunk->chunk_wptr) {
    254 				fd = *chunk->chunk_wptr++;
    255 			} else {
    256 				fd = '\0';
    257 			}
    258 			bus_space_write_4(sc->sc_iot, sc->sc_ioh, SPI_FIFO, fd);
    259 			chunk->chunk_wresid--;
    260 		}
    261 		sc->sc_wchunk = sc->sc_wchunk->chunk_next;
    262 	}
    263 }
    264 
    265 static void
    266 bcmspi_recv(struct bcmspi_softc * const sc)
    267 {
    268 	uint32_t fd;
    269 	uint32_t cs;
    270 	struct spi_chunk *chunk;
    271 
    272 	while ((chunk = sc->sc_rchunk) != NULL) {
    273 		while (chunk->chunk_rresid) {
    274 			cs = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SPI_CS);
    275 			if ((cs & SPI_CS_RXD) == 0)
    276 				return;
    277 			fd = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SPI_FIFO);
    278 			if (chunk->chunk_rptr) {
    279 				*chunk->chunk_rptr++ = fd & 0xff;
    280 			}
    281 			chunk->chunk_rresid--;
    282 		}
    283 		sc->sc_rchunk = sc->sc_rchunk->chunk_next;
    284 	}
    285 }
    286 
    287 static int
    288 bcmspi_intr(void *cookie)
    289 {
    290 	struct bcmspi_softc * const sc = cookie;
    291 	struct spi_transfer *st;
    292 	uint32_t cs;
    293 
    294 	mutex_enter(&sc->sc_mutex);
    295 	cs = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SPI_CS);
    296 	if (ISSET(cs, SPI_CS_DONE)) {
    297 		if (sc->sc_wchunk != NULL) {
    298 			bcmspi_send(sc);
    299 			goto end;
    300 		} else {
    301 			bus_space_write_4(sc->sc_iot, sc->sc_ioh, SPI_CS,
    302 			    sc->sc_CS);
    303 			bcmspi_recv(sc);
    304 			sc->sc_rchunk = sc->sc_wchunk = NULL;
    305 			st = sc->sc_transfer;
    306 			sc->sc_transfer = NULL;
    307 			KASSERT(st != NULL);
    308 			spi_done(st, 0);
    309 			sc->sc_running = false;
    310 			goto end;
    311 		}
    312 	} else if (ISSET(cs, SPI_CS_RXR)) {
    313 		bcmspi_recv(sc);
    314 		bcmspi_send(sc);
    315 	}
    316 
    317 end:
    318 	mutex_exit(&sc->sc_mutex);
    319 	return ISSET(cs, SPI_CS_DONE|SPI_CS_RXR);
    320 }
    321