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      1  1.12    skrll /*	$NetBSD: bcm2835_tmr.c,v 1.12 2021/01/29 14:11:14 skrll Exp $	*/
      2   1.1    skrll 
      3   1.1    skrll /*-
      4   1.1    skrll  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5   1.1    skrll  * All rights reserved.
      6   1.1    skrll  *
      7   1.1    skrll  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1    skrll  * by Nick Hudson
      9   1.1    skrll  *
     10   1.1    skrll  * Redistribution and use in source and binary forms, with or without
     11   1.1    skrll  * modification, are permitted provided that the following conditions
     12   1.1    skrll  * are met:
     13   1.1    skrll  * 1. Redistributions of source code must retain the above copyright
     14   1.1    skrll  *    notice, this list of conditions and the following disclaimer.
     15   1.1    skrll  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1    skrll  *    notice, this list of conditions and the following disclaimer in the
     17   1.1    skrll  *    documentation and/or other materials provided with the distribution.
     18   1.1    skrll  *
     19   1.1    skrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1    skrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1    skrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1    skrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1    skrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1    skrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1    skrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1    skrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1    skrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1    skrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1    skrll  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1    skrll  */
     31   1.1    skrll 
     32   1.1    skrll #include <sys/cdefs.h>
     33  1.12    skrll __KERNEL_RCSID(0, "$NetBSD: bcm2835_tmr.c,v 1.12 2021/01/29 14:11:14 skrll Exp $");
     34   1.1    skrll 
     35   1.1    skrll #include <sys/param.h>
     36   1.1    skrll #include <sys/systm.h>
     37   1.1    skrll #include <sys/device.h>
     38   1.1    skrll #include <sys/kernel.h>
     39   1.1    skrll #include <sys/timetc.h>
     40   1.1    skrll #include <sys/bus.h>
     41   1.1    skrll 
     42   1.1    skrll #include <arm/broadcom/bcm2835_intr.h>
     43   1.1    skrll #include <arm/broadcom/bcm2835reg.h>
     44   1.9    skrll #include <arm/broadcom/bcm2835var.h>
     45   1.9    skrll 
     46   1.9    skrll #include <dev/fdt/fdtvar.h>
     47   1.9    skrll 
     48   1.9    skrll #include <arm/fdt/arm_fdtvar.h>
     49   1.9    skrll 
     50   1.9    skrll /* Use the 3rd timer*/
     51   1.9    skrll #define BCMTIMER	3
     52   1.1    skrll 
     53   1.1    skrll #define	BCM2835_STIMER_CS	0x00
     54   1.1    skrll #define	 BCM2835_STIMER_M0	 __BIT(0)
     55   1.1    skrll #define	 BCM2835_STIMER_M1	 __BIT(1)
     56   1.1    skrll #define	 BCM2835_STIMER_M2	 __BIT(2)
     57   1.1    skrll #define	 BCM2835_STIMER_M3	 __BIT(3)
     58   1.1    skrll #define	BCM2835_STIMER_CLO	0x04
     59   1.1    skrll #define	BCM2835_STIMER_CHI	0x08
     60   1.1    skrll #define	BCM2835_STIMER_C0	0x0c
     61   1.1    skrll #define	BCM2835_STIMER_C1	0x10
     62   1.1    skrll #define	BCM2835_STIMER_C2	0x14
     63   1.1    skrll #define	BCM2835_STIMER_C3	0x18
     64   1.1    skrll 
     65   1.1    skrll #define	BCM2835_STIMER_HZ	1000000
     66   1.1    skrll 
     67   1.1    skrll static const uint32_t counts_per_usec = (BCM2835_STIMER_HZ / 1000000);
     68   1.1    skrll static uint32_t counts_per_hz = ~0;
     69   1.3    skrll 
     70   1.1    skrll struct bcm2835tmr_softc {
     71   1.1    skrll 	device_t		sc_dev;
     72   1.1    skrll 
     73   1.1    skrll 	bus_space_tag_t sc_iot;
     74   1.1    skrll 	bus_space_handle_t sc_ioh;
     75   1.9    skrll 
     76   1.9    skrll 	void *sc_ih;
     77   1.1    skrll };
     78   1.1    skrll 
     79   1.1    skrll static int bcmtmr_match(device_t, cfdata_t, void *);
     80   1.1    skrll static void bcmtmr_attach(device_t, device_t, void *);
     81   1.1    skrll 
     82   1.1    skrll static int clockhandler(void *);
     83   1.1    skrll 
     84   1.1    skrll static u_int bcm2835tmr_get_timecount(struct timecounter *);
     85   1.9    skrll void bcm2835_tmr_setstatclockrate(int);
     86   1.1    skrll 
     87   1.1    skrll static struct bcm2835tmr_softc *bcm2835tmr_sc;
     88   1.1    skrll 
     89   1.1    skrll static struct timecounter bcm2835tmr_timecounter = {
     90   1.1    skrll 	.tc_get_timecount = bcm2835tmr_get_timecount,
     91   1.1    skrll 	.tc_poll_pps = 0,
     92   1.1    skrll 	.tc_counter_mask = ~0u,
     93   1.1    skrll 	.tc_frequency = BCM2835_STIMER_HZ,
     94   1.1    skrll 	.tc_name = NULL,			/* set by attach */
     95   1.1    skrll 	.tc_quality = 100,
     96   1.1    skrll 	.tc_priv = NULL,
     97   1.1    skrll 	.tc_next = NULL,
     98   1.1    skrll };
     99   1.1    skrll 
    100   1.9    skrll CFATTACH_DECL_NEW(bcmtmr_fdt, sizeof(struct bcm2835tmr_softc),
    101   1.1    skrll     bcmtmr_match, bcmtmr_attach, NULL, NULL);
    102   1.1    skrll 
    103  1.11  thorpej static const struct device_compatible_entry compat_data[] = {
    104  1.11  thorpej 	{ .compat = "brcm,bcm2835-system-timer" },
    105  1.11  thorpej 	DEVICE_COMPAT_EOL
    106  1.11  thorpej };
    107  1.11  thorpej 
    108   1.1    skrll /* ARGSUSED */
    109   1.1    skrll static int
    110   1.1    skrll bcmtmr_match(device_t parent, cfdata_t match, void *aux)
    111   1.1    skrll {
    112   1.9    skrll 	struct fdt_attach_args * const faa = aux;
    113  1.11  thorpej 
    114  1.11  thorpej 	return of_compatible_match(faa->faa_phandle, compat_data);
    115   1.1    skrll }
    116   1.1    skrll 
    117   1.1    skrll static void
    118   1.1    skrll bcmtmr_attach(device_t parent, device_t self, void *aux)
    119   1.1    skrll {
    120   1.8    skrll 	struct bcm2835tmr_softc *sc = device_private(self);
    121   1.9    skrll 	struct fdt_attach_args * const faa = aux;
    122   1.1    skrll 
    123   1.1    skrll 	aprint_naive("\n");
    124   1.1    skrll 	aprint_normal(": VC System Timer\n");
    125   1.1    skrll 
    126   1.1    skrll 	if (bcm2835tmr_sc == NULL)
    127   1.1    skrll 		bcm2835tmr_sc = sc;
    128   1.3    skrll 
    129   1.1    skrll 	sc->sc_dev = self;
    130   1.9    skrll 	sc->sc_iot = faa->faa_bst;
    131   1.9    skrll 	const int phandle = faa->faa_phandle;
    132   1.9    skrll 
    133   1.9    skrll 	bus_addr_t addr;
    134   1.9    skrll 	bus_size_t size;
    135   1.1    skrll 
    136   1.9    skrll 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    137   1.9    skrll 		aprint_error(": missing 'reg' property\n");
    138   1.9    skrll 		return;
    139   1.9    skrll 	}
    140   1.9    skrll 
    141   1.9    skrll 	if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh) != 0) {
    142   1.1    skrll 		aprint_error_dev(sc->sc_dev, "unable to map device\n");
    143   1.1    skrll 		return;
    144   1.1    skrll 	}
    145   1.3    skrll 
    146   1.9    skrll 	char intrstr[128];
    147   1.9    skrll 	if (!fdtbus_intr_str(phandle, BCMTIMER, intrstr, sizeof(intrstr))) {
    148   1.9    skrll 		aprint_error(": failed to decode interrupt\n");
    149   1.9    skrll 		return;
    150   1.9    skrll 	}
    151   1.9    skrll 
    152  1.12    skrll 	sc->sc_ih = fdtbus_intr_establish_xname(phandle, BCMTIMER, IPL_CLOCK,
    153  1.12    skrll 	    FDT_INTR_MPSAFE, clockhandler, NULL, device_xname(self));
    154   1.9    skrll 	if (sc->sc_ih == NULL) {
    155   1.9    skrll 		aprint_error(": failed to establish interrupt on %s\n",
    156   1.9    skrll 		    intrstr);
    157   1.9    skrll 		return;
    158   1.9    skrll 	}
    159   1.9    skrll 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    160   1.9    skrll 
    161   1.1    skrll 	bcm2835tmr_timecounter.tc_name = device_xname(self);
    162   1.1    skrll }
    163   1.1    skrll 
    164   1.1    skrll void
    165   1.1    skrll cpu_initclocks(void)
    166   1.1    skrll {
    167   1.1    skrll 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
    168   1.1    skrll 	uint32_t stcl;
    169   1.3    skrll 
    170   1.1    skrll 	KASSERT(sc != NULL);
    171   1.1    skrll 
    172   1.1    skrll 	bcm2835tmr_timecounter.tc_priv = sc;
    173   1.1    skrll 
    174   1.1    skrll 	counts_per_hz = BCM2835_STIMER_HZ / hz;
    175   1.1    skrll 
    176   1.1    skrll 	stcl = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
    177   1.1    skrll 	stcl += counts_per_hz;
    178   1.1    skrll 
    179   1.1    skrll 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_C3, stcl);
    180   1.1    skrll 
    181   1.1    skrll 	tc_init(&bcm2835tmr_timecounter);
    182   1.1    skrll }
    183   1.1    skrll 
    184   1.1    skrll void
    185   1.9    skrll bcm2835_tmr_delay(unsigned int n)
    186   1.1    skrll {
    187   1.1    skrll 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
    188   1.1    skrll 	uint32_t last, curr;
    189   1.1    skrll 	uint32_t delta, usecs;
    190   1.1    skrll 
    191   1.1    skrll 	KASSERT(sc != NULL);
    192   1.1    skrll 
    193   1.1    skrll 	last = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
    194   1.1    skrll 
    195   1.1    skrll 	delta = usecs = 0;
    196   1.1    skrll 	while (n > usecs) {
    197   1.1    skrll 		curr = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    198   1.1    skrll 		    BCM2835_STIMER_CLO);
    199   1.1    skrll 
    200   1.1    skrll 		/* Check to see if the timer has wrapped around. */
    201   1.1    skrll 		if (curr < last)
    202   1.2    skrll 			delta += curr + (UINT32_MAX - last);
    203   1.1    skrll 		else
    204   1.2    skrll 			delta += curr - last;
    205   1.1    skrll 
    206   1.1    skrll 		last = curr;
    207   1.1    skrll 
    208   1.1    skrll 		if (delta >= counts_per_usec) {
    209   1.1    skrll 			usecs += delta / counts_per_usec;
    210   1.1    skrll 			delta %= counts_per_usec;
    211   1.1    skrll 		}
    212   1.3    skrll 	}
    213   1.1    skrll }
    214   1.1    skrll 
    215   1.1    skrll /*
    216   1.1    skrll  * clockhandler:
    217   1.1    skrll  *
    218   1.1    skrll  *	Handle the hardclock interrupt.
    219   1.1    skrll  */
    220   1.1    skrll static int
    221   1.1    skrll clockhandler(void *arg)
    222   1.1    skrll {
    223   1.1    skrll 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
    224   1.1    skrll 	struct clockframe *frame = arg;
    225   1.1    skrll 	uint32_t curr, status;
    226   1.3    skrll 
    227   1.1    skrll 	status = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    228   1.1    skrll 	    BCM2835_STIMER_CS);
    229   1.1    skrll 
    230   1.1    skrll 	if (!(status & BCM2835_STIMER_M3))
    231   1.1    skrll 		return 0;
    232   1.1    skrll 
    233   1.5    skrll 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CS,
    234   1.5    skrll 	    BCM2835_STIMER_M3);
    235   1.1    skrll 
    236   1.1    skrll 	hardclock(frame);
    237   1.1    skrll 
    238   1.1    skrll 	curr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
    239   1.1    skrll 
    240   1.1    skrll 	curr += counts_per_hz;
    241   1.1    skrll 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_C3, curr);
    242   1.1    skrll 
    243   1.1    skrll 	return 1;
    244   1.1    skrll }
    245   1.1    skrll 
    246   1.1    skrll void
    247   1.1    skrll setstatclockrate(int newhz)
    248   1.1    skrll {
    249   1.1    skrll }
    250   1.1    skrll 
    251   1.1    skrll static u_int
    252   1.1    skrll bcm2835tmr_get_timecount(struct timecounter *tc)
    253   1.1    skrll {
    254   1.1    skrll 	struct bcm2835tmr_softc *sc = tc->tc_priv;
    255   1.1    skrll 
    256   1.1    skrll 	return bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
    257   1.1    skrll }
    258   1.1    skrll 
    259