bcm283x_platform.c revision 1.18 1 1.18 ryo /* $NetBSD: bcm283x_platform.c,v 1.18 2018/09/10 11:05:12 ryo Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.18 ryo __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.18 2018/09/10 11:05:12 ryo Exp $");
31 1.1 skrll
32 1.1 skrll #include "opt_arm_debug.h"
33 1.1 skrll #include "opt_bcm283x.h"
34 1.1 skrll #include "opt_cpuoptions.h"
35 1.1 skrll #include "opt_ddb.h"
36 1.1 skrll #include "opt_evbarm_boardtype.h"
37 1.1 skrll #include "opt_kgdb.h"
38 1.1 skrll #include "opt_fdt.h"
39 1.1 skrll #include "opt_rpi.h"
40 1.1 skrll #include "opt_vcprop.h"
41 1.1 skrll
42 1.1 skrll #include "sdhc.h"
43 1.1 skrll #include "bcmsdhost.h"
44 1.1 skrll #include "bcmdwctwo.h"
45 1.1 skrll #include "bcmspi.h"
46 1.1 skrll #include "bsciic.h"
47 1.1 skrll #include "plcom.h"
48 1.1 skrll #include "com.h"
49 1.1 skrll #include "genfb.h"
50 1.1 skrll #include "ukbd.h"
51 1.1 skrll
52 1.1 skrll #include <sys/param.h>
53 1.1 skrll #include <sys/bus.h>
54 1.1 skrll #include <sys/cpu.h>
55 1.1 skrll #include <sys/device.h>
56 1.1 skrll #include <sys/termios.h>
57 1.1 skrll
58 1.1 skrll #include <net/if_ether.h>
59 1.1 skrll
60 1.1 skrll #include <prop/proplib.h>
61 1.1 skrll
62 1.1 skrll #include <dev/fdt/fdtvar.h>
63 1.1 skrll
64 1.1 skrll #include <uvm/uvm_extern.h>
65 1.1 skrll
66 1.1 skrll #include <machine/bootconfig.h>
67 1.9 skrll
68 1.4 ryo #include <arm/armreg.h>
69 1.1 skrll #include <arm/cpufunc.h>
70 1.1 skrll
71 1.1 skrll #include <libfdt.h>
72 1.1 skrll
73 1.1 skrll #include <arm/broadcom/bcm2835reg.h>
74 1.1 skrll #include <arm/broadcom/bcm2835var.h>
75 1.4 ryo #include <arm/broadcom/bcm283x_platform.h>
76 1.1 skrll #include <arm/broadcom/bcm2835_intr.h>
77 1.1 skrll #include <arm/broadcom/bcm2835_mbox.h>
78 1.1 skrll #include <arm/broadcom/bcm2835_pmwdogvar.h>
79 1.1 skrll
80 1.1 skrll #include <evbarm/dev/plcomreg.h>
81 1.1 skrll #include <evbarm/dev/plcomvar.h>
82 1.9 skrll #include <evbarm/fdt/machdep.h>
83 1.1 skrll
84 1.1 skrll #include <dev/ic/ns16550reg.h>
85 1.1 skrll #include <dev/ic/comreg.h>
86 1.1 skrll
87 1.1 skrll #include <evbarm/rpi/vcio.h>
88 1.1 skrll #include <evbarm/rpi/vcpm.h>
89 1.1 skrll #include <evbarm/rpi/vcprop.h>
90 1.1 skrll
91 1.1 skrll #include <arm/fdt/arm_fdtvar.h>
92 1.1 skrll
93 1.1 skrll #include <arm/cortex/gtmr_var.h>
94 1.1 skrll
95 1.1 skrll #if NGENFB > 0
96 1.1 skrll #include <dev/videomode/videomode.h>
97 1.1 skrll #include <dev/videomode/edidvar.h>
98 1.1 skrll #include <dev/wscons/wsconsio.h>
99 1.1 skrll #endif
100 1.1 skrll
101 1.1 skrll #if NUKBD > 0
102 1.1 skrll #include <dev/usb/ukbdvar.h>
103 1.1 skrll #endif
104 1.1 skrll
105 1.1 skrll #ifdef DDB
106 1.1 skrll #include <machine/db_machdep.h>
107 1.1 skrll #include <ddb/db_sym.h>
108 1.1 skrll #include <ddb/db_extern.h>
109 1.1 skrll #endif
110 1.1 skrll
111 1.1 skrll void bcm283x_platform_early_putchar(vaddr_t, paddr_t, char c);
112 1.1 skrll void bcm2835_platform_early_putchar(char c);
113 1.1 skrll void bcm2836_platform_early_putchar(char c);
114 1.1 skrll void bcm2837_platform_early_putchar(char c);
115 1.1 skrll
116 1.1 skrll extern void bcmgenfb_set_console_dev(device_t dev);
117 1.1 skrll void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
118 1.1 skrll extern void bcmgenfb_ddb_trap_callback(int where);
119 1.1 skrll static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
120 1.1 skrll
121 1.4 ryo extern struct bus_space arm_generic_bs_tag;
122 1.4 ryo extern struct bus_space arm_generic_a4x_bs_tag;
123 1.1 skrll
124 1.1 skrll /* Prototypes for all the bus_space structure functions */
125 1.4 ryo bs_protos(arm_generic);
126 1.4 ryo bs_protos(arm_generic_a4x);
127 1.1 skrll bs_protos(bcm2835);
128 1.1 skrll bs_protos(bcm2835_a4x);
129 1.4 ryo bs_protos(bcm2836);
130 1.4 ryo bs_protos(bcm2836_a4x);
131 1.4 ryo
132 1.4 ryo struct bus_space bcm2835_bs_tag;
133 1.4 ryo struct bus_space bcm2835_a4x_bs_tag;
134 1.4 ryo struct bus_space bcm2836_bs_tag;
135 1.4 ryo struct bus_space bcm2836_a4x_bs_tag;
136 1.4 ryo
137 1.12 rin static paddr_t bcm2835_bus_to_phys(bus_addr_t);
138 1.12 rin static paddr_t bcm2836_bus_to_phys(bus_addr_t);
139 1.4 ryo
140 1.12 rin static paddr_t
141 1.12 rin bcm2835_bus_to_phys(bus_addr_t ba)
142 1.4 ryo {
143 1.4 ryo
144 1.12 rin /* Attempt to find the PA device mapping */
145 1.12 rin if (ba >= BCM2835_PERIPHERALS_BASE_BUS &&
146 1.12 rin ba < BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_SIZE)
147 1.12 rin return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
148 1.4 ryo
149 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
150 1.12 rin }
151 1.4 ryo
152 1.12 rin static paddr_t
153 1.12 rin bcm2836_bus_to_phys(bus_addr_t ba)
154 1.12 rin {
155 1.12 rin
156 1.12 rin /* Attempt to find the PA device mapping */
157 1.12 rin if (ba >= BCM2835_PERIPHERALS_BASE_BUS &&
158 1.12 rin ba < BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_SIZE)
159 1.12 rin return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
160 1.12 rin
161 1.12 rin if (ba >= BCM2836_ARM_LOCAL_BASE &&
162 1.12 rin ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE)
163 1.12 rin return ba;
164 1.4 ryo
165 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
166 1.4 ryo }
167 1.4 ryo
168 1.12 rin int
169 1.12 rin bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
170 1.12 rin bus_space_handle_t *bshp)
171 1.5 jmcneill {
172 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
173 1.5 jmcneill
174 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
175 1.5 jmcneill }
176 1.5 jmcneill
177 1.5 jmcneill paddr_t
178 1.12 rin bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
179 1.5 jmcneill {
180 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
181 1.5 jmcneill
182 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
183 1.5 jmcneill }
184 1.5 jmcneill
185 1.12 rin paddr_t
186 1.12 rin bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
187 1.4 ryo {
188 1.4 ryo
189 1.12 rin return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags);
190 1.4 ryo }
191 1.4 ryo
192 1.4 ryo int
193 1.4 ryo bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
194 1.4 ryo bus_space_handle_t *bshp)
195 1.4 ryo {
196 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
197 1.4 ryo
198 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
199 1.12 rin }
200 1.12 rin
201 1.12 rin paddr_t
202 1.12 rin bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
203 1.12 rin {
204 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
205 1.4 ryo
206 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
207 1.12 rin }
208 1.4 ryo
209 1.12 rin paddr_t
210 1.12 rin bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
211 1.12 rin {
212 1.4 ryo
213 1.12 rin return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags);
214 1.4 ryo }
215 1.1 skrll
216 1.1 skrll struct arm32_dma_range bcm2835_dma_ranges[] = {
217 1.1 skrll [0] = {
218 1.1 skrll .dr_sysbase = 0,
219 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT,
220 1.1 skrll }
221 1.1 skrll };
222 1.1 skrll
223 1.1 skrll struct arm32_dma_range bcm2836_dma_ranges[] = {
224 1.1 skrll [0] = {
225 1.1 skrll .dr_sysbase = 0,
226 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
227 1.1 skrll }
228 1.1 skrll };
229 1.1 skrll
230 1.1 skrll
231 1.1 skrll #if defined(SOC_BCM2835)
232 1.1 skrll static const struct pmap_devmap *
233 1.1 skrll bcm2835_platform_devmap(void)
234 1.1 skrll {
235 1.1 skrll static const struct pmap_devmap devmap[] = {
236 1.1 skrll DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
237 1.1 skrll BCM2835_PERIPHERALS_SIZE), /* 16Mb */
238 1.1 skrll
239 1.1 skrll DEVMAP_ENTRY_END
240 1.1 skrll };
241 1.1 skrll
242 1.1 skrll return devmap;
243 1.1 skrll }
244 1.1 skrll #endif
245 1.1 skrll
246 1.1 skrll #if defined(SOC_BCM2836)
247 1.1 skrll static const struct pmap_devmap *
248 1.1 skrll bcm2836_platform_devmap(void)
249 1.1 skrll {
250 1.1 skrll static const struct pmap_devmap devmap[] = {
251 1.1 skrll DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
252 1.1 skrll BCM2835_PERIPHERALS_SIZE), /* 16Mb */
253 1.1 skrll
254 1.1 skrll DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
255 1.1 skrll BCM2836_ARM_LOCAL_SIZE),
256 1.18 ryo #if defined(MULTIPROCESSOR) && defined(__aarch64__)
257 1.18 ryo /* for fdt cpu spin-table */
258 1.18 ryo DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
259 1.18 ryo BCM2836_ARM_SMP_SIZE),
260 1.18 ryo #endif
261 1.1 skrll DEVMAP_ENTRY_END
262 1.1 skrll };
263 1.1 skrll
264 1.1 skrll return devmap;
265 1.1 skrll }
266 1.1 skrll #endif
267 1.1 skrll /*
268 1.1 skrll * Macros to translate between physical and virtual for a subset of the
269 1.1 skrll * kernel address space. *Not* for general use.
270 1.1 skrll */
271 1.1 skrll
272 1.1 skrll #ifndef RPI_FB_WIDTH
273 1.1 skrll #define RPI_FB_WIDTH 1280
274 1.1 skrll #endif
275 1.1 skrll #ifndef RPI_FB_HEIGHT
276 1.1 skrll #define RPI_FB_HEIGHT 720
277 1.1 skrll #endif
278 1.1 skrll
279 1.1 skrll int uart_clk = BCM2835_UART0_CLK;
280 1.1 skrll int core_clk;
281 1.1 skrll
282 1.1 skrll static struct {
283 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
284 1.1 skrll struct vcprop_tag_clockrate vbt_uartclockrate;
285 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
286 1.1 skrll struct vcprop_tag end;
287 1.1 skrll } vb_uart __cacheline_aligned = {
288 1.1 skrll .vb_hdr = {
289 1.1 skrll .vpb_len = sizeof(vb_uart),
290 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
291 1.1 skrll },
292 1.1 skrll .vbt_uartclockrate = {
293 1.1 skrll .tag = {
294 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
295 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
296 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
297 1.1 skrll },
298 1.1 skrll .id = VCPROP_CLK_UART
299 1.1 skrll },
300 1.1 skrll .vbt_vpuclockrate = {
301 1.1 skrll .tag = {
302 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
303 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate),
304 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
305 1.1 skrll },
306 1.1 skrll .id = VCPROP_CLK_CORE
307 1.1 skrll },
308 1.1 skrll .end = {
309 1.1 skrll .vpt_tag = VCPROPTAG_NULL
310 1.1 skrll }
311 1.1 skrll };
312 1.1 skrll
313 1.1 skrll static struct {
314 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
315 1.1 skrll struct vcprop_tag_fwrev vbt_fwrev;
316 1.1 skrll struct vcprop_tag_boardmodel vbt_boardmodel;
317 1.1 skrll struct vcprop_tag_boardrev vbt_boardrev;
318 1.1 skrll struct vcprop_tag_macaddr vbt_macaddr;
319 1.1 skrll struct vcprop_tag_memory vbt_memory;
320 1.1 skrll struct vcprop_tag_boardserial vbt_serial;
321 1.1 skrll struct vcprop_tag_dmachan vbt_dmachan;
322 1.1 skrll struct vcprop_tag_cmdline vbt_cmdline;
323 1.1 skrll struct vcprop_tag_clockrate vbt_emmcclockrate;
324 1.1 skrll struct vcprop_tag_clockrate vbt_armclockrate;
325 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
326 1.1 skrll struct vcprop_tag end;
327 1.1 skrll } vb __cacheline_aligned = {
328 1.1 skrll .vb_hdr = {
329 1.1 skrll .vpb_len = sizeof(vb),
330 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
331 1.1 skrll },
332 1.1 skrll .vbt_fwrev = {
333 1.1 skrll .tag = {
334 1.1 skrll .vpt_tag = VCPROPTAG_GET_FIRMWAREREV,
335 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev),
336 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
337 1.1 skrll },
338 1.1 skrll },
339 1.1 skrll .vbt_boardmodel = {
340 1.1 skrll .tag = {
341 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDMODEL,
342 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel),
343 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
344 1.1 skrll },
345 1.1 skrll },
346 1.1 skrll .vbt_boardrev = {
347 1.1 skrll .tag = {
348 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDREVISION,
349 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev),
350 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
351 1.1 skrll },
352 1.1 skrll },
353 1.1 skrll .vbt_macaddr = {
354 1.1 skrll .tag = {
355 1.1 skrll .vpt_tag = VCPROPTAG_GET_MACADDRESS,
356 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr),
357 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
358 1.1 skrll },
359 1.1 skrll },
360 1.1 skrll .vbt_memory = {
361 1.1 skrll .tag = {
362 1.1 skrll .vpt_tag = VCPROPTAG_GET_ARMMEMORY,
363 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_memory),
364 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
365 1.1 skrll },
366 1.1 skrll },
367 1.1 skrll .vbt_serial = {
368 1.1 skrll .tag = {
369 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDSERIAL,
370 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_serial),
371 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
372 1.1 skrll },
373 1.1 skrll },
374 1.1 skrll .vbt_dmachan = {
375 1.1 skrll .tag = {
376 1.1 skrll .vpt_tag = VCPROPTAG_GET_DMACHAN,
377 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan),
378 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
379 1.1 skrll },
380 1.1 skrll },
381 1.1 skrll .vbt_cmdline = {
382 1.1 skrll .tag = {
383 1.1 skrll .vpt_tag = VCPROPTAG_GET_CMDLINE,
384 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline),
385 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
386 1.1 skrll },
387 1.1 skrll },
388 1.1 skrll .vbt_emmcclockrate = {
389 1.1 skrll .tag = {
390 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
391 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate),
392 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
393 1.1 skrll },
394 1.1 skrll .id = VCPROP_CLK_EMMC
395 1.1 skrll },
396 1.1 skrll .vbt_armclockrate = {
397 1.1 skrll .tag = {
398 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
399 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate),
400 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
401 1.1 skrll },
402 1.1 skrll .id = VCPROP_CLK_ARM
403 1.1 skrll },
404 1.1 skrll .vbt_vpuclockrate = {
405 1.1 skrll .tag = {
406 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
407 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate),
408 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
409 1.1 skrll },
410 1.1 skrll .id = VCPROP_CLK_CORE
411 1.1 skrll },
412 1.1 skrll .end = {
413 1.1 skrll .vpt_tag = VCPROPTAG_NULL
414 1.1 skrll }
415 1.1 skrll };
416 1.1 skrll
417 1.1 skrll #if NGENFB > 0
418 1.1 skrll static struct {
419 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
420 1.1 skrll struct vcprop_tag_edidblock vbt_edid;
421 1.1 skrll struct vcprop_tag end;
422 1.1 skrll } vb_edid __cacheline_aligned = {
423 1.1 skrll .vb_hdr = {
424 1.1 skrll .vpb_len = sizeof(vb_edid),
425 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
426 1.1 skrll },
427 1.1 skrll .vbt_edid = {
428 1.1 skrll .tag = {
429 1.1 skrll .vpt_tag = VCPROPTAG_GET_EDID_BLOCK,
430 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid),
431 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
432 1.1 skrll },
433 1.1 skrll .blockno = 0,
434 1.1 skrll },
435 1.1 skrll .end = {
436 1.1 skrll .vpt_tag = VCPROPTAG_NULL
437 1.1 skrll }
438 1.1 skrll };
439 1.1 skrll
440 1.1 skrll static struct {
441 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
442 1.1 skrll struct vcprop_tag_fbres vbt_res;
443 1.1 skrll struct vcprop_tag_fbres vbt_vres;
444 1.1 skrll struct vcprop_tag_fbdepth vbt_depth;
445 1.1 skrll struct vcprop_tag_fbalpha vbt_alpha;
446 1.1 skrll struct vcprop_tag_allocbuf vbt_allocbuf;
447 1.1 skrll struct vcprop_tag_blankscreen vbt_blank;
448 1.1 skrll struct vcprop_tag_fbpitch vbt_pitch;
449 1.1 skrll struct vcprop_tag end;
450 1.1 skrll } vb_setfb __cacheline_aligned = {
451 1.1 skrll .vb_hdr = {
452 1.1 skrll .vpb_len = sizeof(vb_setfb),
453 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
454 1.1 skrll },
455 1.1 skrll .vbt_res = {
456 1.1 skrll .tag = {
457 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_RES,
458 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res),
459 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
460 1.1 skrll },
461 1.1 skrll .width = 0,
462 1.1 skrll .height = 0,
463 1.1 skrll },
464 1.1 skrll .vbt_vres = {
465 1.1 skrll .tag = {
466 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_VRES,
467 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres),
468 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
469 1.1 skrll },
470 1.1 skrll .width = 0,
471 1.1 skrll .height = 0,
472 1.1 skrll },
473 1.1 skrll .vbt_depth = {
474 1.1 skrll .tag = {
475 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_DEPTH,
476 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth),
477 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
478 1.1 skrll },
479 1.1 skrll .bpp = 32,
480 1.1 skrll },
481 1.1 skrll .vbt_alpha = {
482 1.1 skrll .tag = {
483 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE,
484 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha),
485 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
486 1.1 skrll },
487 1.1 skrll .state = VCPROP_ALPHA_IGNORED,
488 1.1 skrll },
489 1.1 skrll .vbt_allocbuf = {
490 1.1 skrll .tag = {
491 1.1 skrll .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER,
492 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf),
493 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
494 1.1 skrll },
495 1.1 skrll .address = PAGE_SIZE, /* alignment */
496 1.1 skrll },
497 1.1 skrll .vbt_blank = {
498 1.1 skrll .tag = {
499 1.1 skrll .vpt_tag = VCPROPTAG_BLANK_SCREEN,
500 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank),
501 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
502 1.1 skrll },
503 1.1 skrll .state = VCPROP_BLANK_OFF,
504 1.1 skrll },
505 1.1 skrll .vbt_pitch = {
506 1.1 skrll .tag = {
507 1.1 skrll .vpt_tag = VCPROPTAG_GET_FB_PITCH,
508 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch),
509 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
510 1.1 skrll },
511 1.1 skrll },
512 1.1 skrll .end = {
513 1.1 skrll .vpt_tag = VCPROPTAG_NULL,
514 1.1 skrll },
515 1.1 skrll };
516 1.1 skrll
517 1.1 skrll #endif
518 1.1 skrll
519 1.1 skrll static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
520 1.1 skrll
521 1.1 skrll #if defined(RPI_HWCURSOR)
522 1.1 skrll #define CURSOR_BITMAP_SIZE (64 * 8)
523 1.1 skrll #define CURSOR_ARGB_SIZE (64 * 64 * 4)
524 1.1 skrll static uint32_t hcursor = 0;
525 1.1 skrll static bus_addr_t pcursor = 0;
526 1.1 skrll static uint32_t *cmem = NULL;
527 1.1 skrll static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
528 1.1 skrll static uint32_t cursor_cmap[4];
529 1.1 skrll static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
530 1.1 skrll #endif
531 1.1 skrll
532 1.1 skrll u_int
533 1.1 skrll bcm283x_clk_get_rate_uart(void)
534 1.1 skrll {
535 1.1 skrll
536 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
537 1.1 skrll return vb_uart.vbt_uartclockrate.rate;
538 1.1 skrll return 0;
539 1.1 skrll }
540 1.1 skrll
541 1.1 skrll u_int
542 1.1 skrll bcm283x_clk_get_rate_vpu(void)
543 1.1 skrll {
544 1.1 skrll
545 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
546 1.1 skrll vb.vbt_vpuclockrate.rate > 0) {
547 1.1 skrll return vb.vbt_vpuclockrate.rate;
548 1.1 skrll }
549 1.1 skrll return 0;
550 1.1 skrll }
551 1.1 skrll
552 1.1 skrll u_int
553 1.1 skrll bcm283x_clk_get_rate_emmc(void)
554 1.1 skrll {
555 1.1 skrll
556 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
557 1.1 skrll vb.vbt_emmcclockrate.rate > 0) {
558 1.1 skrll return vb.vbt_emmcclockrate.rate;
559 1.1 skrll }
560 1.1 skrll return 0;
561 1.1 skrll }
562 1.1 skrll
563 1.1 skrll
564 1.1 skrll
565 1.1 skrll static void
566 1.1 skrll bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
567 1.1 skrll {
568 1.1 skrll uint32_t res;
569 1.1 skrll
570 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
571 1.8 christos KERN_VTOPHYS((vaddr_t)&vb_uart));
572 1.1 skrll
573 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
574 1.1 skrll
575 1.1 skrll cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart));
576 1.1 skrll
577 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
578 1.1 skrll uart_clk = vb_uart.vbt_uartclockrate.rate;
579 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
580 1.1 skrll core_clk = vb_uart.vbt_vpuclockrate.rate;
581 1.1 skrll }
582 1.1 skrll
583 1.1 skrll #if defined(SOC_BCM2835)
584 1.1 skrll static void
585 1.1 skrll bcm2835_uartinit(void)
586 1.1 skrll {
587 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
588 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
589 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
590 1.1 skrll
591 1.1 skrll bcm283x_uartinit(iot, ioh);
592 1.1 skrll }
593 1.1 skrll #endif
594 1.1 skrll
595 1.1 skrll #if defined(SOC_BCM2836)
596 1.1 skrll static void
597 1.1 skrll bcm2836_uartinit(void)
598 1.1 skrll {
599 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
600 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
601 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
602 1.1 skrll
603 1.1 skrll bcm283x_uartinit(iot, ioh);
604 1.1 skrll }
605 1.1 skrll #endif
606 1.1 skrll
607 1.1 skrll #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024)
608 1.1 skrll
609 1.1 skrll static size_t bcm283x_memorysize;
610 1.1 skrll
611 1.1 skrll static void
612 1.1 skrll bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
613 1.1 skrll {
614 1.1 skrll uint32_t res;
615 1.1 skrll
616 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
617 1.1 skrll #if (NSDHC > 0)
618 1.1 skrll (1 << VCPM_POWER_SDCARD) |
619 1.1 skrll #endif
620 1.1 skrll #if (NPLCOM > 0)
621 1.1 skrll (1 << VCPM_POWER_UART0) |
622 1.1 skrll #endif
623 1.1 skrll #if (NBCMDWCTWO > 0)
624 1.1 skrll (1 << VCPM_POWER_USB) |
625 1.1 skrll #endif
626 1.1 skrll #if (NBSCIIC > 0)
627 1.1 skrll (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
628 1.1 skrll /* (1 << VCPM_POWER_I2C2) | */
629 1.1 skrll #endif
630 1.1 skrll #if (NBCMSPI > 0)
631 1.1 skrll (1 << VCPM_POWER_SPI) |
632 1.1 skrll #endif
633 1.1 skrll 0) << 4);
634 1.1 skrll
635 1.8 christos bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
636 1.8 christos KERN_VTOPHYS((vaddr_t)&vb));
637 1.1 skrll
638 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
639 1.1 skrll
640 1.1 skrll cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
641 1.1 skrll
642 1.1 skrll if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
643 1.1 skrll bootconfig.dramblocks = 1;
644 1.1 skrll bootconfig.dram[0].address = 0x0;
645 1.1 skrll bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
646 1.1 skrll return;
647 1.1 skrll }
648 1.1 skrll
649 1.1 skrll struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
650 1.1 skrll if (vcprop_tag_success_p(&vptp_mem->tag)) {
651 1.1 skrll size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
652 1.1 skrll sizeof(struct vcprop_memory);
653 1.1 skrll
654 1.1 skrll bcm283x_memorysize = 0;
655 1.1 skrll bootconfig.dramblocks = 0;
656 1.1 skrll
657 1.1 skrll for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
658 1.1 skrll bootconfig.dram[i].address = vptp_mem->mem[i].base;
659 1.1 skrll bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size);
660 1.1 skrll bootconfig.dramblocks++;
661 1.1 skrll
662 1.1 skrll bcm283x_memorysize += vptp_mem->mem[i].size;
663 1.1 skrll }
664 1.1 skrll }
665 1.1 skrll
666 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
667 1.1 skrll curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
668 1.1 skrll
669 1.1 skrll #ifdef VERBOSE_INIT_ARM
670 1.13 rin if (vcprop_tag_success_p(&vb.vbt_memory.tag))
671 1.13 rin printf("%s: memory size %zu\n", __func__,
672 1.13 rin bcm283x_memorysize);
673 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
674 1.1 skrll printf("%s: arm clock %d\n", __func__,
675 1.1 skrll vb.vbt_armclockrate.rate);
676 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
677 1.1 skrll printf("%s: firmware rev %x\n", __func__,
678 1.1 skrll vb.vbt_fwrev.rev);
679 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
680 1.1 skrll printf("%s: board model %x\n", __func__,
681 1.1 skrll vb.vbt_boardmodel.model);
682 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
683 1.8 christos printf("%s: mac-address %" PRIx64 "\n", __func__,
684 1.1 skrll vb.vbt_macaddr.addr);
685 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
686 1.1 skrll printf("%s: board rev %x\n", __func__,
687 1.1 skrll vb.vbt_boardrev.rev);
688 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_serial.tag))
689 1.8 christos printf("%s: board serial %" PRIx64 "\n", __func__,
690 1.1 skrll vb.vbt_serial.sn);
691 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
692 1.1 skrll printf("%s: DMA channel mask 0x%08x\n", __func__,
693 1.1 skrll vb.vbt_dmachan.mask);
694 1.1 skrll
695 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
696 1.1 skrll printf("%s: cmdline %s\n", __func__,
697 1.1 skrll vb.vbt_cmdline.cmdline);
698 1.1 skrll #endif
699 1.1 skrll }
700 1.1 skrll
701 1.1 skrll #if defined(SOC_BCM2835)
702 1.1 skrll static void
703 1.1 skrll bcm2835_bootparams(void)
704 1.1 skrll {
705 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
706 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
707 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
708 1.1 skrll
709 1.1 skrll bcm283x_bootparams(iot, ioh);
710 1.1 skrll }
711 1.1 skrll #endif
712 1.1 skrll
713 1.1 skrll #if defined(SOC_BCM2836)
714 1.1 skrll static void
715 1.1 skrll bcm2836_bootparams(void)
716 1.1 skrll {
717 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
718 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
719 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
720 1.1 skrll
721 1.1 skrll bcm283x_bootparams(iot, ioh);
722 1.1 skrll }
723 1.1 skrll
724 1.1 skrll static void
725 1.1 skrll bcm2836_bootstrap(void)
726 1.1 skrll {
727 1.18 ryo #ifdef MULTIPROCESSOR
728 1.18 ryo #ifdef __arm__
729 1.4 ryo
730 1.7 ryo #ifdef VERBOSE_INIT_ARM
731 1.7 ryo #define DPRINTF(...) printf(__VA_ARGS__)
732 1.7 ryo #else
733 1.7 ryo #define DPRINTF(...)
734 1.7 ryo #endif
735 1.7 ryo
736 1.18 ryo #define RPI_CPU_MAX 4
737 1.7 ryo
738 1.18 ryo const char *method;
739 1.7 ryo
740 1.18 ryo const int cpus = OF_finddevice("/cpus");
741 1.18 ryo if (cpus == -1) {
742 1.18 ryo aprint_error("%s: no /cpus node found\n", __func__);
743 1.18 ryo arm_cpu_max = 1;
744 1.18 ryo return;
745 1.7 ryo }
746 1.1 skrll
747 1.18 ryo /* implementation dependent string "brcm,bcm2836-smp" for ARM 32-bit */
748 1.18 ryo method = fdtbus_get_string(cpus, "enable-method");
749 1.18 ryo if ((method != NULL) && (strcmp(method, "brcm,bcm2836-smp") == 0)) {
750 1.18 ryo arm_cpu_max = RPI_CPU_MAX;
751 1.18 ryo DPRINTF("%s: %d cpus present\n", __func__, arm_cpu_max);
752 1.18 ryo
753 1.18 ryo extern void cortex_mpstart(void);
754 1.18 ryo
755 1.18 ryo for (size_t i = 1; i < RPI_CPU_MAX; i++) {
756 1.18 ryo bus_space_tag_t iot = &bcm2836_bs_tag;
757 1.18 ryo bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
758 1.18 ryo
759 1.18 ryo bus_space_write_4(iot, ioh,
760 1.18 ryo BCM2836_LOCAL_MAILBOX3_SETN(i),
761 1.18 ryo (uint32_t)cortex_mpstart);
762 1.18 ryo }
763 1.1 skrll
764 1.15 ryo /* Wake up AP in case firmware has placed it in WFE state */
765 1.15 ryo __asm __volatile("sev" ::: "memory");
766 1.15 ryo
767 1.15 ryo for (int loop = 0; loop < 16; loop++) {
768 1.18 ryo if (arm_cpu_hatched == __BITS(arm_cpu_max - 1, 1))
769 1.15 ryo break;
770 1.15 ryo gtmr_delay(10000);
771 1.15 ryo }
772 1.7 ryo
773 1.18 ryo for (size_t i = 1; i < arm_cpu_max; i++) {
774 1.18 ryo if ((arm_cpu_hatched & (1 << i)) == 0) {
775 1.18 ryo printf("%s: warning: cpu%zu failed to hatch\n",
776 1.18 ryo __func__, i);
777 1.18 ryo }
778 1.1 skrll }
779 1.18 ryo return;
780 1.1 skrll }
781 1.18 ryo #endif /* __arm__ */
782 1.18 ryo
783 1.18 ryo /* try enable-method each cpus */
784 1.18 ryo arm_fdt_cpu_bootstrap();
785 1.18 ryo #endif /* MULTIPROCESSOR */
786 1.1 skrll }
787 1.1 skrll
788 1.1 skrll #endif /* SOC_BCM2836 */
789 1.1 skrll
790 1.1 skrll #if NGENFB > 0
791 1.1 skrll static bool
792 1.1 skrll rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
793 1.1 skrll {
794 1.1 skrll char *x;
795 1.1 skrll
796 1.1 skrll if (strncmp(s, "disable", 7) == 0)
797 1.1 skrll return false;
798 1.1 skrll
799 1.1 skrll x = strchr(s, 'x');
800 1.1 skrll if (x) {
801 1.1 skrll *pwidth = strtoul(s, NULL, 10);
802 1.1 skrll *pheight = strtoul(x + 1, NULL, 10);
803 1.1 skrll }
804 1.1 skrll
805 1.1 skrll return true;
806 1.1 skrll }
807 1.1 skrll
808 1.1 skrll static bool
809 1.1 skrll rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
810 1.1 skrll {
811 1.1 skrll struct edid_info ei;
812 1.1 skrll uint8_t edid_data[1024];
813 1.1 skrll uint32_t res;
814 1.1 skrll int error;
815 1.1 skrll
816 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
817 1.1 skrll sizeof(vb_edid), &res);
818 1.1 skrll if (error) {
819 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
820 1.1 skrll return false;
821 1.1 skrll }
822 1.1 skrll
823 1.1 skrll if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
824 1.1 skrll !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
825 1.1 skrll vb_edid.vbt_edid.status != 0)
826 1.1 skrll return false;
827 1.1 skrll
828 1.1 skrll memset(edid_data, 0, sizeof(edid_data));
829 1.1 skrll memcpy(edid_data, vb_edid.vbt_edid.data,
830 1.1 skrll sizeof(vb_edid.vbt_edid.data));
831 1.1 skrll edid_parse(edid_data, &ei);
832 1.1 skrll #ifdef VERBOSE_INIT_ARM
833 1.1 skrll edid_print(&ei);
834 1.1 skrll #endif
835 1.1 skrll
836 1.1 skrll if (ei.edid_preferred_mode) {
837 1.1 skrll *pwidth = ei.edid_preferred_mode->hdisplay;
838 1.1 skrll *pheight = ei.edid_preferred_mode->vdisplay;
839 1.1 skrll }
840 1.1 skrll
841 1.1 skrll return true;
842 1.1 skrll }
843 1.1 skrll
844 1.1 skrll /*
845 1.1 skrll * Initialize framebuffer console.
846 1.1 skrll *
847 1.1 skrll * Some notes about boot parameters:
848 1.1 skrll * - If "fb=disable" is present, ignore framebuffer completely.
849 1.1 skrll * - If "fb=<width>x<height> is present, use the specified mode.
850 1.1 skrll * - If "console=fb" is present, attach framebuffer to console.
851 1.1 skrll */
852 1.1 skrll static bool
853 1.1 skrll rpi_fb_init(prop_dictionary_t dict, void *aux)
854 1.1 skrll {
855 1.1 skrll uint32_t width = 0, height = 0;
856 1.1 skrll uint32_t res;
857 1.1 skrll char *ptr;
858 1.1 skrll int integer;
859 1.1 skrll int error;
860 1.1 skrll bool is_bgr = true;
861 1.1 skrll
862 1.1 skrll if (get_bootconf_option(boot_args, "fb",
863 1.1 skrll BOOTOPT_TYPE_STRING, &ptr)) {
864 1.1 skrll if (rpi_fb_parse_mode(ptr, &width, &height) == false)
865 1.1 skrll return false;
866 1.1 skrll }
867 1.1 skrll if (width == 0 || height == 0) {
868 1.1 skrll rpi_fb_get_edid_mode(&width, &height);
869 1.1 skrll }
870 1.1 skrll if (width == 0 || height == 0) {
871 1.1 skrll width = RPI_FB_WIDTH;
872 1.1 skrll height = RPI_FB_HEIGHT;
873 1.1 skrll }
874 1.1 skrll
875 1.1 skrll vb_setfb.vbt_res.width = width;
876 1.1 skrll vb_setfb.vbt_res.height = height;
877 1.1 skrll vb_setfb.vbt_vres.width = width;
878 1.1 skrll vb_setfb.vbt_vres.height = height;
879 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
880 1.1 skrll sizeof(vb_setfb), &res);
881 1.1 skrll if (error) {
882 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
883 1.1 skrll return false;
884 1.1 skrll }
885 1.1 skrll
886 1.1 skrll if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
887 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
888 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
889 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
890 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
891 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
892 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
893 1.1 skrll printf("%s: prop tag failed\n", __func__);
894 1.1 skrll return false;
895 1.1 skrll }
896 1.1 skrll
897 1.1 skrll #ifdef VERBOSE_INIT_ARM
898 1.1 skrll printf("%s: addr = 0x%x size = %d\n", __func__,
899 1.1 skrll vb_setfb.vbt_allocbuf.address,
900 1.1 skrll vb_setfb.vbt_allocbuf.size);
901 1.1 skrll printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp);
902 1.1 skrll printf("%s: pitch = %d\n", __func__,
903 1.1 skrll vb_setfb.vbt_pitch.linebytes);
904 1.1 skrll printf("%s: width = %d height = %d\n", __func__,
905 1.1 skrll vb_setfb.vbt_res.width, vb_setfb.vbt_res.height);
906 1.1 skrll printf("%s: vwidth = %d vheight = %d\n", __func__,
907 1.1 skrll vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height);
908 1.1 skrll #endif
909 1.1 skrll
910 1.1 skrll if (vb_setfb.vbt_allocbuf.address == 0 ||
911 1.1 skrll vb_setfb.vbt_allocbuf.size == 0 ||
912 1.1 skrll vb_setfb.vbt_res.width == 0 ||
913 1.1 skrll vb_setfb.vbt_res.height == 0 ||
914 1.1 skrll vb_setfb.vbt_vres.width == 0 ||
915 1.1 skrll vb_setfb.vbt_vres.height == 0 ||
916 1.1 skrll vb_setfb.vbt_pitch.linebytes == 0) {
917 1.1 skrll printf("%s: failed to set mode %ux%u\n", __func__,
918 1.1 skrll width, height);
919 1.1 skrll return false;
920 1.1 skrll }
921 1.1 skrll
922 1.1 skrll prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width);
923 1.1 skrll prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height);
924 1.1 skrll prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp);
925 1.1 skrll prop_dictionary_set_uint16(dict, "linebytes",
926 1.1 skrll vb_setfb.vbt_pitch.linebytes);
927 1.1 skrll prop_dictionary_set_uint32(dict, "address",
928 1.1 skrll vb_setfb.vbt_allocbuf.address);
929 1.1 skrll
930 1.1 skrll /*
931 1.1 skrll * Old firmware uses BGR. New firmware uses RGB. The get and set
932 1.1 skrll * pixel order mailbox properties don't seem to work. The firmware
933 1.1 skrll * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
934 1.1 skrll * to determine pixel order. 0 means BGR, 1 means RGB.
935 1.1 skrll *
936 1.1 skrll * See https://github.com/raspberrypi/linux/issues/514
937 1.1 skrll */
938 1.1 skrll if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
939 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
940 1.1 skrll is_bgr = integer == 0;
941 1.1 skrll }
942 1.1 skrll prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
943 1.1 skrll
944 1.1 skrll /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
945 1.1 skrll if (get_bootconf_option(boot_args, "genfb.type",
946 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
947 1.1 skrll prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
948 1.1 skrll }
949 1.1 skrll
950 1.1 skrll #if defined(RPI_HWCURSOR)
951 1.1 skrll struct fdt_attach_args *faa = aux;
952 1.1 skrll bus_space_handle_t hc;
953 1.1 skrll
954 1.1 skrll hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
955 1.1 skrll MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
956 1.1 skrll pcursor = rpi_lock_mem(hcursor);
957 1.1 skrll #ifdef RPI_IOCTL_DEBUG
958 1.1 skrll printf("hcursor: %08x\n", hcursor);
959 1.1 skrll printf("pcursor: %08x\n", (uint32_t)pcursor);
960 1.1 skrll printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
961 1.1 skrll #endif
962 1.1 skrll if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
963 1.1 skrll BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
964 1.1 skrll printf("couldn't map cursor memory\n");
965 1.1 skrll } else {
966 1.1 skrll int i, j, k;
967 1.1 skrll
968 1.1 skrll cmem = bus_space_vaddr(faa->faa_bst, hc);
969 1.1 skrll k = 0;
970 1.1 skrll for (j = 0; j < 64; j++) {
971 1.1 skrll for (i = 0; i < 64; i++) {
972 1.1 skrll cmem[i + k] =
973 1.1 skrll ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
974 1.1 skrll }
975 1.1 skrll k += 64;
976 1.1 skrll }
977 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
978 1.1 skrll rpi_fb_initcursor(pcursor, 0, 0);
979 1.1 skrll #ifdef RPI_IOCTL_DEBUG
980 1.1 skrll rpi_fb_movecursor(600, 400, 1);
981 1.1 skrll #else
982 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
983 1.1 skrll #endif
984 1.1 skrll }
985 1.1 skrll #endif
986 1.1 skrll
987 1.1 skrll return true;
988 1.1 skrll }
989 1.1 skrll
990 1.1 skrll
991 1.1 skrll #if defined(RPI_HWCURSOR)
992 1.1 skrll static int
993 1.1 skrll rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
994 1.1 skrll {
995 1.1 skrll int pos = 0;
996 1.1 skrll int shape = 0;
997 1.1 skrll
998 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
999 1.1 skrll if (cursor_on != cur->enable) {
1000 1.1 skrll cursor_on = cur->enable;
1001 1.1 skrll pos = 1;
1002 1.1 skrll }
1003 1.1 skrll }
1004 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
1005 1.1 skrll
1006 1.1 skrll hot_x = cur->hot.x;
1007 1.1 skrll hot_y = cur->hot.y;
1008 1.1 skrll pos = 1;
1009 1.1 skrll shape = 1;
1010 1.1 skrll }
1011 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
1012 1.1 skrll
1013 1.1 skrll cursor_x = cur->pos.x;
1014 1.1 skrll cursor_y = cur->pos.y;
1015 1.1 skrll pos = 1;
1016 1.1 skrll }
1017 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
1018 1.1 skrll int i;
1019 1.1 skrll uint32_t val;
1020 1.1 skrll
1021 1.17 riastrad for (i = 0; i < uimin(cur->cmap.count, 3); i++) {
1022 1.1 skrll val = (cur->cmap.red[i] << 16 ) |
1023 1.1 skrll (cur->cmap.green[i] << 8) |
1024 1.1 skrll (cur->cmap.blue[i] ) |
1025 1.1 skrll 0xff000000;
1026 1.1 skrll cursor_cmap[i + cur->cmap.index + 2] = val;
1027 1.1 skrll }
1028 1.1 skrll shape = 1;
1029 1.1 skrll }
1030 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
1031 1.1 skrll int err;
1032 1.1 skrll
1033 1.1 skrll err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
1034 1.1 skrll err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
1035 1.1 skrll if (err != 0)
1036 1.1 skrll return EFAULT;
1037 1.1 skrll shape = 1;
1038 1.1 skrll }
1039 1.1 skrll if (shape) {
1040 1.1 skrll int i, j, idx;
1041 1.1 skrll uint8_t mask;
1042 1.1 skrll
1043 1.1 skrll for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
1044 1.1 skrll mask = 0x01;
1045 1.1 skrll for (j = 0; j < 8; j++) {
1046 1.1 skrll idx = ((cursor_mask[i] & mask) ? 2 : 0) |
1047 1.1 skrll ((cursor_bitmap[i] & mask) ? 1 : 0);
1048 1.1 skrll cmem[i * 8 + j] = cursor_cmap[idx];
1049 1.1 skrll mask = mask << 1;
1050 1.1 skrll }
1051 1.1 skrll }
1052 1.1 skrll /* just in case */
1053 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1054 1.1 skrll rpi_fb_initcursor(pcursor, hot_x, hot_y);
1055 1.1 skrll }
1056 1.1 skrll if (pos) {
1057 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1058 1.1 skrll }
1059 1.1 skrll return 0;
1060 1.1 skrll }
1061 1.1 skrll #endif
1062 1.1 skrll
1063 1.1 skrll static int
1064 1.1 skrll rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
1065 1.1 skrll {
1066 1.1 skrll
1067 1.1 skrll switch (cmd) {
1068 1.1 skrll case WSDISPLAYIO_SVIDEO:
1069 1.1 skrll {
1070 1.1 skrll int d = *(int *)data;
1071 1.1 skrll if (d == rpi_video_on)
1072 1.1 skrll return 0;
1073 1.1 skrll rpi_video_on = d;
1074 1.1 skrll rpi_fb_set_video(d);
1075 1.1 skrll #if defined(RPI_HWCURSOR)
1076 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y,
1077 1.1 skrll d ? cursor_on : 0);
1078 1.1 skrll #endif
1079 1.1 skrll }
1080 1.1 skrll return 0;
1081 1.1 skrll case WSDISPLAYIO_GVIDEO:
1082 1.1 skrll *(int *)data = rpi_video_on;
1083 1.1 skrll return 0;
1084 1.1 skrll #if defined(RPI_HWCURSOR)
1085 1.1 skrll case WSDISPLAYIO_GCURPOS:
1086 1.1 skrll {
1087 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1088 1.1 skrll
1089 1.1 skrll cp->x = cursor_x;
1090 1.1 skrll cp->y = cursor_y;
1091 1.1 skrll }
1092 1.1 skrll return 0;
1093 1.1 skrll case WSDISPLAYIO_SCURPOS:
1094 1.1 skrll {
1095 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1096 1.1 skrll
1097 1.1 skrll cursor_x = cp->x;
1098 1.1 skrll cursor_y = cp->y;
1099 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1100 1.1 skrll }
1101 1.1 skrll return 0;
1102 1.1 skrll case WSDISPLAYIO_GCURMAX:
1103 1.1 skrll {
1104 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1105 1.1 skrll
1106 1.1 skrll cp->x = 64;
1107 1.1 skrll cp->y = 64;
1108 1.1 skrll }
1109 1.1 skrll return 0;
1110 1.1 skrll case WSDISPLAYIO_SCURSOR:
1111 1.1 skrll {
1112 1.1 skrll struct wsdisplay_cursor *cursor = (void *)data;
1113 1.1 skrll
1114 1.1 skrll return rpi_fb_do_cursor(cursor);
1115 1.1 skrll }
1116 1.1 skrll #endif
1117 1.1 skrll default:
1118 1.1 skrll return EPASSTHROUGH;
1119 1.1 skrll }
1120 1.1 skrll }
1121 1.1 skrll
1122 1.1 skrll #endif
1123 1.1 skrll
1124 1.1 skrll SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
1125 1.1 skrll {
1126 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1127 1.1 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
1128 1.1 skrll NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
1129 1.1 skrll
1130 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1131 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1132 1.1 skrll CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
1133 1.1 skrll &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1134 1.1 skrll
1135 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1136 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1137 1.1 skrll CTLTYPE_INT, "board_model", NULL, NULL, 0,
1138 1.1 skrll &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1139 1.1 skrll
1140 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1141 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1142 1.1 skrll CTLTYPE_INT, "board_revision", NULL, NULL, 0,
1143 1.1 skrll &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1144 1.1 skrll
1145 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1146 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
1147 1.1 skrll CTLTYPE_QUAD, "serial", NULL, NULL, 0,
1148 1.1 skrll &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1149 1.1 skrll }
1150 1.1 skrll
1151 1.1 skrll #if defined(SOC_BCM2835)
1152 1.1 skrll static void
1153 1.1 skrll bcm2835_platform_bootstrap(void)
1154 1.1 skrll {
1155 1.1 skrll
1156 1.4 ryo bcm2835_bs_tag = arm_generic_bs_tag;
1157 1.4 ryo bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
1158 1.4 ryo
1159 1.4 ryo bcm2835_bs_tag.bs_map = bcm2835_bs_map;
1160 1.12 rin bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap;
1161 1.4 ryo bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
1162 1.12 rin bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap;
1163 1.4 ryo
1164 1.1 skrll fdtbus_set_decoderegprop(false);
1165 1.1 skrll
1166 1.1 skrll bcm2835_uartinit();
1167 1.1 skrll
1168 1.1 skrll bcm2835_bootparams();
1169 1.1 skrll }
1170 1.1 skrll #endif
1171 1.1 skrll
1172 1.1 skrll #if defined(SOC_BCM2836)
1173 1.1 skrll static void
1174 1.1 skrll bcm2836_platform_bootstrap(void)
1175 1.1 skrll {
1176 1.1 skrll
1177 1.4 ryo bcm2836_bs_tag = arm_generic_bs_tag;
1178 1.4 ryo bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
1179 1.4 ryo
1180 1.4 ryo bcm2836_bs_tag.bs_map = bcm2836_bs_map;
1181 1.12 rin bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap;
1182 1.4 ryo bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
1183 1.12 rin bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap;
1184 1.4 ryo
1185 1.1 skrll fdtbus_set_decoderegprop(false);
1186 1.1 skrll
1187 1.1 skrll bcm2836_uartinit();
1188 1.1 skrll
1189 1.1 skrll bcm2836_bootparams();
1190 1.1 skrll
1191 1.1 skrll bcm2836_bootstrap();
1192 1.1 skrll }
1193 1.1 skrll #endif
1194 1.1 skrll
1195 1.1 skrll #if defined(SOC_BCM2835)
1196 1.1 skrll static void
1197 1.1 skrll bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
1198 1.1 skrll {
1199 1.1 skrll
1200 1.1 skrll faa->faa_bst = &bcm2835_bs_tag;
1201 1.1 skrll faa->faa_a4x_bst = &bcm2835_a4x_bs_tag;
1202 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1203 1.1 skrll
1204 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges;
1205 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges);
1206 1.1 skrll bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize;
1207 1.1 skrll }
1208 1.1 skrll #endif
1209 1.1 skrll
1210 1.1 skrll #if defined(SOC_BCM2836)
1211 1.1 skrll static void
1212 1.1 skrll bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
1213 1.1 skrll {
1214 1.1 skrll
1215 1.1 skrll faa->faa_bst = &bcm2836_bs_tag;
1216 1.1 skrll faa->faa_a4x_bst = &bcm2836_a4x_bs_tag;
1217 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1218 1.1 skrll
1219 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges;
1220 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges);
1221 1.1 skrll bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize;
1222 1.1 skrll }
1223 1.1 skrll #endif
1224 1.1 skrll
1225 1.1 skrll
1226 1.1 skrll void
1227 1.1 skrll bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1228 1.1 skrll {
1229 1.1 skrll volatile uint32_t *uartaddr =
1230 1.4 ryo cpu_earlydevice_va_p() ?
1231 1.1 skrll (volatile uint32_t *)va :
1232 1.1 skrll (volatile uint32_t *)pa;
1233 1.1 skrll
1234 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0)
1235 1.1 skrll continue;
1236 1.1 skrll
1237 1.1 skrll uartaddr[PL01XCOM_DR / 4] = c;
1238 1.1 skrll
1239 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0)
1240 1.1 skrll continue;
1241 1.1 skrll }
1242 1.1 skrll
1243 1.1 skrll void
1244 1.1 skrll bcm2835_platform_early_putchar(char c)
1245 1.1 skrll {
1246 1.1 skrll paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1247 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1248 1.1 skrll
1249 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1250 1.1 skrll }
1251 1.1 skrll
1252 1.1 skrll void
1253 1.1 skrll bcm2836_platform_early_putchar(char c)
1254 1.1 skrll {
1255 1.1 skrll paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1256 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1257 1.1 skrll
1258 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1259 1.1 skrll }
1260 1.1 skrll
1261 1.1 skrll #define BCM283x_REF_FREQ 19200000
1262 1.1 skrll
1263 1.1 skrll void
1264 1.1 skrll bcm2837_platform_early_putchar(char c)
1265 1.1 skrll {
1266 1.1 skrll #define AUCONSADDR_PA BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE)
1267 1.1 skrll #define AUCONSADDR_VA BCM2835_IOPHYSTOVIRT(AUCONSADDR_PA)
1268 1.1 skrll volatile uint32_t *uartaddr =
1269 1.4 ryo cpu_earlydevice_va_p() ?
1270 1.1 skrll (volatile uint32_t *)AUCONSADDR_VA :
1271 1.1 skrll (volatile uint32_t *)AUCONSADDR_PA;
1272 1.1 skrll
1273 1.1 skrll while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
1274 1.1 skrll ;
1275 1.1 skrll
1276 1.1 skrll uartaddr[com_data] = c;
1277 1.1 skrll }
1278 1.1 skrll
1279 1.1 skrll static void
1280 1.1 skrll bcm283x_platform_device_register(device_t dev, void *aux)
1281 1.1 skrll {
1282 1.1 skrll prop_dictionary_t dict = device_properties(dev);
1283 1.1 skrll
1284 1.1 skrll if (device_is_a(dev, "bcmdmac") &&
1285 1.1 skrll vcprop_tag_success_p(&vb.vbt_dmachan.tag)) {
1286 1.1 skrll prop_dictionary_set_uint32(dict,
1287 1.1 skrll "chanmask", vb.vbt_dmachan.mask);
1288 1.1 skrll }
1289 1.1 skrll #if NSDHC > 0
1290 1.1 skrll if (booted_device == NULL &&
1291 1.1 skrll device_is_a(dev, "ld") &&
1292 1.1 skrll device_is_a(device_parent(dev), "sdmmc")) {
1293 1.1 skrll booted_partition = 0;
1294 1.1 skrll booted_device = dev;
1295 1.1 skrll }
1296 1.1 skrll #endif
1297 1.14 rin if ((device_is_a(dev, "usmsc") || device_is_a(dev, "mue")) &&
1298 1.1 skrll vcprop_tag_success_p(&vb.vbt_macaddr.tag)) {
1299 1.1 skrll const uint8_t enaddr[ETHER_ADDR_LEN] = {
1300 1.1 skrll (vb.vbt_macaddr.addr >> 0) & 0xff,
1301 1.1 skrll (vb.vbt_macaddr.addr >> 8) & 0xff,
1302 1.1 skrll (vb.vbt_macaddr.addr >> 16) & 0xff,
1303 1.1 skrll (vb.vbt_macaddr.addr >> 24) & 0xff,
1304 1.1 skrll (vb.vbt_macaddr.addr >> 32) & 0xff,
1305 1.1 skrll (vb.vbt_macaddr.addr >> 40) & 0xff
1306 1.1 skrll };
1307 1.1 skrll
1308 1.1 skrll prop_data_t pd = prop_data_create_data(enaddr, ETHER_ADDR_LEN);
1309 1.1 skrll KASSERT(pd != NULL);
1310 1.1 skrll if (prop_dictionary_set(device_properties(dev), "mac-address",
1311 1.1 skrll pd) == false) {
1312 1.1 skrll aprint_error_dev(dev,
1313 1.1 skrll "WARNING: Unable to set mac-address property\n");
1314 1.1 skrll }
1315 1.1 skrll prop_object_release(pd);
1316 1.1 skrll }
1317 1.1 skrll
1318 1.1 skrll #if NGENFB > 0
1319 1.1 skrll if (device_is_a(dev, "genfb")) {
1320 1.1 skrll char *ptr;
1321 1.1 skrll
1322 1.1 skrll bcmgenfb_set_console_dev(dev);
1323 1.1 skrll bcmgenfb_set_ioctl(&rpi_ioctl);
1324 1.1 skrll #ifdef DDB
1325 1.1 skrll db_trap_callback = bcmgenfb_ddb_trap_callback;
1326 1.1 skrll #endif
1327 1.1 skrll if (rpi_fb_init(dict, aux) == false)
1328 1.1 skrll return;
1329 1.1 skrll if (get_bootconf_option(boot_args, "console",
1330 1.1 skrll BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
1331 1.1 skrll prop_dictionary_set_bool(dict, "is_console", true);
1332 1.1 skrll #if NUKBD > 0
1333 1.1 skrll /* allow ukbd to be the console keyboard */
1334 1.1 skrll ukbd_cnattach();
1335 1.1 skrll #endif
1336 1.1 skrll } else {
1337 1.1 skrll prop_dictionary_set_bool(dict, "is_console", false);
1338 1.1 skrll }
1339 1.1 skrll }
1340 1.1 skrll #endif
1341 1.1 skrll }
1342 1.1 skrll
1343 1.1 skrll static u_int
1344 1.1 skrll bcm283x_platform_uart_freq(void)
1345 1.1 skrll {
1346 1.1 skrll
1347 1.1 skrll return uart_clk;
1348 1.1 skrll }
1349 1.1 skrll
1350 1.1 skrll #if defined(SOC_BCM2835)
1351 1.1 skrll static const struct arm_platform bcm2835_platform = {
1352 1.11 skrll .ap_devmap = bcm2835_platform_devmap,
1353 1.11 skrll .ap_bootstrap = bcm2835_platform_bootstrap,
1354 1.11 skrll .ap_init_attach_args = bcm2835_platform_init_attach_args,
1355 1.11 skrll .ap_early_putchar = bcm2835_platform_early_putchar,
1356 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1357 1.11 skrll .ap_reset = bcm2835_system_reset,
1358 1.11 skrll .ap_delay = bcm2835_tmr_delay,
1359 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1360 1.1 skrll };
1361 1.1 skrll
1362 1.1 skrll ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform);
1363 1.1 skrll #endif
1364 1.1 skrll
1365 1.1 skrll #if defined(SOC_BCM2836)
1366 1.1 skrll static u_int
1367 1.1 skrll bcm2837_platform_uart_freq(void)
1368 1.1 skrll {
1369 1.1 skrll
1370 1.1 skrll return core_clk * 2;
1371 1.1 skrll }
1372 1.1 skrll
1373 1.1 skrll static const struct arm_platform bcm2836_platform = {
1374 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1375 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1376 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1377 1.11 skrll .ap_early_putchar = bcm2836_platform_early_putchar,
1378 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1379 1.11 skrll .ap_reset = bcm2835_system_reset,
1380 1.11 skrll .ap_delay = gtmr_delay,
1381 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1382 1.1 skrll };
1383 1.1 skrll
1384 1.1 skrll static const struct arm_platform bcm2837_platform = {
1385 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1386 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1387 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1388 1.11 skrll .ap_early_putchar = bcm2837_platform_early_putchar,
1389 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1390 1.11 skrll .ap_reset = bcm2835_system_reset,
1391 1.11 skrll .ap_delay = gtmr_delay,
1392 1.11 skrll .ap_uart_freq = bcm2837_platform_uart_freq,
1393 1.1 skrll };
1394 1.1 skrll
1395 1.1 skrll ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform);
1396 1.1 skrll ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform);
1397 1.1 skrll #endif
1398