bcm283x_platform.c revision 1.31 1 1.31 skrll /* $NetBSD: bcm283x_platform.c,v 1.31 2019/12/30 16:19:27 skrll Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.31 skrll __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.31 2019/12/30 16:19:27 skrll Exp $");
31 1.1 skrll
32 1.1 skrll #include "opt_arm_debug.h"
33 1.1 skrll #include "opt_bcm283x.h"
34 1.1 skrll #include "opt_cpuoptions.h"
35 1.1 skrll #include "opt_ddb.h"
36 1.1 skrll #include "opt_evbarm_boardtype.h"
37 1.1 skrll #include "opt_kgdb.h"
38 1.1 skrll #include "opt_fdt.h"
39 1.1 skrll #include "opt_rpi.h"
40 1.1 skrll #include "opt_vcprop.h"
41 1.1 skrll
42 1.1 skrll #include "sdhc.h"
43 1.1 skrll #include "bcmsdhost.h"
44 1.1 skrll #include "bcmdwctwo.h"
45 1.1 skrll #include "bcmspi.h"
46 1.1 skrll #include "bsciic.h"
47 1.1 skrll #include "plcom.h"
48 1.1 skrll #include "com.h"
49 1.1 skrll #include "genfb.h"
50 1.1 skrll #include "ukbd.h"
51 1.1 skrll
52 1.1 skrll #include <sys/param.h>
53 1.1 skrll #include <sys/bus.h>
54 1.1 skrll #include <sys/cpu.h>
55 1.1 skrll #include <sys/device.h>
56 1.1 skrll #include <sys/termios.h>
57 1.1 skrll
58 1.1 skrll #include <net/if_ether.h>
59 1.1 skrll
60 1.1 skrll #include <prop/proplib.h>
61 1.1 skrll
62 1.1 skrll #include <dev/fdt/fdtvar.h>
63 1.1 skrll
64 1.1 skrll #include <uvm/uvm_extern.h>
65 1.1 skrll
66 1.1 skrll #include <machine/bootconfig.h>
67 1.9 skrll
68 1.4 ryo #include <arm/armreg.h>
69 1.1 skrll #include <arm/cpufunc.h>
70 1.1 skrll
71 1.1 skrll #include <libfdt.h>
72 1.1 skrll
73 1.1 skrll #include <arm/broadcom/bcm2835reg.h>
74 1.1 skrll #include <arm/broadcom/bcm2835var.h>
75 1.4 ryo #include <arm/broadcom/bcm283x_platform.h>
76 1.1 skrll #include <arm/broadcom/bcm2835_intr.h>
77 1.1 skrll #include <arm/broadcom/bcm2835_mbox.h>
78 1.1 skrll #include <arm/broadcom/bcm2835_pmwdogvar.h>
79 1.1 skrll
80 1.1 skrll #include <evbarm/dev/plcomreg.h>
81 1.1 skrll #include <evbarm/dev/plcomvar.h>
82 1.9 skrll #include <evbarm/fdt/machdep.h>
83 1.1 skrll
84 1.1 skrll #include <dev/ic/ns16550reg.h>
85 1.1 skrll #include <dev/ic/comreg.h>
86 1.1 skrll
87 1.1 skrll #include <evbarm/rpi/vcio.h>
88 1.1 skrll #include <evbarm/rpi/vcpm.h>
89 1.1 skrll #include <evbarm/rpi/vcprop.h>
90 1.1 skrll
91 1.1 skrll #include <arm/fdt/arm_fdtvar.h>
92 1.1 skrll
93 1.1 skrll #include <arm/cortex/gtmr_var.h>
94 1.1 skrll
95 1.1 skrll #if NGENFB > 0
96 1.1 skrll #include <dev/videomode/videomode.h>
97 1.1 skrll #include <dev/videomode/edidvar.h>
98 1.1 skrll #include <dev/wscons/wsconsio.h>
99 1.1 skrll #endif
100 1.1 skrll
101 1.1 skrll #if NUKBD > 0
102 1.1 skrll #include <dev/usb/ukbdvar.h>
103 1.1 skrll #endif
104 1.1 skrll
105 1.1 skrll #ifdef DDB
106 1.1 skrll #include <machine/db_machdep.h>
107 1.1 skrll #include <ddb/db_sym.h>
108 1.1 skrll #include <ddb/db_extern.h>
109 1.1 skrll #endif
110 1.1 skrll
111 1.20 skrll #define RPI_CPU_MAX 4
112 1.20 skrll
113 1.1 skrll void bcm2835_platform_early_putchar(char c);
114 1.1 skrll void bcm2836_platform_early_putchar(char c);
115 1.1 skrll void bcm2837_platform_early_putchar(char c);
116 1.28 skrll void bcm2711_platform_early_putchar(char c);
117 1.1 skrll
118 1.1 skrll extern void bcmgenfb_set_console_dev(device_t dev);
119 1.1 skrll void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
120 1.1 skrll extern void bcmgenfb_ddb_trap_callback(int where);
121 1.1 skrll static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
122 1.1 skrll
123 1.4 ryo extern struct bus_space arm_generic_bs_tag;
124 1.4 ryo extern struct bus_space arm_generic_a4x_bs_tag;
125 1.1 skrll
126 1.1 skrll /* Prototypes for all the bus_space structure functions */
127 1.4 ryo bs_protos(arm_generic);
128 1.4 ryo bs_protos(arm_generic_a4x);
129 1.1 skrll bs_protos(bcm2835);
130 1.1 skrll bs_protos(bcm2835_a4x);
131 1.4 ryo bs_protos(bcm2836);
132 1.4 ryo bs_protos(bcm2836_a4x);
133 1.28 skrll bs_protos(bcm2711);
134 1.28 skrll bs_protos(bcm2711_a4x);
135 1.4 ryo
136 1.4 ryo struct bus_space bcm2835_bs_tag;
137 1.4 ryo struct bus_space bcm2835_a4x_bs_tag;
138 1.4 ryo struct bus_space bcm2836_bs_tag;
139 1.4 ryo struct bus_space bcm2836_a4x_bs_tag;
140 1.28 skrll struct bus_space bcm2711_bs_tag;
141 1.28 skrll struct bus_space bcm2711_a4x_bs_tag;
142 1.4 ryo
143 1.12 rin static paddr_t bcm2835_bus_to_phys(bus_addr_t);
144 1.12 rin static paddr_t bcm2836_bus_to_phys(bus_addr_t);
145 1.28 skrll static paddr_t bcm2711_bus_to_phys(bus_addr_t);
146 1.4 ryo
147 1.20 skrll #ifdef VERBOSE_INIT_ARM
148 1.20 skrll #define VPRINTF(...) printf(__VA_ARGS__)
149 1.20 skrll #else
150 1.20 skrll #define VPRINTF(...) __nothing
151 1.20 skrll #endif
152 1.20 skrll
153 1.12 rin static paddr_t
154 1.12 rin bcm2835_bus_to_phys(bus_addr_t ba)
155 1.4 ryo {
156 1.4 ryo
157 1.12 rin /* Attempt to find the PA device mapping */
158 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
159 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
160 1.12 rin return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
161 1.4 ryo
162 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
163 1.12 rin }
164 1.4 ryo
165 1.12 rin static paddr_t
166 1.12 rin bcm2836_bus_to_phys(bus_addr_t ba)
167 1.12 rin {
168 1.12 rin
169 1.12 rin /* Attempt to find the PA device mapping */
170 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
171 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
172 1.12 rin return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
173 1.12 rin
174 1.12 rin if (ba >= BCM2836_ARM_LOCAL_BASE &&
175 1.12 rin ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE)
176 1.12 rin return ba;
177 1.4 ryo
178 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
179 1.4 ryo }
180 1.4 ryo
181 1.25 skrll static paddr_t
182 1.28 skrll bcm2711_bus_to_phys(bus_addr_t ba)
183 1.25 skrll {
184 1.25 skrll
185 1.25 skrll /* Attempt to find the PA device mapping */
186 1.25 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
187 1.25 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
188 1.28 skrll return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba);
189 1.25 skrll
190 1.31 skrll if (ba >= BCM2711_ARM_LOCAL_BASE_BUS &&
191 1.31 skrll ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE)
192 1.31 skrll return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba);
193 1.25 skrll
194 1.25 skrll return ba & ~BCM2835_BUSADDR_CACHE_MASK;
195 1.25 skrll }
196 1.25 skrll
197 1.12 rin int
198 1.12 rin bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
199 1.12 rin bus_space_handle_t *bshp)
200 1.5 jmcneill {
201 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
202 1.5 jmcneill
203 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
204 1.5 jmcneill }
205 1.5 jmcneill
206 1.5 jmcneill paddr_t
207 1.12 rin bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
208 1.5 jmcneill {
209 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
210 1.5 jmcneill
211 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
212 1.5 jmcneill }
213 1.5 jmcneill
214 1.12 rin paddr_t
215 1.12 rin bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
216 1.4 ryo {
217 1.4 ryo
218 1.12 rin return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags);
219 1.4 ryo }
220 1.4 ryo
221 1.4 ryo int
222 1.4 ryo bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
223 1.4 ryo bus_space_handle_t *bshp)
224 1.4 ryo {
225 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
226 1.4 ryo
227 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
228 1.12 rin }
229 1.12 rin
230 1.12 rin paddr_t
231 1.12 rin bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
232 1.12 rin {
233 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
234 1.4 ryo
235 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
236 1.12 rin }
237 1.4 ryo
238 1.12 rin paddr_t
239 1.12 rin bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
240 1.12 rin {
241 1.4 ryo
242 1.12 rin return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags);
243 1.4 ryo }
244 1.1 skrll
245 1.25 skrll int
246 1.28 skrll bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
247 1.25 skrll bus_space_handle_t *bshp)
248 1.25 skrll {
249 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
250 1.25 skrll
251 1.25 skrll return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
252 1.25 skrll }
253 1.25 skrll
254 1.25 skrll paddr_t
255 1.28 skrll bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
256 1.25 skrll {
257 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
258 1.25 skrll
259 1.25 skrll return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
260 1.25 skrll }
261 1.25 skrll
262 1.25 skrll paddr_t
263 1.28 skrll bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
264 1.25 skrll {
265 1.25 skrll
266 1.28 skrll return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags);
267 1.25 skrll }
268 1.25 skrll
269 1.1 skrll struct arm32_dma_range bcm2835_dma_ranges[] = {
270 1.1 skrll [0] = {
271 1.1 skrll .dr_sysbase = 0,
272 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT,
273 1.1 skrll }
274 1.1 skrll };
275 1.1 skrll
276 1.1 skrll struct arm32_dma_range bcm2836_dma_ranges[] = {
277 1.1 skrll [0] = {
278 1.1 skrll .dr_sysbase = 0,
279 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
280 1.1 skrll }
281 1.1 skrll };
282 1.1 skrll
283 1.28 skrll struct arm32_dma_range bcm2711_dma_ranges[] = {
284 1.25 skrll [0] = {
285 1.25 skrll .dr_sysbase = 0,
286 1.25 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
287 1.25 skrll }
288 1.25 skrll };
289 1.25 skrll
290 1.1 skrll
291 1.1 skrll #if defined(SOC_BCM2835)
292 1.1 skrll static const struct pmap_devmap *
293 1.1 skrll bcm2835_platform_devmap(void)
294 1.1 skrll {
295 1.1 skrll static const struct pmap_devmap devmap[] = {
296 1.1 skrll DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
297 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
298 1.1 skrll
299 1.1 skrll DEVMAP_ENTRY_END
300 1.1 skrll };
301 1.1 skrll
302 1.1 skrll return devmap;
303 1.1 skrll }
304 1.1 skrll #endif
305 1.1 skrll
306 1.1 skrll #if defined(SOC_BCM2836)
307 1.1 skrll static const struct pmap_devmap *
308 1.1 skrll bcm2836_platform_devmap(void)
309 1.1 skrll {
310 1.1 skrll static const struct pmap_devmap devmap[] = {
311 1.1 skrll DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
312 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
313 1.1 skrll DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
314 1.1 skrll BCM2836_ARM_LOCAL_SIZE),
315 1.18 ryo #if defined(MULTIPROCESSOR) && defined(__aarch64__)
316 1.18 ryo /* for fdt cpu spin-table */
317 1.18 ryo DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
318 1.18 ryo BCM2836_ARM_SMP_SIZE),
319 1.18 ryo #endif
320 1.1 skrll DEVMAP_ENTRY_END
321 1.1 skrll };
322 1.1 skrll
323 1.1 skrll return devmap;
324 1.1 skrll }
325 1.25 skrll
326 1.25 skrll static const struct pmap_devmap *
327 1.28 skrll bcm2711_platform_devmap(void)
328 1.25 skrll {
329 1.25 skrll static const struct pmap_devmap devmap[] = {
330 1.28 skrll DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE,
331 1.25 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
332 1.28 skrll DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE,
333 1.28 skrll BCM2711_ARM_LOCAL_SIZE),
334 1.25 skrll #if defined(MULTIPROCESSOR) && defined(__aarch64__)
335 1.25 skrll /* for fdt cpu spin-table */
336 1.31 skrll DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
337 1.25 skrll BCM2836_ARM_SMP_SIZE),
338 1.25 skrll #endif
339 1.25 skrll DEVMAP_ENTRY_END
340 1.25 skrll };
341 1.25 skrll
342 1.25 skrll return devmap;
343 1.25 skrll }
344 1.26 skrll #endif
345 1.26 skrll
346 1.1 skrll /*
347 1.1 skrll * Macros to translate between physical and virtual for a subset of the
348 1.1 skrll * kernel address space. *Not* for general use.
349 1.1 skrll */
350 1.1 skrll
351 1.1 skrll #ifndef RPI_FB_WIDTH
352 1.1 skrll #define RPI_FB_WIDTH 1280
353 1.1 skrll #endif
354 1.1 skrll #ifndef RPI_FB_HEIGHT
355 1.1 skrll #define RPI_FB_HEIGHT 720
356 1.1 skrll #endif
357 1.1 skrll
358 1.1 skrll int uart_clk = BCM2835_UART0_CLK;
359 1.1 skrll int core_clk;
360 1.1 skrll
361 1.1 skrll static struct {
362 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
363 1.1 skrll struct vcprop_tag_clockrate vbt_uartclockrate;
364 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
365 1.1 skrll struct vcprop_tag end;
366 1.1 skrll } vb_uart __cacheline_aligned = {
367 1.1 skrll .vb_hdr = {
368 1.1 skrll .vpb_len = sizeof(vb_uart),
369 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
370 1.1 skrll },
371 1.1 skrll .vbt_uartclockrate = {
372 1.1 skrll .tag = {
373 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
374 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
375 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
376 1.1 skrll },
377 1.1 skrll .id = VCPROP_CLK_UART
378 1.1 skrll },
379 1.1 skrll .vbt_vpuclockrate = {
380 1.1 skrll .tag = {
381 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
382 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate),
383 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
384 1.1 skrll },
385 1.1 skrll .id = VCPROP_CLK_CORE
386 1.1 skrll },
387 1.1 skrll .end = {
388 1.1 skrll .vpt_tag = VCPROPTAG_NULL
389 1.1 skrll }
390 1.1 skrll };
391 1.1 skrll
392 1.1 skrll static struct {
393 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
394 1.1 skrll struct vcprop_tag_fwrev vbt_fwrev;
395 1.1 skrll struct vcprop_tag_boardmodel vbt_boardmodel;
396 1.1 skrll struct vcprop_tag_boardrev vbt_boardrev;
397 1.1 skrll struct vcprop_tag_macaddr vbt_macaddr;
398 1.1 skrll struct vcprop_tag_memory vbt_memory;
399 1.1 skrll struct vcprop_tag_boardserial vbt_serial;
400 1.1 skrll struct vcprop_tag_dmachan vbt_dmachan;
401 1.1 skrll struct vcprop_tag_cmdline vbt_cmdline;
402 1.1 skrll struct vcprop_tag_clockrate vbt_emmcclockrate;
403 1.1 skrll struct vcprop_tag_clockrate vbt_armclockrate;
404 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
405 1.29 skrll struct vcprop_tag_clockrate vbt_emmc2clockrate;
406 1.1 skrll struct vcprop_tag end;
407 1.1 skrll } vb __cacheline_aligned = {
408 1.1 skrll .vb_hdr = {
409 1.1 skrll .vpb_len = sizeof(vb),
410 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
411 1.1 skrll },
412 1.1 skrll .vbt_fwrev = {
413 1.1 skrll .tag = {
414 1.1 skrll .vpt_tag = VCPROPTAG_GET_FIRMWAREREV,
415 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev),
416 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
417 1.1 skrll },
418 1.1 skrll },
419 1.1 skrll .vbt_boardmodel = {
420 1.1 skrll .tag = {
421 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDMODEL,
422 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel),
423 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
424 1.1 skrll },
425 1.1 skrll },
426 1.1 skrll .vbt_boardrev = {
427 1.1 skrll .tag = {
428 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDREVISION,
429 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev),
430 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
431 1.1 skrll },
432 1.1 skrll },
433 1.1 skrll .vbt_macaddr = {
434 1.1 skrll .tag = {
435 1.1 skrll .vpt_tag = VCPROPTAG_GET_MACADDRESS,
436 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr),
437 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
438 1.1 skrll },
439 1.1 skrll },
440 1.1 skrll .vbt_memory = {
441 1.1 skrll .tag = {
442 1.1 skrll .vpt_tag = VCPROPTAG_GET_ARMMEMORY,
443 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_memory),
444 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
445 1.1 skrll },
446 1.1 skrll },
447 1.1 skrll .vbt_serial = {
448 1.1 skrll .tag = {
449 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDSERIAL,
450 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_serial),
451 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
452 1.1 skrll },
453 1.1 skrll },
454 1.1 skrll .vbt_dmachan = {
455 1.1 skrll .tag = {
456 1.1 skrll .vpt_tag = VCPROPTAG_GET_DMACHAN,
457 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan),
458 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
459 1.1 skrll },
460 1.1 skrll },
461 1.1 skrll .vbt_cmdline = {
462 1.1 skrll .tag = {
463 1.1 skrll .vpt_tag = VCPROPTAG_GET_CMDLINE,
464 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline),
465 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
466 1.1 skrll },
467 1.1 skrll },
468 1.1 skrll .vbt_emmcclockrate = {
469 1.1 skrll .tag = {
470 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
471 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate),
472 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
473 1.1 skrll },
474 1.1 skrll .id = VCPROP_CLK_EMMC
475 1.1 skrll },
476 1.1 skrll .vbt_armclockrate = {
477 1.1 skrll .tag = {
478 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
479 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate),
480 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
481 1.1 skrll },
482 1.1 skrll .id = VCPROP_CLK_ARM
483 1.1 skrll },
484 1.1 skrll .vbt_vpuclockrate = {
485 1.1 skrll .tag = {
486 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
487 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate),
488 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
489 1.1 skrll },
490 1.1 skrll .id = VCPROP_CLK_CORE
491 1.1 skrll },
492 1.29 skrll .vbt_emmc2clockrate = {
493 1.29 skrll .tag = {
494 1.29 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
495 1.29 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmc2clockrate),
496 1.29 skrll .vpt_rcode = VCPROPTAG_REQUEST
497 1.29 skrll },
498 1.29 skrll .id = VCPROP_CLK_EMMC2
499 1.29 skrll },
500 1.1 skrll .end = {
501 1.1 skrll .vpt_tag = VCPROPTAG_NULL
502 1.1 skrll }
503 1.1 skrll };
504 1.1 skrll
505 1.1 skrll #if NGENFB > 0
506 1.1 skrll static struct {
507 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
508 1.1 skrll struct vcprop_tag_edidblock vbt_edid;
509 1.1 skrll struct vcprop_tag end;
510 1.1 skrll } vb_edid __cacheline_aligned = {
511 1.1 skrll .vb_hdr = {
512 1.1 skrll .vpb_len = sizeof(vb_edid),
513 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
514 1.1 skrll },
515 1.1 skrll .vbt_edid = {
516 1.1 skrll .tag = {
517 1.1 skrll .vpt_tag = VCPROPTAG_GET_EDID_BLOCK,
518 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid),
519 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
520 1.1 skrll },
521 1.1 skrll .blockno = 0,
522 1.1 skrll },
523 1.1 skrll .end = {
524 1.1 skrll .vpt_tag = VCPROPTAG_NULL
525 1.1 skrll }
526 1.1 skrll };
527 1.1 skrll
528 1.1 skrll static struct {
529 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
530 1.1 skrll struct vcprop_tag_fbres vbt_res;
531 1.1 skrll struct vcprop_tag_fbres vbt_vres;
532 1.1 skrll struct vcprop_tag_fbdepth vbt_depth;
533 1.1 skrll struct vcprop_tag_fbalpha vbt_alpha;
534 1.1 skrll struct vcprop_tag_allocbuf vbt_allocbuf;
535 1.1 skrll struct vcprop_tag_blankscreen vbt_blank;
536 1.1 skrll struct vcprop_tag_fbpitch vbt_pitch;
537 1.1 skrll struct vcprop_tag end;
538 1.1 skrll } vb_setfb __cacheline_aligned = {
539 1.1 skrll .vb_hdr = {
540 1.1 skrll .vpb_len = sizeof(vb_setfb),
541 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
542 1.1 skrll },
543 1.1 skrll .vbt_res = {
544 1.1 skrll .tag = {
545 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_RES,
546 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res),
547 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
548 1.1 skrll },
549 1.1 skrll .width = 0,
550 1.1 skrll .height = 0,
551 1.1 skrll },
552 1.1 skrll .vbt_vres = {
553 1.1 skrll .tag = {
554 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_VRES,
555 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres),
556 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
557 1.1 skrll },
558 1.1 skrll .width = 0,
559 1.1 skrll .height = 0,
560 1.1 skrll },
561 1.1 skrll .vbt_depth = {
562 1.1 skrll .tag = {
563 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_DEPTH,
564 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth),
565 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
566 1.1 skrll },
567 1.1 skrll .bpp = 32,
568 1.1 skrll },
569 1.1 skrll .vbt_alpha = {
570 1.1 skrll .tag = {
571 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE,
572 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha),
573 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
574 1.1 skrll },
575 1.1 skrll .state = VCPROP_ALPHA_IGNORED,
576 1.1 skrll },
577 1.1 skrll .vbt_allocbuf = {
578 1.1 skrll .tag = {
579 1.1 skrll .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER,
580 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf),
581 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
582 1.1 skrll },
583 1.1 skrll .address = PAGE_SIZE, /* alignment */
584 1.1 skrll },
585 1.1 skrll .vbt_blank = {
586 1.1 skrll .tag = {
587 1.1 skrll .vpt_tag = VCPROPTAG_BLANK_SCREEN,
588 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank),
589 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
590 1.1 skrll },
591 1.1 skrll .state = VCPROP_BLANK_OFF,
592 1.1 skrll },
593 1.1 skrll .vbt_pitch = {
594 1.1 skrll .tag = {
595 1.1 skrll .vpt_tag = VCPROPTAG_GET_FB_PITCH,
596 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch),
597 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
598 1.1 skrll },
599 1.1 skrll },
600 1.1 skrll .end = {
601 1.1 skrll .vpt_tag = VCPROPTAG_NULL,
602 1.1 skrll },
603 1.1 skrll };
604 1.1 skrll
605 1.1 skrll #endif
606 1.1 skrll
607 1.1 skrll static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
608 1.1 skrll
609 1.1 skrll #if defined(RPI_HWCURSOR)
610 1.1 skrll #define CURSOR_BITMAP_SIZE (64 * 8)
611 1.1 skrll #define CURSOR_ARGB_SIZE (64 * 64 * 4)
612 1.1 skrll static uint32_t hcursor = 0;
613 1.1 skrll static bus_addr_t pcursor = 0;
614 1.1 skrll static uint32_t *cmem = NULL;
615 1.1 skrll static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
616 1.1 skrll static uint32_t cursor_cmap[4];
617 1.1 skrll static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
618 1.1 skrll #endif
619 1.1 skrll
620 1.1 skrll u_int
621 1.1 skrll bcm283x_clk_get_rate_uart(void)
622 1.1 skrll {
623 1.1 skrll
624 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
625 1.1 skrll return vb_uart.vbt_uartclockrate.rate;
626 1.1 skrll return 0;
627 1.1 skrll }
628 1.1 skrll
629 1.1 skrll u_int
630 1.1 skrll bcm283x_clk_get_rate_vpu(void)
631 1.1 skrll {
632 1.1 skrll
633 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
634 1.1 skrll vb.vbt_vpuclockrate.rate > 0) {
635 1.1 skrll return vb.vbt_vpuclockrate.rate;
636 1.1 skrll }
637 1.1 skrll return 0;
638 1.1 skrll }
639 1.1 skrll
640 1.1 skrll u_int
641 1.1 skrll bcm283x_clk_get_rate_emmc(void)
642 1.1 skrll {
643 1.1 skrll
644 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
645 1.1 skrll vb.vbt_emmcclockrate.rate > 0) {
646 1.1 skrll return vb.vbt_emmcclockrate.rate;
647 1.1 skrll }
648 1.1 skrll return 0;
649 1.1 skrll }
650 1.1 skrll
651 1.29 skrll u_int
652 1.29 skrll bcm283x_clk_get_rate_emmc2(void)
653 1.29 skrll {
654 1.29 skrll
655 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) &&
656 1.29 skrll vb.vbt_emmc2clockrate.rate > 0) {
657 1.29 skrll return vb.vbt_emmc2clockrate.rate;
658 1.29 skrll }
659 1.29 skrll return 0;
660 1.29 skrll }
661 1.29 skrll
662 1.1 skrll
663 1.1 skrll
664 1.1 skrll static void
665 1.1 skrll bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
666 1.1 skrll {
667 1.1 skrll uint32_t res;
668 1.1 skrll
669 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
670 1.8 christos KERN_VTOPHYS((vaddr_t)&vb_uart));
671 1.1 skrll
672 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
673 1.1 skrll
674 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
675 1.1 skrll uart_clk = vb_uart.vbt_uartclockrate.rate;
676 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
677 1.1 skrll core_clk = vb_uart.vbt_vpuclockrate.rate;
678 1.1 skrll }
679 1.1 skrll
680 1.1 skrll #if defined(SOC_BCM2835)
681 1.1 skrll static void
682 1.1 skrll bcm2835_uartinit(void)
683 1.1 skrll {
684 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
685 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
686 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
687 1.1 skrll
688 1.1 skrll bcm283x_uartinit(iot, ioh);
689 1.1 skrll }
690 1.1 skrll #endif
691 1.1 skrll
692 1.1 skrll #if defined(SOC_BCM2836)
693 1.1 skrll static void
694 1.1 skrll bcm2836_uartinit(void)
695 1.1 skrll {
696 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
697 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
698 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
699 1.1 skrll
700 1.1 skrll bcm283x_uartinit(iot, ioh);
701 1.1 skrll }
702 1.25 skrll
703 1.25 skrll static void
704 1.28 skrll bcm2711_uartinit(void)
705 1.25 skrll {
706 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
707 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
708 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
709 1.25 skrll
710 1.25 skrll bcm283x_uartinit(iot, ioh);
711 1.25 skrll }
712 1.1 skrll #endif
713 1.1 skrll
714 1.1 skrll #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024)
715 1.1 skrll
716 1.1 skrll static size_t bcm283x_memorysize;
717 1.1 skrll
718 1.1 skrll static void
719 1.1 skrll bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
720 1.1 skrll {
721 1.1 skrll uint32_t res;
722 1.1 skrll
723 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
724 1.1 skrll #if (NSDHC > 0)
725 1.1 skrll (1 << VCPM_POWER_SDCARD) |
726 1.1 skrll #endif
727 1.1 skrll #if (NPLCOM > 0)
728 1.1 skrll (1 << VCPM_POWER_UART0) |
729 1.1 skrll #endif
730 1.1 skrll #if (NBCMDWCTWO > 0)
731 1.1 skrll (1 << VCPM_POWER_USB) |
732 1.1 skrll #endif
733 1.1 skrll #if (NBSCIIC > 0)
734 1.1 skrll (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
735 1.1 skrll /* (1 << VCPM_POWER_I2C2) | */
736 1.1 skrll #endif
737 1.1 skrll #if (NBCMSPI > 0)
738 1.1 skrll (1 << VCPM_POWER_SPI) |
739 1.1 skrll #endif
740 1.1 skrll 0) << 4);
741 1.1 skrll
742 1.8 christos bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
743 1.8 christos KERN_VTOPHYS((vaddr_t)&vb));
744 1.1 skrll
745 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
746 1.1 skrll
747 1.30 skrll /*
748 1.30 skrll * RPI4 has Cortex A72 processors which do speculation, so
749 1.30 skrll * we need to invalidate the cache for an updates done by
750 1.30 skrll * the firmware
751 1.30 skrll */
752 1.30 skrll cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
753 1.30 skrll
754 1.1 skrll if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
755 1.1 skrll bootconfig.dramblocks = 1;
756 1.1 skrll bootconfig.dram[0].address = 0x0;
757 1.1 skrll bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
758 1.1 skrll return;
759 1.1 skrll }
760 1.1 skrll
761 1.1 skrll struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
762 1.1 skrll if (vcprop_tag_success_p(&vptp_mem->tag)) {
763 1.1 skrll size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
764 1.1 skrll sizeof(struct vcprop_memory);
765 1.1 skrll
766 1.1 skrll bcm283x_memorysize = 0;
767 1.1 skrll bootconfig.dramblocks = 0;
768 1.1 skrll
769 1.1 skrll for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
770 1.1 skrll bootconfig.dram[i].address = vptp_mem->mem[i].base;
771 1.1 skrll bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size);
772 1.1 skrll bootconfig.dramblocks++;
773 1.1 skrll
774 1.1 skrll bcm283x_memorysize += vptp_mem->mem[i].size;
775 1.1 skrll }
776 1.1 skrll }
777 1.1 skrll
778 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
779 1.1 skrll curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
780 1.1 skrll
781 1.1 skrll #ifdef VERBOSE_INIT_ARM
782 1.13 rin if (vcprop_tag_success_p(&vb.vbt_memory.tag))
783 1.13 rin printf("%s: memory size %zu\n", __func__,
784 1.13 rin bcm283x_memorysize);
785 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
786 1.1 skrll printf("%s: arm clock %d\n", __func__,
787 1.1 skrll vb.vbt_armclockrate.rate);
788 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag))
789 1.29 skrll printf("%s: vpu clock %d\n", __func__,
790 1.29 skrll vb.vbt_vpuclockrate.rate);
791 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag))
792 1.29 skrll printf("%s: emmc clock %d\n", __func__,
793 1.29 skrll vb.vbt_emmcclockrate.rate);
794 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag))
795 1.29 skrll printf("%s: emmc2 clock %d\n", __func__,
796 1.29 skrll vb.vbt_emmcclockrate.rate);
797 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
798 1.1 skrll printf("%s: firmware rev %x\n", __func__,
799 1.1 skrll vb.vbt_fwrev.rev);
800 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
801 1.1 skrll printf("%s: board model %x\n", __func__,
802 1.1 skrll vb.vbt_boardmodel.model);
803 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
804 1.8 christos printf("%s: mac-address %" PRIx64 "\n", __func__,
805 1.1 skrll vb.vbt_macaddr.addr);
806 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
807 1.1 skrll printf("%s: board rev %x\n", __func__,
808 1.1 skrll vb.vbt_boardrev.rev);
809 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_serial.tag))
810 1.8 christos printf("%s: board serial %" PRIx64 "\n", __func__,
811 1.1 skrll vb.vbt_serial.sn);
812 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
813 1.1 skrll printf("%s: DMA channel mask 0x%08x\n", __func__,
814 1.1 skrll vb.vbt_dmachan.mask);
815 1.1 skrll
816 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
817 1.1 skrll printf("%s: cmdline %s\n", __func__,
818 1.1 skrll vb.vbt_cmdline.cmdline);
819 1.1 skrll #endif
820 1.1 skrll }
821 1.1 skrll
822 1.1 skrll #if defined(SOC_BCM2835)
823 1.1 skrll static void
824 1.1 skrll bcm2835_bootparams(void)
825 1.1 skrll {
826 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
827 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
828 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
829 1.1 skrll
830 1.1 skrll bcm283x_bootparams(iot, ioh);
831 1.1 skrll }
832 1.1 skrll #endif
833 1.1 skrll
834 1.1 skrll #if defined(SOC_BCM2836)
835 1.1 skrll static void
836 1.1 skrll bcm2836_bootparams(void)
837 1.1 skrll {
838 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
839 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
840 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
841 1.1 skrll
842 1.1 skrll bcm283x_bootparams(iot, ioh);
843 1.1 skrll }
844 1.1 skrll
845 1.25 skrll static void
846 1.28 skrll bcm2711_bootparams(void)
847 1.25 skrll {
848 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
849 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
850 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
851 1.25 skrll
852 1.25 skrll bcm283x_bootparams(iot, ioh);
853 1.25 skrll }
854 1.25 skrll
855 1.23 jmcneill #if defined(MULTIPROCESSOR)
856 1.23 jmcneill static int
857 1.23 jmcneill cpu_enable_bcm2836(int phandle)
858 1.1 skrll {
859 1.23 jmcneill bus_space_tag_t iot = &bcm2836_bs_tag;
860 1.23 jmcneill bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
861 1.23 jmcneill uint64_t mpidr;
862 1.1 skrll
863 1.23 jmcneill fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
864 1.15 ryo
865 1.23 jmcneill const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
866 1.7 ryo
867 1.23 jmcneill bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno),
868 1.23 jmcneill KERN_VTOPHYS((vaddr_t)cpu_mpstart));
869 1.18 ryo
870 1.23 jmcneill return 0;
871 1.1 skrll }
872 1.23 jmcneill ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836);
873 1.23 jmcneill #endif
874 1.1 skrll
875 1.1 skrll #endif /* SOC_BCM2836 */
876 1.1 skrll
877 1.1 skrll #if NGENFB > 0
878 1.1 skrll static bool
879 1.1 skrll rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
880 1.1 skrll {
881 1.1 skrll char *x;
882 1.1 skrll
883 1.1 skrll if (strncmp(s, "disable", 7) == 0)
884 1.1 skrll return false;
885 1.1 skrll
886 1.1 skrll x = strchr(s, 'x');
887 1.1 skrll if (x) {
888 1.1 skrll *pwidth = strtoul(s, NULL, 10);
889 1.1 skrll *pheight = strtoul(x + 1, NULL, 10);
890 1.1 skrll }
891 1.1 skrll
892 1.1 skrll return true;
893 1.1 skrll }
894 1.1 skrll
895 1.1 skrll static bool
896 1.1 skrll rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
897 1.1 skrll {
898 1.1 skrll struct edid_info ei;
899 1.1 skrll uint8_t edid_data[1024];
900 1.1 skrll uint32_t res;
901 1.1 skrll int error;
902 1.1 skrll
903 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
904 1.1 skrll sizeof(vb_edid), &res);
905 1.1 skrll if (error) {
906 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
907 1.1 skrll return false;
908 1.1 skrll }
909 1.1 skrll
910 1.1 skrll if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
911 1.1 skrll !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
912 1.1 skrll vb_edid.vbt_edid.status != 0)
913 1.1 skrll return false;
914 1.1 skrll
915 1.1 skrll memset(edid_data, 0, sizeof(edid_data));
916 1.1 skrll memcpy(edid_data, vb_edid.vbt_edid.data,
917 1.1 skrll sizeof(vb_edid.vbt_edid.data));
918 1.1 skrll edid_parse(edid_data, &ei);
919 1.1 skrll #ifdef VERBOSE_INIT_ARM
920 1.1 skrll edid_print(&ei);
921 1.1 skrll #endif
922 1.1 skrll
923 1.1 skrll if (ei.edid_preferred_mode) {
924 1.1 skrll *pwidth = ei.edid_preferred_mode->hdisplay;
925 1.1 skrll *pheight = ei.edid_preferred_mode->vdisplay;
926 1.1 skrll }
927 1.1 skrll
928 1.1 skrll return true;
929 1.1 skrll }
930 1.1 skrll
931 1.1 skrll /*
932 1.1 skrll * Initialize framebuffer console.
933 1.1 skrll *
934 1.1 skrll * Some notes about boot parameters:
935 1.1 skrll * - If "fb=disable" is present, ignore framebuffer completely.
936 1.1 skrll * - If "fb=<width>x<height> is present, use the specified mode.
937 1.1 skrll * - If "console=fb" is present, attach framebuffer to console.
938 1.1 skrll */
939 1.1 skrll static bool
940 1.1 skrll rpi_fb_init(prop_dictionary_t dict, void *aux)
941 1.1 skrll {
942 1.1 skrll uint32_t width = 0, height = 0;
943 1.1 skrll uint32_t res;
944 1.1 skrll char *ptr;
945 1.1 skrll int integer;
946 1.1 skrll int error;
947 1.1 skrll bool is_bgr = true;
948 1.1 skrll
949 1.1 skrll if (get_bootconf_option(boot_args, "fb",
950 1.1 skrll BOOTOPT_TYPE_STRING, &ptr)) {
951 1.1 skrll if (rpi_fb_parse_mode(ptr, &width, &height) == false)
952 1.1 skrll return false;
953 1.1 skrll }
954 1.1 skrll if (width == 0 || height == 0) {
955 1.1 skrll rpi_fb_get_edid_mode(&width, &height);
956 1.1 skrll }
957 1.1 skrll if (width == 0 || height == 0) {
958 1.1 skrll width = RPI_FB_WIDTH;
959 1.1 skrll height = RPI_FB_HEIGHT;
960 1.1 skrll }
961 1.1 skrll
962 1.1 skrll vb_setfb.vbt_res.width = width;
963 1.1 skrll vb_setfb.vbt_res.height = height;
964 1.1 skrll vb_setfb.vbt_vres.width = width;
965 1.1 skrll vb_setfb.vbt_vres.height = height;
966 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
967 1.1 skrll sizeof(vb_setfb), &res);
968 1.1 skrll if (error) {
969 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
970 1.1 skrll return false;
971 1.1 skrll }
972 1.1 skrll
973 1.1 skrll if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
974 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
975 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
976 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
977 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
978 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
979 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
980 1.1 skrll printf("%s: prop tag failed\n", __func__);
981 1.1 skrll return false;
982 1.1 skrll }
983 1.1 skrll
984 1.1 skrll #ifdef VERBOSE_INIT_ARM
985 1.1 skrll printf("%s: addr = 0x%x size = %d\n", __func__,
986 1.1 skrll vb_setfb.vbt_allocbuf.address,
987 1.1 skrll vb_setfb.vbt_allocbuf.size);
988 1.1 skrll printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp);
989 1.1 skrll printf("%s: pitch = %d\n", __func__,
990 1.1 skrll vb_setfb.vbt_pitch.linebytes);
991 1.1 skrll printf("%s: width = %d height = %d\n", __func__,
992 1.1 skrll vb_setfb.vbt_res.width, vb_setfb.vbt_res.height);
993 1.1 skrll printf("%s: vwidth = %d vheight = %d\n", __func__,
994 1.1 skrll vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height);
995 1.1 skrll #endif
996 1.1 skrll
997 1.1 skrll if (vb_setfb.vbt_allocbuf.address == 0 ||
998 1.1 skrll vb_setfb.vbt_allocbuf.size == 0 ||
999 1.1 skrll vb_setfb.vbt_res.width == 0 ||
1000 1.1 skrll vb_setfb.vbt_res.height == 0 ||
1001 1.1 skrll vb_setfb.vbt_vres.width == 0 ||
1002 1.1 skrll vb_setfb.vbt_vres.height == 0 ||
1003 1.1 skrll vb_setfb.vbt_pitch.linebytes == 0) {
1004 1.1 skrll printf("%s: failed to set mode %ux%u\n", __func__,
1005 1.1 skrll width, height);
1006 1.1 skrll return false;
1007 1.1 skrll }
1008 1.1 skrll
1009 1.1 skrll prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width);
1010 1.1 skrll prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height);
1011 1.1 skrll prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp);
1012 1.1 skrll prop_dictionary_set_uint16(dict, "linebytes",
1013 1.1 skrll vb_setfb.vbt_pitch.linebytes);
1014 1.1 skrll prop_dictionary_set_uint32(dict, "address",
1015 1.1 skrll vb_setfb.vbt_allocbuf.address);
1016 1.1 skrll
1017 1.1 skrll /*
1018 1.1 skrll * Old firmware uses BGR. New firmware uses RGB. The get and set
1019 1.1 skrll * pixel order mailbox properties don't seem to work. The firmware
1020 1.1 skrll * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
1021 1.1 skrll * to determine pixel order. 0 means BGR, 1 means RGB.
1022 1.1 skrll *
1023 1.1 skrll * See https://github.com/raspberrypi/linux/issues/514
1024 1.1 skrll */
1025 1.1 skrll if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
1026 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1027 1.1 skrll is_bgr = integer == 0;
1028 1.1 skrll }
1029 1.1 skrll prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
1030 1.1 skrll
1031 1.1 skrll /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
1032 1.1 skrll if (get_bootconf_option(boot_args, "genfb.type",
1033 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1034 1.1 skrll prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
1035 1.1 skrll }
1036 1.1 skrll
1037 1.1 skrll #if defined(RPI_HWCURSOR)
1038 1.1 skrll struct fdt_attach_args *faa = aux;
1039 1.1 skrll bus_space_handle_t hc;
1040 1.1 skrll
1041 1.1 skrll hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
1042 1.1 skrll MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
1043 1.1 skrll pcursor = rpi_lock_mem(hcursor);
1044 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1045 1.1 skrll printf("hcursor: %08x\n", hcursor);
1046 1.1 skrll printf("pcursor: %08x\n", (uint32_t)pcursor);
1047 1.1 skrll printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
1048 1.1 skrll #endif
1049 1.1 skrll if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
1050 1.1 skrll BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
1051 1.1 skrll printf("couldn't map cursor memory\n");
1052 1.1 skrll } else {
1053 1.1 skrll int i, j, k;
1054 1.1 skrll
1055 1.1 skrll cmem = bus_space_vaddr(faa->faa_bst, hc);
1056 1.1 skrll k = 0;
1057 1.1 skrll for (j = 0; j < 64; j++) {
1058 1.1 skrll for (i = 0; i < 64; i++) {
1059 1.1 skrll cmem[i + k] =
1060 1.1 skrll ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
1061 1.1 skrll }
1062 1.1 skrll k += 64;
1063 1.1 skrll }
1064 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1065 1.1 skrll rpi_fb_initcursor(pcursor, 0, 0);
1066 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1067 1.1 skrll rpi_fb_movecursor(600, 400, 1);
1068 1.1 skrll #else
1069 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1070 1.1 skrll #endif
1071 1.1 skrll }
1072 1.1 skrll #endif
1073 1.1 skrll
1074 1.1 skrll return true;
1075 1.1 skrll }
1076 1.1 skrll
1077 1.1 skrll
1078 1.1 skrll #if defined(RPI_HWCURSOR)
1079 1.1 skrll static int
1080 1.1 skrll rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
1081 1.1 skrll {
1082 1.1 skrll int pos = 0;
1083 1.1 skrll int shape = 0;
1084 1.1 skrll
1085 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
1086 1.1 skrll if (cursor_on != cur->enable) {
1087 1.1 skrll cursor_on = cur->enable;
1088 1.1 skrll pos = 1;
1089 1.1 skrll }
1090 1.1 skrll }
1091 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
1092 1.1 skrll
1093 1.1 skrll hot_x = cur->hot.x;
1094 1.1 skrll hot_y = cur->hot.y;
1095 1.1 skrll pos = 1;
1096 1.1 skrll shape = 1;
1097 1.1 skrll }
1098 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
1099 1.1 skrll
1100 1.1 skrll cursor_x = cur->pos.x;
1101 1.1 skrll cursor_y = cur->pos.y;
1102 1.1 skrll pos = 1;
1103 1.1 skrll }
1104 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
1105 1.1 skrll int i;
1106 1.1 skrll uint32_t val;
1107 1.1 skrll
1108 1.17 riastrad for (i = 0; i < uimin(cur->cmap.count, 3); i++) {
1109 1.1 skrll val = (cur->cmap.red[i] << 16 ) |
1110 1.1 skrll (cur->cmap.green[i] << 8) |
1111 1.1 skrll (cur->cmap.blue[i] ) |
1112 1.1 skrll 0xff000000;
1113 1.1 skrll cursor_cmap[i + cur->cmap.index + 2] = val;
1114 1.1 skrll }
1115 1.1 skrll shape = 1;
1116 1.1 skrll }
1117 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
1118 1.1 skrll int err;
1119 1.1 skrll
1120 1.1 skrll err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
1121 1.1 skrll err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
1122 1.1 skrll if (err != 0)
1123 1.1 skrll return EFAULT;
1124 1.1 skrll shape = 1;
1125 1.1 skrll }
1126 1.1 skrll if (shape) {
1127 1.1 skrll int i, j, idx;
1128 1.1 skrll uint8_t mask;
1129 1.1 skrll
1130 1.1 skrll for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
1131 1.1 skrll mask = 0x01;
1132 1.1 skrll for (j = 0; j < 8; j++) {
1133 1.1 skrll idx = ((cursor_mask[i] & mask) ? 2 : 0) |
1134 1.1 skrll ((cursor_bitmap[i] & mask) ? 1 : 0);
1135 1.1 skrll cmem[i * 8 + j] = cursor_cmap[idx];
1136 1.1 skrll mask = mask << 1;
1137 1.1 skrll }
1138 1.1 skrll }
1139 1.1 skrll /* just in case */
1140 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1141 1.1 skrll rpi_fb_initcursor(pcursor, hot_x, hot_y);
1142 1.1 skrll }
1143 1.1 skrll if (pos) {
1144 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1145 1.1 skrll }
1146 1.1 skrll return 0;
1147 1.1 skrll }
1148 1.1 skrll #endif
1149 1.1 skrll
1150 1.1 skrll static int
1151 1.1 skrll rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
1152 1.1 skrll {
1153 1.1 skrll
1154 1.1 skrll switch (cmd) {
1155 1.1 skrll case WSDISPLAYIO_SVIDEO:
1156 1.1 skrll {
1157 1.1 skrll int d = *(int *)data;
1158 1.1 skrll if (d == rpi_video_on)
1159 1.1 skrll return 0;
1160 1.1 skrll rpi_video_on = d;
1161 1.1 skrll rpi_fb_set_video(d);
1162 1.1 skrll #if defined(RPI_HWCURSOR)
1163 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y,
1164 1.1 skrll d ? cursor_on : 0);
1165 1.1 skrll #endif
1166 1.1 skrll }
1167 1.1 skrll return 0;
1168 1.1 skrll case WSDISPLAYIO_GVIDEO:
1169 1.1 skrll *(int *)data = rpi_video_on;
1170 1.1 skrll return 0;
1171 1.1 skrll #if defined(RPI_HWCURSOR)
1172 1.1 skrll case WSDISPLAYIO_GCURPOS:
1173 1.1 skrll {
1174 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1175 1.1 skrll
1176 1.1 skrll cp->x = cursor_x;
1177 1.1 skrll cp->y = cursor_y;
1178 1.1 skrll }
1179 1.1 skrll return 0;
1180 1.1 skrll case WSDISPLAYIO_SCURPOS:
1181 1.1 skrll {
1182 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1183 1.1 skrll
1184 1.1 skrll cursor_x = cp->x;
1185 1.1 skrll cursor_y = cp->y;
1186 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1187 1.1 skrll }
1188 1.1 skrll return 0;
1189 1.1 skrll case WSDISPLAYIO_GCURMAX:
1190 1.1 skrll {
1191 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1192 1.1 skrll
1193 1.1 skrll cp->x = 64;
1194 1.1 skrll cp->y = 64;
1195 1.1 skrll }
1196 1.1 skrll return 0;
1197 1.1 skrll case WSDISPLAYIO_SCURSOR:
1198 1.1 skrll {
1199 1.1 skrll struct wsdisplay_cursor *cursor = (void *)data;
1200 1.1 skrll
1201 1.1 skrll return rpi_fb_do_cursor(cursor);
1202 1.1 skrll }
1203 1.1 skrll #endif
1204 1.1 skrll default:
1205 1.1 skrll return EPASSTHROUGH;
1206 1.1 skrll }
1207 1.1 skrll }
1208 1.1 skrll
1209 1.1 skrll #endif
1210 1.1 skrll
1211 1.1 skrll SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
1212 1.1 skrll {
1213 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1214 1.1 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
1215 1.1 skrll NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
1216 1.1 skrll
1217 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1218 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1219 1.1 skrll CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
1220 1.1 skrll &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1221 1.1 skrll
1222 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1223 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1224 1.1 skrll CTLTYPE_INT, "board_model", NULL, NULL, 0,
1225 1.1 skrll &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1226 1.1 skrll
1227 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1228 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1229 1.1 skrll CTLTYPE_INT, "board_revision", NULL, NULL, 0,
1230 1.1 skrll &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1231 1.1 skrll
1232 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1233 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
1234 1.1 skrll CTLTYPE_QUAD, "serial", NULL, NULL, 0,
1235 1.1 skrll &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1236 1.1 skrll }
1237 1.1 skrll
1238 1.1 skrll #if defined(SOC_BCM2835)
1239 1.1 skrll static void
1240 1.1 skrll bcm2835_platform_bootstrap(void)
1241 1.1 skrll {
1242 1.1 skrll
1243 1.4 ryo bcm2835_bs_tag = arm_generic_bs_tag;
1244 1.4 ryo bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
1245 1.4 ryo
1246 1.4 ryo bcm2835_bs_tag.bs_map = bcm2835_bs_map;
1247 1.12 rin bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap;
1248 1.4 ryo bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
1249 1.12 rin bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap;
1250 1.4 ryo
1251 1.1 skrll fdtbus_set_decoderegprop(false);
1252 1.1 skrll
1253 1.1 skrll bcm2835_uartinit();
1254 1.1 skrll
1255 1.1 skrll bcm2835_bootparams();
1256 1.1 skrll }
1257 1.1 skrll #endif
1258 1.1 skrll
1259 1.1 skrll #if defined(SOC_BCM2836)
1260 1.1 skrll static void
1261 1.1 skrll bcm2836_platform_bootstrap(void)
1262 1.1 skrll {
1263 1.1 skrll
1264 1.4 ryo bcm2836_bs_tag = arm_generic_bs_tag;
1265 1.4 ryo bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
1266 1.4 ryo
1267 1.4 ryo bcm2836_bs_tag.bs_map = bcm2836_bs_map;
1268 1.12 rin bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap;
1269 1.4 ryo bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
1270 1.12 rin bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap;
1271 1.4 ryo
1272 1.1 skrll fdtbus_set_decoderegprop(false);
1273 1.1 skrll
1274 1.1 skrll bcm2836_uartinit();
1275 1.1 skrll
1276 1.1 skrll bcm2836_bootparams();
1277 1.1 skrll
1278 1.20 skrll #ifdef MULTIPROCESSOR
1279 1.20 skrll arm_cpu_max = RPI_CPU_MAX;
1280 1.21 ryo arm_fdt_cpu_bootstrap();
1281 1.20 skrll #endif
1282 1.1 skrll }
1283 1.25 skrll
1284 1.25 skrll static void
1285 1.28 skrll bcm2711_platform_bootstrap(void)
1286 1.25 skrll {
1287 1.25 skrll
1288 1.28 skrll bcm2711_bs_tag = arm_generic_bs_tag;
1289 1.28 skrll bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag;
1290 1.25 skrll
1291 1.28 skrll bcm2711_bs_tag.bs_map = bcm2711_bs_map;
1292 1.28 skrll bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap;
1293 1.28 skrll bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map;
1294 1.28 skrll bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap;
1295 1.25 skrll
1296 1.25 skrll fdtbus_set_decoderegprop(false);
1297 1.25 skrll
1298 1.28 skrll bcm2711_uartinit();
1299 1.25 skrll
1300 1.28 skrll bcm2711_bootparams();
1301 1.25 skrll
1302 1.25 skrll #ifdef MULTIPROCESSOR
1303 1.25 skrll arm_cpu_max = RPI_CPU_MAX;
1304 1.25 skrll arm_fdt_cpu_bootstrap();
1305 1.25 skrll #endif
1306 1.25 skrll }
1307 1.1 skrll #endif
1308 1.1 skrll
1309 1.1 skrll #if defined(SOC_BCM2835)
1310 1.1 skrll static void
1311 1.1 skrll bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
1312 1.1 skrll {
1313 1.1 skrll
1314 1.1 skrll faa->faa_bst = &bcm2835_bs_tag;
1315 1.1 skrll faa->faa_a4x_bst = &bcm2835_a4x_bs_tag;
1316 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1317 1.1 skrll
1318 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges;
1319 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges);
1320 1.1 skrll bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize;
1321 1.1 skrll }
1322 1.1 skrll #endif
1323 1.1 skrll
1324 1.1 skrll #if defined(SOC_BCM2836)
1325 1.1 skrll static void
1326 1.1 skrll bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
1327 1.1 skrll {
1328 1.1 skrll
1329 1.1 skrll faa->faa_bst = &bcm2836_bs_tag;
1330 1.1 skrll faa->faa_a4x_bst = &bcm2836_a4x_bs_tag;
1331 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1332 1.1 skrll
1333 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges;
1334 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges);
1335 1.1 skrll bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize;
1336 1.1 skrll }
1337 1.25 skrll
1338 1.25 skrll static void
1339 1.28 skrll bcm2711_platform_init_attach_args(struct fdt_attach_args *faa)
1340 1.25 skrll {
1341 1.25 skrll
1342 1.28 skrll faa->faa_bst = &bcm2711_bs_tag;
1343 1.28 skrll faa->faa_a4x_bst = &bcm2711_a4x_bs_tag;
1344 1.25 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1345 1.25 skrll
1346 1.28 skrll bcm2835_bus_dma_tag._ranges = bcm2711_dma_ranges;
1347 1.28 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2711_dma_ranges);
1348 1.28 skrll bcm2711_dma_ranges[0].dr_len = bcm283x_memorysize;
1349 1.25 skrll }
1350 1.1 skrll #endif
1351 1.1 skrll
1352 1.1 skrll
1353 1.22 skrll static void
1354 1.1 skrll bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1355 1.1 skrll {
1356 1.1 skrll volatile uint32_t *uartaddr =
1357 1.4 ryo cpu_earlydevice_va_p() ?
1358 1.1 skrll (volatile uint32_t *)va :
1359 1.1 skrll (volatile uint32_t *)pa;
1360 1.1 skrll
1361 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0)
1362 1.1 skrll continue;
1363 1.1 skrll
1364 1.1 skrll uartaddr[PL01XCOM_DR / 4] = c;
1365 1.1 skrll
1366 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0)
1367 1.1 skrll continue;
1368 1.1 skrll }
1369 1.1 skrll
1370 1.1 skrll void
1371 1.1 skrll bcm2835_platform_early_putchar(char c)
1372 1.1 skrll {
1373 1.1 skrll paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1374 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1375 1.1 skrll
1376 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1377 1.1 skrll }
1378 1.1 skrll
1379 1.1 skrll void
1380 1.1 skrll bcm2836_platform_early_putchar(char c)
1381 1.1 skrll {
1382 1.1 skrll paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1383 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1384 1.1 skrll
1385 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1386 1.1 skrll }
1387 1.1 skrll
1388 1.1 skrll void
1389 1.1 skrll bcm2837_platform_early_putchar(char c)
1390 1.1 skrll {
1391 1.1 skrll #define AUCONSADDR_PA BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE)
1392 1.1 skrll #define AUCONSADDR_VA BCM2835_IOPHYSTOVIRT(AUCONSADDR_PA)
1393 1.1 skrll volatile uint32_t *uartaddr =
1394 1.4 ryo cpu_earlydevice_va_p() ?
1395 1.1 skrll (volatile uint32_t *)AUCONSADDR_VA :
1396 1.1 skrll (volatile uint32_t *)AUCONSADDR_PA;
1397 1.1 skrll
1398 1.1 skrll while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
1399 1.1 skrll ;
1400 1.1 skrll
1401 1.1 skrll uartaddr[com_data] = c;
1402 1.25 skrll #undef AUCONSADDR_VA
1403 1.25 skrll #undef AUCONSADDR_PA
1404 1.1 skrll }
1405 1.1 skrll
1406 1.25 skrll void
1407 1.28 skrll bcm2711_platform_early_putchar(char c)
1408 1.25 skrll {
1409 1.28 skrll #define AUCONSADDR_PA BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE)
1410 1.28 skrll #define AUCONSADDR_VA BCM2711_IOPHYSTOVIRT(AUCONSADDR_PA)
1411 1.25 skrll volatile uint32_t *uartaddr =
1412 1.25 skrll cpu_earlydevice_va_p() ?
1413 1.25 skrll (volatile uint32_t *)AUCONSADDR_VA :
1414 1.25 skrll (volatile uint32_t *)AUCONSADDR_PA;
1415 1.25 skrll
1416 1.25 skrll while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
1417 1.25 skrll ;
1418 1.25 skrll
1419 1.25 skrll uartaddr[com_data] = c;
1420 1.25 skrll #undef AUCONSADDR_VA
1421 1.25 skrll #undef AUCONSADDR_PA
1422 1.25 skrll }
1423 1.25 skrll
1424 1.25 skrll #define BCM283x_REF_FREQ 19200000
1425 1.25 skrll
1426 1.1 skrll static void
1427 1.1 skrll bcm283x_platform_device_register(device_t dev, void *aux)
1428 1.1 skrll {
1429 1.1 skrll prop_dictionary_t dict = device_properties(dev);
1430 1.1 skrll
1431 1.1 skrll if (device_is_a(dev, "bcmdmac") &&
1432 1.1 skrll vcprop_tag_success_p(&vb.vbt_dmachan.tag)) {
1433 1.1 skrll prop_dictionary_set_uint32(dict,
1434 1.1 skrll "chanmask", vb.vbt_dmachan.mask);
1435 1.1 skrll }
1436 1.1 skrll #if NSDHC > 0
1437 1.1 skrll if (booted_device == NULL &&
1438 1.1 skrll device_is_a(dev, "ld") &&
1439 1.1 skrll device_is_a(device_parent(dev), "sdmmc")) {
1440 1.1 skrll booted_partition = 0;
1441 1.1 skrll booted_device = dev;
1442 1.1 skrll }
1443 1.1 skrll #endif
1444 1.14 rin if ((device_is_a(dev, "usmsc") || device_is_a(dev, "mue")) &&
1445 1.1 skrll vcprop_tag_success_p(&vb.vbt_macaddr.tag)) {
1446 1.1 skrll const uint8_t enaddr[ETHER_ADDR_LEN] = {
1447 1.1 skrll (vb.vbt_macaddr.addr >> 0) & 0xff,
1448 1.1 skrll (vb.vbt_macaddr.addr >> 8) & 0xff,
1449 1.1 skrll (vb.vbt_macaddr.addr >> 16) & 0xff,
1450 1.1 skrll (vb.vbt_macaddr.addr >> 24) & 0xff,
1451 1.1 skrll (vb.vbt_macaddr.addr >> 32) & 0xff,
1452 1.1 skrll (vb.vbt_macaddr.addr >> 40) & 0xff
1453 1.1 skrll };
1454 1.1 skrll
1455 1.1 skrll prop_data_t pd = prop_data_create_data(enaddr, ETHER_ADDR_LEN);
1456 1.1 skrll KASSERT(pd != NULL);
1457 1.1 skrll if (prop_dictionary_set(device_properties(dev), "mac-address",
1458 1.1 skrll pd) == false) {
1459 1.1 skrll aprint_error_dev(dev,
1460 1.1 skrll "WARNING: Unable to set mac-address property\n");
1461 1.1 skrll }
1462 1.1 skrll prop_object_release(pd);
1463 1.1 skrll }
1464 1.1 skrll
1465 1.1 skrll #if NGENFB > 0
1466 1.1 skrll if (device_is_a(dev, "genfb")) {
1467 1.1 skrll char *ptr;
1468 1.1 skrll
1469 1.1 skrll bcmgenfb_set_console_dev(dev);
1470 1.1 skrll bcmgenfb_set_ioctl(&rpi_ioctl);
1471 1.1 skrll #ifdef DDB
1472 1.1 skrll db_trap_callback = bcmgenfb_ddb_trap_callback;
1473 1.1 skrll #endif
1474 1.1 skrll if (rpi_fb_init(dict, aux) == false)
1475 1.1 skrll return;
1476 1.1 skrll if (get_bootconf_option(boot_args, "console",
1477 1.1 skrll BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
1478 1.1 skrll prop_dictionary_set_bool(dict, "is_console", true);
1479 1.1 skrll #if NUKBD > 0
1480 1.1 skrll /* allow ukbd to be the console keyboard */
1481 1.1 skrll ukbd_cnattach();
1482 1.1 skrll #endif
1483 1.1 skrll } else {
1484 1.1 skrll prop_dictionary_set_bool(dict, "is_console", false);
1485 1.1 skrll }
1486 1.1 skrll }
1487 1.1 skrll #endif
1488 1.1 skrll }
1489 1.1 skrll
1490 1.1 skrll static u_int
1491 1.1 skrll bcm283x_platform_uart_freq(void)
1492 1.1 skrll {
1493 1.1 skrll
1494 1.1 skrll return uart_clk;
1495 1.1 skrll }
1496 1.1 skrll
1497 1.1 skrll #if defined(SOC_BCM2835)
1498 1.1 skrll static const struct arm_platform bcm2835_platform = {
1499 1.11 skrll .ap_devmap = bcm2835_platform_devmap,
1500 1.11 skrll .ap_bootstrap = bcm2835_platform_bootstrap,
1501 1.11 skrll .ap_init_attach_args = bcm2835_platform_init_attach_args,
1502 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1503 1.11 skrll .ap_reset = bcm2835_system_reset,
1504 1.11 skrll .ap_delay = bcm2835_tmr_delay,
1505 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1506 1.1 skrll };
1507 1.1 skrll
1508 1.1 skrll ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform);
1509 1.1 skrll #endif
1510 1.1 skrll
1511 1.1 skrll #if defined(SOC_BCM2836)
1512 1.1 skrll static u_int
1513 1.1 skrll bcm2837_platform_uart_freq(void)
1514 1.1 skrll {
1515 1.1 skrll
1516 1.1 skrll return core_clk * 2;
1517 1.1 skrll }
1518 1.1 skrll
1519 1.1 skrll static const struct arm_platform bcm2836_platform = {
1520 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1521 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1522 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1523 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1524 1.11 skrll .ap_reset = bcm2835_system_reset,
1525 1.11 skrll .ap_delay = gtmr_delay,
1526 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1527 1.23 jmcneill .ap_mpstart = arm_fdt_cpu_mpstart,
1528 1.1 skrll };
1529 1.1 skrll
1530 1.1 skrll static const struct arm_platform bcm2837_platform = {
1531 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1532 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1533 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1534 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1535 1.11 skrll .ap_reset = bcm2835_system_reset,
1536 1.11 skrll .ap_delay = gtmr_delay,
1537 1.11 skrll .ap_uart_freq = bcm2837_platform_uart_freq,
1538 1.23 jmcneill .ap_mpstart = arm_fdt_cpu_mpstart,
1539 1.1 skrll };
1540 1.1 skrll
1541 1.28 skrll static const struct arm_platform bcm2711_platform = {
1542 1.28 skrll .ap_devmap = bcm2711_platform_devmap,
1543 1.28 skrll .ap_bootstrap = bcm2711_platform_bootstrap,
1544 1.28 skrll .ap_init_attach_args = bcm2711_platform_init_attach_args,
1545 1.25 skrll .ap_device_register = bcm283x_platform_device_register,
1546 1.25 skrll .ap_reset = bcm2835_system_reset,
1547 1.25 skrll .ap_delay = gtmr_delay,
1548 1.25 skrll .ap_uart_freq = bcm2837_platform_uart_freq,
1549 1.25 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
1550 1.25 skrll };
1551 1.25 skrll
1552 1.1 skrll ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform);
1553 1.1 skrll ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform);
1554 1.28 skrll ARM_PLATFORM(bcm2711, "brcm,bcm2711", &bcm2711_platform);
1555 1.1 skrll #endif
1556