bcm283x_platform.c revision 1.43 1 1.42 rin /* $NetBSD: bcm283x_platform.c,v 1.43 2020/11/23 06:24:35 rin Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.42 rin __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.43 2020/11/23 06:24:35 rin Exp $");
31 1.1 skrll
32 1.1 skrll #include "opt_arm_debug.h"
33 1.1 skrll #include "opt_bcm283x.h"
34 1.1 skrll #include "opt_cpuoptions.h"
35 1.1 skrll #include "opt_ddb.h"
36 1.1 skrll #include "opt_evbarm_boardtype.h"
37 1.1 skrll #include "opt_kgdb.h"
38 1.1 skrll #include "opt_fdt.h"
39 1.1 skrll #include "opt_rpi.h"
40 1.1 skrll #include "opt_vcprop.h"
41 1.1 skrll
42 1.1 skrll #include "sdhc.h"
43 1.1 skrll #include "bcmsdhost.h"
44 1.1 skrll #include "bcmdwctwo.h"
45 1.1 skrll #include "bcmspi.h"
46 1.1 skrll #include "bsciic.h"
47 1.1 skrll #include "plcom.h"
48 1.1 skrll #include "com.h"
49 1.1 skrll #include "genfb.h"
50 1.1 skrll #include "ukbd.h"
51 1.1 skrll
52 1.1 skrll #include <sys/param.h>
53 1.1 skrll #include <sys/bus.h>
54 1.1 skrll #include <sys/cpu.h>
55 1.1 skrll #include <sys/device.h>
56 1.39 skrll #include <sys/kmem.h>
57 1.1 skrll #include <sys/termios.h>
58 1.1 skrll
59 1.1 skrll #include <net/if_ether.h>
60 1.1 skrll
61 1.1 skrll #include <prop/proplib.h>
62 1.1 skrll
63 1.1 skrll #include <dev/fdt/fdtvar.h>
64 1.1 skrll
65 1.1 skrll #include <uvm/uvm_extern.h>
66 1.1 skrll
67 1.1 skrll #include <machine/bootconfig.h>
68 1.9 skrll
69 1.4 ryo #include <arm/armreg.h>
70 1.1 skrll #include <arm/cpufunc.h>
71 1.1 skrll
72 1.1 skrll #include <libfdt.h>
73 1.1 skrll
74 1.1 skrll #include <arm/broadcom/bcm2835reg.h>
75 1.1 skrll #include <arm/broadcom/bcm2835var.h>
76 1.4 ryo #include <arm/broadcom/bcm283x_platform.h>
77 1.1 skrll #include <arm/broadcom/bcm2835_intr.h>
78 1.1 skrll #include <arm/broadcom/bcm2835_mbox.h>
79 1.1 skrll #include <arm/broadcom/bcm2835_pmwdogvar.h>
80 1.1 skrll
81 1.1 skrll #include <evbarm/dev/plcomreg.h>
82 1.1 skrll #include <evbarm/dev/plcomvar.h>
83 1.9 skrll #include <evbarm/fdt/machdep.h>
84 1.1 skrll
85 1.1 skrll #include <dev/ic/ns16550reg.h>
86 1.1 skrll #include <dev/ic/comreg.h>
87 1.1 skrll
88 1.1 skrll #include <evbarm/rpi/vcio.h>
89 1.1 skrll #include <evbarm/rpi/vcpm.h>
90 1.1 skrll #include <evbarm/rpi/vcprop.h>
91 1.1 skrll
92 1.1 skrll #include <arm/fdt/arm_fdtvar.h>
93 1.1 skrll
94 1.1 skrll #include <arm/cortex/gtmr_var.h>
95 1.1 skrll
96 1.1 skrll #if NGENFB > 0
97 1.1 skrll #include <dev/videomode/videomode.h>
98 1.1 skrll #include <dev/videomode/edidvar.h>
99 1.1 skrll #include <dev/wscons/wsconsio.h>
100 1.1 skrll #endif
101 1.1 skrll
102 1.1 skrll #if NUKBD > 0
103 1.1 skrll #include <dev/usb/ukbdvar.h>
104 1.1 skrll #endif
105 1.1 skrll
106 1.1 skrll #ifdef DDB
107 1.1 skrll #include <machine/db_machdep.h>
108 1.1 skrll #include <ddb/db_sym.h>
109 1.1 skrll #include <ddb/db_extern.h>
110 1.1 skrll #endif
111 1.1 skrll
112 1.20 skrll #define RPI_CPU_MAX 4
113 1.20 skrll
114 1.1 skrll void bcm2835_platform_early_putchar(char c);
115 1.43 rin void bcm2835_aux_platform_early_putchar(char c);
116 1.1 skrll void bcm2836_platform_early_putchar(char c);
117 1.1 skrll void bcm2837_platform_early_putchar(char c);
118 1.28 skrll void bcm2711_platform_early_putchar(char c);
119 1.1 skrll
120 1.1 skrll extern void bcmgenfb_set_console_dev(device_t dev);
121 1.1 skrll void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
122 1.1 skrll extern void bcmgenfb_ddb_trap_callback(int where);
123 1.1 skrll static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
124 1.1 skrll
125 1.4 ryo extern struct bus_space arm_generic_bs_tag;
126 1.4 ryo extern struct bus_space arm_generic_a4x_bs_tag;
127 1.1 skrll
128 1.1 skrll /* Prototypes for all the bus_space structure functions */
129 1.4 ryo bs_protos(arm_generic);
130 1.4 ryo bs_protos(arm_generic_a4x);
131 1.1 skrll bs_protos(bcm2835);
132 1.1 skrll bs_protos(bcm2835_a4x);
133 1.4 ryo bs_protos(bcm2836);
134 1.4 ryo bs_protos(bcm2836_a4x);
135 1.28 skrll bs_protos(bcm2711);
136 1.28 skrll bs_protos(bcm2711_a4x);
137 1.4 ryo
138 1.4 ryo struct bus_space bcm2835_bs_tag;
139 1.4 ryo struct bus_space bcm2835_a4x_bs_tag;
140 1.4 ryo struct bus_space bcm2836_bs_tag;
141 1.4 ryo struct bus_space bcm2836_a4x_bs_tag;
142 1.28 skrll struct bus_space bcm2711_bs_tag;
143 1.28 skrll struct bus_space bcm2711_a4x_bs_tag;
144 1.4 ryo
145 1.12 rin static paddr_t bcm2835_bus_to_phys(bus_addr_t);
146 1.12 rin static paddr_t bcm2836_bus_to_phys(bus_addr_t);
147 1.28 skrll static paddr_t bcm2711_bus_to_phys(bus_addr_t);
148 1.4 ryo
149 1.20 skrll #ifdef VERBOSE_INIT_ARM
150 1.20 skrll #define VPRINTF(...) printf(__VA_ARGS__)
151 1.20 skrll #else
152 1.20 skrll #define VPRINTF(...) __nothing
153 1.20 skrll #endif
154 1.20 skrll
155 1.12 rin static paddr_t
156 1.12 rin bcm2835_bus_to_phys(bus_addr_t ba)
157 1.4 ryo {
158 1.4 ryo
159 1.12 rin /* Attempt to find the PA device mapping */
160 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
161 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
162 1.12 rin return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
163 1.4 ryo
164 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
165 1.12 rin }
166 1.4 ryo
167 1.12 rin static paddr_t
168 1.12 rin bcm2836_bus_to_phys(bus_addr_t ba)
169 1.12 rin {
170 1.12 rin
171 1.12 rin /* Attempt to find the PA device mapping */
172 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
173 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
174 1.12 rin return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
175 1.12 rin
176 1.12 rin if (ba >= BCM2836_ARM_LOCAL_BASE &&
177 1.12 rin ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE)
178 1.12 rin return ba;
179 1.4 ryo
180 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
181 1.4 ryo }
182 1.4 ryo
183 1.25 skrll static paddr_t
184 1.28 skrll bcm2711_bus_to_phys(bus_addr_t ba)
185 1.25 skrll {
186 1.25 skrll
187 1.25 skrll /* Attempt to find the PA device mapping */
188 1.25 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
189 1.25 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
190 1.28 skrll return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba);
191 1.25 skrll
192 1.36 jmcneill if (ba >= BCM2711_SCB_BASE_BUS &&
193 1.36 jmcneill ba < BCM2711_SCB_BASE_BUS + BCM2711_SCB_SIZE)
194 1.36 jmcneill return BCM2711_SCB_BUS_TO_PHYS(ba);
195 1.36 jmcneill
196 1.31 skrll if (ba >= BCM2711_ARM_LOCAL_BASE_BUS &&
197 1.31 skrll ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE)
198 1.31 skrll return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba);
199 1.25 skrll
200 1.25 skrll return ba & ~BCM2835_BUSADDR_CACHE_MASK;
201 1.25 skrll }
202 1.25 skrll
203 1.12 rin int
204 1.12 rin bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
205 1.12 rin bus_space_handle_t *bshp)
206 1.5 jmcneill {
207 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
208 1.5 jmcneill
209 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
210 1.5 jmcneill }
211 1.5 jmcneill
212 1.5 jmcneill paddr_t
213 1.12 rin bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
214 1.5 jmcneill {
215 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
216 1.5 jmcneill
217 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
218 1.5 jmcneill }
219 1.5 jmcneill
220 1.12 rin paddr_t
221 1.12 rin bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
222 1.4 ryo {
223 1.4 ryo
224 1.12 rin return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags);
225 1.4 ryo }
226 1.4 ryo
227 1.4 ryo int
228 1.4 ryo bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
229 1.4 ryo bus_space_handle_t *bshp)
230 1.4 ryo {
231 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
232 1.4 ryo
233 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
234 1.12 rin }
235 1.12 rin
236 1.12 rin paddr_t
237 1.12 rin bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
238 1.12 rin {
239 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
240 1.4 ryo
241 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
242 1.12 rin }
243 1.4 ryo
244 1.12 rin paddr_t
245 1.12 rin bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
246 1.12 rin {
247 1.4 ryo
248 1.12 rin return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags);
249 1.4 ryo }
250 1.1 skrll
251 1.25 skrll int
252 1.28 skrll bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
253 1.25 skrll bus_space_handle_t *bshp)
254 1.25 skrll {
255 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
256 1.25 skrll
257 1.25 skrll return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
258 1.25 skrll }
259 1.25 skrll
260 1.25 skrll paddr_t
261 1.28 skrll bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
262 1.25 skrll {
263 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
264 1.25 skrll
265 1.25 skrll return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
266 1.25 skrll }
267 1.25 skrll
268 1.25 skrll paddr_t
269 1.28 skrll bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
270 1.25 skrll {
271 1.25 skrll
272 1.28 skrll return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags);
273 1.25 skrll }
274 1.25 skrll
275 1.1 skrll #if defined(SOC_BCM2835)
276 1.1 skrll static const struct pmap_devmap *
277 1.1 skrll bcm2835_platform_devmap(void)
278 1.1 skrll {
279 1.1 skrll static const struct pmap_devmap devmap[] = {
280 1.1 skrll DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
281 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
282 1.1 skrll
283 1.1 skrll DEVMAP_ENTRY_END
284 1.1 skrll };
285 1.1 skrll
286 1.1 skrll return devmap;
287 1.1 skrll }
288 1.1 skrll #endif
289 1.1 skrll
290 1.1 skrll #if defined(SOC_BCM2836)
291 1.1 skrll static const struct pmap_devmap *
292 1.1 skrll bcm2836_platform_devmap(void)
293 1.1 skrll {
294 1.1 skrll static const struct pmap_devmap devmap[] = {
295 1.1 skrll DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
296 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
297 1.1 skrll DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
298 1.1 skrll BCM2836_ARM_LOCAL_SIZE),
299 1.18 ryo #if defined(MULTIPROCESSOR) && defined(__aarch64__)
300 1.18 ryo /* for fdt cpu spin-table */
301 1.18 ryo DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
302 1.18 ryo BCM2836_ARM_SMP_SIZE),
303 1.18 ryo #endif
304 1.1 skrll DEVMAP_ENTRY_END
305 1.1 skrll };
306 1.1 skrll
307 1.1 skrll return devmap;
308 1.1 skrll }
309 1.25 skrll
310 1.25 skrll static const struct pmap_devmap *
311 1.28 skrll bcm2711_platform_devmap(void)
312 1.25 skrll {
313 1.25 skrll static const struct pmap_devmap devmap[] = {
314 1.28 skrll DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE,
315 1.25 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
316 1.28 skrll DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE,
317 1.28 skrll BCM2711_ARM_LOCAL_SIZE),
318 1.25 skrll #if defined(MULTIPROCESSOR) && defined(__aarch64__)
319 1.25 skrll /* for fdt cpu spin-table */
320 1.31 skrll DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
321 1.25 skrll BCM2836_ARM_SMP_SIZE),
322 1.25 skrll #endif
323 1.25 skrll DEVMAP_ENTRY_END
324 1.25 skrll };
325 1.25 skrll
326 1.25 skrll return devmap;
327 1.25 skrll }
328 1.26 skrll #endif
329 1.26 skrll
330 1.1 skrll /*
331 1.1 skrll * Macros to translate between physical and virtual for a subset of the
332 1.1 skrll * kernel address space. *Not* for general use.
333 1.1 skrll */
334 1.1 skrll
335 1.1 skrll #ifndef RPI_FB_WIDTH
336 1.1 skrll #define RPI_FB_WIDTH 1280
337 1.1 skrll #endif
338 1.1 skrll #ifndef RPI_FB_HEIGHT
339 1.1 skrll #define RPI_FB_HEIGHT 720
340 1.1 skrll #endif
341 1.1 skrll
342 1.1 skrll int uart_clk = BCM2835_UART0_CLK;
343 1.1 skrll int core_clk;
344 1.1 skrll
345 1.1 skrll static struct {
346 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
347 1.1 skrll struct vcprop_tag_clockrate vbt_uartclockrate;
348 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
349 1.1 skrll struct vcprop_tag end;
350 1.1 skrll } vb_uart __cacheline_aligned = {
351 1.1 skrll .vb_hdr = {
352 1.1 skrll .vpb_len = sizeof(vb_uart),
353 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
354 1.1 skrll },
355 1.1 skrll .vbt_uartclockrate = {
356 1.1 skrll .tag = {
357 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
358 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
359 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
360 1.1 skrll },
361 1.1 skrll .id = VCPROP_CLK_UART
362 1.1 skrll },
363 1.1 skrll .vbt_vpuclockrate = {
364 1.1 skrll .tag = {
365 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
366 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate),
367 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
368 1.1 skrll },
369 1.1 skrll .id = VCPROP_CLK_CORE
370 1.1 skrll },
371 1.1 skrll .end = {
372 1.1 skrll .vpt_tag = VCPROPTAG_NULL
373 1.1 skrll }
374 1.1 skrll };
375 1.1 skrll
376 1.1 skrll static struct {
377 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
378 1.1 skrll struct vcprop_tag_fwrev vbt_fwrev;
379 1.1 skrll struct vcprop_tag_boardmodel vbt_boardmodel;
380 1.1 skrll struct vcprop_tag_boardrev vbt_boardrev;
381 1.1 skrll struct vcprop_tag_macaddr vbt_macaddr;
382 1.1 skrll struct vcprop_tag_memory vbt_memory;
383 1.1 skrll struct vcprop_tag_boardserial vbt_serial;
384 1.1 skrll struct vcprop_tag_dmachan vbt_dmachan;
385 1.1 skrll struct vcprop_tag_cmdline vbt_cmdline;
386 1.1 skrll struct vcprop_tag_clockrate vbt_emmcclockrate;
387 1.1 skrll struct vcprop_tag_clockrate vbt_armclockrate;
388 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
389 1.29 skrll struct vcprop_tag_clockrate vbt_emmc2clockrate;
390 1.1 skrll struct vcprop_tag end;
391 1.1 skrll } vb __cacheline_aligned = {
392 1.1 skrll .vb_hdr = {
393 1.1 skrll .vpb_len = sizeof(vb),
394 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
395 1.1 skrll },
396 1.1 skrll .vbt_fwrev = {
397 1.1 skrll .tag = {
398 1.1 skrll .vpt_tag = VCPROPTAG_GET_FIRMWAREREV,
399 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev),
400 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
401 1.1 skrll },
402 1.1 skrll },
403 1.1 skrll .vbt_boardmodel = {
404 1.1 skrll .tag = {
405 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDMODEL,
406 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel),
407 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
408 1.1 skrll },
409 1.1 skrll },
410 1.1 skrll .vbt_boardrev = {
411 1.1 skrll .tag = {
412 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDREVISION,
413 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev),
414 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
415 1.1 skrll },
416 1.1 skrll },
417 1.1 skrll .vbt_macaddr = {
418 1.1 skrll .tag = {
419 1.1 skrll .vpt_tag = VCPROPTAG_GET_MACADDRESS,
420 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr),
421 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
422 1.1 skrll },
423 1.1 skrll },
424 1.1 skrll .vbt_memory = {
425 1.1 skrll .tag = {
426 1.1 skrll .vpt_tag = VCPROPTAG_GET_ARMMEMORY,
427 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_memory),
428 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
429 1.1 skrll },
430 1.1 skrll },
431 1.1 skrll .vbt_serial = {
432 1.1 skrll .tag = {
433 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDSERIAL,
434 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_serial),
435 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
436 1.1 skrll },
437 1.1 skrll },
438 1.1 skrll .vbt_dmachan = {
439 1.1 skrll .tag = {
440 1.1 skrll .vpt_tag = VCPROPTAG_GET_DMACHAN,
441 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan),
442 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
443 1.1 skrll },
444 1.1 skrll },
445 1.1 skrll .vbt_cmdline = {
446 1.1 skrll .tag = {
447 1.1 skrll .vpt_tag = VCPROPTAG_GET_CMDLINE,
448 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline),
449 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
450 1.1 skrll },
451 1.1 skrll },
452 1.1 skrll .vbt_emmcclockrate = {
453 1.1 skrll .tag = {
454 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
455 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate),
456 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
457 1.1 skrll },
458 1.1 skrll .id = VCPROP_CLK_EMMC
459 1.1 skrll },
460 1.1 skrll .vbt_armclockrate = {
461 1.1 skrll .tag = {
462 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
463 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate),
464 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
465 1.1 skrll },
466 1.1 skrll .id = VCPROP_CLK_ARM
467 1.1 skrll },
468 1.1 skrll .vbt_vpuclockrate = {
469 1.1 skrll .tag = {
470 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
471 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate),
472 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
473 1.1 skrll },
474 1.1 skrll .id = VCPROP_CLK_CORE
475 1.1 skrll },
476 1.29 skrll .vbt_emmc2clockrate = {
477 1.29 skrll .tag = {
478 1.29 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
479 1.29 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmc2clockrate),
480 1.29 skrll .vpt_rcode = VCPROPTAG_REQUEST
481 1.29 skrll },
482 1.29 skrll .id = VCPROP_CLK_EMMC2
483 1.29 skrll },
484 1.1 skrll .end = {
485 1.1 skrll .vpt_tag = VCPROPTAG_NULL
486 1.1 skrll }
487 1.1 skrll };
488 1.1 skrll
489 1.1 skrll #if NGENFB > 0
490 1.1 skrll static struct {
491 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
492 1.1 skrll struct vcprop_tag_edidblock vbt_edid;
493 1.1 skrll struct vcprop_tag end;
494 1.1 skrll } vb_edid __cacheline_aligned = {
495 1.1 skrll .vb_hdr = {
496 1.1 skrll .vpb_len = sizeof(vb_edid),
497 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
498 1.1 skrll },
499 1.1 skrll .vbt_edid = {
500 1.1 skrll .tag = {
501 1.1 skrll .vpt_tag = VCPROPTAG_GET_EDID_BLOCK,
502 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid),
503 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
504 1.1 skrll },
505 1.1 skrll .blockno = 0,
506 1.1 skrll },
507 1.1 skrll .end = {
508 1.1 skrll .vpt_tag = VCPROPTAG_NULL
509 1.1 skrll }
510 1.1 skrll };
511 1.1 skrll
512 1.1 skrll static struct {
513 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
514 1.1 skrll struct vcprop_tag_fbres vbt_res;
515 1.1 skrll struct vcprop_tag_fbres vbt_vres;
516 1.1 skrll struct vcprop_tag_fbdepth vbt_depth;
517 1.1 skrll struct vcprop_tag_fbalpha vbt_alpha;
518 1.1 skrll struct vcprop_tag_allocbuf vbt_allocbuf;
519 1.1 skrll struct vcprop_tag_blankscreen vbt_blank;
520 1.1 skrll struct vcprop_tag_fbpitch vbt_pitch;
521 1.1 skrll struct vcprop_tag end;
522 1.1 skrll } vb_setfb __cacheline_aligned = {
523 1.1 skrll .vb_hdr = {
524 1.1 skrll .vpb_len = sizeof(vb_setfb),
525 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
526 1.1 skrll },
527 1.1 skrll .vbt_res = {
528 1.1 skrll .tag = {
529 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_RES,
530 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res),
531 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
532 1.1 skrll },
533 1.1 skrll .width = 0,
534 1.1 skrll .height = 0,
535 1.1 skrll },
536 1.1 skrll .vbt_vres = {
537 1.1 skrll .tag = {
538 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_VRES,
539 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres),
540 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
541 1.1 skrll },
542 1.1 skrll .width = 0,
543 1.1 skrll .height = 0,
544 1.1 skrll },
545 1.1 skrll .vbt_depth = {
546 1.1 skrll .tag = {
547 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_DEPTH,
548 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth),
549 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
550 1.1 skrll },
551 1.1 skrll .bpp = 32,
552 1.1 skrll },
553 1.1 skrll .vbt_alpha = {
554 1.1 skrll .tag = {
555 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE,
556 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha),
557 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
558 1.1 skrll },
559 1.1 skrll .state = VCPROP_ALPHA_IGNORED,
560 1.1 skrll },
561 1.1 skrll .vbt_allocbuf = {
562 1.1 skrll .tag = {
563 1.1 skrll .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER,
564 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf),
565 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
566 1.1 skrll },
567 1.1 skrll .address = PAGE_SIZE, /* alignment */
568 1.1 skrll },
569 1.1 skrll .vbt_blank = {
570 1.1 skrll .tag = {
571 1.1 skrll .vpt_tag = VCPROPTAG_BLANK_SCREEN,
572 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank),
573 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
574 1.1 skrll },
575 1.1 skrll .state = VCPROP_BLANK_OFF,
576 1.1 skrll },
577 1.1 skrll .vbt_pitch = {
578 1.1 skrll .tag = {
579 1.1 skrll .vpt_tag = VCPROPTAG_GET_FB_PITCH,
580 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch),
581 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
582 1.1 skrll },
583 1.1 skrll },
584 1.1 skrll .end = {
585 1.1 skrll .vpt_tag = VCPROPTAG_NULL,
586 1.1 skrll },
587 1.1 skrll };
588 1.1 skrll
589 1.1 skrll #endif
590 1.1 skrll
591 1.1 skrll static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
592 1.1 skrll
593 1.1 skrll #if defined(RPI_HWCURSOR)
594 1.1 skrll #define CURSOR_BITMAP_SIZE (64 * 8)
595 1.1 skrll #define CURSOR_ARGB_SIZE (64 * 64 * 4)
596 1.1 skrll static uint32_t hcursor = 0;
597 1.1 skrll static bus_addr_t pcursor = 0;
598 1.1 skrll static uint32_t *cmem = NULL;
599 1.1 skrll static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
600 1.1 skrll static uint32_t cursor_cmap[4];
601 1.1 skrll static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
602 1.1 skrll #endif
603 1.1 skrll
604 1.1 skrll u_int
605 1.1 skrll bcm283x_clk_get_rate_uart(void)
606 1.1 skrll {
607 1.1 skrll
608 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
609 1.1 skrll return vb_uart.vbt_uartclockrate.rate;
610 1.1 skrll return 0;
611 1.1 skrll }
612 1.1 skrll
613 1.1 skrll u_int
614 1.1 skrll bcm283x_clk_get_rate_vpu(void)
615 1.1 skrll {
616 1.1 skrll
617 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
618 1.1 skrll vb.vbt_vpuclockrate.rate > 0) {
619 1.1 skrll return vb.vbt_vpuclockrate.rate;
620 1.1 skrll }
621 1.1 skrll return 0;
622 1.1 skrll }
623 1.1 skrll
624 1.1 skrll u_int
625 1.1 skrll bcm283x_clk_get_rate_emmc(void)
626 1.1 skrll {
627 1.1 skrll
628 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
629 1.1 skrll vb.vbt_emmcclockrate.rate > 0) {
630 1.1 skrll return vb.vbt_emmcclockrate.rate;
631 1.1 skrll }
632 1.1 skrll return 0;
633 1.1 skrll }
634 1.1 skrll
635 1.29 skrll u_int
636 1.29 skrll bcm283x_clk_get_rate_emmc2(void)
637 1.29 skrll {
638 1.29 skrll
639 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) &&
640 1.29 skrll vb.vbt_emmc2clockrate.rate > 0) {
641 1.29 skrll return vb.vbt_emmc2clockrate.rate;
642 1.29 skrll }
643 1.29 skrll return 0;
644 1.29 skrll }
645 1.29 skrll
646 1.1 skrll
647 1.1 skrll
648 1.1 skrll static void
649 1.1 skrll bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
650 1.1 skrll {
651 1.1 skrll uint32_t res;
652 1.1 skrll
653 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
654 1.8 christos KERN_VTOPHYS((vaddr_t)&vb_uart));
655 1.1 skrll
656 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
657 1.1 skrll
658 1.32 skrll /*
659 1.32 skrll * RPI4 has Cortex A72 processors which do speculation, so
660 1.32 skrll * we need to invalidate the cache for an updates done by
661 1.32 skrll * the firmware
662 1.32 skrll */
663 1.32 skrll cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart));
664 1.32 skrll
665 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
666 1.1 skrll uart_clk = vb_uart.vbt_uartclockrate.rate;
667 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
668 1.1 skrll core_clk = vb_uart.vbt_vpuclockrate.rate;
669 1.1 skrll }
670 1.1 skrll
671 1.1 skrll #if defined(SOC_BCM2835)
672 1.1 skrll static void
673 1.1 skrll bcm2835_uartinit(void)
674 1.1 skrll {
675 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
676 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
677 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
678 1.1 skrll
679 1.1 skrll bcm283x_uartinit(iot, ioh);
680 1.1 skrll }
681 1.1 skrll #endif
682 1.1 skrll
683 1.1 skrll #if defined(SOC_BCM2836)
684 1.1 skrll static void
685 1.1 skrll bcm2836_uartinit(void)
686 1.1 skrll {
687 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
688 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
689 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
690 1.1 skrll
691 1.1 skrll bcm283x_uartinit(iot, ioh);
692 1.1 skrll }
693 1.25 skrll
694 1.25 skrll static void
695 1.28 skrll bcm2711_uartinit(void)
696 1.25 skrll {
697 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
698 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
699 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
700 1.25 skrll
701 1.25 skrll bcm283x_uartinit(iot, ioh);
702 1.25 skrll }
703 1.1 skrll #endif
704 1.1 skrll
705 1.1 skrll #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024)
706 1.1 skrll
707 1.1 skrll static size_t bcm283x_memorysize;
708 1.1 skrll
709 1.1 skrll static void
710 1.1 skrll bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
711 1.1 skrll {
712 1.1 skrll uint32_t res;
713 1.1 skrll
714 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
715 1.1 skrll #if (NSDHC > 0)
716 1.1 skrll (1 << VCPM_POWER_SDCARD) |
717 1.1 skrll #endif
718 1.1 skrll #if (NPLCOM > 0)
719 1.1 skrll (1 << VCPM_POWER_UART0) |
720 1.1 skrll #endif
721 1.1 skrll #if (NBCMDWCTWO > 0)
722 1.1 skrll (1 << VCPM_POWER_USB) |
723 1.1 skrll #endif
724 1.1 skrll #if (NBSCIIC > 0)
725 1.1 skrll (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
726 1.1 skrll /* (1 << VCPM_POWER_I2C2) | */
727 1.1 skrll #endif
728 1.1 skrll #if (NBCMSPI > 0)
729 1.1 skrll (1 << VCPM_POWER_SPI) |
730 1.1 skrll #endif
731 1.1 skrll 0) << 4);
732 1.1 skrll
733 1.8 christos bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
734 1.8 christos KERN_VTOPHYS((vaddr_t)&vb));
735 1.1 skrll
736 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
737 1.1 skrll
738 1.30 skrll /*
739 1.30 skrll * RPI4 has Cortex A72 processors which do speculation, so
740 1.30 skrll * we need to invalidate the cache for an updates done by
741 1.30 skrll * the firmware
742 1.30 skrll */
743 1.30 skrll cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
744 1.30 skrll
745 1.1 skrll if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
746 1.1 skrll bootconfig.dramblocks = 1;
747 1.1 skrll bootconfig.dram[0].address = 0x0;
748 1.1 skrll bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
749 1.1 skrll return;
750 1.1 skrll }
751 1.1 skrll
752 1.1 skrll struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
753 1.1 skrll if (vcprop_tag_success_p(&vptp_mem->tag)) {
754 1.1 skrll size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
755 1.1 skrll sizeof(struct vcprop_memory);
756 1.1 skrll
757 1.1 skrll bcm283x_memorysize = 0;
758 1.1 skrll bootconfig.dramblocks = 0;
759 1.1 skrll
760 1.1 skrll for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
761 1.1 skrll bootconfig.dram[i].address = vptp_mem->mem[i].base;
762 1.1 skrll bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size);
763 1.1 skrll bootconfig.dramblocks++;
764 1.1 skrll
765 1.1 skrll bcm283x_memorysize += vptp_mem->mem[i].size;
766 1.1 skrll }
767 1.1 skrll }
768 1.1 skrll
769 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
770 1.1 skrll curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
771 1.1 skrll
772 1.1 skrll #ifdef VERBOSE_INIT_ARM
773 1.13 rin if (vcprop_tag_success_p(&vb.vbt_memory.tag))
774 1.13 rin printf("%s: memory size %zu\n", __func__,
775 1.13 rin bcm283x_memorysize);
776 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
777 1.1 skrll printf("%s: arm clock %d\n", __func__,
778 1.1 skrll vb.vbt_armclockrate.rate);
779 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag))
780 1.29 skrll printf("%s: vpu clock %d\n", __func__,
781 1.29 skrll vb.vbt_vpuclockrate.rate);
782 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag))
783 1.29 skrll printf("%s: emmc clock %d\n", __func__,
784 1.29 skrll vb.vbt_emmcclockrate.rate);
785 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag))
786 1.29 skrll printf("%s: emmc2 clock %d\n", __func__,
787 1.29 skrll vb.vbt_emmcclockrate.rate);
788 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
789 1.1 skrll printf("%s: firmware rev %x\n", __func__,
790 1.1 skrll vb.vbt_fwrev.rev);
791 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
792 1.1 skrll printf("%s: board model %x\n", __func__,
793 1.1 skrll vb.vbt_boardmodel.model);
794 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
795 1.8 christos printf("%s: mac-address %" PRIx64 "\n", __func__,
796 1.1 skrll vb.vbt_macaddr.addr);
797 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
798 1.1 skrll printf("%s: board rev %x\n", __func__,
799 1.1 skrll vb.vbt_boardrev.rev);
800 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_serial.tag))
801 1.8 christos printf("%s: board serial %" PRIx64 "\n", __func__,
802 1.1 skrll vb.vbt_serial.sn);
803 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
804 1.1 skrll printf("%s: DMA channel mask 0x%08x\n", __func__,
805 1.1 skrll vb.vbt_dmachan.mask);
806 1.1 skrll
807 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
808 1.1 skrll printf("%s: cmdline %s\n", __func__,
809 1.1 skrll vb.vbt_cmdline.cmdline);
810 1.1 skrll #endif
811 1.1 skrll }
812 1.1 skrll
813 1.1 skrll #if defined(SOC_BCM2835)
814 1.1 skrll static void
815 1.1 skrll bcm2835_bootparams(void)
816 1.1 skrll {
817 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
818 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
819 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
820 1.1 skrll
821 1.1 skrll bcm283x_bootparams(iot, ioh);
822 1.1 skrll }
823 1.1 skrll #endif
824 1.1 skrll
825 1.1 skrll #if defined(SOC_BCM2836)
826 1.1 skrll static void
827 1.1 skrll bcm2836_bootparams(void)
828 1.1 skrll {
829 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
830 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
831 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
832 1.1 skrll
833 1.1 skrll bcm283x_bootparams(iot, ioh);
834 1.1 skrll }
835 1.1 skrll
836 1.25 skrll static void
837 1.28 skrll bcm2711_bootparams(void)
838 1.25 skrll {
839 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
840 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
841 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
842 1.25 skrll
843 1.25 skrll bcm283x_bootparams(iot, ioh);
844 1.25 skrll }
845 1.25 skrll
846 1.23 jmcneill #if defined(MULTIPROCESSOR)
847 1.23 jmcneill static int
848 1.23 jmcneill cpu_enable_bcm2836(int phandle)
849 1.1 skrll {
850 1.23 jmcneill bus_space_tag_t iot = &bcm2836_bs_tag;
851 1.23 jmcneill bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
852 1.23 jmcneill uint64_t mpidr;
853 1.1 skrll
854 1.23 jmcneill fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
855 1.15 ryo
856 1.23 jmcneill const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
857 1.7 ryo
858 1.23 jmcneill bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno),
859 1.23 jmcneill KERN_VTOPHYS((vaddr_t)cpu_mpstart));
860 1.18 ryo
861 1.23 jmcneill return 0;
862 1.1 skrll }
863 1.23 jmcneill ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836);
864 1.23 jmcneill #endif
865 1.1 skrll
866 1.1 skrll #endif /* SOC_BCM2836 */
867 1.1 skrll
868 1.1 skrll #if NGENFB > 0
869 1.1 skrll static bool
870 1.1 skrll rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
871 1.1 skrll {
872 1.1 skrll char *x;
873 1.1 skrll
874 1.1 skrll if (strncmp(s, "disable", 7) == 0)
875 1.1 skrll return false;
876 1.1 skrll
877 1.1 skrll x = strchr(s, 'x');
878 1.1 skrll if (x) {
879 1.1 skrll *pwidth = strtoul(s, NULL, 10);
880 1.1 skrll *pheight = strtoul(x + 1, NULL, 10);
881 1.1 skrll }
882 1.1 skrll
883 1.1 skrll return true;
884 1.1 skrll }
885 1.1 skrll
886 1.39 skrll #define RPI_EDIDSIZE 1024
887 1.39 skrll
888 1.1 skrll static bool
889 1.1 skrll rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
890 1.1 skrll {
891 1.1 skrll struct edid_info ei;
892 1.1 skrll uint32_t res;
893 1.1 skrll int error;
894 1.1 skrll
895 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
896 1.1 skrll sizeof(vb_edid), &res);
897 1.1 skrll if (error) {
898 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
899 1.1 skrll return false;
900 1.1 skrll }
901 1.1 skrll
902 1.1 skrll if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
903 1.1 skrll !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
904 1.1 skrll vb_edid.vbt_edid.status != 0)
905 1.1 skrll return false;
906 1.1 skrll
907 1.39 skrll uint8_t *edid_data = kmem_alloc(RPI_EDIDSIZE, KM_SLEEP);
908 1.39 skrll
909 1.39 skrll memset(edid_data, 0, RPI_EDIDSIZE);
910 1.1 skrll memcpy(edid_data, vb_edid.vbt_edid.data,
911 1.1 skrll sizeof(vb_edid.vbt_edid.data));
912 1.1 skrll edid_parse(edid_data, &ei);
913 1.1 skrll #ifdef VERBOSE_INIT_ARM
914 1.1 skrll edid_print(&ei);
915 1.1 skrll #endif
916 1.1 skrll
917 1.1 skrll if (ei.edid_preferred_mode) {
918 1.1 skrll *pwidth = ei.edid_preferred_mode->hdisplay;
919 1.1 skrll *pheight = ei.edid_preferred_mode->vdisplay;
920 1.1 skrll }
921 1.1 skrll
922 1.39 skrll kmem_free(edid_data, RPI_EDIDSIZE);
923 1.39 skrll
924 1.1 skrll return true;
925 1.1 skrll }
926 1.1 skrll
927 1.1 skrll /*
928 1.1 skrll * Initialize framebuffer console.
929 1.1 skrll *
930 1.1 skrll * Some notes about boot parameters:
931 1.1 skrll * - If "fb=disable" is present, ignore framebuffer completely.
932 1.1 skrll * - If "fb=<width>x<height> is present, use the specified mode.
933 1.1 skrll * - If "console=fb" is present, attach framebuffer to console.
934 1.1 skrll */
935 1.1 skrll static bool
936 1.1 skrll rpi_fb_init(prop_dictionary_t dict, void *aux)
937 1.1 skrll {
938 1.1 skrll uint32_t width = 0, height = 0;
939 1.1 skrll uint32_t res;
940 1.1 skrll char *ptr;
941 1.1 skrll int integer;
942 1.1 skrll int error;
943 1.1 skrll bool is_bgr = true;
944 1.1 skrll
945 1.1 skrll if (get_bootconf_option(boot_args, "fb",
946 1.1 skrll BOOTOPT_TYPE_STRING, &ptr)) {
947 1.1 skrll if (rpi_fb_parse_mode(ptr, &width, &height) == false)
948 1.1 skrll return false;
949 1.1 skrll }
950 1.1 skrll if (width == 0 || height == 0) {
951 1.1 skrll rpi_fb_get_edid_mode(&width, &height);
952 1.1 skrll }
953 1.1 skrll if (width == 0 || height == 0) {
954 1.1 skrll width = RPI_FB_WIDTH;
955 1.1 skrll height = RPI_FB_HEIGHT;
956 1.1 skrll }
957 1.1 skrll
958 1.1 skrll vb_setfb.vbt_res.width = width;
959 1.1 skrll vb_setfb.vbt_res.height = height;
960 1.1 skrll vb_setfb.vbt_vres.width = width;
961 1.1 skrll vb_setfb.vbt_vres.height = height;
962 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
963 1.1 skrll sizeof(vb_setfb), &res);
964 1.1 skrll if (error) {
965 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
966 1.1 skrll return false;
967 1.1 skrll }
968 1.1 skrll
969 1.1 skrll if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
970 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
971 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
972 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
973 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
974 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
975 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
976 1.1 skrll printf("%s: prop tag failed\n", __func__);
977 1.1 skrll return false;
978 1.1 skrll }
979 1.1 skrll
980 1.1 skrll #ifdef VERBOSE_INIT_ARM
981 1.1 skrll printf("%s: addr = 0x%x size = %d\n", __func__,
982 1.1 skrll vb_setfb.vbt_allocbuf.address,
983 1.1 skrll vb_setfb.vbt_allocbuf.size);
984 1.1 skrll printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp);
985 1.1 skrll printf("%s: pitch = %d\n", __func__,
986 1.1 skrll vb_setfb.vbt_pitch.linebytes);
987 1.1 skrll printf("%s: width = %d height = %d\n", __func__,
988 1.1 skrll vb_setfb.vbt_res.width, vb_setfb.vbt_res.height);
989 1.1 skrll printf("%s: vwidth = %d vheight = %d\n", __func__,
990 1.1 skrll vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height);
991 1.1 skrll #endif
992 1.1 skrll
993 1.1 skrll if (vb_setfb.vbt_allocbuf.address == 0 ||
994 1.1 skrll vb_setfb.vbt_allocbuf.size == 0 ||
995 1.1 skrll vb_setfb.vbt_res.width == 0 ||
996 1.1 skrll vb_setfb.vbt_res.height == 0 ||
997 1.1 skrll vb_setfb.vbt_vres.width == 0 ||
998 1.1 skrll vb_setfb.vbt_vres.height == 0 ||
999 1.1 skrll vb_setfb.vbt_pitch.linebytes == 0) {
1000 1.1 skrll printf("%s: failed to set mode %ux%u\n", __func__,
1001 1.1 skrll width, height);
1002 1.1 skrll return false;
1003 1.1 skrll }
1004 1.1 skrll
1005 1.1 skrll prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width);
1006 1.1 skrll prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height);
1007 1.1 skrll prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp);
1008 1.1 skrll prop_dictionary_set_uint16(dict, "linebytes",
1009 1.1 skrll vb_setfb.vbt_pitch.linebytes);
1010 1.1 skrll prop_dictionary_set_uint32(dict, "address",
1011 1.1 skrll vb_setfb.vbt_allocbuf.address);
1012 1.1 skrll
1013 1.1 skrll /*
1014 1.1 skrll * Old firmware uses BGR. New firmware uses RGB. The get and set
1015 1.1 skrll * pixel order mailbox properties don't seem to work. The firmware
1016 1.1 skrll * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
1017 1.1 skrll * to determine pixel order. 0 means BGR, 1 means RGB.
1018 1.1 skrll *
1019 1.1 skrll * See https://github.com/raspberrypi/linux/issues/514
1020 1.1 skrll */
1021 1.1 skrll if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
1022 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1023 1.1 skrll is_bgr = integer == 0;
1024 1.1 skrll }
1025 1.1 skrll prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
1026 1.1 skrll
1027 1.1 skrll /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
1028 1.1 skrll if (get_bootconf_option(boot_args, "genfb.type",
1029 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1030 1.1 skrll prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
1031 1.1 skrll }
1032 1.1 skrll
1033 1.1 skrll #if defined(RPI_HWCURSOR)
1034 1.1 skrll struct fdt_attach_args *faa = aux;
1035 1.1 skrll bus_space_handle_t hc;
1036 1.1 skrll
1037 1.1 skrll hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
1038 1.1 skrll MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
1039 1.1 skrll pcursor = rpi_lock_mem(hcursor);
1040 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1041 1.1 skrll printf("hcursor: %08x\n", hcursor);
1042 1.1 skrll printf("pcursor: %08x\n", (uint32_t)pcursor);
1043 1.1 skrll printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
1044 1.1 skrll #endif
1045 1.1 skrll if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
1046 1.1 skrll BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
1047 1.1 skrll printf("couldn't map cursor memory\n");
1048 1.1 skrll } else {
1049 1.1 skrll int i, j, k;
1050 1.1 skrll
1051 1.1 skrll cmem = bus_space_vaddr(faa->faa_bst, hc);
1052 1.1 skrll k = 0;
1053 1.1 skrll for (j = 0; j < 64; j++) {
1054 1.1 skrll for (i = 0; i < 64; i++) {
1055 1.1 skrll cmem[i + k] =
1056 1.1 skrll ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
1057 1.1 skrll }
1058 1.1 skrll k += 64;
1059 1.1 skrll }
1060 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1061 1.1 skrll rpi_fb_initcursor(pcursor, 0, 0);
1062 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1063 1.1 skrll rpi_fb_movecursor(600, 400, 1);
1064 1.1 skrll #else
1065 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1066 1.1 skrll #endif
1067 1.1 skrll }
1068 1.1 skrll #endif
1069 1.1 skrll
1070 1.1 skrll return true;
1071 1.1 skrll }
1072 1.1 skrll
1073 1.1 skrll
1074 1.1 skrll #if defined(RPI_HWCURSOR)
1075 1.1 skrll static int
1076 1.1 skrll rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
1077 1.1 skrll {
1078 1.1 skrll int pos = 0;
1079 1.1 skrll int shape = 0;
1080 1.1 skrll
1081 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
1082 1.1 skrll if (cursor_on != cur->enable) {
1083 1.1 skrll cursor_on = cur->enable;
1084 1.1 skrll pos = 1;
1085 1.1 skrll }
1086 1.1 skrll }
1087 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
1088 1.1 skrll
1089 1.1 skrll hot_x = cur->hot.x;
1090 1.1 skrll hot_y = cur->hot.y;
1091 1.1 skrll pos = 1;
1092 1.1 skrll shape = 1;
1093 1.1 skrll }
1094 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
1095 1.1 skrll
1096 1.1 skrll cursor_x = cur->pos.x;
1097 1.1 skrll cursor_y = cur->pos.y;
1098 1.1 skrll pos = 1;
1099 1.1 skrll }
1100 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
1101 1.1 skrll int i;
1102 1.1 skrll uint32_t val;
1103 1.1 skrll
1104 1.17 riastrad for (i = 0; i < uimin(cur->cmap.count, 3); i++) {
1105 1.1 skrll val = (cur->cmap.red[i] << 16 ) |
1106 1.1 skrll (cur->cmap.green[i] << 8) |
1107 1.1 skrll (cur->cmap.blue[i] ) |
1108 1.1 skrll 0xff000000;
1109 1.1 skrll cursor_cmap[i + cur->cmap.index + 2] = val;
1110 1.1 skrll }
1111 1.1 skrll shape = 1;
1112 1.1 skrll }
1113 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
1114 1.1 skrll int err;
1115 1.1 skrll
1116 1.1 skrll err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
1117 1.1 skrll err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
1118 1.1 skrll if (err != 0)
1119 1.1 skrll return EFAULT;
1120 1.1 skrll shape = 1;
1121 1.1 skrll }
1122 1.1 skrll if (shape) {
1123 1.1 skrll int i, j, idx;
1124 1.1 skrll uint8_t mask;
1125 1.1 skrll
1126 1.1 skrll for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
1127 1.1 skrll mask = 0x01;
1128 1.1 skrll for (j = 0; j < 8; j++) {
1129 1.1 skrll idx = ((cursor_mask[i] & mask) ? 2 : 0) |
1130 1.1 skrll ((cursor_bitmap[i] & mask) ? 1 : 0);
1131 1.1 skrll cmem[i * 8 + j] = cursor_cmap[idx];
1132 1.1 skrll mask = mask << 1;
1133 1.1 skrll }
1134 1.1 skrll }
1135 1.1 skrll /* just in case */
1136 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1137 1.1 skrll rpi_fb_initcursor(pcursor, hot_x, hot_y);
1138 1.1 skrll }
1139 1.1 skrll if (pos) {
1140 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1141 1.1 skrll }
1142 1.1 skrll return 0;
1143 1.1 skrll }
1144 1.1 skrll #endif
1145 1.1 skrll
1146 1.1 skrll static int
1147 1.1 skrll rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
1148 1.1 skrll {
1149 1.1 skrll
1150 1.1 skrll switch (cmd) {
1151 1.1 skrll case WSDISPLAYIO_SVIDEO:
1152 1.1 skrll {
1153 1.1 skrll int d = *(int *)data;
1154 1.1 skrll if (d == rpi_video_on)
1155 1.1 skrll return 0;
1156 1.1 skrll rpi_video_on = d;
1157 1.1 skrll rpi_fb_set_video(d);
1158 1.1 skrll #if defined(RPI_HWCURSOR)
1159 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y,
1160 1.1 skrll d ? cursor_on : 0);
1161 1.1 skrll #endif
1162 1.1 skrll }
1163 1.1 skrll return 0;
1164 1.1 skrll case WSDISPLAYIO_GVIDEO:
1165 1.1 skrll *(int *)data = rpi_video_on;
1166 1.1 skrll return 0;
1167 1.1 skrll #if defined(RPI_HWCURSOR)
1168 1.1 skrll case WSDISPLAYIO_GCURPOS:
1169 1.1 skrll {
1170 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1171 1.1 skrll
1172 1.1 skrll cp->x = cursor_x;
1173 1.1 skrll cp->y = cursor_y;
1174 1.1 skrll }
1175 1.1 skrll return 0;
1176 1.1 skrll case WSDISPLAYIO_SCURPOS:
1177 1.1 skrll {
1178 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1179 1.1 skrll
1180 1.1 skrll cursor_x = cp->x;
1181 1.1 skrll cursor_y = cp->y;
1182 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1183 1.1 skrll }
1184 1.1 skrll return 0;
1185 1.1 skrll case WSDISPLAYIO_GCURMAX:
1186 1.1 skrll {
1187 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1188 1.1 skrll
1189 1.1 skrll cp->x = 64;
1190 1.1 skrll cp->y = 64;
1191 1.1 skrll }
1192 1.1 skrll return 0;
1193 1.1 skrll case WSDISPLAYIO_SCURSOR:
1194 1.1 skrll {
1195 1.1 skrll struct wsdisplay_cursor *cursor = (void *)data;
1196 1.1 skrll
1197 1.1 skrll return rpi_fb_do_cursor(cursor);
1198 1.1 skrll }
1199 1.1 skrll #endif
1200 1.1 skrll default:
1201 1.1 skrll return EPASSTHROUGH;
1202 1.1 skrll }
1203 1.1 skrll }
1204 1.1 skrll
1205 1.1 skrll #endif
1206 1.1 skrll
1207 1.1 skrll SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
1208 1.1 skrll {
1209 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1210 1.1 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
1211 1.1 skrll NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
1212 1.1 skrll
1213 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1214 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1215 1.1 skrll CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
1216 1.1 skrll &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1217 1.1 skrll
1218 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1219 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1220 1.1 skrll CTLTYPE_INT, "board_model", NULL, NULL, 0,
1221 1.1 skrll &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1222 1.1 skrll
1223 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1224 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1225 1.1 skrll CTLTYPE_INT, "board_revision", NULL, NULL, 0,
1226 1.1 skrll &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1227 1.1 skrll
1228 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1229 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
1230 1.1 skrll CTLTYPE_QUAD, "serial", NULL, NULL, 0,
1231 1.1 skrll &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1232 1.1 skrll }
1233 1.1 skrll
1234 1.1 skrll #if defined(SOC_BCM2835)
1235 1.1 skrll static void
1236 1.1 skrll bcm2835_platform_bootstrap(void)
1237 1.1 skrll {
1238 1.1 skrll
1239 1.4 ryo bcm2835_bs_tag = arm_generic_bs_tag;
1240 1.4 ryo bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
1241 1.4 ryo
1242 1.4 ryo bcm2835_bs_tag.bs_map = bcm2835_bs_map;
1243 1.12 rin bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap;
1244 1.4 ryo bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
1245 1.12 rin bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap;
1246 1.4 ryo
1247 1.1 skrll fdtbus_set_decoderegprop(false);
1248 1.1 skrll
1249 1.1 skrll bcm2835_uartinit();
1250 1.1 skrll
1251 1.1 skrll bcm2835_bootparams();
1252 1.1 skrll }
1253 1.1 skrll #endif
1254 1.1 skrll
1255 1.1 skrll #if defined(SOC_BCM2836)
1256 1.1 skrll static void
1257 1.1 skrll bcm2836_platform_bootstrap(void)
1258 1.1 skrll {
1259 1.1 skrll
1260 1.4 ryo bcm2836_bs_tag = arm_generic_bs_tag;
1261 1.4 ryo bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
1262 1.4 ryo
1263 1.4 ryo bcm2836_bs_tag.bs_map = bcm2836_bs_map;
1264 1.12 rin bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap;
1265 1.4 ryo bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
1266 1.12 rin bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap;
1267 1.4 ryo
1268 1.1 skrll fdtbus_set_decoderegprop(false);
1269 1.1 skrll
1270 1.1 skrll bcm2836_uartinit();
1271 1.1 skrll
1272 1.1 skrll bcm2836_bootparams();
1273 1.1 skrll
1274 1.20 skrll #ifdef MULTIPROCESSOR
1275 1.20 skrll arm_cpu_max = RPI_CPU_MAX;
1276 1.21 ryo arm_fdt_cpu_bootstrap();
1277 1.20 skrll #endif
1278 1.1 skrll }
1279 1.25 skrll
1280 1.25 skrll static void
1281 1.28 skrll bcm2711_platform_bootstrap(void)
1282 1.25 skrll {
1283 1.25 skrll
1284 1.28 skrll bcm2711_bs_tag = arm_generic_bs_tag;
1285 1.28 skrll bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag;
1286 1.25 skrll
1287 1.28 skrll bcm2711_bs_tag.bs_map = bcm2711_bs_map;
1288 1.28 skrll bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap;
1289 1.28 skrll bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map;
1290 1.28 skrll bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap;
1291 1.25 skrll
1292 1.25 skrll fdtbus_set_decoderegprop(false);
1293 1.25 skrll
1294 1.28 skrll bcm2711_uartinit();
1295 1.25 skrll
1296 1.28 skrll bcm2711_bootparams();
1297 1.25 skrll
1298 1.25 skrll #ifdef MULTIPROCESSOR
1299 1.25 skrll arm_cpu_max = RPI_CPU_MAX;
1300 1.25 skrll arm_fdt_cpu_bootstrap();
1301 1.25 skrll #endif
1302 1.25 skrll }
1303 1.1 skrll #endif
1304 1.1 skrll
1305 1.1 skrll #if defined(SOC_BCM2835)
1306 1.1 skrll static void
1307 1.1 skrll bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
1308 1.1 skrll {
1309 1.1 skrll
1310 1.1 skrll faa->faa_bst = &bcm2835_bs_tag;
1311 1.1 skrll }
1312 1.1 skrll #endif
1313 1.1 skrll
1314 1.1 skrll #if defined(SOC_BCM2836)
1315 1.1 skrll static void
1316 1.1 skrll bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
1317 1.1 skrll {
1318 1.1 skrll
1319 1.1 skrll faa->faa_bst = &bcm2836_bs_tag;
1320 1.1 skrll }
1321 1.25 skrll
1322 1.25 skrll static void
1323 1.28 skrll bcm2711_platform_init_attach_args(struct fdt_attach_args *faa)
1324 1.25 skrll {
1325 1.25 skrll
1326 1.28 skrll faa->faa_bst = &bcm2711_bs_tag;
1327 1.25 skrll }
1328 1.1 skrll #endif
1329 1.1 skrll
1330 1.1 skrll
1331 1.40 skrll static void __noasan
1332 1.1 skrll bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1333 1.1 skrll {
1334 1.1 skrll volatile uint32_t *uartaddr =
1335 1.4 ryo cpu_earlydevice_va_p() ?
1336 1.1 skrll (volatile uint32_t *)va :
1337 1.1 skrll (volatile uint32_t *)pa;
1338 1.1 skrll
1339 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0)
1340 1.1 skrll continue;
1341 1.1 skrll
1342 1.1 skrll uartaddr[PL01XCOM_DR / 4] = c;
1343 1.1 skrll
1344 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0)
1345 1.1 skrll continue;
1346 1.1 skrll }
1347 1.1 skrll
1348 1.42 rin static void __noasan
1349 1.42 rin bcm283x_aux_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1350 1.42 rin {
1351 1.42 rin volatile uint32_t *uartaddr =
1352 1.42 rin cpu_earlydevice_va_p() ?
1353 1.42 rin (volatile uint32_t *)va :
1354 1.42 rin (volatile uint32_t *)pa;
1355 1.42 rin
1356 1.42 rin while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
1357 1.42 rin continue;
1358 1.42 rin
1359 1.42 rin uartaddr[com_data] = c;
1360 1.42 rin }
1361 1.42 rin
1362 1.40 skrll void __noasan
1363 1.1 skrll bcm2835_platform_early_putchar(char c)
1364 1.1 skrll {
1365 1.1 skrll paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1366 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1367 1.1 skrll
1368 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1369 1.1 skrll }
1370 1.1 skrll
1371 1.40 skrll void __noasan
1372 1.43 rin bcm2835_aux_platform_early_putchar(char c)
1373 1.43 rin {
1374 1.43 rin paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1375 1.43 rin vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1376 1.43 rin
1377 1.43 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1378 1.43 rin }
1379 1.43 rin
1380 1.43 rin void __noasan
1381 1.1 skrll bcm2836_platform_early_putchar(char c)
1382 1.1 skrll {
1383 1.1 skrll paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1384 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1385 1.1 skrll
1386 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1387 1.1 skrll }
1388 1.1 skrll
1389 1.40 skrll void __noasan
1390 1.1 skrll bcm2837_platform_early_putchar(char c)
1391 1.1 skrll {
1392 1.42 rin paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1393 1.42 rin vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1394 1.1 skrll
1395 1.42 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1396 1.1 skrll }
1397 1.1 skrll
1398 1.40 skrll void __noasan
1399 1.28 skrll bcm2711_platform_early_putchar(char c)
1400 1.25 skrll {
1401 1.42 rin paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1402 1.42 rin vaddr_t va = BCM2711_IOPHYSTOVIRT(pa);
1403 1.25 skrll
1404 1.42 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1405 1.25 skrll }
1406 1.25 skrll
1407 1.25 skrll #define BCM283x_REF_FREQ 19200000
1408 1.25 skrll
1409 1.1 skrll static void
1410 1.1 skrll bcm283x_platform_device_register(device_t dev, void *aux)
1411 1.1 skrll {
1412 1.1 skrll prop_dictionary_t dict = device_properties(dev);
1413 1.1 skrll
1414 1.1 skrll if (device_is_a(dev, "bcmdmac") &&
1415 1.1 skrll vcprop_tag_success_p(&vb.vbt_dmachan.tag)) {
1416 1.1 skrll prop_dictionary_set_uint32(dict,
1417 1.1 skrll "chanmask", vb.vbt_dmachan.mask);
1418 1.1 skrll }
1419 1.1 skrll #if NSDHC > 0
1420 1.1 skrll if (booted_device == NULL &&
1421 1.1 skrll device_is_a(dev, "ld") &&
1422 1.1 skrll device_is_a(device_parent(dev), "sdmmc")) {
1423 1.1 skrll booted_partition = 0;
1424 1.1 skrll booted_device = dev;
1425 1.1 skrll }
1426 1.1 skrll #endif
1427 1.37 jmcneill if ((device_is_a(dev, "usmsc") ||
1428 1.37 jmcneill device_is_a(dev, "mue") ||
1429 1.37 jmcneill device_is_a(dev, "genet")) &&
1430 1.1 skrll vcprop_tag_success_p(&vb.vbt_macaddr.tag)) {
1431 1.1 skrll const uint8_t enaddr[ETHER_ADDR_LEN] = {
1432 1.1 skrll (vb.vbt_macaddr.addr >> 0) & 0xff,
1433 1.1 skrll (vb.vbt_macaddr.addr >> 8) & 0xff,
1434 1.1 skrll (vb.vbt_macaddr.addr >> 16) & 0xff,
1435 1.1 skrll (vb.vbt_macaddr.addr >> 24) & 0xff,
1436 1.1 skrll (vb.vbt_macaddr.addr >> 32) & 0xff,
1437 1.1 skrll (vb.vbt_macaddr.addr >> 40) & 0xff
1438 1.1 skrll };
1439 1.1 skrll
1440 1.38 skrll prop_dictionary_set_data(dict, "mac-address", enaddr,
1441 1.38 skrll ETHER_ADDR_LEN);
1442 1.1 skrll }
1443 1.1 skrll
1444 1.1 skrll #if NGENFB > 0
1445 1.1 skrll if (device_is_a(dev, "genfb")) {
1446 1.1 skrll char *ptr;
1447 1.1 skrll
1448 1.1 skrll bcmgenfb_set_console_dev(dev);
1449 1.1 skrll bcmgenfb_set_ioctl(&rpi_ioctl);
1450 1.1 skrll #ifdef DDB
1451 1.1 skrll db_trap_callback = bcmgenfb_ddb_trap_callback;
1452 1.1 skrll #endif
1453 1.1 skrll if (rpi_fb_init(dict, aux) == false)
1454 1.1 skrll return;
1455 1.1 skrll if (get_bootconf_option(boot_args, "console",
1456 1.1 skrll BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
1457 1.1 skrll prop_dictionary_set_bool(dict, "is_console", true);
1458 1.1 skrll #if NUKBD > 0
1459 1.1 skrll /* allow ukbd to be the console keyboard */
1460 1.1 skrll ukbd_cnattach();
1461 1.1 skrll #endif
1462 1.1 skrll } else {
1463 1.1 skrll prop_dictionary_set_bool(dict, "is_console", false);
1464 1.1 skrll }
1465 1.1 skrll }
1466 1.1 skrll #endif
1467 1.1 skrll }
1468 1.1 skrll
1469 1.1 skrll static u_int
1470 1.1 skrll bcm283x_platform_uart_freq(void)
1471 1.1 skrll {
1472 1.1 skrll
1473 1.34 skrll /*
1474 1.34 skrll * We are safe to access stdout phandle - consinit did before
1475 1.34 skrll * calling ap_uart_freq
1476 1.34 skrll */
1477 1.34 skrll const int phandle = fdtbus_get_stdout_phandle();
1478 1.34 skrll
1479 1.34 skrll static const char * const aux_compatible[] = {
1480 1.34 skrll "brcm,bcm2835-aux-uart",
1481 1.34 skrll NULL
1482 1.34 skrll };
1483 1.34 skrll
1484 1.34 skrll if (of_match_compatible(phandle, aux_compatible))
1485 1.34 skrll return core_clk * 2;
1486 1.34 skrll
1487 1.1 skrll return uart_clk;
1488 1.1 skrll }
1489 1.1 skrll
1490 1.1 skrll #if defined(SOC_BCM2835)
1491 1.1 skrll static const struct arm_platform bcm2835_platform = {
1492 1.11 skrll .ap_devmap = bcm2835_platform_devmap,
1493 1.11 skrll .ap_bootstrap = bcm2835_platform_bootstrap,
1494 1.11 skrll .ap_init_attach_args = bcm2835_platform_init_attach_args,
1495 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1496 1.11 skrll .ap_reset = bcm2835_system_reset,
1497 1.11 skrll .ap_delay = bcm2835_tmr_delay,
1498 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1499 1.1 skrll };
1500 1.1 skrll
1501 1.1 skrll ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform);
1502 1.1 skrll #endif
1503 1.1 skrll
1504 1.1 skrll #if defined(SOC_BCM2836)
1505 1.1 skrll
1506 1.1 skrll static const struct arm_platform bcm2836_platform = {
1507 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1508 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1509 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1510 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1511 1.11 skrll .ap_reset = bcm2835_system_reset,
1512 1.11 skrll .ap_delay = gtmr_delay,
1513 1.11 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1514 1.23 jmcneill .ap_mpstart = arm_fdt_cpu_mpstart,
1515 1.1 skrll };
1516 1.1 skrll
1517 1.1 skrll static const struct arm_platform bcm2837_platform = {
1518 1.11 skrll .ap_devmap = bcm2836_platform_devmap,
1519 1.11 skrll .ap_bootstrap = bcm2836_platform_bootstrap,
1520 1.11 skrll .ap_init_attach_args = bcm2836_platform_init_attach_args,
1521 1.11 skrll .ap_device_register = bcm283x_platform_device_register,
1522 1.11 skrll .ap_reset = bcm2835_system_reset,
1523 1.11 skrll .ap_delay = gtmr_delay,
1524 1.34 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1525 1.23 jmcneill .ap_mpstart = arm_fdt_cpu_mpstart,
1526 1.1 skrll };
1527 1.1 skrll
1528 1.28 skrll static const struct arm_platform bcm2711_platform = {
1529 1.28 skrll .ap_devmap = bcm2711_platform_devmap,
1530 1.28 skrll .ap_bootstrap = bcm2711_platform_bootstrap,
1531 1.28 skrll .ap_init_attach_args = bcm2711_platform_init_attach_args,
1532 1.25 skrll .ap_device_register = bcm283x_platform_device_register,
1533 1.25 skrll .ap_reset = bcm2835_system_reset,
1534 1.25 skrll .ap_delay = gtmr_delay,
1535 1.34 skrll .ap_uart_freq = bcm283x_platform_uart_freq,
1536 1.25 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
1537 1.25 skrll };
1538 1.25 skrll
1539 1.1 skrll ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform);
1540 1.1 skrll ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform);
1541 1.28 skrll ARM_PLATFORM(bcm2711, "brcm,bcm2711", &bcm2711_platform);
1542 1.1 skrll #endif
1543