bcm283x_platform.c revision 1.51 1 1.51 thorpej /* $NetBSD: bcm283x_platform.c,v 1.51 2025/09/06 22:53:47 thorpej Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.51 thorpej __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.51 2025/09/06 22:53:47 thorpej Exp $");
31 1.1 skrll
32 1.1 skrll #include "opt_arm_debug.h"
33 1.1 skrll #include "opt_bcm283x.h"
34 1.1 skrll #include "opt_cpuoptions.h"
35 1.1 skrll #include "opt_ddb.h"
36 1.1 skrll #include "opt_evbarm_boardtype.h"
37 1.1 skrll #include "opt_kgdb.h"
38 1.1 skrll #include "opt_fdt.h"
39 1.1 skrll #include "opt_rpi.h"
40 1.1 skrll #include "opt_vcprop.h"
41 1.1 skrll
42 1.1 skrll #include "sdhc.h"
43 1.1 skrll #include "bcmsdhost.h"
44 1.1 skrll #include "bcmdwctwo.h"
45 1.1 skrll #include "bcmspi.h"
46 1.1 skrll #include "bsciic.h"
47 1.1 skrll #include "plcom.h"
48 1.1 skrll #include "com.h"
49 1.1 skrll #include "genfb.h"
50 1.1 skrll #include "ukbd.h"
51 1.1 skrll
52 1.1 skrll #include <sys/param.h>
53 1.1 skrll #include <sys/bus.h>
54 1.1 skrll #include <sys/cpu.h>
55 1.1 skrll #include <sys/device.h>
56 1.44 rin #include <sys/endian.h>
57 1.39 skrll #include <sys/kmem.h>
58 1.1 skrll #include <sys/termios.h>
59 1.1 skrll
60 1.1 skrll #include <net/if_ether.h>
61 1.1 skrll
62 1.1 skrll #include <prop/proplib.h>
63 1.1 skrll
64 1.1 skrll #include <dev/fdt/fdtvar.h>
65 1.51 thorpej #include <dev/fdt/fdt_console.h>
66 1.50 thorpej #include <dev/fdt/fdt_platform.h>
67 1.1 skrll
68 1.1 skrll #include <uvm/uvm_extern.h>
69 1.1 skrll
70 1.1 skrll #include <machine/bootconfig.h>
71 1.9 skrll
72 1.4 ryo #include <arm/armreg.h>
73 1.1 skrll #include <arm/cpufunc.h>
74 1.1 skrll
75 1.1 skrll #include <libfdt.h>
76 1.1 skrll
77 1.1 skrll #include <arm/broadcom/bcm2835reg.h>
78 1.1 skrll #include <arm/broadcom/bcm2835var.h>
79 1.4 ryo #include <arm/broadcom/bcm283x_platform.h>
80 1.1 skrll #include <arm/broadcom/bcm2835_intr.h>
81 1.1 skrll #include <arm/broadcom/bcm2835_mbox.h>
82 1.1 skrll #include <arm/broadcom/bcm2835_pmwdogvar.h>
83 1.1 skrll
84 1.1 skrll #include <evbarm/dev/plcomreg.h>
85 1.1 skrll #include <evbarm/dev/plcomvar.h>
86 1.9 skrll #include <evbarm/fdt/machdep.h>
87 1.1 skrll
88 1.1 skrll #include <dev/ic/ns16550reg.h>
89 1.1 skrll #include <dev/ic/comreg.h>
90 1.1 skrll
91 1.1 skrll #include <evbarm/rpi/vcio.h>
92 1.1 skrll #include <evbarm/rpi/vcpm.h>
93 1.1 skrll #include <evbarm/rpi/vcprop.h>
94 1.1 skrll
95 1.1 skrll #include <arm/fdt/arm_fdtvar.h>
96 1.1 skrll
97 1.1 skrll #include <arm/cortex/gtmr_var.h>
98 1.1 skrll
99 1.1 skrll #if NGENFB > 0
100 1.1 skrll #include <dev/videomode/videomode.h>
101 1.1 skrll #include <dev/videomode/edidvar.h>
102 1.1 skrll #include <dev/wscons/wsconsio.h>
103 1.1 skrll #endif
104 1.1 skrll
105 1.1 skrll #if NUKBD > 0
106 1.1 skrll #include <dev/usb/ukbdvar.h>
107 1.1 skrll #endif
108 1.1 skrll
109 1.1 skrll #ifdef DDB
110 1.1 skrll #include <machine/db_machdep.h>
111 1.1 skrll #include <ddb/db_sym.h>
112 1.1 skrll #include <ddb/db_extern.h>
113 1.1 skrll #endif
114 1.1 skrll
115 1.20 skrll #define RPI_CPU_MAX 4
116 1.20 skrll
117 1.1 skrll void bcm2835_platform_early_putchar(char c);
118 1.43 rin void bcm2835_aux_platform_early_putchar(char c);
119 1.1 skrll void bcm2836_platform_early_putchar(char c);
120 1.1 skrll void bcm2837_platform_early_putchar(char c);
121 1.28 skrll void bcm2711_platform_early_putchar(char c);
122 1.1 skrll
123 1.1 skrll extern void bcmgenfb_set_console_dev(device_t dev);
124 1.1 skrll void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
125 1.1 skrll extern void bcmgenfb_ddb_trap_callback(int where);
126 1.1 skrll static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
127 1.1 skrll
128 1.4 ryo extern struct bus_space arm_generic_bs_tag;
129 1.4 ryo extern struct bus_space arm_generic_a4x_bs_tag;
130 1.1 skrll
131 1.1 skrll /* Prototypes for all the bus_space structure functions */
132 1.4 ryo bs_protos(arm_generic);
133 1.4 ryo bs_protos(arm_generic_a4x);
134 1.1 skrll bs_protos(bcm2835);
135 1.1 skrll bs_protos(bcm2835_a4x);
136 1.4 ryo bs_protos(bcm2836);
137 1.4 ryo bs_protos(bcm2836_a4x);
138 1.28 skrll bs_protos(bcm2711);
139 1.28 skrll bs_protos(bcm2711_a4x);
140 1.4 ryo
141 1.4 ryo struct bus_space bcm2835_bs_tag;
142 1.4 ryo struct bus_space bcm2835_a4x_bs_tag;
143 1.4 ryo struct bus_space bcm2836_bs_tag;
144 1.4 ryo struct bus_space bcm2836_a4x_bs_tag;
145 1.28 skrll struct bus_space bcm2711_bs_tag;
146 1.28 skrll struct bus_space bcm2711_a4x_bs_tag;
147 1.4 ryo
148 1.12 rin static paddr_t bcm2835_bus_to_phys(bus_addr_t);
149 1.12 rin static paddr_t bcm2836_bus_to_phys(bus_addr_t);
150 1.28 skrll static paddr_t bcm2711_bus_to_phys(bus_addr_t);
151 1.4 ryo
152 1.20 skrll #ifdef VERBOSE_INIT_ARM
153 1.20 skrll #define VPRINTF(...) printf(__VA_ARGS__)
154 1.20 skrll #else
155 1.20 skrll #define VPRINTF(...) __nothing
156 1.20 skrll #endif
157 1.20 skrll
158 1.12 rin static paddr_t
159 1.12 rin bcm2835_bus_to_phys(bus_addr_t ba)
160 1.4 ryo {
161 1.4 ryo
162 1.12 rin /* Attempt to find the PA device mapping */
163 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
164 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
165 1.12 rin return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
166 1.4 ryo
167 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
168 1.12 rin }
169 1.4 ryo
170 1.12 rin static paddr_t
171 1.12 rin bcm2836_bus_to_phys(bus_addr_t ba)
172 1.12 rin {
173 1.12 rin
174 1.12 rin /* Attempt to find the PA device mapping */
175 1.24 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
176 1.24 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
177 1.12 rin return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
178 1.12 rin
179 1.12 rin if (ba >= BCM2836_ARM_LOCAL_BASE &&
180 1.12 rin ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE)
181 1.12 rin return ba;
182 1.4 ryo
183 1.12 rin return ba & ~BCM2835_BUSADDR_CACHE_MASK;
184 1.4 ryo }
185 1.4 ryo
186 1.25 skrll static paddr_t
187 1.28 skrll bcm2711_bus_to_phys(bus_addr_t ba)
188 1.25 skrll {
189 1.25 skrll
190 1.25 skrll /* Attempt to find the PA device mapping */
191 1.25 skrll if (ba >= BCM283X_PERIPHERALS_BASE_BUS &&
192 1.25 skrll ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE)
193 1.28 skrll return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba);
194 1.25 skrll
195 1.36 jmcneill if (ba >= BCM2711_SCB_BASE_BUS &&
196 1.36 jmcneill ba < BCM2711_SCB_BASE_BUS + BCM2711_SCB_SIZE)
197 1.36 jmcneill return BCM2711_SCB_BUS_TO_PHYS(ba);
198 1.36 jmcneill
199 1.31 skrll if (ba >= BCM2711_ARM_LOCAL_BASE_BUS &&
200 1.31 skrll ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE)
201 1.31 skrll return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba);
202 1.25 skrll
203 1.25 skrll return ba & ~BCM2835_BUSADDR_CACHE_MASK;
204 1.25 skrll }
205 1.25 skrll
206 1.12 rin int
207 1.12 rin bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
208 1.12 rin bus_space_handle_t *bshp)
209 1.5 jmcneill {
210 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
211 1.5 jmcneill
212 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
213 1.5 jmcneill }
214 1.5 jmcneill
215 1.5 jmcneill paddr_t
216 1.12 rin bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
217 1.5 jmcneill {
218 1.12 rin const paddr_t pa = bcm2835_bus_to_phys(ba);
219 1.5 jmcneill
220 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
221 1.5 jmcneill }
222 1.5 jmcneill
223 1.12 rin paddr_t
224 1.12 rin bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
225 1.4 ryo {
226 1.4 ryo
227 1.12 rin return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags);
228 1.4 ryo }
229 1.4 ryo
230 1.4 ryo int
231 1.4 ryo bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
232 1.4 ryo bus_space_handle_t *bshp)
233 1.4 ryo {
234 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
235 1.4 ryo
236 1.12 rin return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
237 1.12 rin }
238 1.12 rin
239 1.12 rin paddr_t
240 1.12 rin bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
241 1.12 rin {
242 1.12 rin const paddr_t pa = bcm2836_bus_to_phys(ba);
243 1.4 ryo
244 1.12 rin return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
245 1.12 rin }
246 1.4 ryo
247 1.12 rin paddr_t
248 1.12 rin bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
249 1.12 rin {
250 1.4 ryo
251 1.12 rin return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags);
252 1.4 ryo }
253 1.1 skrll
254 1.25 skrll int
255 1.28 skrll bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
256 1.25 skrll bus_space_handle_t *bshp)
257 1.25 skrll {
258 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
259 1.25 skrll
260 1.25 skrll return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp);
261 1.25 skrll }
262 1.25 skrll
263 1.25 skrll paddr_t
264 1.28 skrll bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
265 1.25 skrll {
266 1.28 skrll const paddr_t pa = bcm2711_bus_to_phys(ba);
267 1.25 skrll
268 1.25 skrll return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags);
269 1.25 skrll }
270 1.25 skrll
271 1.25 skrll paddr_t
272 1.28 skrll bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags)
273 1.25 skrll {
274 1.25 skrll
275 1.28 skrll return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags);
276 1.25 skrll }
277 1.25 skrll
278 1.1 skrll #if defined(SOC_BCM2835)
279 1.1 skrll static const struct pmap_devmap *
280 1.1 skrll bcm2835_platform_devmap(void)
281 1.1 skrll {
282 1.1 skrll static const struct pmap_devmap devmap[] = {
283 1.1 skrll DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
284 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
285 1.1 skrll
286 1.1 skrll DEVMAP_ENTRY_END
287 1.1 skrll };
288 1.1 skrll
289 1.1 skrll return devmap;
290 1.1 skrll }
291 1.1 skrll #endif
292 1.1 skrll
293 1.1 skrll #if defined(SOC_BCM2836)
294 1.1 skrll static const struct pmap_devmap *
295 1.1 skrll bcm2836_platform_devmap(void)
296 1.1 skrll {
297 1.1 skrll static const struct pmap_devmap devmap[] = {
298 1.1 skrll DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
299 1.24 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
300 1.1 skrll DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
301 1.1 skrll BCM2836_ARM_LOCAL_SIZE),
302 1.18 ryo #if defined(MULTIPROCESSOR) && defined(__aarch64__)
303 1.18 ryo /* for fdt cpu spin-table */
304 1.18 ryo DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
305 1.18 ryo BCM2836_ARM_SMP_SIZE),
306 1.18 ryo #endif
307 1.1 skrll DEVMAP_ENTRY_END
308 1.1 skrll };
309 1.1 skrll
310 1.1 skrll return devmap;
311 1.1 skrll }
312 1.25 skrll
313 1.25 skrll static const struct pmap_devmap *
314 1.28 skrll bcm2711_platform_devmap(void)
315 1.25 skrll {
316 1.25 skrll static const struct pmap_devmap devmap[] = {
317 1.28 skrll DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE,
318 1.25 skrll BCM283X_PERIPHERALS_SIZE), /* 16Mb */
319 1.28 skrll DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE,
320 1.28 skrll BCM2711_ARM_LOCAL_SIZE),
321 1.25 skrll #if defined(MULTIPROCESSOR) && defined(__aarch64__)
322 1.25 skrll /* for fdt cpu spin-table */
323 1.31 skrll DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE,
324 1.25 skrll BCM2836_ARM_SMP_SIZE),
325 1.25 skrll #endif
326 1.25 skrll DEVMAP_ENTRY_END
327 1.25 skrll };
328 1.25 skrll
329 1.25 skrll return devmap;
330 1.25 skrll }
331 1.26 skrll #endif
332 1.26 skrll
333 1.1 skrll /*
334 1.1 skrll * Macros to translate between physical and virtual for a subset of the
335 1.1 skrll * kernel address space. *Not* for general use.
336 1.1 skrll */
337 1.1 skrll
338 1.1 skrll #ifndef RPI_FB_WIDTH
339 1.1 skrll #define RPI_FB_WIDTH 1280
340 1.1 skrll #endif
341 1.1 skrll #ifndef RPI_FB_HEIGHT
342 1.1 skrll #define RPI_FB_HEIGHT 720
343 1.1 skrll #endif
344 1.1 skrll
345 1.1 skrll int uart_clk = BCM2835_UART0_CLK;
346 1.1 skrll int core_clk;
347 1.1 skrll
348 1.1 skrll static struct {
349 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
350 1.1 skrll struct vcprop_tag_clockrate vbt_uartclockrate;
351 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
352 1.1 skrll struct vcprop_tag end;
353 1.1 skrll } vb_uart __cacheline_aligned = {
354 1.1 skrll .vb_hdr = {
355 1.44 rin .vpb_len = htole32(sizeof(vb_uart)),
356 1.44 rin .vpb_rcode = htole32(VCPROP_PROCESS_REQUEST),
357 1.1 skrll },
358 1.1 skrll .vbt_uartclockrate = {
359 1.1 skrll .tag = {
360 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
361 1.44 rin .vpt_len =
362 1.44 rin htole32(VCPROPTAG_LEN(vb_uart.vbt_uartclockrate)),
363 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
364 1.1 skrll },
365 1.44 rin .id = htole32(VCPROP_CLK_UART)
366 1.1 skrll },
367 1.1 skrll .vbt_vpuclockrate = {
368 1.1 skrll .tag = {
369 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
370 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate)),
371 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
372 1.1 skrll },
373 1.44 rin .id = htole32(VCPROP_CLK_CORE)
374 1.1 skrll },
375 1.1 skrll .end = {
376 1.44 rin .vpt_tag = htole32(VCPROPTAG_NULL)
377 1.1 skrll }
378 1.1 skrll };
379 1.1 skrll
380 1.1 skrll static struct {
381 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
382 1.1 skrll struct vcprop_tag_fwrev vbt_fwrev;
383 1.1 skrll struct vcprop_tag_boardmodel vbt_boardmodel;
384 1.1 skrll struct vcprop_tag_boardrev vbt_boardrev;
385 1.1 skrll struct vcprop_tag_macaddr vbt_macaddr;
386 1.1 skrll struct vcprop_tag_memory vbt_memory;
387 1.1 skrll struct vcprop_tag_boardserial vbt_serial;
388 1.1 skrll struct vcprop_tag_dmachan vbt_dmachan;
389 1.1 skrll struct vcprop_tag_cmdline vbt_cmdline;
390 1.1 skrll struct vcprop_tag_clockrate vbt_emmcclockrate;
391 1.1 skrll struct vcprop_tag_clockrate vbt_armclockrate;
392 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
393 1.29 skrll struct vcprop_tag_clockrate vbt_emmc2clockrate;
394 1.1 skrll struct vcprop_tag end;
395 1.1 skrll } vb __cacheline_aligned = {
396 1.1 skrll .vb_hdr = {
397 1.44 rin .vpb_len = htole32(sizeof(vb)),
398 1.44 rin .vpb_rcode = htole32(VCPROP_PROCESS_REQUEST),
399 1.1 skrll },
400 1.1 skrll .vbt_fwrev = {
401 1.1 skrll .tag = {
402 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_FIRMWAREREV),
403 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_fwrev)),
404 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
405 1.1 skrll },
406 1.1 skrll },
407 1.1 skrll .vbt_boardmodel = {
408 1.1 skrll .tag = {
409 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_BOARDMODEL),
410 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_boardmodel)),
411 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
412 1.1 skrll },
413 1.1 skrll },
414 1.1 skrll .vbt_boardrev = {
415 1.1 skrll .tag = {
416 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_BOARDREVISION),
417 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_boardrev)),
418 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
419 1.1 skrll },
420 1.1 skrll },
421 1.1 skrll .vbt_macaddr = {
422 1.1 skrll .tag = {
423 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_MACADDRESS),
424 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_macaddr)),
425 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
426 1.1 skrll },
427 1.1 skrll },
428 1.1 skrll .vbt_memory = {
429 1.1 skrll .tag = {
430 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_ARMMEMORY),
431 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_memory)),
432 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
433 1.1 skrll },
434 1.1 skrll },
435 1.1 skrll .vbt_serial = {
436 1.1 skrll .tag = {
437 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_BOARDSERIAL),
438 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_serial)),
439 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
440 1.1 skrll },
441 1.1 skrll },
442 1.1 skrll .vbt_dmachan = {
443 1.1 skrll .tag = {
444 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_DMACHAN),
445 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_dmachan)),
446 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
447 1.1 skrll },
448 1.1 skrll },
449 1.1 skrll .vbt_cmdline = {
450 1.1 skrll .tag = {
451 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CMDLINE),
452 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_cmdline)),
453 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
454 1.1 skrll },
455 1.1 skrll },
456 1.1 skrll .vbt_emmcclockrate = {
457 1.1 skrll .tag = {
458 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
459 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_emmcclockrate)),
460 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
461 1.1 skrll },
462 1.44 rin .id = htole32(VCPROP_CLK_EMMC)
463 1.1 skrll },
464 1.1 skrll .vbt_armclockrate = {
465 1.1 skrll .tag = {
466 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
467 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_armclockrate)),
468 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
469 1.1 skrll },
470 1.44 rin .id = htole32(VCPROP_CLK_ARM)
471 1.1 skrll },
472 1.1 skrll .vbt_vpuclockrate = {
473 1.1 skrll .tag = {
474 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
475 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb.vbt_vpuclockrate)),
476 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
477 1.1 skrll },
478 1.44 rin .id = htole32(VCPROP_CLK_CORE)
479 1.1 skrll },
480 1.29 skrll .vbt_emmc2clockrate = {
481 1.29 skrll .tag = {
482 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_CLOCKRATE),
483 1.44 rin .vpt_len =
484 1.44 rin htole32(VCPROPTAG_LEN(vb.vbt_emmc2clockrate)),
485 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST)
486 1.29 skrll },
487 1.44 rin .id = htole32(VCPROP_CLK_EMMC2)
488 1.29 skrll },
489 1.1 skrll .end = {
490 1.44 rin .vpt_tag = htole32(VCPROPTAG_NULL)
491 1.1 skrll }
492 1.1 skrll };
493 1.1 skrll
494 1.1 skrll #if NGENFB > 0
495 1.1 skrll static struct {
496 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
497 1.1 skrll struct vcprop_tag_edidblock vbt_edid;
498 1.1 skrll struct vcprop_tag end;
499 1.1 skrll } vb_edid __cacheline_aligned = {
500 1.1 skrll .vb_hdr = {
501 1.44 rin .vpb_len = htole32(sizeof(vb_edid)),
502 1.44 rin .vpb_rcode = htole32(VCPROP_PROCESS_REQUEST),
503 1.1 skrll },
504 1.1 skrll .vbt_edid = {
505 1.1 skrll .tag = {
506 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_EDID_BLOCK),
507 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_edid.vbt_edid)),
508 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
509 1.1 skrll },
510 1.44 rin .blockno = htole32(0),
511 1.1 skrll },
512 1.1 skrll .end = {
513 1.44 rin .vpt_tag = htole32(VCPROPTAG_NULL)
514 1.1 skrll }
515 1.1 skrll };
516 1.1 skrll
517 1.1 skrll static struct {
518 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
519 1.1 skrll struct vcprop_tag_fbres vbt_res;
520 1.1 skrll struct vcprop_tag_fbres vbt_vres;
521 1.1 skrll struct vcprop_tag_fbdepth vbt_depth;
522 1.1 skrll struct vcprop_tag_fbalpha vbt_alpha;
523 1.1 skrll struct vcprop_tag_allocbuf vbt_allocbuf;
524 1.1 skrll struct vcprop_tag_blankscreen vbt_blank;
525 1.1 skrll struct vcprop_tag_fbpitch vbt_pitch;
526 1.1 skrll struct vcprop_tag end;
527 1.1 skrll } vb_setfb __cacheline_aligned = {
528 1.1 skrll .vb_hdr = {
529 1.44 rin .vpb_len = htole32(sizeof(vb_setfb)),
530 1.44 rin .vpb_rcode = htole32(VCPROP_PROCESS_REQUEST),
531 1.1 skrll },
532 1.1 skrll .vbt_res = {
533 1.1 skrll .tag = {
534 1.44 rin .vpt_tag = htole32(VCPROPTAG_SET_FB_RES),
535 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_res)),
536 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
537 1.1 skrll },
538 1.44 rin .width = htole32(0),
539 1.44 rin .height = htole32(0),
540 1.1 skrll },
541 1.1 skrll .vbt_vres = {
542 1.1 skrll .tag = {
543 1.44 rin .vpt_tag = htole32(VCPROPTAG_SET_FB_VRES),
544 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_vres)),
545 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
546 1.1 skrll },
547 1.44 rin .width = htole32(0),
548 1.44 rin .height = htole32(0),
549 1.1 skrll },
550 1.1 skrll .vbt_depth = {
551 1.1 skrll .tag = {
552 1.44 rin .vpt_tag = htole32(VCPROPTAG_SET_FB_DEPTH),
553 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_depth)),
554 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
555 1.1 skrll },
556 1.44 rin .bpp = htole32(32),
557 1.1 skrll },
558 1.1 skrll .vbt_alpha = {
559 1.1 skrll .tag = {
560 1.44 rin .vpt_tag = htole32(VCPROPTAG_SET_FB_ALPHA_MODE),
561 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_alpha)),
562 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
563 1.1 skrll },
564 1.44 rin .state = htole32(VCPROP_ALPHA_IGNORED),
565 1.1 skrll },
566 1.1 skrll .vbt_allocbuf = {
567 1.1 skrll .tag = {
568 1.44 rin .vpt_tag = htole32(VCPROPTAG_ALLOCATE_BUFFER),
569 1.44 rin .vpt_len =
570 1.44 rin htole32(VCPROPTAG_LEN(vb_setfb.vbt_allocbuf)),
571 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
572 1.1 skrll },
573 1.44 rin .address = htole32(PAGE_SIZE), /* alignment */
574 1.1 skrll },
575 1.1 skrll .vbt_blank = {
576 1.1 skrll .tag = {
577 1.44 rin .vpt_tag = htole32(VCPROPTAG_BLANK_SCREEN),
578 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_blank)),
579 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
580 1.1 skrll },
581 1.44 rin .state = htole32(VCPROP_BLANK_OFF),
582 1.1 skrll },
583 1.1 skrll .vbt_pitch = {
584 1.1 skrll .tag = {
585 1.44 rin .vpt_tag = htole32(VCPROPTAG_GET_FB_PITCH),
586 1.44 rin .vpt_len = htole32(VCPROPTAG_LEN(vb_setfb.vbt_pitch)),
587 1.44 rin .vpt_rcode = htole32(VCPROPTAG_REQUEST),
588 1.1 skrll },
589 1.1 skrll },
590 1.1 skrll .end = {
591 1.44 rin .vpt_tag = htole32(VCPROPTAG_NULL),
592 1.1 skrll },
593 1.1 skrll };
594 1.1 skrll
595 1.1 skrll #endif
596 1.1 skrll
597 1.1 skrll static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
598 1.1 skrll
599 1.1 skrll #if defined(RPI_HWCURSOR)
600 1.1 skrll #define CURSOR_BITMAP_SIZE (64 * 8)
601 1.1 skrll #define CURSOR_ARGB_SIZE (64 * 64 * 4)
602 1.1 skrll static uint32_t hcursor = 0;
603 1.1 skrll static bus_addr_t pcursor = 0;
604 1.1 skrll static uint32_t *cmem = NULL;
605 1.1 skrll static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
606 1.1 skrll static uint32_t cursor_cmap[4];
607 1.1 skrll static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
608 1.1 skrll #endif
609 1.1 skrll
610 1.1 skrll u_int
611 1.1 skrll bcm283x_clk_get_rate_uart(void)
612 1.1 skrll {
613 1.1 skrll
614 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
615 1.44 rin return le32toh(vb_uart.vbt_uartclockrate.rate);
616 1.1 skrll return 0;
617 1.1 skrll }
618 1.1 skrll
619 1.1 skrll u_int
620 1.1 skrll bcm283x_clk_get_rate_vpu(void)
621 1.1 skrll {
622 1.1 skrll
623 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
624 1.44 rin vb.vbt_vpuclockrate.rate != 0) {
625 1.44 rin return le32toh(vb.vbt_vpuclockrate.rate);
626 1.1 skrll }
627 1.1 skrll return 0;
628 1.1 skrll }
629 1.1 skrll
630 1.1 skrll u_int
631 1.1 skrll bcm283x_clk_get_rate_emmc(void)
632 1.1 skrll {
633 1.1 skrll
634 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
635 1.44 rin vb.vbt_emmcclockrate.rate != 0) {
636 1.44 rin return le32toh(vb.vbt_emmcclockrate.rate);
637 1.1 skrll }
638 1.1 skrll return 0;
639 1.1 skrll }
640 1.1 skrll
641 1.29 skrll u_int
642 1.29 skrll bcm283x_clk_get_rate_emmc2(void)
643 1.29 skrll {
644 1.29 skrll
645 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) &&
646 1.44 rin vb.vbt_emmc2clockrate.rate != 0) {
647 1.44 rin return le32toh(vb.vbt_emmc2clockrate.rate);
648 1.29 skrll }
649 1.29 skrll return 0;
650 1.29 skrll }
651 1.29 skrll
652 1.1 skrll
653 1.1 skrll
654 1.1 skrll static void
655 1.1 skrll bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
656 1.1 skrll {
657 1.1 skrll uint32_t res;
658 1.1 skrll
659 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
660 1.8 christos KERN_VTOPHYS((vaddr_t)&vb_uart));
661 1.1 skrll
662 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
663 1.1 skrll
664 1.32 skrll /*
665 1.32 skrll * RPI4 has Cortex A72 processors which do speculation, so
666 1.32 skrll * we need to invalidate the cache for an updates done by
667 1.32 skrll * the firmware
668 1.32 skrll */
669 1.32 skrll cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart));
670 1.32 skrll
671 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
672 1.44 rin uart_clk = le32toh(vb_uart.vbt_uartclockrate.rate);
673 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
674 1.44 rin core_clk = le32toh(vb_uart.vbt_vpuclockrate.rate);
675 1.1 skrll }
676 1.1 skrll
677 1.1 skrll #if defined(SOC_BCM2835)
678 1.1 skrll static void
679 1.1 skrll bcm2835_uartinit(void)
680 1.1 skrll {
681 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
682 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
683 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
684 1.1 skrll
685 1.1 skrll bcm283x_uartinit(iot, ioh);
686 1.1 skrll }
687 1.1 skrll #endif
688 1.1 skrll
689 1.1 skrll #if defined(SOC_BCM2836)
690 1.1 skrll static void
691 1.1 skrll bcm2836_uartinit(void)
692 1.1 skrll {
693 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
694 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
695 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
696 1.1 skrll
697 1.1 skrll bcm283x_uartinit(iot, ioh);
698 1.1 skrll }
699 1.25 skrll
700 1.25 skrll static void
701 1.28 skrll bcm2711_uartinit(void)
702 1.25 skrll {
703 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
704 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
705 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
706 1.25 skrll
707 1.25 skrll bcm283x_uartinit(iot, ioh);
708 1.25 skrll }
709 1.1 skrll #endif
710 1.1 skrll
711 1.1 skrll #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024)
712 1.1 skrll
713 1.1 skrll static size_t bcm283x_memorysize;
714 1.1 skrll
715 1.1 skrll static void
716 1.1 skrll bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
717 1.1 skrll {
718 1.1 skrll uint32_t res;
719 1.1 skrll
720 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
721 1.1 skrll #if (NSDHC > 0)
722 1.1 skrll (1 << VCPM_POWER_SDCARD) |
723 1.1 skrll #endif
724 1.1 skrll #if (NPLCOM > 0)
725 1.1 skrll (1 << VCPM_POWER_UART0) |
726 1.1 skrll #endif
727 1.1 skrll #if (NBCMDWCTWO > 0)
728 1.1 skrll (1 << VCPM_POWER_USB) |
729 1.1 skrll #endif
730 1.1 skrll #if (NBSCIIC > 0)
731 1.1 skrll (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
732 1.1 skrll /* (1 << VCPM_POWER_I2C2) | */
733 1.1 skrll #endif
734 1.1 skrll #if (NBCMSPI > 0)
735 1.1 skrll (1 << VCPM_POWER_SPI) |
736 1.1 skrll #endif
737 1.1 skrll 0) << 4);
738 1.1 skrll
739 1.8 christos bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
740 1.8 christos KERN_VTOPHYS((vaddr_t)&vb));
741 1.1 skrll
742 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
743 1.1 skrll
744 1.30 skrll /*
745 1.30 skrll * RPI4 has Cortex A72 processors which do speculation, so
746 1.30 skrll * we need to invalidate the cache for an updates done by
747 1.30 skrll * the firmware
748 1.30 skrll */
749 1.30 skrll cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
750 1.30 skrll
751 1.1 skrll if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
752 1.1 skrll bootconfig.dramblocks = 1;
753 1.1 skrll bootconfig.dram[0].address = 0x0;
754 1.1 skrll bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
755 1.1 skrll return;
756 1.1 skrll }
757 1.1 skrll
758 1.1 skrll struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
759 1.1 skrll if (vcprop_tag_success_p(&vptp_mem->tag)) {
760 1.1 skrll size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
761 1.1 skrll sizeof(struct vcprop_memory);
762 1.1 skrll
763 1.1 skrll bcm283x_memorysize = 0;
764 1.1 skrll bootconfig.dramblocks = 0;
765 1.1 skrll
766 1.1 skrll for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
767 1.44 rin bootconfig.dram[i].address =
768 1.44 rin le32toh(vptp_mem->mem[i].base);
769 1.44 rin bootconfig.dram[i].pages =
770 1.44 rin atop(le32toh(vptp_mem->mem[i].size));
771 1.1 skrll bootconfig.dramblocks++;
772 1.1 skrll
773 1.44 rin bcm283x_memorysize += le32toh(vptp_mem->mem[i].size);
774 1.1 skrll }
775 1.1 skrll }
776 1.1 skrll
777 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
778 1.44 rin curcpu()->ci_data.cpu_cc_freq =
779 1.44 rin le32toh(vb.vbt_armclockrate.rate);
780 1.1 skrll
781 1.1 skrll #ifdef VERBOSE_INIT_ARM
782 1.13 rin if (vcprop_tag_success_p(&vb.vbt_memory.tag))
783 1.13 rin printf("%s: memory size %zu\n", __func__,
784 1.13 rin bcm283x_memorysize);
785 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
786 1.1 skrll printf("%s: arm clock %d\n", __func__,
787 1.44 rin le32toh(vb.vbt_armclockrate.rate));
788 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag))
789 1.29 skrll printf("%s: vpu clock %d\n", __func__,
790 1.44 rin le32toh(vb.vbt_vpuclockrate.rate));
791 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag))
792 1.29 skrll printf("%s: emmc clock %d\n", __func__,
793 1.44 rin le32toh(vb.vbt_emmcclockrate.rate));
794 1.29 skrll if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag))
795 1.29 skrll printf("%s: emmc2 clock %d\n", __func__,
796 1.44 rin le32toh(vb.vbt_emmcclockrate.rate));
797 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
798 1.1 skrll printf("%s: firmware rev %x\n", __func__,
799 1.44 rin le32toh(vb.vbt_fwrev.rev));
800 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
801 1.1 skrll printf("%s: board model %x\n", __func__,
802 1.44 rin le32toh(vb.vbt_boardmodel.model));
803 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
804 1.8 christos printf("%s: mac-address %" PRIx64 "\n", __func__,
805 1.44 rin le64toh(vb.vbt_macaddr.addr));
806 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
807 1.1 skrll printf("%s: board rev %x\n", __func__,
808 1.44 rin le32toh(vb.vbt_boardrev.rev));
809 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_serial.tag))
810 1.8 christos printf("%s: board serial %" PRIx64 "\n", __func__,
811 1.44 rin le64toh(vb.vbt_serial.sn));
812 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
813 1.1 skrll printf("%s: DMA channel mask 0x%08x\n", __func__,
814 1.44 rin le32toh(vb.vbt_dmachan.mask));
815 1.1 skrll
816 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
817 1.1 skrll printf("%s: cmdline %s\n", __func__,
818 1.1 skrll vb.vbt_cmdline.cmdline);
819 1.1 skrll #endif
820 1.1 skrll }
821 1.1 skrll
822 1.1 skrll #if defined(SOC_BCM2835)
823 1.1 skrll static void
824 1.1 skrll bcm2835_bootparams(void)
825 1.1 skrll {
826 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
827 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
828 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
829 1.1 skrll
830 1.1 skrll bcm283x_bootparams(iot, ioh);
831 1.1 skrll }
832 1.1 skrll #endif
833 1.1 skrll
834 1.1 skrll #if defined(SOC_BCM2836)
835 1.1 skrll static void
836 1.1 skrll bcm2836_bootparams(void)
837 1.1 skrll {
838 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
839 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
840 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
841 1.1 skrll
842 1.1 skrll bcm283x_bootparams(iot, ioh);
843 1.1 skrll }
844 1.1 skrll
845 1.25 skrll static void
846 1.28 skrll bcm2711_bootparams(void)
847 1.25 skrll {
848 1.28 skrll const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
849 1.28 skrll const bus_space_tag_t iot = &bcm2711_bs_tag;
850 1.28 skrll const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa);
851 1.25 skrll
852 1.25 skrll bcm283x_bootparams(iot, ioh);
853 1.25 skrll }
854 1.25 skrll
855 1.23 jmcneill #if defined(MULTIPROCESSOR)
856 1.23 jmcneill static int
857 1.23 jmcneill cpu_enable_bcm2836(int phandle)
858 1.1 skrll {
859 1.23 jmcneill bus_space_tag_t iot = &bcm2836_bs_tag;
860 1.23 jmcneill bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
861 1.23 jmcneill uint64_t mpidr;
862 1.1 skrll
863 1.23 jmcneill fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
864 1.15 ryo
865 1.23 jmcneill const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
866 1.7 ryo
867 1.23 jmcneill bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno),
868 1.23 jmcneill KERN_VTOPHYS((vaddr_t)cpu_mpstart));
869 1.18 ryo
870 1.23 jmcneill return 0;
871 1.1 skrll }
872 1.23 jmcneill ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836);
873 1.23 jmcneill #endif
874 1.1 skrll
875 1.1 skrll #endif /* SOC_BCM2836 */
876 1.1 skrll
877 1.1 skrll #if NGENFB > 0
878 1.1 skrll static bool
879 1.1 skrll rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
880 1.1 skrll {
881 1.1 skrll char *x;
882 1.1 skrll
883 1.1 skrll if (strncmp(s, "disable", 7) == 0)
884 1.1 skrll return false;
885 1.1 skrll
886 1.1 skrll x = strchr(s, 'x');
887 1.1 skrll if (x) {
888 1.1 skrll *pwidth = strtoul(s, NULL, 10);
889 1.1 skrll *pheight = strtoul(x + 1, NULL, 10);
890 1.1 skrll }
891 1.1 skrll
892 1.1 skrll return true;
893 1.1 skrll }
894 1.1 skrll
895 1.39 skrll #define RPI_EDIDSIZE 1024
896 1.39 skrll
897 1.1 skrll static bool
898 1.1 skrll rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
899 1.1 skrll {
900 1.1 skrll struct edid_info ei;
901 1.1 skrll uint32_t res;
902 1.1 skrll int error;
903 1.1 skrll
904 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
905 1.1 skrll sizeof(vb_edid), &res);
906 1.1 skrll if (error) {
907 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
908 1.1 skrll return false;
909 1.1 skrll }
910 1.1 skrll
911 1.1 skrll if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
912 1.1 skrll !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
913 1.1 skrll vb_edid.vbt_edid.status != 0)
914 1.1 skrll return false;
915 1.1 skrll
916 1.39 skrll uint8_t *edid_data = kmem_alloc(RPI_EDIDSIZE, KM_SLEEP);
917 1.39 skrll
918 1.39 skrll memset(edid_data, 0, RPI_EDIDSIZE);
919 1.1 skrll memcpy(edid_data, vb_edid.vbt_edid.data,
920 1.1 skrll sizeof(vb_edid.vbt_edid.data));
921 1.1 skrll edid_parse(edid_data, &ei);
922 1.1 skrll #ifdef VERBOSE_INIT_ARM
923 1.1 skrll edid_print(&ei);
924 1.1 skrll #endif
925 1.1 skrll
926 1.1 skrll if (ei.edid_preferred_mode) {
927 1.1 skrll *pwidth = ei.edid_preferred_mode->hdisplay;
928 1.1 skrll *pheight = ei.edid_preferred_mode->vdisplay;
929 1.1 skrll }
930 1.1 skrll
931 1.39 skrll kmem_free(edid_data, RPI_EDIDSIZE);
932 1.39 skrll
933 1.1 skrll return true;
934 1.1 skrll }
935 1.1 skrll
936 1.1 skrll /*
937 1.1 skrll * Initialize framebuffer console.
938 1.1 skrll *
939 1.1 skrll * Some notes about boot parameters:
940 1.1 skrll * - If "fb=disable" is present, ignore framebuffer completely.
941 1.1 skrll * - If "fb=<width>x<height> is present, use the specified mode.
942 1.1 skrll * - If "console=fb" is present, attach framebuffer to console.
943 1.1 skrll */
944 1.1 skrll static bool
945 1.1 skrll rpi_fb_init(prop_dictionary_t dict, void *aux)
946 1.1 skrll {
947 1.1 skrll uint32_t width = 0, height = 0;
948 1.1 skrll uint32_t res;
949 1.1 skrll char *ptr;
950 1.1 skrll int integer;
951 1.1 skrll int error;
952 1.1 skrll bool is_bgr = true;
953 1.1 skrll
954 1.1 skrll if (get_bootconf_option(boot_args, "fb",
955 1.1 skrll BOOTOPT_TYPE_STRING, &ptr)) {
956 1.1 skrll if (rpi_fb_parse_mode(ptr, &width, &height) == false)
957 1.1 skrll return false;
958 1.1 skrll }
959 1.1 skrll if (width == 0 || height == 0) {
960 1.1 skrll rpi_fb_get_edid_mode(&width, &height);
961 1.1 skrll }
962 1.1 skrll if (width == 0 || height == 0) {
963 1.1 skrll width = RPI_FB_WIDTH;
964 1.1 skrll height = RPI_FB_HEIGHT;
965 1.1 skrll }
966 1.1 skrll
967 1.44 rin vb_setfb.vbt_res.width = htole32(width);
968 1.44 rin vb_setfb.vbt_res.height = htole32(height);
969 1.44 rin vb_setfb.vbt_vres.width = htole32(width);
970 1.44 rin vb_setfb.vbt_vres.height = htole32(height);
971 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
972 1.1 skrll sizeof(vb_setfb), &res);
973 1.1 skrll if (error) {
974 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
975 1.1 skrll return false;
976 1.1 skrll }
977 1.1 skrll
978 1.1 skrll if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
979 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
980 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
981 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
982 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
983 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
984 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
985 1.1 skrll printf("%s: prop tag failed\n", __func__);
986 1.1 skrll return false;
987 1.1 skrll }
988 1.1 skrll
989 1.1 skrll #ifdef VERBOSE_INIT_ARM
990 1.1 skrll printf("%s: addr = 0x%x size = %d\n", __func__,
991 1.44 rin le32toh(vb_setfb.vbt_allocbuf.address),
992 1.44 rin le32toh(vb_setfb.vbt_allocbuf.size));
993 1.44 rin printf("%s: depth = %d\n", __func__, le32toh(vb_setfb.vbt_depth.bpp));
994 1.1 skrll printf("%s: pitch = %d\n", __func__,
995 1.44 rin le32toh(vb_setfb.vbt_pitch.linebytes));
996 1.1 skrll printf("%s: width = %d height = %d\n", __func__,
997 1.44 rin le32toh(vb_setfb.vbt_res.width), le32toh(vb_setfb.vbt_res.height));
998 1.1 skrll printf("%s: vwidth = %d vheight = %d\n", __func__,
999 1.44 rin le32toh(vb_setfb.vbt_vres.width),
1000 1.44 rin le32toh(vb_setfb.vbt_vres.height));
1001 1.1 skrll #endif
1002 1.1 skrll
1003 1.1 skrll if (vb_setfb.vbt_allocbuf.address == 0 ||
1004 1.1 skrll vb_setfb.vbt_allocbuf.size == 0 ||
1005 1.1 skrll vb_setfb.vbt_res.width == 0 ||
1006 1.1 skrll vb_setfb.vbt_res.height == 0 ||
1007 1.1 skrll vb_setfb.vbt_vres.width == 0 ||
1008 1.1 skrll vb_setfb.vbt_vres.height == 0 ||
1009 1.1 skrll vb_setfb.vbt_pitch.linebytes == 0) {
1010 1.1 skrll printf("%s: failed to set mode %ux%u\n", __func__,
1011 1.1 skrll width, height);
1012 1.1 skrll return false;
1013 1.1 skrll }
1014 1.1 skrll
1015 1.44 rin prop_dictionary_set_uint32(dict, "width",
1016 1.44 rin le32toh(vb_setfb.vbt_res.width));
1017 1.44 rin prop_dictionary_set_uint32(dict, "height",
1018 1.44 rin le32toh(vb_setfb.vbt_res.height));
1019 1.44 rin prop_dictionary_set_uint8(dict, "depth",
1020 1.44 rin le32toh(vb_setfb.vbt_depth.bpp));
1021 1.1 skrll prop_dictionary_set_uint16(dict, "linebytes",
1022 1.44 rin le32toh(vb_setfb.vbt_pitch.linebytes));
1023 1.1 skrll prop_dictionary_set_uint32(dict, "address",
1024 1.44 rin le32toh(vb_setfb.vbt_allocbuf.address));
1025 1.1 skrll
1026 1.1 skrll /*
1027 1.1 skrll * Old firmware uses BGR. New firmware uses RGB. The get and set
1028 1.1 skrll * pixel order mailbox properties don't seem to work. The firmware
1029 1.1 skrll * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
1030 1.1 skrll * to determine pixel order. 0 means BGR, 1 means RGB.
1031 1.1 skrll *
1032 1.1 skrll * See https://github.com/raspberrypi/linux/issues/514
1033 1.1 skrll */
1034 1.1 skrll if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
1035 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1036 1.1 skrll is_bgr = integer == 0;
1037 1.1 skrll }
1038 1.1 skrll prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
1039 1.1 skrll
1040 1.1 skrll /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
1041 1.1 skrll if (get_bootconf_option(boot_args, "genfb.type",
1042 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1043 1.1 skrll prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
1044 1.1 skrll }
1045 1.1 skrll
1046 1.1 skrll #if defined(RPI_HWCURSOR)
1047 1.1 skrll struct fdt_attach_args *faa = aux;
1048 1.1 skrll bus_space_handle_t hc;
1049 1.1 skrll
1050 1.1 skrll hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
1051 1.1 skrll MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
1052 1.1 skrll pcursor = rpi_lock_mem(hcursor);
1053 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1054 1.1 skrll printf("hcursor: %08x\n", hcursor);
1055 1.1 skrll printf("pcursor: %08x\n", (uint32_t)pcursor);
1056 1.1 skrll printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
1057 1.1 skrll #endif
1058 1.1 skrll if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
1059 1.1 skrll BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
1060 1.1 skrll printf("couldn't map cursor memory\n");
1061 1.1 skrll } else {
1062 1.1 skrll int i, j, k;
1063 1.1 skrll
1064 1.1 skrll cmem = bus_space_vaddr(faa->faa_bst, hc);
1065 1.1 skrll k = 0;
1066 1.1 skrll for (j = 0; j < 64; j++) {
1067 1.1 skrll for (i = 0; i < 64; i++) {
1068 1.1 skrll cmem[i + k] =
1069 1.1 skrll ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
1070 1.1 skrll }
1071 1.1 skrll k += 64;
1072 1.1 skrll }
1073 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1074 1.1 skrll rpi_fb_initcursor(pcursor, 0, 0);
1075 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1076 1.1 skrll rpi_fb_movecursor(600, 400, 1);
1077 1.1 skrll #else
1078 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1079 1.1 skrll #endif
1080 1.1 skrll }
1081 1.1 skrll #endif
1082 1.1 skrll
1083 1.1 skrll return true;
1084 1.1 skrll }
1085 1.1 skrll
1086 1.1 skrll
1087 1.1 skrll #if defined(RPI_HWCURSOR)
1088 1.1 skrll static int
1089 1.1 skrll rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
1090 1.1 skrll {
1091 1.1 skrll int pos = 0;
1092 1.1 skrll int shape = 0;
1093 1.1 skrll
1094 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
1095 1.1 skrll if (cursor_on != cur->enable) {
1096 1.1 skrll cursor_on = cur->enable;
1097 1.1 skrll pos = 1;
1098 1.1 skrll }
1099 1.1 skrll }
1100 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
1101 1.1 skrll
1102 1.1 skrll hot_x = cur->hot.x;
1103 1.1 skrll hot_y = cur->hot.y;
1104 1.1 skrll pos = 1;
1105 1.1 skrll shape = 1;
1106 1.1 skrll }
1107 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
1108 1.1 skrll
1109 1.1 skrll cursor_x = cur->pos.x;
1110 1.1 skrll cursor_y = cur->pos.y;
1111 1.1 skrll pos = 1;
1112 1.1 skrll }
1113 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
1114 1.1 skrll int i;
1115 1.1 skrll uint32_t val;
1116 1.1 skrll
1117 1.17 riastrad for (i = 0; i < uimin(cur->cmap.count, 3); i++) {
1118 1.1 skrll val = (cur->cmap.red[i] << 16 ) |
1119 1.1 skrll (cur->cmap.green[i] << 8) |
1120 1.1 skrll (cur->cmap.blue[i] ) |
1121 1.1 skrll 0xff000000;
1122 1.1 skrll cursor_cmap[i + cur->cmap.index + 2] = val;
1123 1.1 skrll }
1124 1.1 skrll shape = 1;
1125 1.1 skrll }
1126 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
1127 1.1 skrll int err;
1128 1.1 skrll
1129 1.1 skrll err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
1130 1.1 skrll err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
1131 1.1 skrll if (err != 0)
1132 1.1 skrll return EFAULT;
1133 1.1 skrll shape = 1;
1134 1.1 skrll }
1135 1.1 skrll if (shape) {
1136 1.1 skrll int i, j, idx;
1137 1.1 skrll uint8_t mask;
1138 1.1 skrll
1139 1.1 skrll for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
1140 1.1 skrll mask = 0x01;
1141 1.1 skrll for (j = 0; j < 8; j++) {
1142 1.1 skrll idx = ((cursor_mask[i] & mask) ? 2 : 0) |
1143 1.1 skrll ((cursor_bitmap[i] & mask) ? 1 : 0);
1144 1.1 skrll cmem[i * 8 + j] = cursor_cmap[idx];
1145 1.1 skrll mask = mask << 1;
1146 1.1 skrll }
1147 1.1 skrll }
1148 1.1 skrll /* just in case */
1149 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1150 1.1 skrll rpi_fb_initcursor(pcursor, hot_x, hot_y);
1151 1.1 skrll }
1152 1.1 skrll if (pos) {
1153 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1154 1.1 skrll }
1155 1.1 skrll return 0;
1156 1.1 skrll }
1157 1.1 skrll #endif
1158 1.1 skrll
1159 1.1 skrll static int
1160 1.1 skrll rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
1161 1.1 skrll {
1162 1.1 skrll
1163 1.1 skrll switch (cmd) {
1164 1.1 skrll case WSDISPLAYIO_SVIDEO:
1165 1.1 skrll {
1166 1.1 skrll int d = *(int *)data;
1167 1.1 skrll if (d == rpi_video_on)
1168 1.1 skrll return 0;
1169 1.1 skrll rpi_video_on = d;
1170 1.1 skrll rpi_fb_set_video(d);
1171 1.1 skrll #if defined(RPI_HWCURSOR)
1172 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y,
1173 1.1 skrll d ? cursor_on : 0);
1174 1.1 skrll #endif
1175 1.1 skrll }
1176 1.1 skrll return 0;
1177 1.1 skrll case WSDISPLAYIO_GVIDEO:
1178 1.1 skrll *(int *)data = rpi_video_on;
1179 1.1 skrll return 0;
1180 1.1 skrll #if defined(RPI_HWCURSOR)
1181 1.1 skrll case WSDISPLAYIO_GCURPOS:
1182 1.1 skrll {
1183 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1184 1.1 skrll
1185 1.1 skrll cp->x = cursor_x;
1186 1.1 skrll cp->y = cursor_y;
1187 1.1 skrll }
1188 1.1 skrll return 0;
1189 1.1 skrll case WSDISPLAYIO_SCURPOS:
1190 1.1 skrll {
1191 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1192 1.1 skrll
1193 1.1 skrll cursor_x = cp->x;
1194 1.1 skrll cursor_y = cp->y;
1195 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1196 1.1 skrll }
1197 1.1 skrll return 0;
1198 1.1 skrll case WSDISPLAYIO_GCURMAX:
1199 1.1 skrll {
1200 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1201 1.1 skrll
1202 1.1 skrll cp->x = 64;
1203 1.1 skrll cp->y = 64;
1204 1.1 skrll }
1205 1.1 skrll return 0;
1206 1.1 skrll case WSDISPLAYIO_SCURSOR:
1207 1.1 skrll {
1208 1.1 skrll struct wsdisplay_cursor *cursor = (void *)data;
1209 1.1 skrll
1210 1.1 skrll return rpi_fb_do_cursor(cursor);
1211 1.1 skrll }
1212 1.1 skrll #endif
1213 1.1 skrll default:
1214 1.1 skrll return EPASSTHROUGH;
1215 1.1 skrll }
1216 1.1 skrll }
1217 1.1 skrll
1218 1.1 skrll #endif
1219 1.1 skrll
1220 1.1 skrll SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
1221 1.1 skrll {
1222 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1223 1.1 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
1224 1.1 skrll NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
1225 1.1 skrll
1226 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1227 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1228 1.1 skrll CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
1229 1.1 skrll &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1230 1.1 skrll
1231 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1232 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1233 1.1 skrll CTLTYPE_INT, "board_model", NULL, NULL, 0,
1234 1.1 skrll &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1235 1.1 skrll
1236 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1237 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1238 1.1 skrll CTLTYPE_INT, "board_revision", NULL, NULL, 0,
1239 1.1 skrll &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1240 1.1 skrll
1241 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1242 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
1243 1.1 skrll CTLTYPE_QUAD, "serial", NULL, NULL, 0,
1244 1.1 skrll &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1245 1.1 skrll }
1246 1.1 skrll
1247 1.1 skrll #if defined(SOC_BCM2835)
1248 1.1 skrll static void
1249 1.1 skrll bcm2835_platform_bootstrap(void)
1250 1.1 skrll {
1251 1.1 skrll
1252 1.4 ryo bcm2835_bs_tag = arm_generic_bs_tag;
1253 1.4 ryo bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
1254 1.4 ryo
1255 1.4 ryo bcm2835_bs_tag.bs_map = bcm2835_bs_map;
1256 1.12 rin bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap;
1257 1.4 ryo bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
1258 1.12 rin bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap;
1259 1.4 ryo
1260 1.1 skrll fdtbus_set_decoderegprop(false);
1261 1.1 skrll
1262 1.1 skrll bcm2835_uartinit();
1263 1.1 skrll
1264 1.1 skrll bcm2835_bootparams();
1265 1.1 skrll }
1266 1.1 skrll #endif
1267 1.1 skrll
1268 1.1 skrll #if defined(SOC_BCM2836)
1269 1.1 skrll static void
1270 1.1 skrll bcm2836_platform_bootstrap(void)
1271 1.1 skrll {
1272 1.1 skrll
1273 1.4 ryo bcm2836_bs_tag = arm_generic_bs_tag;
1274 1.4 ryo bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
1275 1.4 ryo
1276 1.4 ryo bcm2836_bs_tag.bs_map = bcm2836_bs_map;
1277 1.12 rin bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap;
1278 1.4 ryo bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
1279 1.12 rin bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap;
1280 1.4 ryo
1281 1.1 skrll fdtbus_set_decoderegprop(false);
1282 1.1 skrll
1283 1.1 skrll bcm2836_uartinit();
1284 1.1 skrll
1285 1.1 skrll bcm2836_bootparams();
1286 1.1 skrll
1287 1.20 skrll #ifdef MULTIPROCESSOR
1288 1.20 skrll arm_cpu_max = RPI_CPU_MAX;
1289 1.21 ryo arm_fdt_cpu_bootstrap();
1290 1.20 skrll #endif
1291 1.1 skrll }
1292 1.25 skrll
1293 1.25 skrll static void
1294 1.28 skrll bcm2711_platform_bootstrap(void)
1295 1.25 skrll {
1296 1.25 skrll
1297 1.28 skrll bcm2711_bs_tag = arm_generic_bs_tag;
1298 1.28 skrll bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag;
1299 1.25 skrll
1300 1.28 skrll bcm2711_bs_tag.bs_map = bcm2711_bs_map;
1301 1.28 skrll bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap;
1302 1.28 skrll bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map;
1303 1.28 skrll bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap;
1304 1.25 skrll
1305 1.25 skrll fdtbus_set_decoderegprop(false);
1306 1.25 skrll
1307 1.28 skrll bcm2711_uartinit();
1308 1.25 skrll
1309 1.28 skrll bcm2711_bootparams();
1310 1.25 skrll
1311 1.25 skrll #ifdef MULTIPROCESSOR
1312 1.25 skrll arm_cpu_max = RPI_CPU_MAX;
1313 1.25 skrll arm_fdt_cpu_bootstrap();
1314 1.25 skrll #endif
1315 1.25 skrll }
1316 1.1 skrll #endif
1317 1.1 skrll
1318 1.1 skrll #if defined(SOC_BCM2835)
1319 1.1 skrll static void
1320 1.1 skrll bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
1321 1.1 skrll {
1322 1.1 skrll
1323 1.1 skrll faa->faa_bst = &bcm2835_bs_tag;
1324 1.1 skrll }
1325 1.1 skrll #endif
1326 1.1 skrll
1327 1.1 skrll #if defined(SOC_BCM2836)
1328 1.1 skrll static void
1329 1.1 skrll bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
1330 1.1 skrll {
1331 1.1 skrll
1332 1.1 skrll faa->faa_bst = &bcm2836_bs_tag;
1333 1.1 skrll }
1334 1.25 skrll
1335 1.25 skrll static void
1336 1.28 skrll bcm2711_platform_init_attach_args(struct fdt_attach_args *faa)
1337 1.25 skrll {
1338 1.25 skrll
1339 1.28 skrll faa->faa_bst = &bcm2711_bs_tag;
1340 1.25 skrll }
1341 1.1 skrll #endif
1342 1.1 skrll
1343 1.1 skrll
1344 1.40 skrll static void __noasan
1345 1.1 skrll bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1346 1.1 skrll {
1347 1.1 skrll volatile uint32_t *uartaddr =
1348 1.4 ryo cpu_earlydevice_va_p() ?
1349 1.1 skrll (volatile uint32_t *)va :
1350 1.1 skrll (volatile uint32_t *)pa;
1351 1.1 skrll
1352 1.45 rin while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
1353 1.1 skrll continue;
1354 1.1 skrll
1355 1.45 rin uartaddr[PL01XCOM_DR / 4] = htole32(c);
1356 1.1 skrll
1357 1.45 rin while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
1358 1.1 skrll continue;
1359 1.1 skrll }
1360 1.1 skrll
1361 1.42 rin static void __noasan
1362 1.42 rin bcm283x_aux_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1363 1.42 rin {
1364 1.42 rin volatile uint32_t *uartaddr =
1365 1.42 rin cpu_earlydevice_va_p() ?
1366 1.42 rin (volatile uint32_t *)va :
1367 1.42 rin (volatile uint32_t *)pa;
1368 1.42 rin
1369 1.45 rin while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
1370 1.42 rin continue;
1371 1.42 rin
1372 1.45 rin uartaddr[com_data] = htole32(c);
1373 1.42 rin }
1374 1.42 rin
1375 1.40 skrll void __noasan
1376 1.1 skrll bcm2835_platform_early_putchar(char c)
1377 1.1 skrll {
1378 1.1 skrll paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1379 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1380 1.1 skrll
1381 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1382 1.1 skrll }
1383 1.1 skrll
1384 1.40 skrll void __noasan
1385 1.43 rin bcm2835_aux_platform_early_putchar(char c)
1386 1.43 rin {
1387 1.43 rin paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1388 1.43 rin vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1389 1.43 rin
1390 1.43 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1391 1.43 rin }
1392 1.43 rin
1393 1.43 rin void __noasan
1394 1.1 skrll bcm2836_platform_early_putchar(char c)
1395 1.1 skrll {
1396 1.1 skrll paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1397 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1398 1.1 skrll
1399 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1400 1.1 skrll }
1401 1.1 skrll
1402 1.40 skrll void __noasan
1403 1.1 skrll bcm2837_platform_early_putchar(char c)
1404 1.1 skrll {
1405 1.42 rin paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1406 1.42 rin vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1407 1.1 skrll
1408 1.42 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1409 1.1 skrll }
1410 1.1 skrll
1411 1.40 skrll void __noasan
1412 1.28 skrll bcm2711_platform_early_putchar(char c)
1413 1.25 skrll {
1414 1.42 rin paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE);
1415 1.42 rin vaddr_t va = BCM2711_IOPHYSTOVIRT(pa);
1416 1.25 skrll
1417 1.42 rin bcm283x_aux_platform_early_putchar(va, pa, c);
1418 1.25 skrll }
1419 1.25 skrll
1420 1.25 skrll #define BCM283x_REF_FREQ 19200000
1421 1.25 skrll
1422 1.1 skrll static void
1423 1.1 skrll bcm283x_platform_device_register(device_t dev, void *aux)
1424 1.1 skrll {
1425 1.1 skrll prop_dictionary_t dict = device_properties(dev);
1426 1.1 skrll
1427 1.1 skrll if (device_is_a(dev, "bcmdmac") &&
1428 1.1 skrll vcprop_tag_success_p(&vb.vbt_dmachan.tag)) {
1429 1.1 skrll prop_dictionary_set_uint32(dict,
1430 1.44 rin "chanmask", le32toh(vb.vbt_dmachan.mask));
1431 1.1 skrll }
1432 1.1 skrll #if NSDHC > 0
1433 1.1 skrll if (booted_device == NULL &&
1434 1.1 skrll device_is_a(dev, "ld") &&
1435 1.1 skrll device_is_a(device_parent(dev), "sdmmc")) {
1436 1.1 skrll booted_partition = 0;
1437 1.1 skrll booted_device = dev;
1438 1.1 skrll }
1439 1.1 skrll #endif
1440 1.37 jmcneill if ((device_is_a(dev, "usmsc") ||
1441 1.37 jmcneill device_is_a(dev, "mue") ||
1442 1.37 jmcneill device_is_a(dev, "genet")) &&
1443 1.1 skrll vcprop_tag_success_p(&vb.vbt_macaddr.tag)) {
1444 1.44 rin const uint64_t addr = le64toh(vb.vbt_macaddr.addr);
1445 1.1 skrll const uint8_t enaddr[ETHER_ADDR_LEN] = {
1446 1.44 rin (addr >> 0) & 0xff, (addr >> 8) & 0xff,
1447 1.44 rin (addr >> 16) & 0xff, (addr >> 24) & 0xff,
1448 1.44 rin (addr >> 32) & 0xff, (addr >> 40) & 0xff
1449 1.1 skrll };
1450 1.1 skrll
1451 1.38 skrll prop_dictionary_set_data(dict, "mac-address", enaddr,
1452 1.38 skrll ETHER_ADDR_LEN);
1453 1.1 skrll }
1454 1.1 skrll
1455 1.1 skrll #if NGENFB > 0
1456 1.1 skrll if (device_is_a(dev, "genfb")) {
1457 1.1 skrll char *ptr;
1458 1.1 skrll
1459 1.1 skrll bcmgenfb_set_console_dev(dev);
1460 1.1 skrll bcmgenfb_set_ioctl(&rpi_ioctl);
1461 1.1 skrll #ifdef DDB
1462 1.1 skrll db_trap_callback = bcmgenfb_ddb_trap_callback;
1463 1.1 skrll #endif
1464 1.1 skrll if (rpi_fb_init(dict, aux) == false)
1465 1.1 skrll return;
1466 1.1 skrll if (get_bootconf_option(boot_args, "console",
1467 1.1 skrll BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
1468 1.1 skrll prop_dictionary_set_bool(dict, "is_console", true);
1469 1.1 skrll #if NUKBD > 0
1470 1.1 skrll /* allow ukbd to be the console keyboard */
1471 1.1 skrll ukbd_cnattach();
1472 1.1 skrll #endif
1473 1.1 skrll } else {
1474 1.1 skrll prop_dictionary_set_bool(dict, "is_console", false);
1475 1.1 skrll }
1476 1.1 skrll }
1477 1.1 skrll #endif
1478 1.1 skrll }
1479 1.1 skrll
1480 1.1 skrll static u_int
1481 1.1 skrll bcm283x_platform_uart_freq(void)
1482 1.1 skrll {
1483 1.1 skrll
1484 1.34 skrll /*
1485 1.34 skrll * We are safe to access stdout phandle - consinit did before
1486 1.49 skrll * calling fp_uart_freq
1487 1.34 skrll */
1488 1.34 skrll const int phandle = fdtbus_get_stdout_phandle();
1489 1.34 skrll
1490 1.46 thorpej static const struct device_compatible_entry aux_compat_data[] = {
1491 1.46 thorpej { .compat = "brcm,bcm2835-aux-uart" },
1492 1.46 thorpej DEVICE_COMPAT_EOL
1493 1.34 skrll };
1494 1.34 skrll
1495 1.46 thorpej if (of_compatible_match(phandle, aux_compat_data))
1496 1.34 skrll return core_clk * 2;
1497 1.34 skrll
1498 1.1 skrll return uart_clk;
1499 1.1 skrll }
1500 1.1 skrll
1501 1.1 skrll #if defined(SOC_BCM2835)
1502 1.49 skrll static const struct fdt_platform bcm2835_platform = {
1503 1.49 skrll .fp_devmap = bcm2835_platform_devmap,
1504 1.49 skrll .fp_bootstrap = bcm2835_platform_bootstrap,
1505 1.49 skrll .fp_init_attach_args = bcm2835_platform_init_attach_args,
1506 1.49 skrll .fp_device_register = bcm283x_platform_device_register,
1507 1.49 skrll .fp_reset = bcm2835_system_reset,
1508 1.49 skrll .fp_delay = bcm2835_tmr_delay,
1509 1.49 skrll .fp_uart_freq = bcm283x_platform_uart_freq,
1510 1.1 skrll };
1511 1.1 skrll
1512 1.49 skrll FDT_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform);
1513 1.1 skrll #endif
1514 1.1 skrll
1515 1.1 skrll #if defined(SOC_BCM2836)
1516 1.1 skrll
1517 1.49 skrll static const struct fdt_platform bcm2836_platform = {
1518 1.49 skrll .fp_devmap = bcm2836_platform_devmap,
1519 1.49 skrll .fp_bootstrap = bcm2836_platform_bootstrap,
1520 1.49 skrll .fp_init_attach_args = bcm2836_platform_init_attach_args,
1521 1.49 skrll .fp_device_register = bcm283x_platform_device_register,
1522 1.49 skrll .fp_reset = bcm2835_system_reset,
1523 1.49 skrll .fp_delay = gtmr_delay,
1524 1.49 skrll .fp_uart_freq = bcm283x_platform_uart_freq,
1525 1.49 skrll .fp_mpstart = arm_fdt_cpu_mpstart,
1526 1.1 skrll };
1527 1.1 skrll
1528 1.49 skrll static const struct fdt_platform bcm2837_platform = {
1529 1.49 skrll .fp_devmap = bcm2836_platform_devmap,
1530 1.49 skrll .fp_bootstrap = bcm2836_platform_bootstrap,
1531 1.49 skrll .fp_init_attach_args = bcm2836_platform_init_attach_args,
1532 1.49 skrll .fp_device_register = bcm283x_platform_device_register,
1533 1.49 skrll .fp_reset = bcm2835_system_reset,
1534 1.49 skrll .fp_delay = gtmr_delay,
1535 1.49 skrll .fp_uart_freq = bcm283x_platform_uart_freq,
1536 1.49 skrll .fp_mpstart = arm_fdt_cpu_mpstart,
1537 1.1 skrll };
1538 1.1 skrll
1539 1.49 skrll static const struct fdt_platform bcm2711_platform = {
1540 1.49 skrll .fp_devmap = bcm2711_platform_devmap,
1541 1.49 skrll .fp_bootstrap = bcm2711_platform_bootstrap,
1542 1.49 skrll .fp_init_attach_args = bcm2711_platform_init_attach_args,
1543 1.49 skrll .fp_device_register = bcm283x_platform_device_register,
1544 1.49 skrll .fp_reset = bcm2835_system_reset,
1545 1.49 skrll .fp_delay = gtmr_delay,
1546 1.49 skrll .fp_uart_freq = bcm283x_platform_uart_freq,
1547 1.49 skrll .fp_mpstart = arm_fdt_cpu_mpstart,
1548 1.25 skrll };
1549 1.25 skrll
1550 1.49 skrll FDT_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform);
1551 1.49 skrll FDT_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform);
1552 1.49 skrll FDT_PLATFORM(bcm2711, "brcm,bcm2711", &bcm2711_platform);
1553 1.1 skrll #endif
1554