bcm283x_platform.c revision 1.9 1 1.9 skrll /* $NetBSD: bcm283x_platform.c,v 1.9 2018/08/03 13:48:24 skrll Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.9 skrll __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.9 2018/08/03 13:48:24 skrll Exp $");
31 1.1 skrll
32 1.1 skrll #include "opt_arm_debug.h"
33 1.1 skrll #include "opt_bcm283x.h"
34 1.1 skrll #include "opt_cpuoptions.h"
35 1.1 skrll #include "opt_ddb.h"
36 1.1 skrll #include "opt_evbarm_boardtype.h"
37 1.1 skrll #include "opt_kgdb.h"
38 1.1 skrll #include "opt_fdt.h"
39 1.1 skrll #include "opt_rpi.h"
40 1.1 skrll #include "opt_vcprop.h"
41 1.1 skrll
42 1.1 skrll #include "sdhc.h"
43 1.1 skrll #include "bcmsdhost.h"
44 1.1 skrll #include "bcmdwctwo.h"
45 1.1 skrll #include "bcmspi.h"
46 1.1 skrll #include "bsciic.h"
47 1.1 skrll #include "plcom.h"
48 1.1 skrll #include "com.h"
49 1.1 skrll #include "genfb.h"
50 1.1 skrll #include "ukbd.h"
51 1.1 skrll
52 1.1 skrll #include <sys/param.h>
53 1.1 skrll #include <sys/bus.h>
54 1.1 skrll #include <sys/cpu.h>
55 1.1 skrll #include <sys/device.h>
56 1.1 skrll #include <sys/termios.h>
57 1.1 skrll
58 1.1 skrll #include <net/if_ether.h>
59 1.1 skrll
60 1.1 skrll #include <prop/proplib.h>
61 1.1 skrll
62 1.1 skrll #include <dev/fdt/fdtvar.h>
63 1.1 skrll
64 1.1 skrll #include <uvm/uvm_extern.h>
65 1.1 skrll
66 1.1 skrll #include <machine/bootconfig.h>
67 1.9 skrll
68 1.4 ryo #include <arm/armreg.h>
69 1.1 skrll #include <arm/cpufunc.h>
70 1.1 skrll
71 1.1 skrll #include <libfdt.h>
72 1.1 skrll
73 1.1 skrll #include <arm/broadcom/bcm2835reg.h>
74 1.1 skrll #include <arm/broadcom/bcm2835var.h>
75 1.4 ryo #include <arm/broadcom/bcm283x_platform.h>
76 1.1 skrll #include <arm/broadcom/bcm2835_intr.h>
77 1.1 skrll #include <arm/broadcom/bcm2835_mbox.h>
78 1.1 skrll #include <arm/broadcom/bcm2835_pmwdogvar.h>
79 1.1 skrll
80 1.1 skrll #include <evbarm/dev/plcomreg.h>
81 1.1 skrll #include <evbarm/dev/plcomvar.h>
82 1.9 skrll #include <evbarm/fdt/machdep.h>
83 1.1 skrll
84 1.1 skrll #include <dev/ic/ns16550reg.h>
85 1.1 skrll #include <dev/ic/comreg.h>
86 1.1 skrll
87 1.1 skrll #include <evbarm/rpi/vcio.h>
88 1.1 skrll #include <evbarm/rpi/vcpm.h>
89 1.1 skrll #include <evbarm/rpi/vcprop.h>
90 1.1 skrll
91 1.1 skrll #include <arm/fdt/arm_fdtvar.h>
92 1.1 skrll
93 1.1 skrll #include <arm/cortex/gtmr_var.h>
94 1.1 skrll
95 1.1 skrll #if NGENFB > 0
96 1.1 skrll #include <dev/videomode/videomode.h>
97 1.1 skrll #include <dev/videomode/edidvar.h>
98 1.1 skrll #include <dev/wscons/wsconsio.h>
99 1.1 skrll #endif
100 1.1 skrll
101 1.1 skrll #if NUKBD > 0
102 1.1 skrll #include <dev/usb/ukbdvar.h>
103 1.1 skrll #endif
104 1.1 skrll
105 1.1 skrll #ifdef DDB
106 1.1 skrll #include <machine/db_machdep.h>
107 1.1 skrll #include <ddb/db_sym.h>
108 1.1 skrll #include <ddb/db_extern.h>
109 1.1 skrll #endif
110 1.1 skrll
111 1.1 skrll void bcm283x_platform_early_putchar(vaddr_t, paddr_t, char c);
112 1.1 skrll void bcm2835_platform_early_putchar(char c);
113 1.1 skrll void bcm2836_platform_early_putchar(char c);
114 1.1 skrll void bcm2837_platform_early_putchar(char c);
115 1.1 skrll
116 1.1 skrll extern void bcmgenfb_set_console_dev(device_t dev);
117 1.1 skrll void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *));
118 1.1 skrll extern void bcmgenfb_ddb_trap_callback(int where);
119 1.1 skrll static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *);
120 1.1 skrll
121 1.4 ryo extern struct bus_space arm_generic_bs_tag;
122 1.4 ryo extern struct bus_space arm_generic_a4x_bs_tag;
123 1.1 skrll
124 1.1 skrll /* Prototypes for all the bus_space structure functions */
125 1.4 ryo bs_protos(arm_generic);
126 1.4 ryo bs_protos(arm_generic_a4x);
127 1.1 skrll bs_protos(bcm2835);
128 1.1 skrll bs_protos(bcm2835_a4x);
129 1.4 ryo bs_protos(bcm2836);
130 1.4 ryo bs_protos(bcm2836_a4x);
131 1.4 ryo
132 1.4 ryo struct bus_space bcm2835_bs_tag;
133 1.4 ryo struct bus_space bcm2835_a4x_bs_tag;
134 1.4 ryo struct bus_space bcm2836_bs_tag;
135 1.4 ryo struct bus_space bcm2836_a4x_bs_tag;
136 1.4 ryo
137 1.4 ryo int bcm283x_bs_map(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
138 1.5 jmcneill paddr_t bcm283x_bs_mmap(void *, bus_addr_t, off_t, int, int);
139 1.5 jmcneill paddr_t bcm283x_a4x_bs_mmap(void *, bus_addr_t, off_t, int, int);
140 1.4 ryo
141 1.4 ryo int
142 1.4 ryo bcm283x_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
143 1.4 ryo bus_space_handle_t *bshp)
144 1.4 ryo {
145 1.4 ryo u_long startpa, endpa, pa;
146 1.4 ryo vaddr_t va;
147 1.4 ryo
148 1.4 ryo /* Convert BA to PA */
149 1.4 ryo pa = ba & ~BCM2835_BUSADDR_CACHE_MASK;
150 1.4 ryo
151 1.4 ryo startpa = trunc_page(pa);
152 1.4 ryo endpa = round_page(pa + size);
153 1.4 ryo
154 1.4 ryo /* XXX use extent manager to check duplicate mapping */
155 1.4 ryo
156 1.4 ryo va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
157 1.4 ryo UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
158 1.4 ryo if (!va)
159 1.4 ryo return ENOMEM;
160 1.4 ryo
161 1.4 ryo *bshp = (bus_space_handle_t)(va + (pa - startpa));
162 1.4 ryo
163 1.5 jmcneill int pmapflags;
164 1.5 jmcneill if (flag & BUS_SPACE_MAP_PREFETCHABLE)
165 1.5 jmcneill pmapflags = PMAP_WRITE_COMBINE;
166 1.5 jmcneill else if (flag & BUS_SPACE_MAP_CACHEABLE)
167 1.5 jmcneill pmapflags = 0;
168 1.5 jmcneill else
169 1.5 jmcneill pmapflags = PMAP_NOCACHE;
170 1.4 ryo for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
171 1.4 ryo pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
172 1.4 ryo }
173 1.4 ryo pmap_update(pmap_kernel());
174 1.4 ryo
175 1.4 ryo return 0;
176 1.4 ryo }
177 1.4 ryo
178 1.5 jmcneill paddr_t
179 1.5 jmcneill bcm283x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
180 1.5 jmcneill {
181 1.5 jmcneill /* Convert BA to PA */
182 1.5 jmcneill const paddr_t pa = bpa & ~BCM2835_BUSADDR_CACHE_MASK;
183 1.5 jmcneill paddr_t bus_flags = 0;
184 1.5 jmcneill
185 1.5 jmcneill if (flags & BUS_SPACE_MAP_PREFETCHABLE)
186 1.5 jmcneill bus_flags |= ARM_MMAP_WRITECOMBINE;
187 1.5 jmcneill
188 1.5 jmcneill return arm_btop(pa + offset) | bus_flags;
189 1.5 jmcneill }
190 1.5 jmcneill
191 1.5 jmcneill paddr_t
192 1.5 jmcneill bcm283x_a4x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
193 1.5 jmcneill {
194 1.5 jmcneill /* Convert BA to PA */
195 1.5 jmcneill const paddr_t pa = bpa & ~BCM2835_BUSADDR_CACHE_MASK;
196 1.5 jmcneill paddr_t bus_flags = 0;
197 1.5 jmcneill
198 1.5 jmcneill if (flags & BUS_SPACE_MAP_PREFETCHABLE)
199 1.5 jmcneill bus_flags |= ARM_MMAP_WRITECOMBINE;
200 1.5 jmcneill
201 1.5 jmcneill return arm_btop(pa + 4 * offset) | bus_flags;
202 1.5 jmcneill }
203 1.5 jmcneill
204 1.4 ryo int
205 1.4 ryo bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
206 1.4 ryo bus_space_handle_t *bshp)
207 1.4 ryo {
208 1.4 ryo const struct pmap_devmap *pd;
209 1.4 ryo bool match = false;
210 1.4 ryo u_long pa;
211 1.4 ryo
212 1.4 ryo /* Attempt to find the PA device mapping */
213 1.4 ryo if (ba >= BCM2835_PERIPHERALS_BASE_BUS &&
214 1.4 ryo ba < BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_SIZE) {
215 1.4 ryo match = true;
216 1.4 ryo pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
217 1.4 ryo }
218 1.4 ryo
219 1.4 ryo if (match && (pd = pmap_devmap_find_pa(pa, size)) != NULL) {
220 1.4 ryo /* Device was statically mapped. */
221 1.4 ryo *bshp = pd->pd_va + (pa - pd->pd_pa);
222 1.4 ryo return 0;
223 1.4 ryo }
224 1.4 ryo
225 1.4 ryo return bcm283x_bs_map(t, ba, size, flag, bshp);
226 1.4 ryo }
227 1.4 ryo
228 1.4 ryo int
229 1.4 ryo bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag,
230 1.4 ryo bus_space_handle_t *bshp)
231 1.4 ryo {
232 1.4 ryo const struct pmap_devmap *pd;
233 1.4 ryo bool match = false;
234 1.4 ryo u_long pa;
235 1.4 ryo
236 1.4 ryo /* Attempt to find the PA device mapping */
237 1.4 ryo if (ba >= BCM2835_PERIPHERALS_BASE_BUS &&
238 1.4 ryo ba < BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_SIZE) {
239 1.4 ryo match = true;
240 1.4 ryo pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(ba);
241 1.4 ryo }
242 1.4 ryo
243 1.4 ryo if (ba >= BCM2836_ARM_LOCAL_BASE &&
244 1.4 ryo ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE) {
245 1.4 ryo match = true;
246 1.4 ryo pa = ba;
247 1.4 ryo }
248 1.4 ryo
249 1.4 ryo if (match && (pd = pmap_devmap_find_pa(pa, size)) != NULL) {
250 1.4 ryo /* Device was statically mapped. */
251 1.4 ryo *bshp = pd->pd_va + (pa - pd->pd_pa);
252 1.4 ryo return 0;
253 1.4 ryo }
254 1.4 ryo
255 1.4 ryo return bcm283x_bs_map(t, ba, size, flag, bshp);
256 1.4 ryo }
257 1.1 skrll
258 1.1 skrll struct arm32_dma_range bcm2835_dma_ranges[] = {
259 1.1 skrll [0] = {
260 1.1 skrll .dr_sysbase = 0,
261 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT,
262 1.1 skrll }
263 1.1 skrll };
264 1.1 skrll
265 1.1 skrll struct arm32_dma_range bcm2836_dma_ranges[] = {
266 1.1 skrll [0] = {
267 1.1 skrll .dr_sysbase = 0,
268 1.1 skrll .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT,
269 1.1 skrll }
270 1.1 skrll };
271 1.1 skrll
272 1.1 skrll
273 1.1 skrll #if defined(SOC_BCM2835)
274 1.1 skrll static const struct pmap_devmap *
275 1.1 skrll bcm2835_platform_devmap(void)
276 1.1 skrll {
277 1.1 skrll static const struct pmap_devmap devmap[] = {
278 1.1 skrll DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE,
279 1.1 skrll BCM2835_PERIPHERALS_SIZE), /* 16Mb */
280 1.1 skrll
281 1.1 skrll DEVMAP_ENTRY_END
282 1.1 skrll };
283 1.1 skrll
284 1.1 skrll return devmap;
285 1.1 skrll }
286 1.1 skrll #endif
287 1.1 skrll
288 1.1 skrll #if defined(SOC_BCM2836)
289 1.1 skrll static const struct pmap_devmap *
290 1.1 skrll bcm2836_platform_devmap(void)
291 1.1 skrll {
292 1.1 skrll static const struct pmap_devmap devmap[] = {
293 1.1 skrll DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE,
294 1.1 skrll BCM2835_PERIPHERALS_SIZE), /* 16Mb */
295 1.1 skrll
296 1.1 skrll DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE,
297 1.1 skrll BCM2836_ARM_LOCAL_SIZE),
298 1.1 skrll
299 1.1 skrll DEVMAP_ENTRY_END
300 1.1 skrll };
301 1.1 skrll
302 1.1 skrll return devmap;
303 1.1 skrll }
304 1.1 skrll #endif
305 1.1 skrll /*
306 1.1 skrll * Macros to translate between physical and virtual for a subset of the
307 1.1 skrll * kernel address space. *Not* for general use.
308 1.1 skrll */
309 1.1 skrll
310 1.4 ryo /*
311 1.4 ryo * AARCH64 defines its own
312 1.4 ryo */
313 1.4 ryo #if !(defined(KERN_VTOPHYS) && defined(KERN_PHYSTOV))
314 1.1 skrll #define KERN_VTOPDIFF KERNEL_BASE_VOFFSET
315 1.1 skrll #define KERN_VTOPHYS(va) ((paddr_t)((vaddr_t)va - KERN_VTOPDIFF))
316 1.1 skrll #define KERN_PHYSTOV(pa) ((vaddr_t)((paddr_t)pa + KERN_VTOPDIFF))
317 1.4 ryo #endif
318 1.1 skrll
319 1.1 skrll #ifndef RPI_FB_WIDTH
320 1.1 skrll #define RPI_FB_WIDTH 1280
321 1.1 skrll #endif
322 1.1 skrll #ifndef RPI_FB_HEIGHT
323 1.1 skrll #define RPI_FB_HEIGHT 720
324 1.1 skrll #endif
325 1.1 skrll
326 1.1 skrll int uart_clk = BCM2835_UART0_CLK;
327 1.1 skrll int core_clk;
328 1.1 skrll
329 1.1 skrll static struct {
330 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
331 1.1 skrll struct vcprop_tag_clockrate vbt_uartclockrate;
332 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
333 1.1 skrll struct vcprop_tag end;
334 1.1 skrll } vb_uart __cacheline_aligned = {
335 1.1 skrll .vb_hdr = {
336 1.1 skrll .vpb_len = sizeof(vb_uart),
337 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
338 1.1 skrll },
339 1.1 skrll .vbt_uartclockrate = {
340 1.1 skrll .tag = {
341 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
342 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
343 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
344 1.1 skrll },
345 1.1 skrll .id = VCPROP_CLK_UART
346 1.1 skrll },
347 1.1 skrll .vbt_vpuclockrate = {
348 1.1 skrll .tag = {
349 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
350 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate),
351 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
352 1.1 skrll },
353 1.1 skrll .id = VCPROP_CLK_CORE
354 1.1 skrll },
355 1.1 skrll .end = {
356 1.1 skrll .vpt_tag = VCPROPTAG_NULL
357 1.1 skrll }
358 1.1 skrll };
359 1.1 skrll
360 1.1 skrll static struct {
361 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
362 1.1 skrll struct vcprop_tag_fwrev vbt_fwrev;
363 1.1 skrll struct vcprop_tag_boardmodel vbt_boardmodel;
364 1.1 skrll struct vcprop_tag_boardrev vbt_boardrev;
365 1.1 skrll struct vcprop_tag_macaddr vbt_macaddr;
366 1.1 skrll struct vcprop_tag_memory vbt_memory;
367 1.1 skrll struct vcprop_tag_boardserial vbt_serial;
368 1.1 skrll struct vcprop_tag_dmachan vbt_dmachan;
369 1.1 skrll struct vcprop_tag_cmdline vbt_cmdline;
370 1.1 skrll struct vcprop_tag_clockrate vbt_emmcclockrate;
371 1.1 skrll struct vcprop_tag_clockrate vbt_armclockrate;
372 1.1 skrll struct vcprop_tag_clockrate vbt_vpuclockrate;
373 1.1 skrll struct vcprop_tag end;
374 1.1 skrll } vb __cacheline_aligned = {
375 1.1 skrll .vb_hdr = {
376 1.1 skrll .vpb_len = sizeof(vb),
377 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
378 1.1 skrll },
379 1.1 skrll .vbt_fwrev = {
380 1.1 skrll .tag = {
381 1.1 skrll .vpt_tag = VCPROPTAG_GET_FIRMWAREREV,
382 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev),
383 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
384 1.1 skrll },
385 1.1 skrll },
386 1.1 skrll .vbt_boardmodel = {
387 1.1 skrll .tag = {
388 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDMODEL,
389 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel),
390 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
391 1.1 skrll },
392 1.1 skrll },
393 1.1 skrll .vbt_boardrev = {
394 1.1 skrll .tag = {
395 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDREVISION,
396 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev),
397 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
398 1.1 skrll },
399 1.1 skrll },
400 1.1 skrll .vbt_macaddr = {
401 1.1 skrll .tag = {
402 1.1 skrll .vpt_tag = VCPROPTAG_GET_MACADDRESS,
403 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr),
404 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
405 1.1 skrll },
406 1.1 skrll },
407 1.1 skrll .vbt_memory = {
408 1.1 skrll .tag = {
409 1.1 skrll .vpt_tag = VCPROPTAG_GET_ARMMEMORY,
410 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_memory),
411 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
412 1.1 skrll },
413 1.1 skrll },
414 1.1 skrll .vbt_serial = {
415 1.1 skrll .tag = {
416 1.1 skrll .vpt_tag = VCPROPTAG_GET_BOARDSERIAL,
417 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_serial),
418 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
419 1.1 skrll },
420 1.1 skrll },
421 1.1 skrll .vbt_dmachan = {
422 1.1 skrll .tag = {
423 1.1 skrll .vpt_tag = VCPROPTAG_GET_DMACHAN,
424 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan),
425 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
426 1.1 skrll },
427 1.1 skrll },
428 1.1 skrll .vbt_cmdline = {
429 1.1 skrll .tag = {
430 1.1 skrll .vpt_tag = VCPROPTAG_GET_CMDLINE,
431 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline),
432 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
433 1.1 skrll },
434 1.1 skrll },
435 1.1 skrll .vbt_emmcclockrate = {
436 1.1 skrll .tag = {
437 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
438 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate),
439 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
440 1.1 skrll },
441 1.1 skrll .id = VCPROP_CLK_EMMC
442 1.1 skrll },
443 1.1 skrll .vbt_armclockrate = {
444 1.1 skrll .tag = {
445 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
446 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate),
447 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
448 1.1 skrll },
449 1.1 skrll .id = VCPROP_CLK_ARM
450 1.1 skrll },
451 1.1 skrll .vbt_vpuclockrate = {
452 1.1 skrll .tag = {
453 1.1 skrll .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
454 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate),
455 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST
456 1.1 skrll },
457 1.1 skrll .id = VCPROP_CLK_CORE
458 1.1 skrll },
459 1.1 skrll .end = {
460 1.1 skrll .vpt_tag = VCPROPTAG_NULL
461 1.1 skrll }
462 1.1 skrll };
463 1.1 skrll
464 1.1 skrll #if NGENFB > 0
465 1.1 skrll static struct {
466 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
467 1.1 skrll struct vcprop_tag_edidblock vbt_edid;
468 1.1 skrll struct vcprop_tag end;
469 1.1 skrll } vb_edid __cacheline_aligned = {
470 1.1 skrll .vb_hdr = {
471 1.1 skrll .vpb_len = sizeof(vb_edid),
472 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
473 1.1 skrll },
474 1.1 skrll .vbt_edid = {
475 1.1 skrll .tag = {
476 1.1 skrll .vpt_tag = VCPROPTAG_GET_EDID_BLOCK,
477 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid),
478 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
479 1.1 skrll },
480 1.1 skrll .blockno = 0,
481 1.1 skrll },
482 1.1 skrll .end = {
483 1.1 skrll .vpt_tag = VCPROPTAG_NULL
484 1.1 skrll }
485 1.1 skrll };
486 1.1 skrll
487 1.1 skrll static struct {
488 1.1 skrll struct vcprop_buffer_hdr vb_hdr;
489 1.1 skrll struct vcprop_tag_fbres vbt_res;
490 1.1 skrll struct vcprop_tag_fbres vbt_vres;
491 1.1 skrll struct vcprop_tag_fbdepth vbt_depth;
492 1.1 skrll struct vcprop_tag_fbalpha vbt_alpha;
493 1.1 skrll struct vcprop_tag_allocbuf vbt_allocbuf;
494 1.1 skrll struct vcprop_tag_blankscreen vbt_blank;
495 1.1 skrll struct vcprop_tag_fbpitch vbt_pitch;
496 1.1 skrll struct vcprop_tag end;
497 1.1 skrll } vb_setfb __cacheline_aligned = {
498 1.1 skrll .vb_hdr = {
499 1.1 skrll .vpb_len = sizeof(vb_setfb),
500 1.1 skrll .vpb_rcode = VCPROP_PROCESS_REQUEST,
501 1.1 skrll },
502 1.1 skrll .vbt_res = {
503 1.1 skrll .tag = {
504 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_RES,
505 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res),
506 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
507 1.1 skrll },
508 1.1 skrll .width = 0,
509 1.1 skrll .height = 0,
510 1.1 skrll },
511 1.1 skrll .vbt_vres = {
512 1.1 skrll .tag = {
513 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_VRES,
514 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres),
515 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
516 1.1 skrll },
517 1.1 skrll .width = 0,
518 1.1 skrll .height = 0,
519 1.1 skrll },
520 1.1 skrll .vbt_depth = {
521 1.1 skrll .tag = {
522 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_DEPTH,
523 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth),
524 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
525 1.1 skrll },
526 1.1 skrll .bpp = 32,
527 1.1 skrll },
528 1.1 skrll .vbt_alpha = {
529 1.1 skrll .tag = {
530 1.1 skrll .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE,
531 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha),
532 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
533 1.1 skrll },
534 1.1 skrll .state = VCPROP_ALPHA_IGNORED,
535 1.1 skrll },
536 1.1 skrll .vbt_allocbuf = {
537 1.1 skrll .tag = {
538 1.1 skrll .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER,
539 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf),
540 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
541 1.1 skrll },
542 1.1 skrll .address = PAGE_SIZE, /* alignment */
543 1.1 skrll },
544 1.1 skrll .vbt_blank = {
545 1.1 skrll .tag = {
546 1.1 skrll .vpt_tag = VCPROPTAG_BLANK_SCREEN,
547 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank),
548 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
549 1.1 skrll },
550 1.1 skrll .state = VCPROP_BLANK_OFF,
551 1.1 skrll },
552 1.1 skrll .vbt_pitch = {
553 1.1 skrll .tag = {
554 1.1 skrll .vpt_tag = VCPROPTAG_GET_FB_PITCH,
555 1.1 skrll .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch),
556 1.1 skrll .vpt_rcode = VCPROPTAG_REQUEST,
557 1.1 skrll },
558 1.1 skrll },
559 1.1 skrll .end = {
560 1.1 skrll .vpt_tag = VCPROPTAG_NULL,
561 1.1 skrll },
562 1.1 skrll };
563 1.1 skrll
564 1.1 skrll #endif
565 1.1 skrll
566 1.1 skrll static int rpi_video_on = WSDISPLAYIO_VIDEO_ON;
567 1.1 skrll
568 1.1 skrll #if defined(RPI_HWCURSOR)
569 1.1 skrll #define CURSOR_BITMAP_SIZE (64 * 8)
570 1.1 skrll #define CURSOR_ARGB_SIZE (64 * 64 * 4)
571 1.1 skrll static uint32_t hcursor = 0;
572 1.1 skrll static bus_addr_t pcursor = 0;
573 1.1 skrll static uint32_t *cmem = NULL;
574 1.1 skrll static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0;
575 1.1 skrll static uint32_t cursor_cmap[4];
576 1.1 skrll static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64];
577 1.1 skrll #endif
578 1.1 skrll
579 1.1 skrll u_int
580 1.1 skrll bcm283x_clk_get_rate_uart(void)
581 1.1 skrll {
582 1.1 skrll
583 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
584 1.1 skrll return vb_uart.vbt_uartclockrate.rate;
585 1.1 skrll return 0;
586 1.1 skrll }
587 1.1 skrll
588 1.1 skrll u_int
589 1.1 skrll bcm283x_clk_get_rate_vpu(void)
590 1.1 skrll {
591 1.1 skrll
592 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) &&
593 1.1 skrll vb.vbt_vpuclockrate.rate > 0) {
594 1.1 skrll return vb.vbt_vpuclockrate.rate;
595 1.1 skrll }
596 1.1 skrll return 0;
597 1.1 skrll }
598 1.1 skrll
599 1.1 skrll u_int
600 1.1 skrll bcm283x_clk_get_rate_emmc(void)
601 1.1 skrll {
602 1.1 skrll
603 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) &&
604 1.1 skrll vb.vbt_emmcclockrate.rate > 0) {
605 1.1 skrll return vb.vbt_emmcclockrate.rate;
606 1.1 skrll }
607 1.1 skrll return 0;
608 1.1 skrll }
609 1.1 skrll
610 1.1 skrll
611 1.1 skrll
612 1.1 skrll static void
613 1.1 skrll bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh)
614 1.1 skrll {
615 1.1 skrll uint32_t res;
616 1.1 skrll
617 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
618 1.8 christos KERN_VTOPHYS((vaddr_t)&vb_uart));
619 1.1 skrll
620 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
621 1.1 skrll
622 1.1 skrll cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart));
623 1.1 skrll
624 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag))
625 1.1 skrll uart_clk = vb_uart.vbt_uartclockrate.rate;
626 1.1 skrll if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag))
627 1.1 skrll core_clk = vb_uart.vbt_vpuclockrate.rate;
628 1.1 skrll }
629 1.1 skrll
630 1.1 skrll #if defined(SOC_BCM2835)
631 1.1 skrll static void
632 1.1 skrll bcm2835_uartinit(void)
633 1.1 skrll {
634 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
635 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
636 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
637 1.1 skrll
638 1.1 skrll bcm283x_uartinit(iot, ioh);
639 1.1 skrll }
640 1.1 skrll #endif
641 1.1 skrll
642 1.1 skrll #if defined(SOC_BCM2836)
643 1.1 skrll static void
644 1.1 skrll bcm2836_uartinit(void)
645 1.1 skrll {
646 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
647 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
648 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
649 1.1 skrll
650 1.1 skrll bcm283x_uartinit(iot, ioh);
651 1.1 skrll }
652 1.1 skrll #endif
653 1.1 skrll
654 1.1 skrll #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024)
655 1.1 skrll
656 1.1 skrll static size_t bcm283x_memorysize;
657 1.1 skrll
658 1.1 skrll static void
659 1.1 skrll bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh)
660 1.1 skrll {
661 1.1 skrll uint32_t res;
662 1.1 skrll
663 1.1 skrll bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
664 1.1 skrll #if (NSDHC > 0)
665 1.1 skrll (1 << VCPM_POWER_SDCARD) |
666 1.1 skrll #endif
667 1.1 skrll #if (NPLCOM > 0)
668 1.1 skrll (1 << VCPM_POWER_UART0) |
669 1.1 skrll #endif
670 1.1 skrll #if (NBCMDWCTWO > 0)
671 1.1 skrll (1 << VCPM_POWER_USB) |
672 1.1 skrll #endif
673 1.1 skrll #if (NBSCIIC > 0)
674 1.1 skrll (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) |
675 1.1 skrll /* (1 << VCPM_POWER_I2C2) | */
676 1.1 skrll #endif
677 1.1 skrll #if (NBCMSPI > 0)
678 1.1 skrll (1 << VCPM_POWER_SPI) |
679 1.1 skrll #endif
680 1.1 skrll 0) << 4);
681 1.1 skrll
682 1.8 christos bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC,
683 1.8 christos KERN_VTOPHYS((vaddr_t)&vb));
684 1.1 skrll
685 1.1 skrll bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res);
686 1.1 skrll
687 1.1 skrll cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb));
688 1.1 skrll
689 1.1 skrll if (!vcprop_buffer_success_p(&vb.vb_hdr)) {
690 1.1 skrll bootconfig.dramblocks = 1;
691 1.1 skrll bootconfig.dram[0].address = 0x0;
692 1.1 skrll bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT);
693 1.1 skrll return;
694 1.1 skrll }
695 1.1 skrll
696 1.1 skrll struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory;
697 1.1 skrll if (vcprop_tag_success_p(&vptp_mem->tag)) {
698 1.1 skrll size_t n = vcprop_tag_resplen(&vptp_mem->tag) /
699 1.1 skrll sizeof(struct vcprop_memory);
700 1.1 skrll
701 1.1 skrll bcm283x_memorysize = 0;
702 1.1 skrll bootconfig.dramblocks = 0;
703 1.1 skrll
704 1.1 skrll for (int i = 0; i < n && i < DRAM_BLOCKS; i++) {
705 1.1 skrll bootconfig.dram[i].address = vptp_mem->mem[i].base;
706 1.1 skrll bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size);
707 1.1 skrll bootconfig.dramblocks++;
708 1.1 skrll
709 1.1 skrll bcm283x_memorysize += vptp_mem->mem[i].size;
710 1.1 skrll }
711 1.1 skrll }
712 1.1 skrll
713 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
714 1.1 skrll curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
715 1.1 skrll
716 1.1 skrll #ifdef VERBOSE_INIT_ARM
717 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_memory.tag)) {
718 1.1 skrll printf("%s: memory size %d\n", __func__,
719 1.1 skrll vb.vbt_armclockrate.rate);
720 1.1 skrll }
721 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag))
722 1.1 skrll printf("%s: arm clock %d\n", __func__,
723 1.1 skrll vb.vbt_armclockrate.rate);
724 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_fwrev.tag))
725 1.1 skrll printf("%s: firmware rev %x\n", __func__,
726 1.1 skrll vb.vbt_fwrev.rev);
727 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag))
728 1.1 skrll printf("%s: board model %x\n", __func__,
729 1.1 skrll vb.vbt_boardmodel.model);
730 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_macaddr.tag))
731 1.8 christos printf("%s: mac-address %" PRIx64 "\n", __func__,
732 1.1 skrll vb.vbt_macaddr.addr);
733 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_boardrev.tag))
734 1.1 skrll printf("%s: board rev %x\n", __func__,
735 1.1 skrll vb.vbt_boardrev.rev);
736 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_serial.tag))
737 1.8 christos printf("%s: board serial %" PRIx64 "\n", __func__,
738 1.1 skrll vb.vbt_serial.sn);
739 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_dmachan.tag))
740 1.1 skrll printf("%s: DMA channel mask 0x%08x\n", __func__,
741 1.1 skrll vb.vbt_dmachan.mask);
742 1.1 skrll
743 1.1 skrll if (vcprop_tag_success_p(&vb.vbt_cmdline.tag))
744 1.1 skrll printf("%s: cmdline %s\n", __func__,
745 1.1 skrll vb.vbt_cmdline.cmdline);
746 1.1 skrll #endif
747 1.1 skrll }
748 1.1 skrll
749 1.1 skrll #if defined(SOC_BCM2835)
750 1.1 skrll static void
751 1.1 skrll bcm2835_bootparams(void)
752 1.1 skrll {
753 1.1 skrll const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
754 1.1 skrll const bus_space_tag_t iot = &bcm2835_bs_tag;
755 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
756 1.1 skrll
757 1.1 skrll bcm283x_bootparams(iot, ioh);
758 1.1 skrll }
759 1.1 skrll #endif
760 1.1 skrll
761 1.1 skrll #if defined(SOC_BCM2836)
762 1.1 skrll static void
763 1.1 skrll bcm2836_bootparams(void)
764 1.1 skrll {
765 1.1 skrll const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
766 1.1 skrll const bus_space_tag_t iot = &bcm2836_bs_tag;
767 1.1 skrll const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
768 1.1 skrll
769 1.1 skrll bcm283x_bootparams(iot, ioh);
770 1.1 skrll }
771 1.1 skrll
772 1.1 skrll static void
773 1.1 skrll bcm2836_bootstrap(void)
774 1.1 skrll {
775 1.4 ryo #define RPI_CPU_MAX 4
776 1.4 ryo
777 1.7 ryo #ifdef VERBOSE_INIT_ARM
778 1.7 ryo #define DPRINTF(...) printf(__VA_ARGS__)
779 1.7 ryo #else
780 1.7 ryo #define DPRINTF(...)
781 1.7 ryo #endif
782 1.7 ryo
783 1.4 ryo #ifdef MULTIPROCESSOR
784 1.7 ryo arm_cpu_max = RPI_CPU_MAX;
785 1.7 ryo DPRINTF("%s: %d cpus present\n", __func__, arm_cpu_max);
786 1.7 ryo #ifdef __arm__
787 1.1 skrll extern int cortex_mmuinfo;
788 1.1 skrll cortex_mmuinfo = armreg_ttbr_read();
789 1.7 ryo DPRINTF("%s: cortex_mmuinfo %x\n", __func__, cortex_mmuinfo);
790 1.1 skrll #endif
791 1.7 ryo #endif /* MULTIPROCESSOR */
792 1.7 ryo
793 1.7 ryo #ifdef __aarch64__
794 1.7 ryo /*
795 1.7 ryo * XXX: use psci_fdt_bootstrap()
796 1.7 ryo */
797 1.7 ryo extern void aarch64_mpstart(void);
798 1.7 ryo for (int i = 1; i < RPI_CPU_MAX; i++) {
799 1.7 ryo /*
800 1.7 ryo * Reference:
801 1.7 ryo * armstubs/armstub8.S
802 1.7 ryo * in https://github.com/raspberrypi/tools
803 1.7 ryo */
804 1.7 ryo volatile uint64_t *cpu_release_addr;
805 1.7 ryo #define RPI3_ARMSTUB8_SPINADDR_BASE 0x000000d8
806 1.8 christos cpu_release_addr = (void *)
807 1.7 ryo AARCH64_PA_TO_KVA(RPI3_ARMSTUB8_SPINADDR_BASE + i * 8);
808 1.8 christos *cpu_release_addr = aarch64_kern_vtophys((vaddr_t)aarch64_mpstart);
809 1.7 ryo
810 1.7 ryo /* need flush cache. secondary processors are cache disabled */
811 1.8 christos cpu_dcache_wb_range((vaddr_t)cpu_release_addr, sizeof(cpu_release_addr));
812 1.7 ryo __asm __volatile("sev" ::: "memory");
813 1.7 ryo
814 1.7 ryo #if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
815 1.7 ryo /* wait secondary processor's debug output */
816 1.7 ryo gtmr_delay(100000);
817 1.4 ryo #endif
818 1.7 ryo }
819 1.7 ryo #endif /* __aarch64__ */
820 1.1 skrll
821 1.7 ryo #ifdef __arm__
822 1.4 ryo /*
823 1.4 ryo * Even if no options MULTIPROCESSOR,
824 1.4 ryo * It is need to initialize the secondary CPU,
825 1.4 ryo * and go into wfi loop (cortex_mpstart),
826 1.4 ryo * otherwise system would be freeze...
827 1.4 ryo */
828 1.1 skrll extern void cortex_mpstart(void);
829 1.1 skrll
830 1.4 ryo for (size_t i = 1; i < RPI_CPU_MAX; i++) {
831 1.1 skrll bus_space_tag_t iot = &bcm2836_bs_tag;
832 1.1 skrll bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
833 1.1 skrll
834 1.1 skrll bus_space_write_4(iot, ioh,
835 1.1 skrll BCM2836_LOCAL_MAILBOX3_SETN(i),
836 1.1 skrll (uint32_t)cortex_mpstart);
837 1.1 skrll }
838 1.4 ryo #endif
839 1.7 ryo
840 1.4 ryo #ifdef MULTIPROCESSOR
841 1.1 skrll /* Wake up AP in case firmware has placed it in WFE state */
842 1.1 skrll __asm __volatile("sev" ::: "memory");
843 1.1 skrll
844 1.1 skrll for (int loop = 0; loop < 16; loop++) {
845 1.1 skrll if (arm_cpu_hatched == __BITS(arm_cpu_max - 1, 1))
846 1.1 skrll break;
847 1.1 skrll gtmr_delay(10000);
848 1.1 skrll }
849 1.1 skrll
850 1.1 skrll for (size_t i = 1; i < arm_cpu_max; i++) {
851 1.1 skrll if ((arm_cpu_hatched & (1 << i)) == 0) {
852 1.1 skrll printf("%s: warning: cpu%zu failed to hatch\n",
853 1.1 skrll __func__, i);
854 1.1 skrll }
855 1.1 skrll }
856 1.6 ryo #if defined(VERBOSE_INIT_ARM) && defined(EARLYCONS)
857 1.6 ryo /* for viewability of secondary processor's debug outputs */
858 1.6 ryo printf("\n");
859 1.6 ryo #endif
860 1.4 ryo #endif
861 1.1 skrll }
862 1.1 skrll
863 1.1 skrll #endif /* SOC_BCM2836 */
864 1.1 skrll
865 1.1 skrll #if NGENFB > 0
866 1.1 skrll static bool
867 1.1 skrll rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight)
868 1.1 skrll {
869 1.1 skrll char *x;
870 1.1 skrll
871 1.1 skrll if (strncmp(s, "disable", 7) == 0)
872 1.1 skrll return false;
873 1.1 skrll
874 1.1 skrll x = strchr(s, 'x');
875 1.1 skrll if (x) {
876 1.1 skrll *pwidth = strtoul(s, NULL, 10);
877 1.1 skrll *pheight = strtoul(x + 1, NULL, 10);
878 1.1 skrll }
879 1.1 skrll
880 1.1 skrll return true;
881 1.1 skrll }
882 1.1 skrll
883 1.1 skrll static bool
884 1.1 skrll rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight)
885 1.1 skrll {
886 1.1 skrll struct edid_info ei;
887 1.1 skrll uint8_t edid_data[1024];
888 1.1 skrll uint32_t res;
889 1.1 skrll int error;
890 1.1 skrll
891 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid,
892 1.1 skrll sizeof(vb_edid), &res);
893 1.1 skrll if (error) {
894 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
895 1.1 skrll return false;
896 1.1 skrll }
897 1.1 skrll
898 1.1 skrll if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) ||
899 1.1 skrll !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) ||
900 1.1 skrll vb_edid.vbt_edid.status != 0)
901 1.1 skrll return false;
902 1.1 skrll
903 1.1 skrll memset(edid_data, 0, sizeof(edid_data));
904 1.1 skrll memcpy(edid_data, vb_edid.vbt_edid.data,
905 1.1 skrll sizeof(vb_edid.vbt_edid.data));
906 1.1 skrll edid_parse(edid_data, &ei);
907 1.1 skrll #ifdef VERBOSE_INIT_ARM
908 1.1 skrll edid_print(&ei);
909 1.1 skrll #endif
910 1.1 skrll
911 1.1 skrll if (ei.edid_preferred_mode) {
912 1.1 skrll *pwidth = ei.edid_preferred_mode->hdisplay;
913 1.1 skrll *pheight = ei.edid_preferred_mode->vdisplay;
914 1.1 skrll }
915 1.1 skrll
916 1.1 skrll return true;
917 1.1 skrll }
918 1.1 skrll
919 1.1 skrll /*
920 1.1 skrll * Initialize framebuffer console.
921 1.1 skrll *
922 1.1 skrll * Some notes about boot parameters:
923 1.1 skrll * - If "fb=disable" is present, ignore framebuffer completely.
924 1.1 skrll * - If "fb=<width>x<height> is present, use the specified mode.
925 1.1 skrll * - If "console=fb" is present, attach framebuffer to console.
926 1.1 skrll */
927 1.1 skrll static bool
928 1.1 skrll rpi_fb_init(prop_dictionary_t dict, void *aux)
929 1.1 skrll {
930 1.1 skrll uint32_t width = 0, height = 0;
931 1.1 skrll uint32_t res;
932 1.1 skrll char *ptr;
933 1.1 skrll int integer;
934 1.1 skrll int error;
935 1.1 skrll bool is_bgr = true;
936 1.1 skrll
937 1.1 skrll if (get_bootconf_option(boot_args, "fb",
938 1.1 skrll BOOTOPT_TYPE_STRING, &ptr)) {
939 1.1 skrll if (rpi_fb_parse_mode(ptr, &width, &height) == false)
940 1.1 skrll return false;
941 1.1 skrll }
942 1.1 skrll if (width == 0 || height == 0) {
943 1.1 skrll rpi_fb_get_edid_mode(&width, &height);
944 1.1 skrll }
945 1.1 skrll if (width == 0 || height == 0) {
946 1.1 skrll width = RPI_FB_WIDTH;
947 1.1 skrll height = RPI_FB_HEIGHT;
948 1.1 skrll }
949 1.1 skrll
950 1.1 skrll vb_setfb.vbt_res.width = width;
951 1.1 skrll vb_setfb.vbt_res.height = height;
952 1.1 skrll vb_setfb.vbt_vres.width = width;
953 1.1 skrll vb_setfb.vbt_vres.height = height;
954 1.1 skrll error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb,
955 1.1 skrll sizeof(vb_setfb), &res);
956 1.1 skrll if (error) {
957 1.1 skrll printf("%s: mbox request failed (%d)\n", __func__, error);
958 1.1 skrll return false;
959 1.1 skrll }
960 1.1 skrll
961 1.1 skrll if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) ||
962 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) ||
963 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) ||
964 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) ||
965 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) ||
966 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) ||
967 1.1 skrll !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) {
968 1.1 skrll printf("%s: prop tag failed\n", __func__);
969 1.1 skrll return false;
970 1.1 skrll }
971 1.1 skrll
972 1.1 skrll #ifdef VERBOSE_INIT_ARM
973 1.1 skrll printf("%s: addr = 0x%x size = %d\n", __func__,
974 1.1 skrll vb_setfb.vbt_allocbuf.address,
975 1.1 skrll vb_setfb.vbt_allocbuf.size);
976 1.1 skrll printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp);
977 1.1 skrll printf("%s: pitch = %d\n", __func__,
978 1.1 skrll vb_setfb.vbt_pitch.linebytes);
979 1.1 skrll printf("%s: width = %d height = %d\n", __func__,
980 1.1 skrll vb_setfb.vbt_res.width, vb_setfb.vbt_res.height);
981 1.1 skrll printf("%s: vwidth = %d vheight = %d\n", __func__,
982 1.1 skrll vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height);
983 1.1 skrll #endif
984 1.1 skrll
985 1.1 skrll if (vb_setfb.vbt_allocbuf.address == 0 ||
986 1.1 skrll vb_setfb.vbt_allocbuf.size == 0 ||
987 1.1 skrll vb_setfb.vbt_res.width == 0 ||
988 1.1 skrll vb_setfb.vbt_res.height == 0 ||
989 1.1 skrll vb_setfb.vbt_vres.width == 0 ||
990 1.1 skrll vb_setfb.vbt_vres.height == 0 ||
991 1.1 skrll vb_setfb.vbt_pitch.linebytes == 0) {
992 1.1 skrll printf("%s: failed to set mode %ux%u\n", __func__,
993 1.1 skrll width, height);
994 1.1 skrll return false;
995 1.1 skrll }
996 1.1 skrll
997 1.1 skrll prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width);
998 1.1 skrll prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height);
999 1.1 skrll prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp);
1000 1.1 skrll prop_dictionary_set_uint16(dict, "linebytes",
1001 1.1 skrll vb_setfb.vbt_pitch.linebytes);
1002 1.1 skrll prop_dictionary_set_uint32(dict, "address",
1003 1.1 skrll vb_setfb.vbt_allocbuf.address);
1004 1.1 skrll
1005 1.1 skrll /*
1006 1.1 skrll * Old firmware uses BGR. New firmware uses RGB. The get and set
1007 1.1 skrll * pixel order mailbox properties don't seem to work. The firmware
1008 1.1 skrll * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it
1009 1.1 skrll * to determine pixel order. 0 means BGR, 1 means RGB.
1010 1.1 skrll *
1011 1.1 skrll * See https://github.com/raspberrypi/linux/issues/514
1012 1.1 skrll */
1013 1.1 skrll if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap",
1014 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1015 1.1 skrll is_bgr = integer == 0;
1016 1.1 skrll }
1017 1.1 skrll prop_dictionary_set_bool(dict, "is_bgr", is_bgr);
1018 1.1 skrll
1019 1.1 skrll /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */
1020 1.1 skrll if (get_bootconf_option(boot_args, "genfb.type",
1021 1.1 skrll BOOTOPT_TYPE_INT, &integer)) {
1022 1.1 skrll prop_dictionary_set_uint32(dict, "wsdisplay_type", integer);
1023 1.1 skrll }
1024 1.1 skrll
1025 1.1 skrll #if defined(RPI_HWCURSOR)
1026 1.1 skrll struct fdt_attach_args *faa = aux;
1027 1.1 skrll bus_space_handle_t hc;
1028 1.1 skrll
1029 1.1 skrll hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE,
1030 1.1 skrll MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK);
1031 1.1 skrll pcursor = rpi_lock_mem(hcursor);
1032 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1033 1.1 skrll printf("hcursor: %08x\n", hcursor);
1034 1.1 skrll printf("pcursor: %08x\n", (uint32_t)pcursor);
1035 1.1 skrll printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address);
1036 1.1 skrll #endif
1037 1.1 skrll if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE,
1038 1.1 skrll BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) {
1039 1.1 skrll printf("couldn't map cursor memory\n");
1040 1.1 skrll } else {
1041 1.1 skrll int i, j, k;
1042 1.1 skrll
1043 1.1 skrll cmem = bus_space_vaddr(faa->faa_bst, hc);
1044 1.1 skrll k = 0;
1045 1.1 skrll for (j = 0; j < 64; j++) {
1046 1.1 skrll for (i = 0; i < 64; i++) {
1047 1.1 skrll cmem[i + k] =
1048 1.1 skrll ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00;
1049 1.1 skrll }
1050 1.1 skrll k += 64;
1051 1.1 skrll }
1052 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1053 1.1 skrll rpi_fb_initcursor(pcursor, 0, 0);
1054 1.1 skrll #ifdef RPI_IOCTL_DEBUG
1055 1.1 skrll rpi_fb_movecursor(600, 400, 1);
1056 1.1 skrll #else
1057 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1058 1.1 skrll #endif
1059 1.1 skrll }
1060 1.1 skrll #endif
1061 1.1 skrll
1062 1.1 skrll return true;
1063 1.1 skrll }
1064 1.1 skrll
1065 1.1 skrll
1066 1.1 skrll #if defined(RPI_HWCURSOR)
1067 1.1 skrll static int
1068 1.1 skrll rpi_fb_do_cursor(struct wsdisplay_cursor *cur)
1069 1.1 skrll {
1070 1.1 skrll int pos = 0;
1071 1.1 skrll int shape = 0;
1072 1.1 skrll
1073 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
1074 1.1 skrll if (cursor_on != cur->enable) {
1075 1.1 skrll cursor_on = cur->enable;
1076 1.1 skrll pos = 1;
1077 1.1 skrll }
1078 1.1 skrll }
1079 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
1080 1.1 skrll
1081 1.1 skrll hot_x = cur->hot.x;
1082 1.1 skrll hot_y = cur->hot.y;
1083 1.1 skrll pos = 1;
1084 1.1 skrll shape = 1;
1085 1.1 skrll }
1086 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
1087 1.1 skrll
1088 1.1 skrll cursor_x = cur->pos.x;
1089 1.1 skrll cursor_y = cur->pos.y;
1090 1.1 skrll pos = 1;
1091 1.1 skrll }
1092 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
1093 1.1 skrll int i;
1094 1.1 skrll uint32_t val;
1095 1.1 skrll
1096 1.1 skrll for (i = 0; i < min(cur->cmap.count, 3); i++) {
1097 1.1 skrll val = (cur->cmap.red[i] << 16 ) |
1098 1.1 skrll (cur->cmap.green[i] << 8) |
1099 1.1 skrll (cur->cmap.blue[i] ) |
1100 1.1 skrll 0xff000000;
1101 1.1 skrll cursor_cmap[i + cur->cmap.index + 2] = val;
1102 1.1 skrll }
1103 1.1 skrll shape = 1;
1104 1.1 skrll }
1105 1.1 skrll if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
1106 1.1 skrll int err;
1107 1.1 skrll
1108 1.1 skrll err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE);
1109 1.1 skrll err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE);
1110 1.1 skrll if (err != 0)
1111 1.1 skrll return EFAULT;
1112 1.1 skrll shape = 1;
1113 1.1 skrll }
1114 1.1 skrll if (shape) {
1115 1.1 skrll int i, j, idx;
1116 1.1 skrll uint8_t mask;
1117 1.1 skrll
1118 1.1 skrll for (i = 0; i < CURSOR_BITMAP_SIZE; i++) {
1119 1.1 skrll mask = 0x01;
1120 1.1 skrll for (j = 0; j < 8; j++) {
1121 1.1 skrll idx = ((cursor_mask[i] & mask) ? 2 : 0) |
1122 1.1 skrll ((cursor_bitmap[i] & mask) ? 1 : 0);
1123 1.1 skrll cmem[i * 8 + j] = cursor_cmap[idx];
1124 1.1 skrll mask = mask << 1;
1125 1.1 skrll }
1126 1.1 skrll }
1127 1.1 skrll /* just in case */
1128 1.1 skrll cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE);
1129 1.1 skrll rpi_fb_initcursor(pcursor, hot_x, hot_y);
1130 1.1 skrll }
1131 1.1 skrll if (pos) {
1132 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1133 1.1 skrll }
1134 1.1 skrll return 0;
1135 1.1 skrll }
1136 1.1 skrll #endif
1137 1.1 skrll
1138 1.1 skrll static int
1139 1.1 skrll rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
1140 1.1 skrll {
1141 1.1 skrll
1142 1.1 skrll switch (cmd) {
1143 1.1 skrll case WSDISPLAYIO_SVIDEO:
1144 1.1 skrll {
1145 1.1 skrll int d = *(int *)data;
1146 1.1 skrll if (d == rpi_video_on)
1147 1.1 skrll return 0;
1148 1.1 skrll rpi_video_on = d;
1149 1.1 skrll rpi_fb_set_video(d);
1150 1.1 skrll #if defined(RPI_HWCURSOR)
1151 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y,
1152 1.1 skrll d ? cursor_on : 0);
1153 1.1 skrll #endif
1154 1.1 skrll }
1155 1.1 skrll return 0;
1156 1.1 skrll case WSDISPLAYIO_GVIDEO:
1157 1.1 skrll *(int *)data = rpi_video_on;
1158 1.1 skrll return 0;
1159 1.1 skrll #if defined(RPI_HWCURSOR)
1160 1.1 skrll case WSDISPLAYIO_GCURPOS:
1161 1.1 skrll {
1162 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1163 1.1 skrll
1164 1.1 skrll cp->x = cursor_x;
1165 1.1 skrll cp->y = cursor_y;
1166 1.1 skrll }
1167 1.1 skrll return 0;
1168 1.1 skrll case WSDISPLAYIO_SCURPOS:
1169 1.1 skrll {
1170 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1171 1.1 skrll
1172 1.1 skrll cursor_x = cp->x;
1173 1.1 skrll cursor_y = cp->y;
1174 1.1 skrll rpi_fb_movecursor(cursor_x, cursor_y, cursor_on);
1175 1.1 skrll }
1176 1.1 skrll return 0;
1177 1.1 skrll case WSDISPLAYIO_GCURMAX:
1178 1.1 skrll {
1179 1.1 skrll struct wsdisplay_curpos *cp = (void *)data;
1180 1.1 skrll
1181 1.1 skrll cp->x = 64;
1182 1.1 skrll cp->y = 64;
1183 1.1 skrll }
1184 1.1 skrll return 0;
1185 1.1 skrll case WSDISPLAYIO_SCURSOR:
1186 1.1 skrll {
1187 1.1 skrll struct wsdisplay_cursor *cursor = (void *)data;
1188 1.1 skrll
1189 1.1 skrll return rpi_fb_do_cursor(cursor);
1190 1.1 skrll }
1191 1.1 skrll #endif
1192 1.1 skrll default:
1193 1.1 skrll return EPASSTHROUGH;
1194 1.1 skrll }
1195 1.1 skrll }
1196 1.1 skrll
1197 1.1 skrll #endif
1198 1.1 skrll
1199 1.1 skrll SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)")
1200 1.1 skrll {
1201 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1202 1.1 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
1203 1.1 skrll NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
1204 1.1 skrll
1205 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1206 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1207 1.1 skrll CTLTYPE_INT, "firmware_revision", NULL, NULL, 0,
1208 1.1 skrll &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1209 1.1 skrll
1210 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1211 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1212 1.1 skrll CTLTYPE_INT, "board_model", NULL, NULL, 0,
1213 1.1 skrll &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1214 1.1 skrll
1215 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1216 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY,
1217 1.1 skrll CTLTYPE_INT, "board_revision", NULL, NULL, 0,
1218 1.1 skrll &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1219 1.1 skrll
1220 1.1 skrll sysctl_createv(clog, 0, NULL, NULL,
1221 1.1 skrll CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE,
1222 1.1 skrll CTLTYPE_QUAD, "serial", NULL, NULL, 0,
1223 1.1 skrll &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL);
1224 1.1 skrll }
1225 1.1 skrll
1226 1.1 skrll #if defined(SOC_BCM2835)
1227 1.1 skrll static void
1228 1.1 skrll bcm2835_platform_bootstrap(void)
1229 1.1 skrll {
1230 1.1 skrll
1231 1.4 ryo bcm2835_bs_tag = arm_generic_bs_tag;
1232 1.4 ryo bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag;
1233 1.4 ryo
1234 1.4 ryo bcm2835_bs_tag.bs_map = bcm2835_bs_map;
1235 1.5 jmcneill bcm2835_bs_tag.bs_mmap = bcm283x_bs_mmap;
1236 1.4 ryo bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map;
1237 1.5 jmcneill bcm2835_a4x_bs_tag.bs_mmap = bcm283x_a4x_bs_mmap;
1238 1.4 ryo
1239 1.1 skrll fdtbus_set_decoderegprop(false);
1240 1.1 skrll
1241 1.1 skrll bcm2835_uartinit();
1242 1.1 skrll
1243 1.1 skrll bcm2835_bootparams();
1244 1.1 skrll }
1245 1.1 skrll #endif
1246 1.1 skrll
1247 1.1 skrll #if defined(SOC_BCM2836)
1248 1.1 skrll static void
1249 1.1 skrll bcm2836_platform_bootstrap(void)
1250 1.1 skrll {
1251 1.1 skrll
1252 1.4 ryo bcm2836_bs_tag = arm_generic_bs_tag;
1253 1.4 ryo bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag;
1254 1.4 ryo
1255 1.4 ryo bcm2836_bs_tag.bs_map = bcm2836_bs_map;
1256 1.5 jmcneill bcm2836_bs_tag.bs_mmap = bcm283x_bs_mmap;
1257 1.4 ryo bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map;
1258 1.5 jmcneill bcm2836_a4x_bs_tag.bs_mmap = bcm283x_a4x_bs_mmap;
1259 1.4 ryo
1260 1.1 skrll fdtbus_set_decoderegprop(false);
1261 1.1 skrll
1262 1.1 skrll bcm2836_uartinit();
1263 1.1 skrll
1264 1.1 skrll bcm2836_bootparams();
1265 1.1 skrll
1266 1.1 skrll bcm2836_bootstrap();
1267 1.1 skrll }
1268 1.1 skrll #endif
1269 1.1 skrll
1270 1.1 skrll #if defined(SOC_BCM2835)
1271 1.1 skrll static void
1272 1.1 skrll bcm2835_platform_init_attach_args(struct fdt_attach_args *faa)
1273 1.1 skrll {
1274 1.1 skrll
1275 1.1 skrll faa->faa_bst = &bcm2835_bs_tag;
1276 1.1 skrll faa->faa_a4x_bst = &bcm2835_a4x_bs_tag;
1277 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1278 1.1 skrll
1279 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges;
1280 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges);
1281 1.1 skrll bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize;
1282 1.1 skrll }
1283 1.1 skrll #endif
1284 1.1 skrll
1285 1.1 skrll #if defined(SOC_BCM2836)
1286 1.1 skrll static void
1287 1.1 skrll bcm2836_platform_init_attach_args(struct fdt_attach_args *faa)
1288 1.1 skrll {
1289 1.1 skrll
1290 1.1 skrll faa->faa_bst = &bcm2836_bs_tag;
1291 1.1 skrll faa->faa_a4x_bst = &bcm2836_a4x_bs_tag;
1292 1.1 skrll faa->faa_dmat = &bcm2835_bus_dma_tag;
1293 1.1 skrll
1294 1.1 skrll bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges;
1295 1.1 skrll bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges);
1296 1.1 skrll bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize;
1297 1.1 skrll }
1298 1.1 skrll #endif
1299 1.1 skrll
1300 1.1 skrll
1301 1.1 skrll void
1302 1.1 skrll bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c)
1303 1.1 skrll {
1304 1.1 skrll volatile uint32_t *uartaddr =
1305 1.4 ryo cpu_earlydevice_va_p() ?
1306 1.1 skrll (volatile uint32_t *)va :
1307 1.1 skrll (volatile uint32_t *)pa;
1308 1.1 skrll
1309 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0)
1310 1.1 skrll continue;
1311 1.1 skrll
1312 1.1 skrll uartaddr[PL01XCOM_DR / 4] = c;
1313 1.1 skrll
1314 1.1 skrll while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0)
1315 1.1 skrll continue;
1316 1.1 skrll }
1317 1.1 skrll
1318 1.1 skrll void
1319 1.1 skrll bcm2835_platform_early_putchar(char c)
1320 1.1 skrll {
1321 1.1 skrll paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1322 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1323 1.1 skrll
1324 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1325 1.1 skrll }
1326 1.1 skrll
1327 1.1 skrll void
1328 1.1 skrll bcm2836_platform_early_putchar(char c)
1329 1.1 skrll {
1330 1.1 skrll paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE);
1331 1.1 skrll vaddr_t va = BCM2835_IOPHYSTOVIRT(pa);
1332 1.1 skrll
1333 1.1 skrll bcm283x_platform_early_putchar(va, pa, c);
1334 1.1 skrll }
1335 1.1 skrll
1336 1.1 skrll #define BCM283x_REF_FREQ 19200000
1337 1.1 skrll
1338 1.1 skrll void
1339 1.1 skrll bcm2837_platform_early_putchar(char c)
1340 1.1 skrll {
1341 1.1 skrll #define AUCONSADDR_PA BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE)
1342 1.1 skrll #define AUCONSADDR_VA BCM2835_IOPHYSTOVIRT(AUCONSADDR_PA)
1343 1.1 skrll volatile uint32_t *uartaddr =
1344 1.4 ryo cpu_earlydevice_va_p() ?
1345 1.1 skrll (volatile uint32_t *)AUCONSADDR_VA :
1346 1.1 skrll (volatile uint32_t *)AUCONSADDR_PA;
1347 1.1 skrll
1348 1.1 skrll while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
1349 1.1 skrll ;
1350 1.1 skrll
1351 1.1 skrll uartaddr[com_data] = c;
1352 1.1 skrll }
1353 1.1 skrll
1354 1.1 skrll static void
1355 1.1 skrll bcm283x_platform_device_register(device_t dev, void *aux)
1356 1.1 skrll {
1357 1.1 skrll prop_dictionary_t dict = device_properties(dev);
1358 1.1 skrll
1359 1.1 skrll if (device_is_a(dev, "bcmdmac") &&
1360 1.1 skrll vcprop_tag_success_p(&vb.vbt_dmachan.tag)) {
1361 1.1 skrll prop_dictionary_set_uint32(dict,
1362 1.1 skrll "chanmask", vb.vbt_dmachan.mask);
1363 1.1 skrll }
1364 1.1 skrll #if NSDHC > 0
1365 1.1 skrll if (booted_device == NULL &&
1366 1.1 skrll device_is_a(dev, "ld") &&
1367 1.1 skrll device_is_a(device_parent(dev), "sdmmc")) {
1368 1.1 skrll booted_partition = 0;
1369 1.1 skrll booted_device = dev;
1370 1.1 skrll }
1371 1.1 skrll #endif
1372 1.1 skrll if (device_is_a(dev, "usmsc") &&
1373 1.1 skrll vcprop_tag_success_p(&vb.vbt_macaddr.tag)) {
1374 1.1 skrll const uint8_t enaddr[ETHER_ADDR_LEN] = {
1375 1.1 skrll (vb.vbt_macaddr.addr >> 0) & 0xff,
1376 1.1 skrll (vb.vbt_macaddr.addr >> 8) & 0xff,
1377 1.1 skrll (vb.vbt_macaddr.addr >> 16) & 0xff,
1378 1.1 skrll (vb.vbt_macaddr.addr >> 24) & 0xff,
1379 1.1 skrll (vb.vbt_macaddr.addr >> 32) & 0xff,
1380 1.1 skrll (vb.vbt_macaddr.addr >> 40) & 0xff
1381 1.1 skrll };
1382 1.1 skrll
1383 1.1 skrll prop_data_t pd = prop_data_create_data(enaddr, ETHER_ADDR_LEN);
1384 1.1 skrll KASSERT(pd != NULL);
1385 1.1 skrll if (prop_dictionary_set(device_properties(dev), "mac-address",
1386 1.1 skrll pd) == false) {
1387 1.1 skrll aprint_error_dev(dev,
1388 1.1 skrll "WARNING: Unable to set mac-address property\n");
1389 1.1 skrll }
1390 1.1 skrll prop_object_release(pd);
1391 1.1 skrll }
1392 1.1 skrll
1393 1.1 skrll #if NGENFB > 0
1394 1.1 skrll if (device_is_a(dev, "genfb")) {
1395 1.1 skrll char *ptr;
1396 1.1 skrll
1397 1.1 skrll bcmgenfb_set_console_dev(dev);
1398 1.1 skrll bcmgenfb_set_ioctl(&rpi_ioctl);
1399 1.1 skrll #ifdef DDB
1400 1.1 skrll db_trap_callback = bcmgenfb_ddb_trap_callback;
1401 1.1 skrll #endif
1402 1.1 skrll if (rpi_fb_init(dict, aux) == false)
1403 1.1 skrll return;
1404 1.1 skrll if (get_bootconf_option(boot_args, "console",
1405 1.1 skrll BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
1406 1.1 skrll prop_dictionary_set_bool(dict, "is_console", true);
1407 1.1 skrll #if NUKBD > 0
1408 1.1 skrll /* allow ukbd to be the console keyboard */
1409 1.1 skrll ukbd_cnattach();
1410 1.1 skrll #endif
1411 1.1 skrll } else {
1412 1.1 skrll prop_dictionary_set_bool(dict, "is_console", false);
1413 1.1 skrll }
1414 1.1 skrll }
1415 1.1 skrll #endif
1416 1.1 skrll }
1417 1.1 skrll
1418 1.1 skrll static u_int
1419 1.1 skrll bcm283x_platform_uart_freq(void)
1420 1.1 skrll {
1421 1.1 skrll
1422 1.1 skrll return uart_clk;
1423 1.1 skrll }
1424 1.1 skrll
1425 1.1 skrll #if defined(SOC_BCM2835)
1426 1.1 skrll static const struct arm_platform bcm2835_platform = {
1427 1.1 skrll .devmap = bcm2835_platform_devmap,
1428 1.1 skrll .bootstrap = bcm2835_platform_bootstrap,
1429 1.1 skrll .init_attach_args = bcm2835_platform_init_attach_args,
1430 1.1 skrll .early_putchar = bcm2835_platform_early_putchar,
1431 1.1 skrll .device_register = bcm283x_platform_device_register,
1432 1.1 skrll .reset = bcm2835_system_reset,
1433 1.1 skrll .delay = bcm2835_tmr_delay,
1434 1.1 skrll .uart_freq = bcm283x_platform_uart_freq,
1435 1.1 skrll };
1436 1.1 skrll
1437 1.1 skrll ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform);
1438 1.1 skrll #endif
1439 1.1 skrll
1440 1.1 skrll #if defined(SOC_BCM2836)
1441 1.1 skrll static u_int
1442 1.1 skrll bcm2837_platform_uart_freq(void)
1443 1.1 skrll {
1444 1.1 skrll
1445 1.1 skrll return core_clk * 2;
1446 1.1 skrll }
1447 1.1 skrll
1448 1.1 skrll static const struct arm_platform bcm2836_platform = {
1449 1.1 skrll .devmap = bcm2836_platform_devmap,
1450 1.1 skrll .bootstrap = bcm2836_platform_bootstrap,
1451 1.1 skrll .init_attach_args = bcm2836_platform_init_attach_args,
1452 1.1 skrll .early_putchar = bcm2836_platform_early_putchar,
1453 1.1 skrll .device_register = bcm283x_platform_device_register,
1454 1.1 skrll .reset = bcm2835_system_reset,
1455 1.1 skrll .delay = gtmr_delay,
1456 1.1 skrll .uart_freq = bcm283x_platform_uart_freq,
1457 1.1 skrll };
1458 1.1 skrll
1459 1.1 skrll static const struct arm_platform bcm2837_platform = {
1460 1.1 skrll .devmap = bcm2836_platform_devmap,
1461 1.1 skrll .bootstrap = bcm2836_platform_bootstrap,
1462 1.1 skrll .init_attach_args = bcm2836_platform_init_attach_args,
1463 1.1 skrll .early_putchar = bcm2837_platform_early_putchar,
1464 1.1 skrll .device_register = bcm283x_platform_device_register,
1465 1.1 skrll .reset = bcm2835_system_reset,
1466 1.1 skrll .delay = gtmr_delay,
1467 1.1 skrll .uart_freq = bcm2837_platform_uart_freq,
1468 1.1 skrll };
1469 1.1 skrll
1470 1.1 skrll ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform);
1471 1.1 skrll ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform);
1472 1.1 skrll #endif
1473