bcm283x_platform.c revision 1.26
1 /* $NetBSD: bcm283x_platform.c,v 1.26 2019/09/28 07:39:30 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.26 2019/09/28 07:39:30 skrll Exp $"); 31 32 #include "opt_arm_debug.h" 33 #include "opt_bcm283x.h" 34 #include "opt_cpuoptions.h" 35 #include "opt_ddb.h" 36 #include "opt_evbarm_boardtype.h" 37 #include "opt_kgdb.h" 38 #include "opt_fdt.h" 39 #include "opt_rpi.h" 40 #include "opt_vcprop.h" 41 42 #include "sdhc.h" 43 #include "bcmsdhost.h" 44 #include "bcmdwctwo.h" 45 #include "bcmspi.h" 46 #include "bsciic.h" 47 #include "plcom.h" 48 #include "com.h" 49 #include "genfb.h" 50 #include "ukbd.h" 51 52 #include <sys/param.h> 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 #include <sys/device.h> 56 #include <sys/termios.h> 57 58 #include <net/if_ether.h> 59 60 #include <prop/proplib.h> 61 62 #include <dev/fdt/fdtvar.h> 63 64 #include <uvm/uvm_extern.h> 65 66 #include <machine/bootconfig.h> 67 68 #include <arm/armreg.h> 69 #include <arm/cpufunc.h> 70 71 #include <libfdt.h> 72 73 #include <arm/broadcom/bcm2835reg.h> 74 #include <arm/broadcom/bcm2835var.h> 75 #include <arm/broadcom/bcm283x_platform.h> 76 #include <arm/broadcom/bcm2835_intr.h> 77 #include <arm/broadcom/bcm2835_mbox.h> 78 #include <arm/broadcom/bcm2835_pmwdogvar.h> 79 80 #include <evbarm/dev/plcomreg.h> 81 #include <evbarm/dev/plcomvar.h> 82 #include <evbarm/fdt/machdep.h> 83 84 #include <dev/ic/ns16550reg.h> 85 #include <dev/ic/comreg.h> 86 87 #include <evbarm/rpi/vcio.h> 88 #include <evbarm/rpi/vcpm.h> 89 #include <evbarm/rpi/vcprop.h> 90 91 #include <arm/fdt/arm_fdtvar.h> 92 93 #include <arm/cortex/gtmr_var.h> 94 95 #if NGENFB > 0 96 #include <dev/videomode/videomode.h> 97 #include <dev/videomode/edidvar.h> 98 #include <dev/wscons/wsconsio.h> 99 #endif 100 101 #if NUKBD > 0 102 #include <dev/usb/ukbdvar.h> 103 #endif 104 105 #ifdef DDB 106 #include <machine/db_machdep.h> 107 #include <ddb/db_sym.h> 108 #include <ddb/db_extern.h> 109 #endif 110 111 #define RPI_CPU_MAX 4 112 113 void bcm2835_platform_early_putchar(char c); 114 void bcm2836_platform_early_putchar(char c); 115 void bcm2837_platform_early_putchar(char c); 116 void bcm2838_platform_early_putchar(char c); 117 118 extern void bcmgenfb_set_console_dev(device_t dev); 119 void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *)); 120 extern void bcmgenfb_ddb_trap_callback(int where); 121 static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *); 122 123 extern struct bus_space arm_generic_bs_tag; 124 extern struct bus_space arm_generic_a4x_bs_tag; 125 126 /* Prototypes for all the bus_space structure functions */ 127 bs_protos(arm_generic); 128 bs_protos(arm_generic_a4x); 129 bs_protos(bcm2835); 130 bs_protos(bcm2835_a4x); 131 bs_protos(bcm2836); 132 bs_protos(bcm2836_a4x); 133 bs_protos(bcm2838); 134 bs_protos(bcm2838_a4x); 135 136 struct bus_space bcm2835_bs_tag; 137 struct bus_space bcm2835_a4x_bs_tag; 138 struct bus_space bcm2836_bs_tag; 139 struct bus_space bcm2836_a4x_bs_tag; 140 struct bus_space bcm2838_bs_tag; 141 struct bus_space bcm2838_a4x_bs_tag; 142 143 static paddr_t bcm2835_bus_to_phys(bus_addr_t); 144 static paddr_t bcm2836_bus_to_phys(bus_addr_t); 145 static paddr_t bcm2838_bus_to_phys(bus_addr_t); 146 147 #ifdef VERBOSE_INIT_ARM 148 #define VPRINTF(...) printf(__VA_ARGS__) 149 #else 150 #define VPRINTF(...) __nothing 151 #endif 152 153 static paddr_t 154 bcm2835_bus_to_phys(bus_addr_t ba) 155 { 156 157 /* Attempt to find the PA device mapping */ 158 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 159 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 160 return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba); 161 162 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 163 } 164 165 static paddr_t 166 bcm2836_bus_to_phys(bus_addr_t ba) 167 { 168 169 /* Attempt to find the PA device mapping */ 170 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 171 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 172 return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba); 173 174 if (ba >= BCM2836_ARM_LOCAL_BASE && 175 ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE) 176 return ba; 177 178 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 179 } 180 181 static paddr_t 182 bcm2838_bus_to_phys(bus_addr_t ba) 183 { 184 185 /* Attempt to find the PA device mapping */ 186 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 187 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 188 return BCM2838_PERIPHERALS_BUS_TO_PHYS(ba); 189 190 if (ba >= BCM2838_ARM_LOCAL_BASE && 191 ba < BCM2838_ARM_LOCAL_BASE + BCM2838_ARM_LOCAL_SIZE) 192 return ba; 193 194 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 195 } 196 197 int 198 bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 199 bus_space_handle_t *bshp) 200 { 201 const paddr_t pa = bcm2835_bus_to_phys(ba); 202 203 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 204 } 205 206 paddr_t 207 bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 208 { 209 const paddr_t pa = bcm2835_bus_to_phys(ba); 210 211 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 212 } 213 214 paddr_t 215 bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 216 { 217 218 return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags); 219 } 220 221 int 222 bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 223 bus_space_handle_t *bshp) 224 { 225 const paddr_t pa = bcm2836_bus_to_phys(ba); 226 227 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 228 } 229 230 paddr_t 231 bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 232 { 233 const paddr_t pa = bcm2836_bus_to_phys(ba); 234 235 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 236 } 237 238 paddr_t 239 bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 240 { 241 242 return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags); 243 } 244 245 int 246 bcm2838_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 247 bus_space_handle_t *bshp) 248 { 249 const paddr_t pa = bcm2838_bus_to_phys(ba); 250 251 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 252 } 253 254 paddr_t 255 bcm2838_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 256 { 257 const paddr_t pa = bcm2838_bus_to_phys(ba); 258 259 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 260 } 261 262 paddr_t 263 bcm2838_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 264 { 265 266 return bcm2838_bs_mmap(t, ba, 4 * offset, prot, flags); 267 } 268 269 struct arm32_dma_range bcm2835_dma_ranges[] = { 270 [0] = { 271 .dr_sysbase = 0, 272 .dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT, 273 } 274 }; 275 276 struct arm32_dma_range bcm2836_dma_ranges[] = { 277 [0] = { 278 .dr_sysbase = 0, 279 .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT, 280 } 281 }; 282 283 struct arm32_dma_range bcm2838_dma_ranges[] = { 284 [0] = { 285 .dr_sysbase = 0, 286 .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT, 287 } 288 }; 289 290 291 #if defined(SOC_BCM2835) 292 static const struct pmap_devmap * 293 bcm2835_platform_devmap(void) 294 { 295 static const struct pmap_devmap devmap[] = { 296 DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE, 297 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 298 299 DEVMAP_ENTRY_END 300 }; 301 302 return devmap; 303 } 304 #endif 305 306 #if defined(SOC_BCM2836) 307 static const struct pmap_devmap * 308 bcm2836_platform_devmap(void) 309 { 310 static const struct pmap_devmap devmap[] = { 311 DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE, 312 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 313 DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE, 314 BCM2836_ARM_LOCAL_SIZE), 315 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 316 /* for fdt cpu spin-table */ 317 DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 318 BCM2836_ARM_SMP_SIZE), 319 #endif 320 DEVMAP_ENTRY_END 321 }; 322 323 return devmap; 324 } 325 326 static const struct pmap_devmap * 327 bcm2838_platform_devmap(void) 328 { 329 static const struct pmap_devmap devmap[] = { 330 DEVMAP_ENTRY(BCM2838_PERIPHERALS_VBASE, BCM2838_PERIPHERALS_BASE, 331 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 332 DEVMAP_ENTRY(BCM2838_ARM_LOCAL_VBASE, BCM2838_ARM_LOCAL_BASE, 333 BCM2838_ARM_LOCAL_SIZE), 334 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 335 /* for fdt cpu spin-table */ 336 DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 337 BCM2836_ARM_SMP_SIZE), 338 #endif 339 DEVMAP_ENTRY_END 340 }; 341 342 return devmap; 343 } 344 #endif 345 346 /* 347 * Macros to translate between physical and virtual for a subset of the 348 * kernel address space. *Not* for general use. 349 */ 350 351 #ifndef RPI_FB_WIDTH 352 #define RPI_FB_WIDTH 1280 353 #endif 354 #ifndef RPI_FB_HEIGHT 355 #define RPI_FB_HEIGHT 720 356 #endif 357 358 int uart_clk = BCM2835_UART0_CLK; 359 int core_clk; 360 361 static struct { 362 struct vcprop_buffer_hdr vb_hdr; 363 struct vcprop_tag_clockrate vbt_uartclockrate; 364 struct vcprop_tag_clockrate vbt_vpuclockrate; 365 struct vcprop_tag end; 366 } vb_uart __cacheline_aligned = { 367 .vb_hdr = { 368 .vpb_len = sizeof(vb_uart), 369 .vpb_rcode = VCPROP_PROCESS_REQUEST, 370 }, 371 .vbt_uartclockrate = { 372 .tag = { 373 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 374 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate), 375 .vpt_rcode = VCPROPTAG_REQUEST 376 }, 377 .id = VCPROP_CLK_UART 378 }, 379 .vbt_vpuclockrate = { 380 .tag = { 381 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 382 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate), 383 .vpt_rcode = VCPROPTAG_REQUEST 384 }, 385 .id = VCPROP_CLK_CORE 386 }, 387 .end = { 388 .vpt_tag = VCPROPTAG_NULL 389 } 390 }; 391 392 static struct { 393 struct vcprop_buffer_hdr vb_hdr; 394 struct vcprop_tag_fwrev vbt_fwrev; 395 struct vcprop_tag_boardmodel vbt_boardmodel; 396 struct vcprop_tag_boardrev vbt_boardrev; 397 struct vcprop_tag_macaddr vbt_macaddr; 398 struct vcprop_tag_memory vbt_memory; 399 struct vcprop_tag_boardserial vbt_serial; 400 struct vcprop_tag_dmachan vbt_dmachan; 401 struct vcprop_tag_cmdline vbt_cmdline; 402 struct vcprop_tag_clockrate vbt_emmcclockrate; 403 struct vcprop_tag_clockrate vbt_armclockrate; 404 struct vcprop_tag_clockrate vbt_vpuclockrate; 405 struct vcprop_tag end; 406 } vb __cacheline_aligned = { 407 .vb_hdr = { 408 .vpb_len = sizeof(vb), 409 .vpb_rcode = VCPROP_PROCESS_REQUEST, 410 }, 411 .vbt_fwrev = { 412 .tag = { 413 .vpt_tag = VCPROPTAG_GET_FIRMWAREREV, 414 .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev), 415 .vpt_rcode = VCPROPTAG_REQUEST 416 }, 417 }, 418 .vbt_boardmodel = { 419 .tag = { 420 .vpt_tag = VCPROPTAG_GET_BOARDMODEL, 421 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel), 422 .vpt_rcode = VCPROPTAG_REQUEST 423 }, 424 }, 425 .vbt_boardrev = { 426 .tag = { 427 .vpt_tag = VCPROPTAG_GET_BOARDREVISION, 428 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev), 429 .vpt_rcode = VCPROPTAG_REQUEST 430 }, 431 }, 432 .vbt_macaddr = { 433 .tag = { 434 .vpt_tag = VCPROPTAG_GET_MACADDRESS, 435 .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr), 436 .vpt_rcode = VCPROPTAG_REQUEST 437 }, 438 }, 439 .vbt_memory = { 440 .tag = { 441 .vpt_tag = VCPROPTAG_GET_ARMMEMORY, 442 .vpt_len = VCPROPTAG_LEN(vb.vbt_memory), 443 .vpt_rcode = VCPROPTAG_REQUEST 444 }, 445 }, 446 .vbt_serial = { 447 .tag = { 448 .vpt_tag = VCPROPTAG_GET_BOARDSERIAL, 449 .vpt_len = VCPROPTAG_LEN(vb.vbt_serial), 450 .vpt_rcode = VCPROPTAG_REQUEST 451 }, 452 }, 453 .vbt_dmachan = { 454 .tag = { 455 .vpt_tag = VCPROPTAG_GET_DMACHAN, 456 .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan), 457 .vpt_rcode = VCPROPTAG_REQUEST 458 }, 459 }, 460 .vbt_cmdline = { 461 .tag = { 462 .vpt_tag = VCPROPTAG_GET_CMDLINE, 463 .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline), 464 .vpt_rcode = VCPROPTAG_REQUEST 465 }, 466 }, 467 .vbt_emmcclockrate = { 468 .tag = { 469 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 470 .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate), 471 .vpt_rcode = VCPROPTAG_REQUEST 472 }, 473 .id = VCPROP_CLK_EMMC 474 }, 475 .vbt_armclockrate = { 476 .tag = { 477 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 478 .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate), 479 .vpt_rcode = VCPROPTAG_REQUEST 480 }, 481 .id = VCPROP_CLK_ARM 482 }, 483 .vbt_vpuclockrate = { 484 .tag = { 485 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 486 .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate), 487 .vpt_rcode = VCPROPTAG_REQUEST 488 }, 489 .id = VCPROP_CLK_CORE 490 }, 491 .end = { 492 .vpt_tag = VCPROPTAG_NULL 493 } 494 }; 495 496 #if NGENFB > 0 497 static struct { 498 struct vcprop_buffer_hdr vb_hdr; 499 struct vcprop_tag_edidblock vbt_edid; 500 struct vcprop_tag end; 501 } vb_edid __cacheline_aligned = { 502 .vb_hdr = { 503 .vpb_len = sizeof(vb_edid), 504 .vpb_rcode = VCPROP_PROCESS_REQUEST, 505 }, 506 .vbt_edid = { 507 .tag = { 508 .vpt_tag = VCPROPTAG_GET_EDID_BLOCK, 509 .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid), 510 .vpt_rcode = VCPROPTAG_REQUEST, 511 }, 512 .blockno = 0, 513 }, 514 .end = { 515 .vpt_tag = VCPROPTAG_NULL 516 } 517 }; 518 519 static struct { 520 struct vcprop_buffer_hdr vb_hdr; 521 struct vcprop_tag_fbres vbt_res; 522 struct vcprop_tag_fbres vbt_vres; 523 struct vcprop_tag_fbdepth vbt_depth; 524 struct vcprop_tag_fbalpha vbt_alpha; 525 struct vcprop_tag_allocbuf vbt_allocbuf; 526 struct vcprop_tag_blankscreen vbt_blank; 527 struct vcprop_tag_fbpitch vbt_pitch; 528 struct vcprop_tag end; 529 } vb_setfb __cacheline_aligned = { 530 .vb_hdr = { 531 .vpb_len = sizeof(vb_setfb), 532 .vpb_rcode = VCPROP_PROCESS_REQUEST, 533 }, 534 .vbt_res = { 535 .tag = { 536 .vpt_tag = VCPROPTAG_SET_FB_RES, 537 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res), 538 .vpt_rcode = VCPROPTAG_REQUEST, 539 }, 540 .width = 0, 541 .height = 0, 542 }, 543 .vbt_vres = { 544 .tag = { 545 .vpt_tag = VCPROPTAG_SET_FB_VRES, 546 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres), 547 .vpt_rcode = VCPROPTAG_REQUEST, 548 }, 549 .width = 0, 550 .height = 0, 551 }, 552 .vbt_depth = { 553 .tag = { 554 .vpt_tag = VCPROPTAG_SET_FB_DEPTH, 555 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth), 556 .vpt_rcode = VCPROPTAG_REQUEST, 557 }, 558 .bpp = 32, 559 }, 560 .vbt_alpha = { 561 .tag = { 562 .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE, 563 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha), 564 .vpt_rcode = VCPROPTAG_REQUEST, 565 }, 566 .state = VCPROP_ALPHA_IGNORED, 567 }, 568 .vbt_allocbuf = { 569 .tag = { 570 .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER, 571 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf), 572 .vpt_rcode = VCPROPTAG_REQUEST, 573 }, 574 .address = PAGE_SIZE, /* alignment */ 575 }, 576 .vbt_blank = { 577 .tag = { 578 .vpt_tag = VCPROPTAG_BLANK_SCREEN, 579 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank), 580 .vpt_rcode = VCPROPTAG_REQUEST, 581 }, 582 .state = VCPROP_BLANK_OFF, 583 }, 584 .vbt_pitch = { 585 .tag = { 586 .vpt_tag = VCPROPTAG_GET_FB_PITCH, 587 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch), 588 .vpt_rcode = VCPROPTAG_REQUEST, 589 }, 590 }, 591 .end = { 592 .vpt_tag = VCPROPTAG_NULL, 593 }, 594 }; 595 596 #endif 597 598 static int rpi_video_on = WSDISPLAYIO_VIDEO_ON; 599 600 #if defined(RPI_HWCURSOR) 601 #define CURSOR_BITMAP_SIZE (64 * 8) 602 #define CURSOR_ARGB_SIZE (64 * 64 * 4) 603 static uint32_t hcursor = 0; 604 static bus_addr_t pcursor = 0; 605 static uint32_t *cmem = NULL; 606 static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0; 607 static uint32_t cursor_cmap[4]; 608 static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64]; 609 #endif 610 611 u_int 612 bcm283x_clk_get_rate_uart(void) 613 { 614 615 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 616 return vb_uart.vbt_uartclockrate.rate; 617 return 0; 618 } 619 620 u_int 621 bcm283x_clk_get_rate_vpu(void) 622 { 623 624 if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) && 625 vb.vbt_vpuclockrate.rate > 0) { 626 return vb.vbt_vpuclockrate.rate; 627 } 628 return 0; 629 } 630 631 u_int 632 bcm283x_clk_get_rate_emmc(void) 633 { 634 635 if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) && 636 vb.vbt_emmcclockrate.rate > 0) { 637 return vb.vbt_emmcclockrate.rate; 638 } 639 return 0; 640 } 641 642 643 644 static void 645 bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh) 646 { 647 uint32_t res; 648 649 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 650 KERN_VTOPHYS((vaddr_t)&vb_uart)); 651 652 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 653 654 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 655 uart_clk = vb_uart.vbt_uartclockrate.rate; 656 if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag)) 657 core_clk = vb_uart.vbt_vpuclockrate.rate; 658 } 659 660 #if defined(SOC_BCM2835) 661 static void 662 bcm2835_uartinit(void) 663 { 664 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 665 const bus_space_tag_t iot = &bcm2835_bs_tag; 666 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 667 668 bcm283x_uartinit(iot, ioh); 669 } 670 #endif 671 672 #if defined(SOC_BCM2836) 673 static void 674 bcm2836_uartinit(void) 675 { 676 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 677 const bus_space_tag_t iot = &bcm2836_bs_tag; 678 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 679 680 bcm283x_uartinit(iot, ioh); 681 } 682 683 static void 684 bcm2838_uartinit(void) 685 { 686 const paddr_t pa = BCM2838_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 687 const bus_space_tag_t iot = &bcm2838_bs_tag; 688 const bus_space_handle_t ioh = BCM2838_IOPHYSTOVIRT(pa); 689 690 bcm283x_uartinit(iot, ioh); 691 } 692 #endif 693 694 #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024) 695 696 static size_t bcm283x_memorysize; 697 698 static void 699 bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh) 700 { 701 uint32_t res; 702 703 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, ( 704 #if (NSDHC > 0) 705 (1 << VCPM_POWER_SDCARD) | 706 #endif 707 #if (NPLCOM > 0) 708 (1 << VCPM_POWER_UART0) | 709 #endif 710 #if (NBCMDWCTWO > 0) 711 (1 << VCPM_POWER_USB) | 712 #endif 713 #if (NBSCIIC > 0) 714 (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) | 715 /* (1 << VCPM_POWER_I2C2) | */ 716 #endif 717 #if (NBCMSPI > 0) 718 (1 << VCPM_POWER_SPI) | 719 #endif 720 0) << 4); 721 722 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 723 KERN_VTOPHYS((vaddr_t)&vb)); 724 725 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 726 727 if (!vcprop_buffer_success_p(&vb.vb_hdr)) { 728 bootconfig.dramblocks = 1; 729 bootconfig.dram[0].address = 0x0; 730 bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT); 731 return; 732 } 733 734 struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory; 735 if (vcprop_tag_success_p(&vptp_mem->tag)) { 736 size_t n = vcprop_tag_resplen(&vptp_mem->tag) / 737 sizeof(struct vcprop_memory); 738 739 bcm283x_memorysize = 0; 740 bootconfig.dramblocks = 0; 741 742 for (int i = 0; i < n && i < DRAM_BLOCKS; i++) { 743 bootconfig.dram[i].address = vptp_mem->mem[i].base; 744 bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size); 745 bootconfig.dramblocks++; 746 747 bcm283x_memorysize += vptp_mem->mem[i].size; 748 } 749 } 750 751 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 752 curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate; 753 754 #ifdef VERBOSE_INIT_ARM 755 if (vcprop_tag_success_p(&vb.vbt_memory.tag)) 756 printf("%s: memory size %zu\n", __func__, 757 bcm283x_memorysize); 758 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 759 printf("%s: arm clock %d\n", __func__, 760 vb.vbt_armclockrate.rate); 761 if (vcprop_tag_success_p(&vb.vbt_fwrev.tag)) 762 printf("%s: firmware rev %x\n", __func__, 763 vb.vbt_fwrev.rev); 764 if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag)) 765 printf("%s: board model %x\n", __func__, 766 vb.vbt_boardmodel.model); 767 if (vcprop_tag_success_p(&vb.vbt_macaddr.tag)) 768 printf("%s: mac-address %" PRIx64 "\n", __func__, 769 vb.vbt_macaddr.addr); 770 if (vcprop_tag_success_p(&vb.vbt_boardrev.tag)) 771 printf("%s: board rev %x\n", __func__, 772 vb.vbt_boardrev.rev); 773 if (vcprop_tag_success_p(&vb.vbt_serial.tag)) 774 printf("%s: board serial %" PRIx64 "\n", __func__, 775 vb.vbt_serial.sn); 776 if (vcprop_tag_success_p(&vb.vbt_dmachan.tag)) 777 printf("%s: DMA channel mask 0x%08x\n", __func__, 778 vb.vbt_dmachan.mask); 779 780 if (vcprop_tag_success_p(&vb.vbt_cmdline.tag)) 781 printf("%s: cmdline %s\n", __func__, 782 vb.vbt_cmdline.cmdline); 783 #endif 784 } 785 786 #if defined(SOC_BCM2835) 787 static void 788 bcm2835_bootparams(void) 789 { 790 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 791 const bus_space_tag_t iot = &bcm2835_bs_tag; 792 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 793 794 bcm283x_bootparams(iot, ioh); 795 } 796 #endif 797 798 #if defined(SOC_BCM2836) 799 static void 800 bcm2836_bootparams(void) 801 { 802 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 803 const bus_space_tag_t iot = &bcm2836_bs_tag; 804 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 805 806 bcm283x_bootparams(iot, ioh); 807 } 808 809 static void 810 bcm2838_bootparams(void) 811 { 812 const paddr_t pa = BCM2838_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 813 const bus_space_tag_t iot = &bcm2838_bs_tag; 814 const bus_space_handle_t ioh = BCM2838_IOPHYSTOVIRT(pa); 815 816 bcm283x_bootparams(iot, ioh); 817 } 818 819 #if defined(MULTIPROCESSOR) 820 static int 821 cpu_enable_bcm2836(int phandle) 822 { 823 bus_space_tag_t iot = &bcm2836_bs_tag; 824 bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE; 825 uint64_t mpidr; 826 827 fdtbus_get_reg64(phandle, 0, &mpidr, NULL); 828 829 const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0); 830 831 bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno), 832 KERN_VTOPHYS((vaddr_t)cpu_mpstart)); 833 834 return 0; 835 } 836 ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836); 837 #endif 838 839 #endif /* SOC_BCM2836 */ 840 841 #if NGENFB > 0 842 static bool 843 rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight) 844 { 845 char *x; 846 847 if (strncmp(s, "disable", 7) == 0) 848 return false; 849 850 x = strchr(s, 'x'); 851 if (x) { 852 *pwidth = strtoul(s, NULL, 10); 853 *pheight = strtoul(x + 1, NULL, 10); 854 } 855 856 return true; 857 } 858 859 static bool 860 rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight) 861 { 862 struct edid_info ei; 863 uint8_t edid_data[1024]; 864 uint32_t res; 865 int error; 866 867 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid, 868 sizeof(vb_edid), &res); 869 if (error) { 870 printf("%s: mbox request failed (%d)\n", __func__, error); 871 return false; 872 } 873 874 if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) || 875 !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) || 876 vb_edid.vbt_edid.status != 0) 877 return false; 878 879 memset(edid_data, 0, sizeof(edid_data)); 880 memcpy(edid_data, vb_edid.vbt_edid.data, 881 sizeof(vb_edid.vbt_edid.data)); 882 edid_parse(edid_data, &ei); 883 #ifdef VERBOSE_INIT_ARM 884 edid_print(&ei); 885 #endif 886 887 if (ei.edid_preferred_mode) { 888 *pwidth = ei.edid_preferred_mode->hdisplay; 889 *pheight = ei.edid_preferred_mode->vdisplay; 890 } 891 892 return true; 893 } 894 895 /* 896 * Initialize framebuffer console. 897 * 898 * Some notes about boot parameters: 899 * - If "fb=disable" is present, ignore framebuffer completely. 900 * - If "fb=<width>x<height> is present, use the specified mode. 901 * - If "console=fb" is present, attach framebuffer to console. 902 */ 903 static bool 904 rpi_fb_init(prop_dictionary_t dict, void *aux) 905 { 906 uint32_t width = 0, height = 0; 907 uint32_t res; 908 char *ptr; 909 int integer; 910 int error; 911 bool is_bgr = true; 912 913 if (get_bootconf_option(boot_args, "fb", 914 BOOTOPT_TYPE_STRING, &ptr)) { 915 if (rpi_fb_parse_mode(ptr, &width, &height) == false) 916 return false; 917 } 918 if (width == 0 || height == 0) { 919 rpi_fb_get_edid_mode(&width, &height); 920 } 921 if (width == 0 || height == 0) { 922 width = RPI_FB_WIDTH; 923 height = RPI_FB_HEIGHT; 924 } 925 926 vb_setfb.vbt_res.width = width; 927 vb_setfb.vbt_res.height = height; 928 vb_setfb.vbt_vres.width = width; 929 vb_setfb.vbt_vres.height = height; 930 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb, 931 sizeof(vb_setfb), &res); 932 if (error) { 933 printf("%s: mbox request failed (%d)\n", __func__, error); 934 return false; 935 } 936 937 if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) || 938 !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) || 939 !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) || 940 !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) || 941 !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) || 942 !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) || 943 !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) { 944 printf("%s: prop tag failed\n", __func__); 945 return false; 946 } 947 948 #ifdef VERBOSE_INIT_ARM 949 printf("%s: addr = 0x%x size = %d\n", __func__, 950 vb_setfb.vbt_allocbuf.address, 951 vb_setfb.vbt_allocbuf.size); 952 printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp); 953 printf("%s: pitch = %d\n", __func__, 954 vb_setfb.vbt_pitch.linebytes); 955 printf("%s: width = %d height = %d\n", __func__, 956 vb_setfb.vbt_res.width, vb_setfb.vbt_res.height); 957 printf("%s: vwidth = %d vheight = %d\n", __func__, 958 vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height); 959 #endif 960 961 if (vb_setfb.vbt_allocbuf.address == 0 || 962 vb_setfb.vbt_allocbuf.size == 0 || 963 vb_setfb.vbt_res.width == 0 || 964 vb_setfb.vbt_res.height == 0 || 965 vb_setfb.vbt_vres.width == 0 || 966 vb_setfb.vbt_vres.height == 0 || 967 vb_setfb.vbt_pitch.linebytes == 0) { 968 printf("%s: failed to set mode %ux%u\n", __func__, 969 width, height); 970 return false; 971 } 972 973 prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width); 974 prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height); 975 prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp); 976 prop_dictionary_set_uint16(dict, "linebytes", 977 vb_setfb.vbt_pitch.linebytes); 978 prop_dictionary_set_uint32(dict, "address", 979 vb_setfb.vbt_allocbuf.address); 980 981 /* 982 * Old firmware uses BGR. New firmware uses RGB. The get and set 983 * pixel order mailbox properties don't seem to work. The firmware 984 * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it 985 * to determine pixel order. 0 means BGR, 1 means RGB. 986 * 987 * See https://github.com/raspberrypi/linux/issues/514 988 */ 989 if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap", 990 BOOTOPT_TYPE_INT, &integer)) { 991 is_bgr = integer == 0; 992 } 993 prop_dictionary_set_bool(dict, "is_bgr", is_bgr); 994 995 /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */ 996 if (get_bootconf_option(boot_args, "genfb.type", 997 BOOTOPT_TYPE_INT, &integer)) { 998 prop_dictionary_set_uint32(dict, "wsdisplay_type", integer); 999 } 1000 1001 #if defined(RPI_HWCURSOR) 1002 struct fdt_attach_args *faa = aux; 1003 bus_space_handle_t hc; 1004 1005 hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE, 1006 MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK); 1007 pcursor = rpi_lock_mem(hcursor); 1008 #ifdef RPI_IOCTL_DEBUG 1009 printf("hcursor: %08x\n", hcursor); 1010 printf("pcursor: %08x\n", (uint32_t)pcursor); 1011 printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address); 1012 #endif 1013 if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE, 1014 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) { 1015 printf("couldn't map cursor memory\n"); 1016 } else { 1017 int i, j, k; 1018 1019 cmem = bus_space_vaddr(faa->faa_bst, hc); 1020 k = 0; 1021 for (j = 0; j < 64; j++) { 1022 for (i = 0; i < 64; i++) { 1023 cmem[i + k] = 1024 ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00; 1025 } 1026 k += 64; 1027 } 1028 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1029 rpi_fb_initcursor(pcursor, 0, 0); 1030 #ifdef RPI_IOCTL_DEBUG 1031 rpi_fb_movecursor(600, 400, 1); 1032 #else 1033 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1034 #endif 1035 } 1036 #endif 1037 1038 return true; 1039 } 1040 1041 1042 #if defined(RPI_HWCURSOR) 1043 static int 1044 rpi_fb_do_cursor(struct wsdisplay_cursor *cur) 1045 { 1046 int pos = 0; 1047 int shape = 0; 1048 1049 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 1050 if (cursor_on != cur->enable) { 1051 cursor_on = cur->enable; 1052 pos = 1; 1053 } 1054 } 1055 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 1056 1057 hot_x = cur->hot.x; 1058 hot_y = cur->hot.y; 1059 pos = 1; 1060 shape = 1; 1061 } 1062 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 1063 1064 cursor_x = cur->pos.x; 1065 cursor_y = cur->pos.y; 1066 pos = 1; 1067 } 1068 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 1069 int i; 1070 uint32_t val; 1071 1072 for (i = 0; i < uimin(cur->cmap.count, 3); i++) { 1073 val = (cur->cmap.red[i] << 16 ) | 1074 (cur->cmap.green[i] << 8) | 1075 (cur->cmap.blue[i] ) | 1076 0xff000000; 1077 cursor_cmap[i + cur->cmap.index + 2] = val; 1078 } 1079 shape = 1; 1080 } 1081 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 1082 int err; 1083 1084 err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE); 1085 err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE); 1086 if (err != 0) 1087 return EFAULT; 1088 shape = 1; 1089 } 1090 if (shape) { 1091 int i, j, idx; 1092 uint8_t mask; 1093 1094 for (i = 0; i < CURSOR_BITMAP_SIZE; i++) { 1095 mask = 0x01; 1096 for (j = 0; j < 8; j++) { 1097 idx = ((cursor_mask[i] & mask) ? 2 : 0) | 1098 ((cursor_bitmap[i] & mask) ? 1 : 0); 1099 cmem[i * 8 + j] = cursor_cmap[idx]; 1100 mask = mask << 1; 1101 } 1102 } 1103 /* just in case */ 1104 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1105 rpi_fb_initcursor(pcursor, hot_x, hot_y); 1106 } 1107 if (pos) { 1108 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1109 } 1110 return 0; 1111 } 1112 #endif 1113 1114 static int 1115 rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l) 1116 { 1117 1118 switch (cmd) { 1119 case WSDISPLAYIO_SVIDEO: 1120 { 1121 int d = *(int *)data; 1122 if (d == rpi_video_on) 1123 return 0; 1124 rpi_video_on = d; 1125 rpi_fb_set_video(d); 1126 #if defined(RPI_HWCURSOR) 1127 rpi_fb_movecursor(cursor_x, cursor_y, 1128 d ? cursor_on : 0); 1129 #endif 1130 } 1131 return 0; 1132 case WSDISPLAYIO_GVIDEO: 1133 *(int *)data = rpi_video_on; 1134 return 0; 1135 #if defined(RPI_HWCURSOR) 1136 case WSDISPLAYIO_GCURPOS: 1137 { 1138 struct wsdisplay_curpos *cp = (void *)data; 1139 1140 cp->x = cursor_x; 1141 cp->y = cursor_y; 1142 } 1143 return 0; 1144 case WSDISPLAYIO_SCURPOS: 1145 { 1146 struct wsdisplay_curpos *cp = (void *)data; 1147 1148 cursor_x = cp->x; 1149 cursor_y = cp->y; 1150 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1151 } 1152 return 0; 1153 case WSDISPLAYIO_GCURMAX: 1154 { 1155 struct wsdisplay_curpos *cp = (void *)data; 1156 1157 cp->x = 64; 1158 cp->y = 64; 1159 } 1160 return 0; 1161 case WSDISPLAYIO_SCURSOR: 1162 { 1163 struct wsdisplay_cursor *cursor = (void *)data; 1164 1165 return rpi_fb_do_cursor(cursor); 1166 } 1167 #endif 1168 default: 1169 return EPASSTHROUGH; 1170 } 1171 } 1172 1173 #endif 1174 1175 SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)") 1176 { 1177 sysctl_createv(clog, 0, NULL, NULL, 1178 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 1179 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL); 1180 1181 sysctl_createv(clog, 0, NULL, NULL, 1182 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1183 CTLTYPE_INT, "firmware_revision", NULL, NULL, 0, 1184 &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1185 1186 sysctl_createv(clog, 0, NULL, NULL, 1187 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1188 CTLTYPE_INT, "board_model", NULL, NULL, 0, 1189 &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1190 1191 sysctl_createv(clog, 0, NULL, NULL, 1192 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1193 CTLTYPE_INT, "board_revision", NULL, NULL, 0, 1194 &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1195 1196 sysctl_createv(clog, 0, NULL, NULL, 1197 CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE, 1198 CTLTYPE_QUAD, "serial", NULL, NULL, 0, 1199 &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1200 } 1201 1202 #if defined(SOC_BCM2835) 1203 static void 1204 bcm2835_platform_bootstrap(void) 1205 { 1206 1207 bcm2835_bs_tag = arm_generic_bs_tag; 1208 bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag; 1209 1210 bcm2835_bs_tag.bs_map = bcm2835_bs_map; 1211 bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap; 1212 bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map; 1213 bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap; 1214 1215 fdtbus_set_decoderegprop(false); 1216 1217 bcm2835_uartinit(); 1218 1219 bcm2835_bootparams(); 1220 } 1221 #endif 1222 1223 #if defined(SOC_BCM2836) 1224 static void 1225 bcm2836_platform_bootstrap(void) 1226 { 1227 1228 bcm2836_bs_tag = arm_generic_bs_tag; 1229 bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag; 1230 1231 bcm2836_bs_tag.bs_map = bcm2836_bs_map; 1232 bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap; 1233 bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map; 1234 bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap; 1235 1236 fdtbus_set_decoderegprop(false); 1237 1238 bcm2836_uartinit(); 1239 1240 bcm2836_bootparams(); 1241 1242 #ifdef MULTIPROCESSOR 1243 arm_cpu_max = RPI_CPU_MAX; 1244 arm_fdt_cpu_bootstrap(); 1245 #endif 1246 } 1247 1248 static void 1249 bcm2838_platform_bootstrap(void) 1250 { 1251 1252 bcm2838_bs_tag = arm_generic_bs_tag; 1253 bcm2838_a4x_bs_tag = arm_generic_a4x_bs_tag; 1254 1255 bcm2838_bs_tag.bs_map = bcm2838_bs_map; 1256 bcm2838_bs_tag.bs_mmap = bcm2838_bs_mmap; 1257 bcm2838_a4x_bs_tag.bs_map = bcm2838_bs_map; 1258 bcm2838_a4x_bs_tag.bs_mmap = bcm2838_a4x_bs_mmap; 1259 1260 fdtbus_set_decoderegprop(false); 1261 1262 bcm2838_uartinit(); 1263 1264 bcm2838_bootparams(); 1265 1266 #ifdef MULTIPROCESSOR 1267 arm_cpu_max = RPI_CPU_MAX; 1268 arm_fdt_cpu_bootstrap(); 1269 #endif 1270 } 1271 #endif 1272 1273 #if defined(SOC_BCM2835) 1274 static void 1275 bcm2835_platform_init_attach_args(struct fdt_attach_args *faa) 1276 { 1277 1278 faa->faa_bst = &bcm2835_bs_tag; 1279 faa->faa_a4x_bst = &bcm2835_a4x_bs_tag; 1280 faa->faa_dmat = &bcm2835_bus_dma_tag; 1281 1282 bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges; 1283 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges); 1284 bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize; 1285 } 1286 #endif 1287 1288 #if defined(SOC_BCM2836) 1289 static void 1290 bcm2836_platform_init_attach_args(struct fdt_attach_args *faa) 1291 { 1292 1293 faa->faa_bst = &bcm2836_bs_tag; 1294 faa->faa_a4x_bst = &bcm2836_a4x_bs_tag; 1295 faa->faa_dmat = &bcm2835_bus_dma_tag; 1296 1297 bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges; 1298 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges); 1299 bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize; 1300 } 1301 1302 static void 1303 bcm2838_platform_init_attach_args(struct fdt_attach_args *faa) 1304 { 1305 1306 faa->faa_bst = &bcm2838_bs_tag; 1307 faa->faa_a4x_bst = &bcm2838_a4x_bs_tag; 1308 faa->faa_dmat = &bcm2835_bus_dma_tag; 1309 1310 bcm2835_bus_dma_tag._ranges = bcm2838_dma_ranges; 1311 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2838_dma_ranges); 1312 bcm2838_dma_ranges[0].dr_len = bcm283x_memorysize; 1313 } 1314 #endif 1315 1316 1317 static void 1318 bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c) 1319 { 1320 volatile uint32_t *uartaddr = 1321 cpu_earlydevice_va_p() ? 1322 (volatile uint32_t *)va : 1323 (volatile uint32_t *)pa; 1324 1325 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0) 1326 continue; 1327 1328 uartaddr[PL01XCOM_DR / 4] = c; 1329 1330 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0) 1331 continue; 1332 } 1333 1334 void 1335 bcm2835_platform_early_putchar(char c) 1336 { 1337 paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1338 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1339 1340 bcm283x_platform_early_putchar(va, pa, c); 1341 } 1342 1343 void 1344 bcm2836_platform_early_putchar(char c) 1345 { 1346 paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1347 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1348 1349 bcm283x_platform_early_putchar(va, pa, c); 1350 } 1351 1352 void 1353 bcm2837_platform_early_putchar(char c) 1354 { 1355 #define AUCONSADDR_PA BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE) 1356 #define AUCONSADDR_VA BCM2835_IOPHYSTOVIRT(AUCONSADDR_PA) 1357 volatile uint32_t *uartaddr = 1358 cpu_earlydevice_va_p() ? 1359 (volatile uint32_t *)AUCONSADDR_VA : 1360 (volatile uint32_t *)AUCONSADDR_PA; 1361 1362 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 1363 ; 1364 1365 uartaddr[com_data] = c; 1366 #undef AUCONSADDR_VA 1367 #undef AUCONSADDR_PA 1368 } 1369 1370 void 1371 bcm2838_platform_early_putchar(char c) 1372 { 1373 #define AUCONSADDR_PA BCM2838_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE) 1374 #define AUCONSADDR_VA BCM2838_IOPHYSTOVIRT(AUCONSADDR_PA) 1375 volatile uint32_t *uartaddr = 1376 cpu_earlydevice_va_p() ? 1377 (volatile uint32_t *)AUCONSADDR_VA : 1378 (volatile uint32_t *)AUCONSADDR_PA; 1379 1380 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 1381 ; 1382 1383 uartaddr[com_data] = c; 1384 #undef AUCONSADDR_VA 1385 #undef AUCONSADDR_PA 1386 } 1387 1388 #define BCM283x_REF_FREQ 19200000 1389 1390 static void 1391 bcm283x_platform_device_register(device_t dev, void *aux) 1392 { 1393 prop_dictionary_t dict = device_properties(dev); 1394 1395 if (device_is_a(dev, "bcmdmac") && 1396 vcprop_tag_success_p(&vb.vbt_dmachan.tag)) { 1397 prop_dictionary_set_uint32(dict, 1398 "chanmask", vb.vbt_dmachan.mask); 1399 } 1400 #if NSDHC > 0 1401 if (booted_device == NULL && 1402 device_is_a(dev, "ld") && 1403 device_is_a(device_parent(dev), "sdmmc")) { 1404 booted_partition = 0; 1405 booted_device = dev; 1406 } 1407 #endif 1408 if ((device_is_a(dev, "usmsc") || device_is_a(dev, "mue")) && 1409 vcprop_tag_success_p(&vb.vbt_macaddr.tag)) { 1410 const uint8_t enaddr[ETHER_ADDR_LEN] = { 1411 (vb.vbt_macaddr.addr >> 0) & 0xff, 1412 (vb.vbt_macaddr.addr >> 8) & 0xff, 1413 (vb.vbt_macaddr.addr >> 16) & 0xff, 1414 (vb.vbt_macaddr.addr >> 24) & 0xff, 1415 (vb.vbt_macaddr.addr >> 32) & 0xff, 1416 (vb.vbt_macaddr.addr >> 40) & 0xff 1417 }; 1418 1419 prop_data_t pd = prop_data_create_data(enaddr, ETHER_ADDR_LEN); 1420 KASSERT(pd != NULL); 1421 if (prop_dictionary_set(device_properties(dev), "mac-address", 1422 pd) == false) { 1423 aprint_error_dev(dev, 1424 "WARNING: Unable to set mac-address property\n"); 1425 } 1426 prop_object_release(pd); 1427 } 1428 1429 #if NGENFB > 0 1430 if (device_is_a(dev, "genfb")) { 1431 char *ptr; 1432 1433 bcmgenfb_set_console_dev(dev); 1434 bcmgenfb_set_ioctl(&rpi_ioctl); 1435 #ifdef DDB 1436 db_trap_callback = bcmgenfb_ddb_trap_callback; 1437 #endif 1438 if (rpi_fb_init(dict, aux) == false) 1439 return; 1440 if (get_bootconf_option(boot_args, "console", 1441 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { 1442 prop_dictionary_set_bool(dict, "is_console", true); 1443 #if NUKBD > 0 1444 /* allow ukbd to be the console keyboard */ 1445 ukbd_cnattach(); 1446 #endif 1447 } else { 1448 prop_dictionary_set_bool(dict, "is_console", false); 1449 } 1450 } 1451 #endif 1452 } 1453 1454 static u_int 1455 bcm283x_platform_uart_freq(void) 1456 { 1457 1458 return uart_clk; 1459 } 1460 1461 #if defined(SOC_BCM2835) 1462 static const struct arm_platform bcm2835_platform = { 1463 .ap_devmap = bcm2835_platform_devmap, 1464 .ap_bootstrap = bcm2835_platform_bootstrap, 1465 .ap_init_attach_args = bcm2835_platform_init_attach_args, 1466 .ap_device_register = bcm283x_platform_device_register, 1467 .ap_reset = bcm2835_system_reset, 1468 .ap_delay = bcm2835_tmr_delay, 1469 .ap_uart_freq = bcm283x_platform_uart_freq, 1470 }; 1471 1472 ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform); 1473 #endif 1474 1475 #if defined(SOC_BCM2836) 1476 static u_int 1477 bcm2837_platform_uart_freq(void) 1478 { 1479 1480 return core_clk * 2; 1481 } 1482 1483 static const struct arm_platform bcm2836_platform = { 1484 .ap_devmap = bcm2836_platform_devmap, 1485 .ap_bootstrap = bcm2836_platform_bootstrap, 1486 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1487 .ap_device_register = bcm283x_platform_device_register, 1488 .ap_reset = bcm2835_system_reset, 1489 .ap_delay = gtmr_delay, 1490 .ap_uart_freq = bcm283x_platform_uart_freq, 1491 .ap_mpstart = arm_fdt_cpu_mpstart, 1492 }; 1493 1494 static const struct arm_platform bcm2837_platform = { 1495 .ap_devmap = bcm2836_platform_devmap, 1496 .ap_bootstrap = bcm2836_platform_bootstrap, 1497 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1498 .ap_device_register = bcm283x_platform_device_register, 1499 .ap_reset = bcm2835_system_reset, 1500 .ap_delay = gtmr_delay, 1501 .ap_uart_freq = bcm2837_platform_uart_freq, 1502 .ap_mpstart = arm_fdt_cpu_mpstart, 1503 }; 1504 1505 static const struct arm_platform bcm2838_platform = { 1506 .ap_devmap = bcm2838_platform_devmap, 1507 .ap_bootstrap = bcm2838_platform_bootstrap, 1508 .ap_init_attach_args = bcm2838_platform_init_attach_args, 1509 .ap_device_register = bcm283x_platform_device_register, 1510 .ap_reset = bcm2835_system_reset, 1511 .ap_delay = gtmr_delay, 1512 .ap_uart_freq = bcm2837_platform_uart_freq, 1513 .ap_mpstart = arm_fdt_cpu_mpstart, 1514 }; 1515 1516 ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform); 1517 ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform); 1518 ARM_PLATFORM(bcm2838, "brcm,bcm2838", &bcm2838_platform); 1519 #endif 1520
Indexes created Tue Sep 30 11:09:46 GMT 2025