bcm283x_platform.c revision 1.34
1 /* $NetBSD: bcm283x_platform.c,v 1.34 2020/01/01 13:54:32 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.34 2020/01/01 13:54:32 skrll Exp $"); 31 32 #include "opt_arm_debug.h" 33 #include "opt_bcm283x.h" 34 #include "opt_cpuoptions.h" 35 #include "opt_ddb.h" 36 #include "opt_evbarm_boardtype.h" 37 #include "opt_kgdb.h" 38 #include "opt_fdt.h" 39 #include "opt_rpi.h" 40 #include "opt_vcprop.h" 41 42 #include "sdhc.h" 43 #include "bcmsdhost.h" 44 #include "bcmdwctwo.h" 45 #include "bcmspi.h" 46 #include "bsciic.h" 47 #include "plcom.h" 48 #include "com.h" 49 #include "genfb.h" 50 #include "ukbd.h" 51 52 #include <sys/param.h> 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 #include <sys/device.h> 56 #include <sys/termios.h> 57 58 #include <net/if_ether.h> 59 60 #include <prop/proplib.h> 61 62 #include <dev/fdt/fdtvar.h> 63 64 #include <uvm/uvm_extern.h> 65 66 #include <machine/bootconfig.h> 67 68 #include <arm/armreg.h> 69 #include <arm/cpufunc.h> 70 71 #include <libfdt.h> 72 73 #include <arm/broadcom/bcm2835reg.h> 74 #include <arm/broadcom/bcm2835var.h> 75 #include <arm/broadcom/bcm283x_platform.h> 76 #include <arm/broadcom/bcm2835_intr.h> 77 #include <arm/broadcom/bcm2835_mbox.h> 78 #include <arm/broadcom/bcm2835_pmwdogvar.h> 79 80 #include <evbarm/dev/plcomreg.h> 81 #include <evbarm/dev/plcomvar.h> 82 #include <evbarm/fdt/machdep.h> 83 84 #include <dev/ic/ns16550reg.h> 85 #include <dev/ic/comreg.h> 86 87 #include <evbarm/rpi/vcio.h> 88 #include <evbarm/rpi/vcpm.h> 89 #include <evbarm/rpi/vcprop.h> 90 91 #include <arm/fdt/arm_fdtvar.h> 92 93 #include <arm/cortex/gtmr_var.h> 94 95 #if NGENFB > 0 96 #include <dev/videomode/videomode.h> 97 #include <dev/videomode/edidvar.h> 98 #include <dev/wscons/wsconsio.h> 99 #endif 100 101 #if NUKBD > 0 102 #include <dev/usb/ukbdvar.h> 103 #endif 104 105 #ifdef DDB 106 #include <machine/db_machdep.h> 107 #include <ddb/db_sym.h> 108 #include <ddb/db_extern.h> 109 #endif 110 111 #define RPI_CPU_MAX 4 112 #define BCM2711_DMA_SIZE 0x3c000000 113 114 void bcm2835_platform_early_putchar(char c); 115 void bcm2836_platform_early_putchar(char c); 116 void bcm2837_platform_early_putchar(char c); 117 void bcm2711_platform_early_putchar(char c); 118 119 extern void bcmgenfb_set_console_dev(device_t dev); 120 void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *)); 121 extern void bcmgenfb_ddb_trap_callback(int where); 122 static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *); 123 124 extern struct bus_space arm_generic_bs_tag; 125 extern struct bus_space arm_generic_a4x_bs_tag; 126 127 /* Prototypes for all the bus_space structure functions */ 128 bs_protos(arm_generic); 129 bs_protos(arm_generic_a4x); 130 bs_protos(bcm2835); 131 bs_protos(bcm2835_a4x); 132 bs_protos(bcm2836); 133 bs_protos(bcm2836_a4x); 134 bs_protos(bcm2711); 135 bs_protos(bcm2711_a4x); 136 137 struct bus_space bcm2835_bs_tag; 138 struct bus_space bcm2835_a4x_bs_tag; 139 struct bus_space bcm2836_bs_tag; 140 struct bus_space bcm2836_a4x_bs_tag; 141 struct bus_space bcm2711_bs_tag; 142 struct bus_space bcm2711_a4x_bs_tag; 143 144 static paddr_t bcm2835_bus_to_phys(bus_addr_t); 145 static paddr_t bcm2836_bus_to_phys(bus_addr_t); 146 static paddr_t bcm2711_bus_to_phys(bus_addr_t); 147 148 #ifdef VERBOSE_INIT_ARM 149 #define VPRINTF(...) printf(__VA_ARGS__) 150 #else 151 #define VPRINTF(...) __nothing 152 #endif 153 154 static paddr_t 155 bcm2835_bus_to_phys(bus_addr_t ba) 156 { 157 158 /* Attempt to find the PA device mapping */ 159 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 160 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 161 return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba); 162 163 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 164 } 165 166 static paddr_t 167 bcm2836_bus_to_phys(bus_addr_t ba) 168 { 169 170 /* Attempt to find the PA device mapping */ 171 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 172 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 173 return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba); 174 175 if (ba >= BCM2836_ARM_LOCAL_BASE && 176 ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE) 177 return ba; 178 179 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 180 } 181 182 static paddr_t 183 bcm2711_bus_to_phys(bus_addr_t ba) 184 { 185 186 /* Attempt to find the PA device mapping */ 187 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 188 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 189 return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba); 190 191 if (ba >= BCM2711_ARM_LOCAL_BASE_BUS && 192 ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE) 193 return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba); 194 195 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 196 } 197 198 int 199 bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 200 bus_space_handle_t *bshp) 201 { 202 const paddr_t pa = bcm2835_bus_to_phys(ba); 203 204 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 205 } 206 207 paddr_t 208 bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 209 { 210 const paddr_t pa = bcm2835_bus_to_phys(ba); 211 212 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 213 } 214 215 paddr_t 216 bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 217 { 218 219 return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags); 220 } 221 222 int 223 bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 224 bus_space_handle_t *bshp) 225 { 226 const paddr_t pa = bcm2836_bus_to_phys(ba); 227 228 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 229 } 230 231 paddr_t 232 bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 233 { 234 const paddr_t pa = bcm2836_bus_to_phys(ba); 235 236 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 237 } 238 239 paddr_t 240 bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 241 { 242 243 return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags); 244 } 245 246 int 247 bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 248 bus_space_handle_t *bshp) 249 { 250 const paddr_t pa = bcm2711_bus_to_phys(ba); 251 252 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 253 } 254 255 paddr_t 256 bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 257 { 258 const paddr_t pa = bcm2711_bus_to_phys(ba); 259 260 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 261 } 262 263 paddr_t 264 bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 265 { 266 267 return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags); 268 } 269 270 struct arm32_dma_range bcm2835_dma_ranges[] = { 271 [0] = { 272 .dr_sysbase = 0, 273 .dr_busbase = BCM2835_BUSADDR_CACHE_COHERENT, 274 } 275 }; 276 277 struct arm32_dma_range bcm2836_dma_ranges[] = { 278 [0] = { 279 .dr_sysbase = 0, 280 .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT, 281 } 282 }; 283 284 struct arm32_dma_range bcm2711_dma_ranges[] = { 285 [0] = { 286 .dr_sysbase = 0, 287 .dr_busbase = BCM2835_BUSADDR_CACHE_DIRECT, 288 } 289 }; 290 291 292 #if defined(SOC_BCM2835) 293 static const struct pmap_devmap * 294 bcm2835_platform_devmap(void) 295 { 296 static const struct pmap_devmap devmap[] = { 297 DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE, 298 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 299 300 DEVMAP_ENTRY_END 301 }; 302 303 return devmap; 304 } 305 #endif 306 307 #if defined(SOC_BCM2836) 308 static const struct pmap_devmap * 309 bcm2836_platform_devmap(void) 310 { 311 static const struct pmap_devmap devmap[] = { 312 DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE, 313 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 314 DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE, 315 BCM2836_ARM_LOCAL_SIZE), 316 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 317 /* for fdt cpu spin-table */ 318 DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 319 BCM2836_ARM_SMP_SIZE), 320 #endif 321 DEVMAP_ENTRY_END 322 }; 323 324 return devmap; 325 } 326 327 static const struct pmap_devmap * 328 bcm2711_platform_devmap(void) 329 { 330 static const struct pmap_devmap devmap[] = { 331 DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE, 332 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 333 DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE, 334 BCM2711_ARM_LOCAL_SIZE), 335 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 336 /* for fdt cpu spin-table */ 337 DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 338 BCM2836_ARM_SMP_SIZE), 339 #endif 340 DEVMAP_ENTRY_END 341 }; 342 343 return devmap; 344 } 345 #endif 346 347 /* 348 * Macros to translate between physical and virtual for a subset of the 349 * kernel address space. *Not* for general use. 350 */ 351 352 #ifndef RPI_FB_WIDTH 353 #define RPI_FB_WIDTH 1280 354 #endif 355 #ifndef RPI_FB_HEIGHT 356 #define RPI_FB_HEIGHT 720 357 #endif 358 359 int uart_clk = BCM2835_UART0_CLK; 360 int core_clk; 361 362 static struct { 363 struct vcprop_buffer_hdr vb_hdr; 364 struct vcprop_tag_clockrate vbt_uartclockrate; 365 struct vcprop_tag_clockrate vbt_vpuclockrate; 366 struct vcprop_tag end; 367 } vb_uart __cacheline_aligned = { 368 .vb_hdr = { 369 .vpb_len = sizeof(vb_uart), 370 .vpb_rcode = VCPROP_PROCESS_REQUEST, 371 }, 372 .vbt_uartclockrate = { 373 .tag = { 374 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 375 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate), 376 .vpt_rcode = VCPROPTAG_REQUEST 377 }, 378 .id = VCPROP_CLK_UART 379 }, 380 .vbt_vpuclockrate = { 381 .tag = { 382 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 383 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate), 384 .vpt_rcode = VCPROPTAG_REQUEST 385 }, 386 .id = VCPROP_CLK_CORE 387 }, 388 .end = { 389 .vpt_tag = VCPROPTAG_NULL 390 } 391 }; 392 393 static struct { 394 struct vcprop_buffer_hdr vb_hdr; 395 struct vcprop_tag_fwrev vbt_fwrev; 396 struct vcprop_tag_boardmodel vbt_boardmodel; 397 struct vcprop_tag_boardrev vbt_boardrev; 398 struct vcprop_tag_macaddr vbt_macaddr; 399 struct vcprop_tag_memory vbt_memory; 400 struct vcprop_tag_boardserial vbt_serial; 401 struct vcprop_tag_dmachan vbt_dmachan; 402 struct vcprop_tag_cmdline vbt_cmdline; 403 struct vcprop_tag_clockrate vbt_emmcclockrate; 404 struct vcprop_tag_clockrate vbt_armclockrate; 405 struct vcprop_tag_clockrate vbt_vpuclockrate; 406 struct vcprop_tag_clockrate vbt_emmc2clockrate; 407 struct vcprop_tag end; 408 } vb __cacheline_aligned = { 409 .vb_hdr = { 410 .vpb_len = sizeof(vb), 411 .vpb_rcode = VCPROP_PROCESS_REQUEST, 412 }, 413 .vbt_fwrev = { 414 .tag = { 415 .vpt_tag = VCPROPTAG_GET_FIRMWAREREV, 416 .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev), 417 .vpt_rcode = VCPROPTAG_REQUEST 418 }, 419 }, 420 .vbt_boardmodel = { 421 .tag = { 422 .vpt_tag = VCPROPTAG_GET_BOARDMODEL, 423 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel), 424 .vpt_rcode = VCPROPTAG_REQUEST 425 }, 426 }, 427 .vbt_boardrev = { 428 .tag = { 429 .vpt_tag = VCPROPTAG_GET_BOARDREVISION, 430 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev), 431 .vpt_rcode = VCPROPTAG_REQUEST 432 }, 433 }, 434 .vbt_macaddr = { 435 .tag = { 436 .vpt_tag = VCPROPTAG_GET_MACADDRESS, 437 .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr), 438 .vpt_rcode = VCPROPTAG_REQUEST 439 }, 440 }, 441 .vbt_memory = { 442 .tag = { 443 .vpt_tag = VCPROPTAG_GET_ARMMEMORY, 444 .vpt_len = VCPROPTAG_LEN(vb.vbt_memory), 445 .vpt_rcode = VCPROPTAG_REQUEST 446 }, 447 }, 448 .vbt_serial = { 449 .tag = { 450 .vpt_tag = VCPROPTAG_GET_BOARDSERIAL, 451 .vpt_len = VCPROPTAG_LEN(vb.vbt_serial), 452 .vpt_rcode = VCPROPTAG_REQUEST 453 }, 454 }, 455 .vbt_dmachan = { 456 .tag = { 457 .vpt_tag = VCPROPTAG_GET_DMACHAN, 458 .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan), 459 .vpt_rcode = VCPROPTAG_REQUEST 460 }, 461 }, 462 .vbt_cmdline = { 463 .tag = { 464 .vpt_tag = VCPROPTAG_GET_CMDLINE, 465 .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline), 466 .vpt_rcode = VCPROPTAG_REQUEST 467 }, 468 }, 469 .vbt_emmcclockrate = { 470 .tag = { 471 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 472 .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate), 473 .vpt_rcode = VCPROPTAG_REQUEST 474 }, 475 .id = VCPROP_CLK_EMMC 476 }, 477 .vbt_armclockrate = { 478 .tag = { 479 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 480 .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate), 481 .vpt_rcode = VCPROPTAG_REQUEST 482 }, 483 .id = VCPROP_CLK_ARM 484 }, 485 .vbt_vpuclockrate = { 486 .tag = { 487 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 488 .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate), 489 .vpt_rcode = VCPROPTAG_REQUEST 490 }, 491 .id = VCPROP_CLK_CORE 492 }, 493 .vbt_emmc2clockrate = { 494 .tag = { 495 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 496 .vpt_len = VCPROPTAG_LEN(vb.vbt_emmc2clockrate), 497 .vpt_rcode = VCPROPTAG_REQUEST 498 }, 499 .id = VCPROP_CLK_EMMC2 500 }, 501 .end = { 502 .vpt_tag = VCPROPTAG_NULL 503 } 504 }; 505 506 #if NGENFB > 0 507 static struct { 508 struct vcprop_buffer_hdr vb_hdr; 509 struct vcprop_tag_edidblock vbt_edid; 510 struct vcprop_tag end; 511 } vb_edid __cacheline_aligned = { 512 .vb_hdr = { 513 .vpb_len = sizeof(vb_edid), 514 .vpb_rcode = VCPROP_PROCESS_REQUEST, 515 }, 516 .vbt_edid = { 517 .tag = { 518 .vpt_tag = VCPROPTAG_GET_EDID_BLOCK, 519 .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid), 520 .vpt_rcode = VCPROPTAG_REQUEST, 521 }, 522 .blockno = 0, 523 }, 524 .end = { 525 .vpt_tag = VCPROPTAG_NULL 526 } 527 }; 528 529 static struct { 530 struct vcprop_buffer_hdr vb_hdr; 531 struct vcprop_tag_fbres vbt_res; 532 struct vcprop_tag_fbres vbt_vres; 533 struct vcprop_tag_fbdepth vbt_depth; 534 struct vcprop_tag_fbalpha vbt_alpha; 535 struct vcprop_tag_allocbuf vbt_allocbuf; 536 struct vcprop_tag_blankscreen vbt_blank; 537 struct vcprop_tag_fbpitch vbt_pitch; 538 struct vcprop_tag end; 539 } vb_setfb __cacheline_aligned = { 540 .vb_hdr = { 541 .vpb_len = sizeof(vb_setfb), 542 .vpb_rcode = VCPROP_PROCESS_REQUEST, 543 }, 544 .vbt_res = { 545 .tag = { 546 .vpt_tag = VCPROPTAG_SET_FB_RES, 547 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res), 548 .vpt_rcode = VCPROPTAG_REQUEST, 549 }, 550 .width = 0, 551 .height = 0, 552 }, 553 .vbt_vres = { 554 .tag = { 555 .vpt_tag = VCPROPTAG_SET_FB_VRES, 556 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres), 557 .vpt_rcode = VCPROPTAG_REQUEST, 558 }, 559 .width = 0, 560 .height = 0, 561 }, 562 .vbt_depth = { 563 .tag = { 564 .vpt_tag = VCPROPTAG_SET_FB_DEPTH, 565 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth), 566 .vpt_rcode = VCPROPTAG_REQUEST, 567 }, 568 .bpp = 32, 569 }, 570 .vbt_alpha = { 571 .tag = { 572 .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE, 573 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha), 574 .vpt_rcode = VCPROPTAG_REQUEST, 575 }, 576 .state = VCPROP_ALPHA_IGNORED, 577 }, 578 .vbt_allocbuf = { 579 .tag = { 580 .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER, 581 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf), 582 .vpt_rcode = VCPROPTAG_REQUEST, 583 }, 584 .address = PAGE_SIZE, /* alignment */ 585 }, 586 .vbt_blank = { 587 .tag = { 588 .vpt_tag = VCPROPTAG_BLANK_SCREEN, 589 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank), 590 .vpt_rcode = VCPROPTAG_REQUEST, 591 }, 592 .state = VCPROP_BLANK_OFF, 593 }, 594 .vbt_pitch = { 595 .tag = { 596 .vpt_tag = VCPROPTAG_GET_FB_PITCH, 597 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch), 598 .vpt_rcode = VCPROPTAG_REQUEST, 599 }, 600 }, 601 .end = { 602 .vpt_tag = VCPROPTAG_NULL, 603 }, 604 }; 605 606 #endif 607 608 static int rpi_video_on = WSDISPLAYIO_VIDEO_ON; 609 610 #if defined(RPI_HWCURSOR) 611 #define CURSOR_BITMAP_SIZE (64 * 8) 612 #define CURSOR_ARGB_SIZE (64 * 64 * 4) 613 static uint32_t hcursor = 0; 614 static bus_addr_t pcursor = 0; 615 static uint32_t *cmem = NULL; 616 static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0; 617 static uint32_t cursor_cmap[4]; 618 static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64]; 619 #endif 620 621 u_int 622 bcm283x_clk_get_rate_uart(void) 623 { 624 625 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 626 return vb_uart.vbt_uartclockrate.rate; 627 return 0; 628 } 629 630 u_int 631 bcm283x_clk_get_rate_vpu(void) 632 { 633 634 if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) && 635 vb.vbt_vpuclockrate.rate > 0) { 636 return vb.vbt_vpuclockrate.rate; 637 } 638 return 0; 639 } 640 641 u_int 642 bcm283x_clk_get_rate_emmc(void) 643 { 644 645 if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) && 646 vb.vbt_emmcclockrate.rate > 0) { 647 return vb.vbt_emmcclockrate.rate; 648 } 649 return 0; 650 } 651 652 u_int 653 bcm283x_clk_get_rate_emmc2(void) 654 { 655 656 if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) && 657 vb.vbt_emmc2clockrate.rate > 0) { 658 return vb.vbt_emmc2clockrate.rate; 659 } 660 return 0; 661 } 662 663 664 665 static void 666 bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh) 667 { 668 uint32_t res; 669 670 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 671 KERN_VTOPHYS((vaddr_t)&vb_uart)); 672 673 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 674 675 /* 676 * RPI4 has Cortex A72 processors which do speculation, so 677 * we need to invalidate the cache for an updates done by 678 * the firmware 679 */ 680 cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart)); 681 682 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 683 uart_clk = vb_uart.vbt_uartclockrate.rate; 684 if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag)) 685 core_clk = vb_uart.vbt_vpuclockrate.rate; 686 } 687 688 #if defined(SOC_BCM2835) 689 static void 690 bcm2835_uartinit(void) 691 { 692 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 693 const bus_space_tag_t iot = &bcm2835_bs_tag; 694 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 695 696 bcm283x_uartinit(iot, ioh); 697 } 698 #endif 699 700 #if defined(SOC_BCM2836) 701 static void 702 bcm2836_uartinit(void) 703 { 704 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 705 const bus_space_tag_t iot = &bcm2836_bs_tag; 706 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 707 708 bcm283x_uartinit(iot, ioh); 709 } 710 711 static void 712 bcm2711_uartinit(void) 713 { 714 const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 715 const bus_space_tag_t iot = &bcm2711_bs_tag; 716 const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa); 717 718 bcm283x_uartinit(iot, ioh); 719 } 720 #endif 721 722 #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024) 723 724 static size_t bcm283x_memorysize; 725 726 static void 727 bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh) 728 { 729 uint32_t res; 730 731 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, ( 732 #if (NSDHC > 0) 733 (1 << VCPM_POWER_SDCARD) | 734 #endif 735 #if (NPLCOM > 0) 736 (1 << VCPM_POWER_UART0) | 737 #endif 738 #if (NBCMDWCTWO > 0) 739 (1 << VCPM_POWER_USB) | 740 #endif 741 #if (NBSCIIC > 0) 742 (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) | 743 /* (1 << VCPM_POWER_I2C2) | */ 744 #endif 745 #if (NBCMSPI > 0) 746 (1 << VCPM_POWER_SPI) | 747 #endif 748 0) << 4); 749 750 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 751 KERN_VTOPHYS((vaddr_t)&vb)); 752 753 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 754 755 /* 756 * RPI4 has Cortex A72 processors which do speculation, so 757 * we need to invalidate the cache for an updates done by 758 * the firmware 759 */ 760 cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb)); 761 762 if (!vcprop_buffer_success_p(&vb.vb_hdr)) { 763 bootconfig.dramblocks = 1; 764 bootconfig.dram[0].address = 0x0; 765 bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT); 766 return; 767 } 768 769 struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory; 770 if (vcprop_tag_success_p(&vptp_mem->tag)) { 771 size_t n = vcprop_tag_resplen(&vptp_mem->tag) / 772 sizeof(struct vcprop_memory); 773 774 bcm283x_memorysize = 0; 775 bootconfig.dramblocks = 0; 776 777 for (int i = 0; i < n && i < DRAM_BLOCKS; i++) { 778 bootconfig.dram[i].address = vptp_mem->mem[i].base; 779 bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size); 780 bootconfig.dramblocks++; 781 782 bcm283x_memorysize += vptp_mem->mem[i].size; 783 } 784 } 785 786 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 787 curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate; 788 789 #ifdef VERBOSE_INIT_ARM 790 if (vcprop_tag_success_p(&vb.vbt_memory.tag)) 791 printf("%s: memory size %zu\n", __func__, 792 bcm283x_memorysize); 793 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 794 printf("%s: arm clock %d\n", __func__, 795 vb.vbt_armclockrate.rate); 796 if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag)) 797 printf("%s: vpu clock %d\n", __func__, 798 vb.vbt_vpuclockrate.rate); 799 if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag)) 800 printf("%s: emmc clock %d\n", __func__, 801 vb.vbt_emmcclockrate.rate); 802 if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag)) 803 printf("%s: emmc2 clock %d\n", __func__, 804 vb.vbt_emmcclockrate.rate); 805 if (vcprop_tag_success_p(&vb.vbt_fwrev.tag)) 806 printf("%s: firmware rev %x\n", __func__, 807 vb.vbt_fwrev.rev); 808 if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag)) 809 printf("%s: board model %x\n", __func__, 810 vb.vbt_boardmodel.model); 811 if (vcprop_tag_success_p(&vb.vbt_macaddr.tag)) 812 printf("%s: mac-address %" PRIx64 "\n", __func__, 813 vb.vbt_macaddr.addr); 814 if (vcprop_tag_success_p(&vb.vbt_boardrev.tag)) 815 printf("%s: board rev %x\n", __func__, 816 vb.vbt_boardrev.rev); 817 if (vcprop_tag_success_p(&vb.vbt_serial.tag)) 818 printf("%s: board serial %" PRIx64 "\n", __func__, 819 vb.vbt_serial.sn); 820 if (vcprop_tag_success_p(&vb.vbt_dmachan.tag)) 821 printf("%s: DMA channel mask 0x%08x\n", __func__, 822 vb.vbt_dmachan.mask); 823 824 if (vcprop_tag_success_p(&vb.vbt_cmdline.tag)) 825 printf("%s: cmdline %s\n", __func__, 826 vb.vbt_cmdline.cmdline); 827 #endif 828 } 829 830 #if defined(SOC_BCM2835) 831 static void 832 bcm2835_bootparams(void) 833 { 834 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 835 const bus_space_tag_t iot = &bcm2835_bs_tag; 836 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 837 838 bcm283x_bootparams(iot, ioh); 839 } 840 #endif 841 842 #if defined(SOC_BCM2836) 843 static void 844 bcm2836_bootparams(void) 845 { 846 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 847 const bus_space_tag_t iot = &bcm2836_bs_tag; 848 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 849 850 bcm283x_bootparams(iot, ioh); 851 } 852 853 static void 854 bcm2711_bootparams(void) 855 { 856 const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 857 const bus_space_tag_t iot = &bcm2711_bs_tag; 858 const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa); 859 860 bcm283x_bootparams(iot, ioh); 861 } 862 863 #if defined(MULTIPROCESSOR) 864 static int 865 cpu_enable_bcm2836(int phandle) 866 { 867 bus_space_tag_t iot = &bcm2836_bs_tag; 868 bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE; 869 uint64_t mpidr; 870 871 fdtbus_get_reg64(phandle, 0, &mpidr, NULL); 872 873 const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0); 874 875 bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno), 876 KERN_VTOPHYS((vaddr_t)cpu_mpstart)); 877 878 return 0; 879 } 880 ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836); 881 #endif 882 883 #endif /* SOC_BCM2836 */ 884 885 #if NGENFB > 0 886 static bool 887 rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight) 888 { 889 char *x; 890 891 if (strncmp(s, "disable", 7) == 0) 892 return false; 893 894 x = strchr(s, 'x'); 895 if (x) { 896 *pwidth = strtoul(s, NULL, 10); 897 *pheight = strtoul(x + 1, NULL, 10); 898 } 899 900 return true; 901 } 902 903 static bool 904 rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight) 905 { 906 struct edid_info ei; 907 uint8_t edid_data[1024]; 908 uint32_t res; 909 int error; 910 911 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid, 912 sizeof(vb_edid), &res); 913 if (error) { 914 printf("%s: mbox request failed (%d)\n", __func__, error); 915 return false; 916 } 917 918 if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) || 919 !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) || 920 vb_edid.vbt_edid.status != 0) 921 return false; 922 923 memset(edid_data, 0, sizeof(edid_data)); 924 memcpy(edid_data, vb_edid.vbt_edid.data, 925 sizeof(vb_edid.vbt_edid.data)); 926 edid_parse(edid_data, &ei); 927 #ifdef VERBOSE_INIT_ARM 928 edid_print(&ei); 929 #endif 930 931 if (ei.edid_preferred_mode) { 932 *pwidth = ei.edid_preferred_mode->hdisplay; 933 *pheight = ei.edid_preferred_mode->vdisplay; 934 } 935 936 return true; 937 } 938 939 /* 940 * Initialize framebuffer console. 941 * 942 * Some notes about boot parameters: 943 * - If "fb=disable" is present, ignore framebuffer completely. 944 * - If "fb=<width>x<height> is present, use the specified mode. 945 * - If "console=fb" is present, attach framebuffer to console. 946 */ 947 static bool 948 rpi_fb_init(prop_dictionary_t dict, void *aux) 949 { 950 uint32_t width = 0, height = 0; 951 uint32_t res; 952 char *ptr; 953 int integer; 954 int error; 955 bool is_bgr = true; 956 957 if (get_bootconf_option(boot_args, "fb", 958 BOOTOPT_TYPE_STRING, &ptr)) { 959 if (rpi_fb_parse_mode(ptr, &width, &height) == false) 960 return false; 961 } 962 if (width == 0 || height == 0) { 963 rpi_fb_get_edid_mode(&width, &height); 964 } 965 if (width == 0 || height == 0) { 966 width = RPI_FB_WIDTH; 967 height = RPI_FB_HEIGHT; 968 } 969 970 vb_setfb.vbt_res.width = width; 971 vb_setfb.vbt_res.height = height; 972 vb_setfb.vbt_vres.width = width; 973 vb_setfb.vbt_vres.height = height; 974 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb, 975 sizeof(vb_setfb), &res); 976 if (error) { 977 printf("%s: mbox request failed (%d)\n", __func__, error); 978 return false; 979 } 980 981 if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) || 982 !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) || 983 !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) || 984 !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) || 985 !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) || 986 !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) || 987 !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) { 988 printf("%s: prop tag failed\n", __func__); 989 return false; 990 } 991 992 #ifdef VERBOSE_INIT_ARM 993 printf("%s: addr = 0x%x size = %d\n", __func__, 994 vb_setfb.vbt_allocbuf.address, 995 vb_setfb.vbt_allocbuf.size); 996 printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp); 997 printf("%s: pitch = %d\n", __func__, 998 vb_setfb.vbt_pitch.linebytes); 999 printf("%s: width = %d height = %d\n", __func__, 1000 vb_setfb.vbt_res.width, vb_setfb.vbt_res.height); 1001 printf("%s: vwidth = %d vheight = %d\n", __func__, 1002 vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height); 1003 #endif 1004 1005 if (vb_setfb.vbt_allocbuf.address == 0 || 1006 vb_setfb.vbt_allocbuf.size == 0 || 1007 vb_setfb.vbt_res.width == 0 || 1008 vb_setfb.vbt_res.height == 0 || 1009 vb_setfb.vbt_vres.width == 0 || 1010 vb_setfb.vbt_vres.height == 0 || 1011 vb_setfb.vbt_pitch.linebytes == 0) { 1012 printf("%s: failed to set mode %ux%u\n", __func__, 1013 width, height); 1014 return false; 1015 } 1016 1017 prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width); 1018 prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height); 1019 prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp); 1020 prop_dictionary_set_uint16(dict, "linebytes", 1021 vb_setfb.vbt_pitch.linebytes); 1022 prop_dictionary_set_uint32(dict, "address", 1023 vb_setfb.vbt_allocbuf.address); 1024 1025 /* 1026 * Old firmware uses BGR. New firmware uses RGB. The get and set 1027 * pixel order mailbox properties don't seem to work. The firmware 1028 * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it 1029 * to determine pixel order. 0 means BGR, 1 means RGB. 1030 * 1031 * See https://github.com/raspberrypi/linux/issues/514 1032 */ 1033 if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap", 1034 BOOTOPT_TYPE_INT, &integer)) { 1035 is_bgr = integer == 0; 1036 } 1037 prop_dictionary_set_bool(dict, "is_bgr", is_bgr); 1038 1039 /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */ 1040 if (get_bootconf_option(boot_args, "genfb.type", 1041 BOOTOPT_TYPE_INT, &integer)) { 1042 prop_dictionary_set_uint32(dict, "wsdisplay_type", integer); 1043 } 1044 1045 #if defined(RPI_HWCURSOR) 1046 struct fdt_attach_args *faa = aux; 1047 bus_space_handle_t hc; 1048 1049 hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE, 1050 MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK); 1051 pcursor = rpi_lock_mem(hcursor); 1052 #ifdef RPI_IOCTL_DEBUG 1053 printf("hcursor: %08x\n", hcursor); 1054 printf("pcursor: %08x\n", (uint32_t)pcursor); 1055 printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address); 1056 #endif 1057 if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE, 1058 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) { 1059 printf("couldn't map cursor memory\n"); 1060 } else { 1061 int i, j, k; 1062 1063 cmem = bus_space_vaddr(faa->faa_bst, hc); 1064 k = 0; 1065 for (j = 0; j < 64; j++) { 1066 for (i = 0; i < 64; i++) { 1067 cmem[i + k] = 1068 ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00; 1069 } 1070 k += 64; 1071 } 1072 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1073 rpi_fb_initcursor(pcursor, 0, 0); 1074 #ifdef RPI_IOCTL_DEBUG 1075 rpi_fb_movecursor(600, 400, 1); 1076 #else 1077 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1078 #endif 1079 } 1080 #endif 1081 1082 return true; 1083 } 1084 1085 1086 #if defined(RPI_HWCURSOR) 1087 static int 1088 rpi_fb_do_cursor(struct wsdisplay_cursor *cur) 1089 { 1090 int pos = 0; 1091 int shape = 0; 1092 1093 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 1094 if (cursor_on != cur->enable) { 1095 cursor_on = cur->enable; 1096 pos = 1; 1097 } 1098 } 1099 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 1100 1101 hot_x = cur->hot.x; 1102 hot_y = cur->hot.y; 1103 pos = 1; 1104 shape = 1; 1105 } 1106 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 1107 1108 cursor_x = cur->pos.x; 1109 cursor_y = cur->pos.y; 1110 pos = 1; 1111 } 1112 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 1113 int i; 1114 uint32_t val; 1115 1116 for (i = 0; i < uimin(cur->cmap.count, 3); i++) { 1117 val = (cur->cmap.red[i] << 16 ) | 1118 (cur->cmap.green[i] << 8) | 1119 (cur->cmap.blue[i] ) | 1120 0xff000000; 1121 cursor_cmap[i + cur->cmap.index + 2] = val; 1122 } 1123 shape = 1; 1124 } 1125 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 1126 int err; 1127 1128 err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE); 1129 err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE); 1130 if (err != 0) 1131 return EFAULT; 1132 shape = 1; 1133 } 1134 if (shape) { 1135 int i, j, idx; 1136 uint8_t mask; 1137 1138 for (i = 0; i < CURSOR_BITMAP_SIZE; i++) { 1139 mask = 0x01; 1140 for (j = 0; j < 8; j++) { 1141 idx = ((cursor_mask[i] & mask) ? 2 : 0) | 1142 ((cursor_bitmap[i] & mask) ? 1 : 0); 1143 cmem[i * 8 + j] = cursor_cmap[idx]; 1144 mask = mask << 1; 1145 } 1146 } 1147 /* just in case */ 1148 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1149 rpi_fb_initcursor(pcursor, hot_x, hot_y); 1150 } 1151 if (pos) { 1152 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1153 } 1154 return 0; 1155 } 1156 #endif 1157 1158 static int 1159 rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l) 1160 { 1161 1162 switch (cmd) { 1163 case WSDISPLAYIO_SVIDEO: 1164 { 1165 int d = *(int *)data; 1166 if (d == rpi_video_on) 1167 return 0; 1168 rpi_video_on = d; 1169 rpi_fb_set_video(d); 1170 #if defined(RPI_HWCURSOR) 1171 rpi_fb_movecursor(cursor_x, cursor_y, 1172 d ? cursor_on : 0); 1173 #endif 1174 } 1175 return 0; 1176 case WSDISPLAYIO_GVIDEO: 1177 *(int *)data = rpi_video_on; 1178 return 0; 1179 #if defined(RPI_HWCURSOR) 1180 case WSDISPLAYIO_GCURPOS: 1181 { 1182 struct wsdisplay_curpos *cp = (void *)data; 1183 1184 cp->x = cursor_x; 1185 cp->y = cursor_y; 1186 } 1187 return 0; 1188 case WSDISPLAYIO_SCURPOS: 1189 { 1190 struct wsdisplay_curpos *cp = (void *)data; 1191 1192 cursor_x = cp->x; 1193 cursor_y = cp->y; 1194 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1195 } 1196 return 0; 1197 case WSDISPLAYIO_GCURMAX: 1198 { 1199 struct wsdisplay_curpos *cp = (void *)data; 1200 1201 cp->x = 64; 1202 cp->y = 64; 1203 } 1204 return 0; 1205 case WSDISPLAYIO_SCURSOR: 1206 { 1207 struct wsdisplay_cursor *cursor = (void *)data; 1208 1209 return rpi_fb_do_cursor(cursor); 1210 } 1211 #endif 1212 default: 1213 return EPASSTHROUGH; 1214 } 1215 } 1216 1217 #endif 1218 1219 SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)") 1220 { 1221 sysctl_createv(clog, 0, NULL, NULL, 1222 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 1223 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL); 1224 1225 sysctl_createv(clog, 0, NULL, NULL, 1226 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1227 CTLTYPE_INT, "firmware_revision", NULL, NULL, 0, 1228 &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1229 1230 sysctl_createv(clog, 0, NULL, NULL, 1231 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1232 CTLTYPE_INT, "board_model", NULL, NULL, 0, 1233 &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1234 1235 sysctl_createv(clog, 0, NULL, NULL, 1236 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1237 CTLTYPE_INT, "board_revision", NULL, NULL, 0, 1238 &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1239 1240 sysctl_createv(clog, 0, NULL, NULL, 1241 CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE, 1242 CTLTYPE_QUAD, "serial", NULL, NULL, 0, 1243 &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1244 } 1245 1246 #if defined(SOC_BCM2835) 1247 static void 1248 bcm2835_platform_bootstrap(void) 1249 { 1250 1251 bcm2835_bs_tag = arm_generic_bs_tag; 1252 bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag; 1253 1254 bcm2835_bs_tag.bs_map = bcm2835_bs_map; 1255 bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap; 1256 bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map; 1257 bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap; 1258 1259 fdtbus_set_decoderegprop(false); 1260 1261 bcm2835_uartinit(); 1262 1263 bcm2835_bootparams(); 1264 } 1265 #endif 1266 1267 #if defined(SOC_BCM2836) 1268 static void 1269 bcm2836_platform_bootstrap(void) 1270 { 1271 1272 bcm2836_bs_tag = arm_generic_bs_tag; 1273 bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag; 1274 1275 bcm2836_bs_tag.bs_map = bcm2836_bs_map; 1276 bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap; 1277 bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map; 1278 bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap; 1279 1280 fdtbus_set_decoderegprop(false); 1281 1282 bcm2836_uartinit(); 1283 1284 bcm2836_bootparams(); 1285 1286 #ifdef MULTIPROCESSOR 1287 arm_cpu_max = RPI_CPU_MAX; 1288 arm_fdt_cpu_bootstrap(); 1289 #endif 1290 } 1291 1292 static void 1293 bcm2711_platform_bootstrap(void) 1294 { 1295 1296 bcm2711_bs_tag = arm_generic_bs_tag; 1297 bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag; 1298 1299 bcm2711_bs_tag.bs_map = bcm2711_bs_map; 1300 bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap; 1301 bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map; 1302 bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap; 1303 1304 fdtbus_set_decoderegprop(false); 1305 1306 bcm2711_uartinit(); 1307 1308 bcm2711_bootparams(); 1309 1310 #ifdef MULTIPROCESSOR 1311 arm_cpu_max = RPI_CPU_MAX; 1312 arm_fdt_cpu_bootstrap(); 1313 #endif 1314 } 1315 #endif 1316 1317 #if defined(SOC_BCM2835) 1318 static void 1319 bcm2835_platform_init_attach_args(struct fdt_attach_args *faa) 1320 { 1321 1322 faa->faa_bst = &bcm2835_bs_tag; 1323 faa->faa_a4x_bst = &bcm2835_a4x_bs_tag; 1324 faa->faa_dmat = &bcm2835_bus_dma_tag; 1325 1326 bcm2835_bus_dma_tag._ranges = bcm2835_dma_ranges; 1327 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2835_dma_ranges); 1328 bcm2835_dma_ranges[0].dr_len = bcm283x_memorysize; 1329 } 1330 #endif 1331 1332 #if defined(SOC_BCM2836) 1333 static void 1334 bcm2836_platform_init_attach_args(struct fdt_attach_args *faa) 1335 { 1336 1337 faa->faa_bst = &bcm2836_bs_tag; 1338 faa->faa_a4x_bst = &bcm2836_a4x_bs_tag; 1339 faa->faa_dmat = &bcm2835_bus_dma_tag; 1340 1341 bcm2835_bus_dma_tag._ranges = bcm2836_dma_ranges; 1342 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2836_dma_ranges); 1343 bcm2836_dma_ranges[0].dr_len = bcm283x_memorysize; 1344 } 1345 1346 static void 1347 bcm2711_platform_init_attach_args(struct fdt_attach_args *faa) 1348 { 1349 1350 faa->faa_bst = &bcm2711_bs_tag; 1351 faa->faa_a4x_bst = &bcm2711_a4x_bs_tag; 1352 faa->faa_dmat = &bcm2835_bus_dma_tag; 1353 1354 bcm2835_bus_dma_tag._ranges = bcm2711_dma_ranges; 1355 bcm2835_bus_dma_tag._nranges = __arraycount(bcm2711_dma_ranges); 1356 bcm2711_dma_ranges[0].dr_len = BCM2711_DMA_SIZE; 1357 } 1358 #endif 1359 1360 1361 static void 1362 bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c) 1363 { 1364 volatile uint32_t *uartaddr = 1365 cpu_earlydevice_va_p() ? 1366 (volatile uint32_t *)va : 1367 (volatile uint32_t *)pa; 1368 1369 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0) 1370 continue; 1371 1372 uartaddr[PL01XCOM_DR / 4] = c; 1373 1374 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0) 1375 continue; 1376 } 1377 1378 void 1379 bcm2835_platform_early_putchar(char c) 1380 { 1381 paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1382 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1383 1384 bcm283x_platform_early_putchar(va, pa, c); 1385 } 1386 1387 void 1388 bcm2836_platform_early_putchar(char c) 1389 { 1390 paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1391 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1392 1393 bcm283x_platform_early_putchar(va, pa, c); 1394 } 1395 1396 void 1397 bcm2837_platform_early_putchar(char c) 1398 { 1399 #define AUCONSADDR_PA BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE) 1400 #define AUCONSADDR_VA BCM2835_IOPHYSTOVIRT(AUCONSADDR_PA) 1401 volatile uint32_t *uartaddr = 1402 cpu_earlydevice_va_p() ? 1403 (volatile uint32_t *)AUCONSADDR_VA : 1404 (volatile uint32_t *)AUCONSADDR_PA; 1405 1406 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 1407 ; 1408 1409 uartaddr[com_data] = c; 1410 #undef AUCONSADDR_VA 1411 #undef AUCONSADDR_PA 1412 } 1413 1414 void 1415 bcm2711_platform_early_putchar(char c) 1416 { 1417 #define AUCONSADDR_PA BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE) 1418 #define AUCONSADDR_VA BCM2711_IOPHYSTOVIRT(AUCONSADDR_PA) 1419 volatile uint32_t *uartaddr = 1420 cpu_earlydevice_va_p() ? 1421 (volatile uint32_t *)AUCONSADDR_VA : 1422 (volatile uint32_t *)AUCONSADDR_PA; 1423 1424 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 1425 ; 1426 1427 uartaddr[com_data] = c; 1428 #undef AUCONSADDR_VA 1429 #undef AUCONSADDR_PA 1430 } 1431 1432 #define BCM283x_REF_FREQ 19200000 1433 1434 static void 1435 bcm283x_platform_device_register(device_t dev, void *aux) 1436 { 1437 prop_dictionary_t dict = device_properties(dev); 1438 1439 if (device_is_a(dev, "bcmdmac") && 1440 vcprop_tag_success_p(&vb.vbt_dmachan.tag)) { 1441 prop_dictionary_set_uint32(dict, 1442 "chanmask", vb.vbt_dmachan.mask); 1443 } 1444 #if NSDHC > 0 1445 if (booted_device == NULL && 1446 device_is_a(dev, "ld") && 1447 device_is_a(device_parent(dev), "sdmmc")) { 1448 booted_partition = 0; 1449 booted_device = dev; 1450 } 1451 #endif 1452 if ((device_is_a(dev, "usmsc") || device_is_a(dev, "mue")) && 1453 vcprop_tag_success_p(&vb.vbt_macaddr.tag)) { 1454 const uint8_t enaddr[ETHER_ADDR_LEN] = { 1455 (vb.vbt_macaddr.addr >> 0) & 0xff, 1456 (vb.vbt_macaddr.addr >> 8) & 0xff, 1457 (vb.vbt_macaddr.addr >> 16) & 0xff, 1458 (vb.vbt_macaddr.addr >> 24) & 0xff, 1459 (vb.vbt_macaddr.addr >> 32) & 0xff, 1460 (vb.vbt_macaddr.addr >> 40) & 0xff 1461 }; 1462 1463 prop_data_t pd = prop_data_create_data(enaddr, ETHER_ADDR_LEN); 1464 KASSERT(pd != NULL); 1465 if (prop_dictionary_set(device_properties(dev), "mac-address", 1466 pd) == false) { 1467 aprint_error_dev(dev, 1468 "WARNING: Unable to set mac-address property\n"); 1469 } 1470 prop_object_release(pd); 1471 } 1472 1473 #if NGENFB > 0 1474 if (device_is_a(dev, "genfb")) { 1475 char *ptr; 1476 1477 bcmgenfb_set_console_dev(dev); 1478 bcmgenfb_set_ioctl(&rpi_ioctl); 1479 #ifdef DDB 1480 db_trap_callback = bcmgenfb_ddb_trap_callback; 1481 #endif 1482 if (rpi_fb_init(dict, aux) == false) 1483 return; 1484 if (get_bootconf_option(boot_args, "console", 1485 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { 1486 prop_dictionary_set_bool(dict, "is_console", true); 1487 #if NUKBD > 0 1488 /* allow ukbd to be the console keyboard */ 1489 ukbd_cnattach(); 1490 #endif 1491 } else { 1492 prop_dictionary_set_bool(dict, "is_console", false); 1493 } 1494 } 1495 #endif 1496 } 1497 1498 static u_int 1499 bcm283x_platform_uart_freq(void) 1500 { 1501 1502 /* 1503 * We are safe to access stdout phandle - consinit did before 1504 * calling ap_uart_freq 1505 */ 1506 const int phandle = fdtbus_get_stdout_phandle(); 1507 1508 static const char * const aux_compatible[] = { 1509 "brcm,bcm2835-aux-uart", 1510 NULL 1511 }; 1512 1513 if (of_match_compatible(phandle, aux_compatible)) 1514 return core_clk * 2; 1515 1516 return uart_clk; 1517 } 1518 1519 #if defined(SOC_BCM2835) 1520 static const struct arm_platform bcm2835_platform = { 1521 .ap_devmap = bcm2835_platform_devmap, 1522 .ap_bootstrap = bcm2835_platform_bootstrap, 1523 .ap_init_attach_args = bcm2835_platform_init_attach_args, 1524 .ap_device_register = bcm283x_platform_device_register, 1525 .ap_reset = bcm2835_system_reset, 1526 .ap_delay = bcm2835_tmr_delay, 1527 .ap_uart_freq = bcm283x_platform_uart_freq, 1528 }; 1529 1530 ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform); 1531 #endif 1532 1533 #if defined(SOC_BCM2836) 1534 1535 static const struct arm_platform bcm2836_platform = { 1536 .ap_devmap = bcm2836_platform_devmap, 1537 .ap_bootstrap = bcm2836_platform_bootstrap, 1538 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1539 .ap_device_register = bcm283x_platform_device_register, 1540 .ap_reset = bcm2835_system_reset, 1541 .ap_delay = gtmr_delay, 1542 .ap_uart_freq = bcm283x_platform_uart_freq, 1543 .ap_mpstart = arm_fdt_cpu_mpstart, 1544 }; 1545 1546 static const struct arm_platform bcm2837_platform = { 1547 .ap_devmap = bcm2836_platform_devmap, 1548 .ap_bootstrap = bcm2836_platform_bootstrap, 1549 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1550 .ap_device_register = bcm283x_platform_device_register, 1551 .ap_reset = bcm2835_system_reset, 1552 .ap_delay = gtmr_delay, 1553 .ap_uart_freq = bcm283x_platform_uart_freq, 1554 .ap_mpstart = arm_fdt_cpu_mpstart, 1555 }; 1556 1557 static const struct arm_platform bcm2711_platform = { 1558 .ap_devmap = bcm2711_platform_devmap, 1559 .ap_bootstrap = bcm2711_platform_bootstrap, 1560 .ap_init_attach_args = bcm2711_platform_init_attach_args, 1561 .ap_device_register = bcm283x_platform_device_register, 1562 .ap_reset = bcm2835_system_reset, 1563 .ap_delay = gtmr_delay, 1564 .ap_uart_freq = bcm283x_platform_uart_freq, 1565 .ap_mpstart = arm_fdt_cpu_mpstart, 1566 }; 1567 1568 ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform); 1569 ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform); 1570 ARM_PLATFORM(bcm2711, "brcm,bcm2711", &bcm2711_platform); 1571 #endif 1572
Indexes created Mon Sep 29 21:09:56 GMT 2025