bcm283x_platform.c revision 1.43
1 /* $NetBSD: bcm283x_platform.c,v 1.43 2020/11/23 06:24:35 rin Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: bcm283x_platform.c,v 1.43 2020/11/23 06:24:35 rin Exp $"); 31 32 #include "opt_arm_debug.h" 33 #include "opt_bcm283x.h" 34 #include "opt_cpuoptions.h" 35 #include "opt_ddb.h" 36 #include "opt_evbarm_boardtype.h" 37 #include "opt_kgdb.h" 38 #include "opt_fdt.h" 39 #include "opt_rpi.h" 40 #include "opt_vcprop.h" 41 42 #include "sdhc.h" 43 #include "bcmsdhost.h" 44 #include "bcmdwctwo.h" 45 #include "bcmspi.h" 46 #include "bsciic.h" 47 #include "plcom.h" 48 #include "com.h" 49 #include "genfb.h" 50 #include "ukbd.h" 51 52 #include <sys/param.h> 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 #include <sys/device.h> 56 #include <sys/kmem.h> 57 #include <sys/termios.h> 58 59 #include <net/if_ether.h> 60 61 #include <prop/proplib.h> 62 63 #include <dev/fdt/fdtvar.h> 64 65 #include <uvm/uvm_extern.h> 66 67 #include <machine/bootconfig.h> 68 69 #include <arm/armreg.h> 70 #include <arm/cpufunc.h> 71 72 #include <libfdt.h> 73 74 #include <arm/broadcom/bcm2835reg.h> 75 #include <arm/broadcom/bcm2835var.h> 76 #include <arm/broadcom/bcm283x_platform.h> 77 #include <arm/broadcom/bcm2835_intr.h> 78 #include <arm/broadcom/bcm2835_mbox.h> 79 #include <arm/broadcom/bcm2835_pmwdogvar.h> 80 81 #include <evbarm/dev/plcomreg.h> 82 #include <evbarm/dev/plcomvar.h> 83 #include <evbarm/fdt/machdep.h> 84 85 #include <dev/ic/ns16550reg.h> 86 #include <dev/ic/comreg.h> 87 88 #include <evbarm/rpi/vcio.h> 89 #include <evbarm/rpi/vcpm.h> 90 #include <evbarm/rpi/vcprop.h> 91 92 #include <arm/fdt/arm_fdtvar.h> 93 94 #include <arm/cortex/gtmr_var.h> 95 96 #if NGENFB > 0 97 #include <dev/videomode/videomode.h> 98 #include <dev/videomode/edidvar.h> 99 #include <dev/wscons/wsconsio.h> 100 #endif 101 102 #if NUKBD > 0 103 #include <dev/usb/ukbdvar.h> 104 #endif 105 106 #ifdef DDB 107 #include <machine/db_machdep.h> 108 #include <ddb/db_sym.h> 109 #include <ddb/db_extern.h> 110 #endif 111 112 #define RPI_CPU_MAX 4 113 114 void bcm2835_platform_early_putchar(char c); 115 void bcm2835_aux_platform_early_putchar(char c); 116 void bcm2836_platform_early_putchar(char c); 117 void bcm2837_platform_early_putchar(char c); 118 void bcm2711_platform_early_putchar(char c); 119 120 extern void bcmgenfb_set_console_dev(device_t dev); 121 void bcmgenfb_set_ioctl(int(*)(void *, void *, u_long, void *, int, struct lwp *)); 122 extern void bcmgenfb_ddb_trap_callback(int where); 123 static int rpi_ioctl(void *, void *, u_long, void *, int, lwp_t *); 124 125 extern struct bus_space arm_generic_bs_tag; 126 extern struct bus_space arm_generic_a4x_bs_tag; 127 128 /* Prototypes for all the bus_space structure functions */ 129 bs_protos(arm_generic); 130 bs_protos(arm_generic_a4x); 131 bs_protos(bcm2835); 132 bs_protos(bcm2835_a4x); 133 bs_protos(bcm2836); 134 bs_protos(bcm2836_a4x); 135 bs_protos(bcm2711); 136 bs_protos(bcm2711_a4x); 137 138 struct bus_space bcm2835_bs_tag; 139 struct bus_space bcm2835_a4x_bs_tag; 140 struct bus_space bcm2836_bs_tag; 141 struct bus_space bcm2836_a4x_bs_tag; 142 struct bus_space bcm2711_bs_tag; 143 struct bus_space bcm2711_a4x_bs_tag; 144 145 static paddr_t bcm2835_bus_to_phys(bus_addr_t); 146 static paddr_t bcm2836_bus_to_phys(bus_addr_t); 147 static paddr_t bcm2711_bus_to_phys(bus_addr_t); 148 149 #ifdef VERBOSE_INIT_ARM 150 #define VPRINTF(...) printf(__VA_ARGS__) 151 #else 152 #define VPRINTF(...) __nothing 153 #endif 154 155 static paddr_t 156 bcm2835_bus_to_phys(bus_addr_t ba) 157 { 158 159 /* Attempt to find the PA device mapping */ 160 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 161 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 162 return BCM2835_PERIPHERALS_BUS_TO_PHYS(ba); 163 164 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 165 } 166 167 static paddr_t 168 bcm2836_bus_to_phys(bus_addr_t ba) 169 { 170 171 /* Attempt to find the PA device mapping */ 172 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 173 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 174 return BCM2836_PERIPHERALS_BUS_TO_PHYS(ba); 175 176 if (ba >= BCM2836_ARM_LOCAL_BASE && 177 ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE) 178 return ba; 179 180 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 181 } 182 183 static paddr_t 184 bcm2711_bus_to_phys(bus_addr_t ba) 185 { 186 187 /* Attempt to find the PA device mapping */ 188 if (ba >= BCM283X_PERIPHERALS_BASE_BUS && 189 ba < BCM283X_PERIPHERALS_BASE_BUS + BCM283X_PERIPHERALS_SIZE) 190 return BCM2711_PERIPHERALS_BUS_TO_PHYS(ba); 191 192 if (ba >= BCM2711_SCB_BASE_BUS && 193 ba < BCM2711_SCB_BASE_BUS + BCM2711_SCB_SIZE) 194 return BCM2711_SCB_BUS_TO_PHYS(ba); 195 196 if (ba >= BCM2711_ARM_LOCAL_BASE_BUS && 197 ba < BCM2711_ARM_LOCAL_BASE_BUS + BCM2711_ARM_LOCAL_SIZE) 198 return BCM2711_ARM_LOCAL_BUS_TO_PHYS(ba); 199 200 return ba & ~BCM2835_BUSADDR_CACHE_MASK; 201 } 202 203 int 204 bcm2835_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 205 bus_space_handle_t *bshp) 206 { 207 const paddr_t pa = bcm2835_bus_to_phys(ba); 208 209 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 210 } 211 212 paddr_t 213 bcm2835_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 214 { 215 const paddr_t pa = bcm2835_bus_to_phys(ba); 216 217 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 218 } 219 220 paddr_t 221 bcm2835_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 222 { 223 224 return bcm2835_bs_mmap(t, ba, 4 * offset, prot, flags); 225 } 226 227 int 228 bcm2836_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 229 bus_space_handle_t *bshp) 230 { 231 const paddr_t pa = bcm2836_bus_to_phys(ba); 232 233 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 234 } 235 236 paddr_t 237 bcm2836_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 238 { 239 const paddr_t pa = bcm2836_bus_to_phys(ba); 240 241 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 242 } 243 244 paddr_t 245 bcm2836_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 246 { 247 248 return bcm2836_bs_mmap(t, ba, 4 * offset, prot, flags); 249 } 250 251 int 252 bcm2711_bs_map(void *t, bus_addr_t ba, bus_size_t size, int flag, 253 bus_space_handle_t *bshp) 254 { 255 const paddr_t pa = bcm2711_bus_to_phys(ba); 256 257 return bus_space_map(&arm_generic_bs_tag, pa, size, flag, bshp); 258 } 259 260 paddr_t 261 bcm2711_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 262 { 263 const paddr_t pa = bcm2711_bus_to_phys(ba); 264 265 return bus_space_mmap(&arm_generic_bs_tag, pa, offset, prot, flags); 266 } 267 268 paddr_t 269 bcm2711_a4x_bs_mmap(void *t, bus_addr_t ba, off_t offset, int prot, int flags) 270 { 271 272 return bcm2711_bs_mmap(t, ba, 4 * offset, prot, flags); 273 } 274 275 #if defined(SOC_BCM2835) 276 static const struct pmap_devmap * 277 bcm2835_platform_devmap(void) 278 { 279 static const struct pmap_devmap devmap[] = { 280 DEVMAP_ENTRY(BCM2835_PERIPHERALS_VBASE, BCM2835_PERIPHERALS_BASE, 281 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 282 283 DEVMAP_ENTRY_END 284 }; 285 286 return devmap; 287 } 288 #endif 289 290 #if defined(SOC_BCM2836) 291 static const struct pmap_devmap * 292 bcm2836_platform_devmap(void) 293 { 294 static const struct pmap_devmap devmap[] = { 295 DEVMAP_ENTRY(BCM2836_PERIPHERALS_VBASE, BCM2836_PERIPHERALS_BASE, 296 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 297 DEVMAP_ENTRY(BCM2836_ARM_LOCAL_VBASE, BCM2836_ARM_LOCAL_BASE, 298 BCM2836_ARM_LOCAL_SIZE), 299 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 300 /* for fdt cpu spin-table */ 301 DEVMAP_ENTRY(BCM2836_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 302 BCM2836_ARM_SMP_SIZE), 303 #endif 304 DEVMAP_ENTRY_END 305 }; 306 307 return devmap; 308 } 309 310 static const struct pmap_devmap * 311 bcm2711_platform_devmap(void) 312 { 313 static const struct pmap_devmap devmap[] = { 314 DEVMAP_ENTRY(BCM2711_PERIPHERALS_VBASE, BCM2711_PERIPHERALS_BASE, 315 BCM283X_PERIPHERALS_SIZE), /* 16Mb */ 316 DEVMAP_ENTRY(BCM2711_ARM_LOCAL_VBASE, BCM2711_ARM_LOCAL_BASE, 317 BCM2711_ARM_LOCAL_SIZE), 318 #if defined(MULTIPROCESSOR) && defined(__aarch64__) 319 /* for fdt cpu spin-table */ 320 DEVMAP_ENTRY(BCM2711_ARM_SMP_VBASE, BCM2836_ARM_SMP_BASE, 321 BCM2836_ARM_SMP_SIZE), 322 #endif 323 DEVMAP_ENTRY_END 324 }; 325 326 return devmap; 327 } 328 #endif 329 330 /* 331 * Macros to translate between physical and virtual for a subset of the 332 * kernel address space. *Not* for general use. 333 */ 334 335 #ifndef RPI_FB_WIDTH 336 #define RPI_FB_WIDTH 1280 337 #endif 338 #ifndef RPI_FB_HEIGHT 339 #define RPI_FB_HEIGHT 720 340 #endif 341 342 int uart_clk = BCM2835_UART0_CLK; 343 int core_clk; 344 345 static struct { 346 struct vcprop_buffer_hdr vb_hdr; 347 struct vcprop_tag_clockrate vbt_uartclockrate; 348 struct vcprop_tag_clockrate vbt_vpuclockrate; 349 struct vcprop_tag end; 350 } vb_uart __cacheline_aligned = { 351 .vb_hdr = { 352 .vpb_len = sizeof(vb_uart), 353 .vpb_rcode = VCPROP_PROCESS_REQUEST, 354 }, 355 .vbt_uartclockrate = { 356 .tag = { 357 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 358 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate), 359 .vpt_rcode = VCPROPTAG_REQUEST 360 }, 361 .id = VCPROP_CLK_UART 362 }, 363 .vbt_vpuclockrate = { 364 .tag = { 365 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 366 .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_vpuclockrate), 367 .vpt_rcode = VCPROPTAG_REQUEST 368 }, 369 .id = VCPROP_CLK_CORE 370 }, 371 .end = { 372 .vpt_tag = VCPROPTAG_NULL 373 } 374 }; 375 376 static struct { 377 struct vcprop_buffer_hdr vb_hdr; 378 struct vcprop_tag_fwrev vbt_fwrev; 379 struct vcprop_tag_boardmodel vbt_boardmodel; 380 struct vcprop_tag_boardrev vbt_boardrev; 381 struct vcprop_tag_macaddr vbt_macaddr; 382 struct vcprop_tag_memory vbt_memory; 383 struct vcprop_tag_boardserial vbt_serial; 384 struct vcprop_tag_dmachan vbt_dmachan; 385 struct vcprop_tag_cmdline vbt_cmdline; 386 struct vcprop_tag_clockrate vbt_emmcclockrate; 387 struct vcprop_tag_clockrate vbt_armclockrate; 388 struct vcprop_tag_clockrate vbt_vpuclockrate; 389 struct vcprop_tag_clockrate vbt_emmc2clockrate; 390 struct vcprop_tag end; 391 } vb __cacheline_aligned = { 392 .vb_hdr = { 393 .vpb_len = sizeof(vb), 394 .vpb_rcode = VCPROP_PROCESS_REQUEST, 395 }, 396 .vbt_fwrev = { 397 .tag = { 398 .vpt_tag = VCPROPTAG_GET_FIRMWAREREV, 399 .vpt_len = VCPROPTAG_LEN(vb.vbt_fwrev), 400 .vpt_rcode = VCPROPTAG_REQUEST 401 }, 402 }, 403 .vbt_boardmodel = { 404 .tag = { 405 .vpt_tag = VCPROPTAG_GET_BOARDMODEL, 406 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardmodel), 407 .vpt_rcode = VCPROPTAG_REQUEST 408 }, 409 }, 410 .vbt_boardrev = { 411 .tag = { 412 .vpt_tag = VCPROPTAG_GET_BOARDREVISION, 413 .vpt_len = VCPROPTAG_LEN(vb.vbt_boardrev), 414 .vpt_rcode = VCPROPTAG_REQUEST 415 }, 416 }, 417 .vbt_macaddr = { 418 .tag = { 419 .vpt_tag = VCPROPTAG_GET_MACADDRESS, 420 .vpt_len = VCPROPTAG_LEN(vb.vbt_macaddr), 421 .vpt_rcode = VCPROPTAG_REQUEST 422 }, 423 }, 424 .vbt_memory = { 425 .tag = { 426 .vpt_tag = VCPROPTAG_GET_ARMMEMORY, 427 .vpt_len = VCPROPTAG_LEN(vb.vbt_memory), 428 .vpt_rcode = VCPROPTAG_REQUEST 429 }, 430 }, 431 .vbt_serial = { 432 .tag = { 433 .vpt_tag = VCPROPTAG_GET_BOARDSERIAL, 434 .vpt_len = VCPROPTAG_LEN(vb.vbt_serial), 435 .vpt_rcode = VCPROPTAG_REQUEST 436 }, 437 }, 438 .vbt_dmachan = { 439 .tag = { 440 .vpt_tag = VCPROPTAG_GET_DMACHAN, 441 .vpt_len = VCPROPTAG_LEN(vb.vbt_dmachan), 442 .vpt_rcode = VCPROPTAG_REQUEST 443 }, 444 }, 445 .vbt_cmdline = { 446 .tag = { 447 .vpt_tag = VCPROPTAG_GET_CMDLINE, 448 .vpt_len = VCPROPTAG_LEN(vb.vbt_cmdline), 449 .vpt_rcode = VCPROPTAG_REQUEST 450 }, 451 }, 452 .vbt_emmcclockrate = { 453 .tag = { 454 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 455 .vpt_len = VCPROPTAG_LEN(vb.vbt_emmcclockrate), 456 .vpt_rcode = VCPROPTAG_REQUEST 457 }, 458 .id = VCPROP_CLK_EMMC 459 }, 460 .vbt_armclockrate = { 461 .tag = { 462 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 463 .vpt_len = VCPROPTAG_LEN(vb.vbt_armclockrate), 464 .vpt_rcode = VCPROPTAG_REQUEST 465 }, 466 .id = VCPROP_CLK_ARM 467 }, 468 .vbt_vpuclockrate = { 469 .tag = { 470 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 471 .vpt_len = VCPROPTAG_LEN(vb.vbt_vpuclockrate), 472 .vpt_rcode = VCPROPTAG_REQUEST 473 }, 474 .id = VCPROP_CLK_CORE 475 }, 476 .vbt_emmc2clockrate = { 477 .tag = { 478 .vpt_tag = VCPROPTAG_GET_CLOCKRATE, 479 .vpt_len = VCPROPTAG_LEN(vb.vbt_emmc2clockrate), 480 .vpt_rcode = VCPROPTAG_REQUEST 481 }, 482 .id = VCPROP_CLK_EMMC2 483 }, 484 .end = { 485 .vpt_tag = VCPROPTAG_NULL 486 } 487 }; 488 489 #if NGENFB > 0 490 static struct { 491 struct vcprop_buffer_hdr vb_hdr; 492 struct vcprop_tag_edidblock vbt_edid; 493 struct vcprop_tag end; 494 } vb_edid __cacheline_aligned = { 495 .vb_hdr = { 496 .vpb_len = sizeof(vb_edid), 497 .vpb_rcode = VCPROP_PROCESS_REQUEST, 498 }, 499 .vbt_edid = { 500 .tag = { 501 .vpt_tag = VCPROPTAG_GET_EDID_BLOCK, 502 .vpt_len = VCPROPTAG_LEN(vb_edid.vbt_edid), 503 .vpt_rcode = VCPROPTAG_REQUEST, 504 }, 505 .blockno = 0, 506 }, 507 .end = { 508 .vpt_tag = VCPROPTAG_NULL 509 } 510 }; 511 512 static struct { 513 struct vcprop_buffer_hdr vb_hdr; 514 struct vcprop_tag_fbres vbt_res; 515 struct vcprop_tag_fbres vbt_vres; 516 struct vcprop_tag_fbdepth vbt_depth; 517 struct vcprop_tag_fbalpha vbt_alpha; 518 struct vcprop_tag_allocbuf vbt_allocbuf; 519 struct vcprop_tag_blankscreen vbt_blank; 520 struct vcprop_tag_fbpitch vbt_pitch; 521 struct vcprop_tag end; 522 } vb_setfb __cacheline_aligned = { 523 .vb_hdr = { 524 .vpb_len = sizeof(vb_setfb), 525 .vpb_rcode = VCPROP_PROCESS_REQUEST, 526 }, 527 .vbt_res = { 528 .tag = { 529 .vpt_tag = VCPROPTAG_SET_FB_RES, 530 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_res), 531 .vpt_rcode = VCPROPTAG_REQUEST, 532 }, 533 .width = 0, 534 .height = 0, 535 }, 536 .vbt_vres = { 537 .tag = { 538 .vpt_tag = VCPROPTAG_SET_FB_VRES, 539 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_vres), 540 .vpt_rcode = VCPROPTAG_REQUEST, 541 }, 542 .width = 0, 543 .height = 0, 544 }, 545 .vbt_depth = { 546 .tag = { 547 .vpt_tag = VCPROPTAG_SET_FB_DEPTH, 548 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_depth), 549 .vpt_rcode = VCPROPTAG_REQUEST, 550 }, 551 .bpp = 32, 552 }, 553 .vbt_alpha = { 554 .tag = { 555 .vpt_tag = VCPROPTAG_SET_FB_ALPHA_MODE, 556 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_alpha), 557 .vpt_rcode = VCPROPTAG_REQUEST, 558 }, 559 .state = VCPROP_ALPHA_IGNORED, 560 }, 561 .vbt_allocbuf = { 562 .tag = { 563 .vpt_tag = VCPROPTAG_ALLOCATE_BUFFER, 564 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_allocbuf), 565 .vpt_rcode = VCPROPTAG_REQUEST, 566 }, 567 .address = PAGE_SIZE, /* alignment */ 568 }, 569 .vbt_blank = { 570 .tag = { 571 .vpt_tag = VCPROPTAG_BLANK_SCREEN, 572 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_blank), 573 .vpt_rcode = VCPROPTAG_REQUEST, 574 }, 575 .state = VCPROP_BLANK_OFF, 576 }, 577 .vbt_pitch = { 578 .tag = { 579 .vpt_tag = VCPROPTAG_GET_FB_PITCH, 580 .vpt_len = VCPROPTAG_LEN(vb_setfb.vbt_pitch), 581 .vpt_rcode = VCPROPTAG_REQUEST, 582 }, 583 }, 584 .end = { 585 .vpt_tag = VCPROPTAG_NULL, 586 }, 587 }; 588 589 #endif 590 591 static int rpi_video_on = WSDISPLAYIO_VIDEO_ON; 592 593 #if defined(RPI_HWCURSOR) 594 #define CURSOR_BITMAP_SIZE (64 * 8) 595 #define CURSOR_ARGB_SIZE (64 * 64 * 4) 596 static uint32_t hcursor = 0; 597 static bus_addr_t pcursor = 0; 598 static uint32_t *cmem = NULL; 599 static int cursor_x = 0, cursor_y = 0, hot_x = 0, hot_y = 0, cursor_on = 0; 600 static uint32_t cursor_cmap[4]; 601 static uint8_t cursor_mask[8 * 64], cursor_bitmap[8 * 64]; 602 #endif 603 604 u_int 605 bcm283x_clk_get_rate_uart(void) 606 { 607 608 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 609 return vb_uart.vbt_uartclockrate.rate; 610 return 0; 611 } 612 613 u_int 614 bcm283x_clk_get_rate_vpu(void) 615 { 616 617 if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag) && 618 vb.vbt_vpuclockrate.rate > 0) { 619 return vb.vbt_vpuclockrate.rate; 620 } 621 return 0; 622 } 623 624 u_int 625 bcm283x_clk_get_rate_emmc(void) 626 { 627 628 if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag) && 629 vb.vbt_emmcclockrate.rate > 0) { 630 return vb.vbt_emmcclockrate.rate; 631 } 632 return 0; 633 } 634 635 u_int 636 bcm283x_clk_get_rate_emmc2(void) 637 { 638 639 if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag) && 640 vb.vbt_emmc2clockrate.rate > 0) { 641 return vb.vbt_emmc2clockrate.rate; 642 } 643 return 0; 644 } 645 646 647 648 static void 649 bcm283x_uartinit(bus_space_tag_t iot, bus_space_handle_t ioh) 650 { 651 uint32_t res; 652 653 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 654 KERN_VTOPHYS((vaddr_t)&vb_uart)); 655 656 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 657 658 /* 659 * RPI4 has Cortex A72 processors which do speculation, so 660 * we need to invalidate the cache for an updates done by 661 * the firmware 662 */ 663 cpu_dcache_inv_range((vaddr_t)&vb_uart, sizeof(vb_uart)); 664 665 if (vcprop_tag_success_p(&vb_uart.vbt_uartclockrate.tag)) 666 uart_clk = vb_uart.vbt_uartclockrate.rate; 667 if (vcprop_tag_success_p(&vb_uart.vbt_vpuclockrate.tag)) 668 core_clk = vb_uart.vbt_vpuclockrate.rate; 669 } 670 671 #if defined(SOC_BCM2835) 672 static void 673 bcm2835_uartinit(void) 674 { 675 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 676 const bus_space_tag_t iot = &bcm2835_bs_tag; 677 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 678 679 bcm283x_uartinit(iot, ioh); 680 } 681 #endif 682 683 #if defined(SOC_BCM2836) 684 static void 685 bcm2836_uartinit(void) 686 { 687 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 688 const bus_space_tag_t iot = &bcm2836_bs_tag; 689 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 690 691 bcm283x_uartinit(iot, ioh); 692 } 693 694 static void 695 bcm2711_uartinit(void) 696 { 697 const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 698 const bus_space_tag_t iot = &bcm2711_bs_tag; 699 const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa); 700 701 bcm283x_uartinit(iot, ioh); 702 } 703 #endif 704 705 #define BCM283x_MINIMUM_SPLIT (128U * 1024 * 1024) 706 707 static size_t bcm283x_memorysize; 708 709 static void 710 bcm283x_bootparams(bus_space_tag_t iot, bus_space_handle_t ioh) 711 { 712 uint32_t res; 713 714 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, ( 715 #if (NSDHC > 0) 716 (1 << VCPM_POWER_SDCARD) | 717 #endif 718 #if (NPLCOM > 0) 719 (1 << VCPM_POWER_UART0) | 720 #endif 721 #if (NBCMDWCTWO > 0) 722 (1 << VCPM_POWER_USB) | 723 #endif 724 #if (NBSCIIC > 0) 725 (1 << VCPM_POWER_I2C0) | (1 << VCPM_POWER_I2C1) | 726 /* (1 << VCPM_POWER_I2C2) | */ 727 #endif 728 #if (NBCMSPI > 0) 729 (1 << VCPM_POWER_SPI) | 730 #endif 731 0) << 4); 732 733 bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANARM2VC, 734 KERN_VTOPHYS((vaddr_t)&vb)); 735 736 bcm2835_mbox_read(iot, ioh, BCMMBOX_CHANARM2VC, &res); 737 738 /* 739 * RPI4 has Cortex A72 processors which do speculation, so 740 * we need to invalidate the cache for an updates done by 741 * the firmware 742 */ 743 cpu_dcache_inv_range((vaddr_t)&vb, sizeof(vb)); 744 745 if (!vcprop_buffer_success_p(&vb.vb_hdr)) { 746 bootconfig.dramblocks = 1; 747 bootconfig.dram[0].address = 0x0; 748 bootconfig.dram[0].pages = atop(BCM283x_MINIMUM_SPLIT); 749 return; 750 } 751 752 struct vcprop_tag_memory *vptp_mem = &vb.vbt_memory; 753 if (vcprop_tag_success_p(&vptp_mem->tag)) { 754 size_t n = vcprop_tag_resplen(&vptp_mem->tag) / 755 sizeof(struct vcprop_memory); 756 757 bcm283x_memorysize = 0; 758 bootconfig.dramblocks = 0; 759 760 for (int i = 0; i < n && i < DRAM_BLOCKS; i++) { 761 bootconfig.dram[i].address = vptp_mem->mem[i].base; 762 bootconfig.dram[i].pages = atop(vptp_mem->mem[i].size); 763 bootconfig.dramblocks++; 764 765 bcm283x_memorysize += vptp_mem->mem[i].size; 766 } 767 } 768 769 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 770 curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate; 771 772 #ifdef VERBOSE_INIT_ARM 773 if (vcprop_tag_success_p(&vb.vbt_memory.tag)) 774 printf("%s: memory size %zu\n", __func__, 775 bcm283x_memorysize); 776 if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) 777 printf("%s: arm clock %d\n", __func__, 778 vb.vbt_armclockrate.rate); 779 if (vcprop_tag_success_p(&vb.vbt_vpuclockrate.tag)) 780 printf("%s: vpu clock %d\n", __func__, 781 vb.vbt_vpuclockrate.rate); 782 if (vcprop_tag_success_p(&vb.vbt_emmcclockrate.tag)) 783 printf("%s: emmc clock %d\n", __func__, 784 vb.vbt_emmcclockrate.rate); 785 if (vcprop_tag_success_p(&vb.vbt_emmc2clockrate.tag)) 786 printf("%s: emmc2 clock %d\n", __func__, 787 vb.vbt_emmcclockrate.rate); 788 if (vcprop_tag_success_p(&vb.vbt_fwrev.tag)) 789 printf("%s: firmware rev %x\n", __func__, 790 vb.vbt_fwrev.rev); 791 if (vcprop_tag_success_p(&vb.vbt_boardmodel.tag)) 792 printf("%s: board model %x\n", __func__, 793 vb.vbt_boardmodel.model); 794 if (vcprop_tag_success_p(&vb.vbt_macaddr.tag)) 795 printf("%s: mac-address %" PRIx64 "\n", __func__, 796 vb.vbt_macaddr.addr); 797 if (vcprop_tag_success_p(&vb.vbt_boardrev.tag)) 798 printf("%s: board rev %x\n", __func__, 799 vb.vbt_boardrev.rev); 800 if (vcprop_tag_success_p(&vb.vbt_serial.tag)) 801 printf("%s: board serial %" PRIx64 "\n", __func__, 802 vb.vbt_serial.sn); 803 if (vcprop_tag_success_p(&vb.vbt_dmachan.tag)) 804 printf("%s: DMA channel mask 0x%08x\n", __func__, 805 vb.vbt_dmachan.mask); 806 807 if (vcprop_tag_success_p(&vb.vbt_cmdline.tag)) 808 printf("%s: cmdline %s\n", __func__, 809 vb.vbt_cmdline.cmdline); 810 #endif 811 } 812 813 #if defined(SOC_BCM2835) 814 static void 815 bcm2835_bootparams(void) 816 { 817 const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 818 const bus_space_tag_t iot = &bcm2835_bs_tag; 819 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 820 821 bcm283x_bootparams(iot, ioh); 822 } 823 #endif 824 825 #if defined(SOC_BCM2836) 826 static void 827 bcm2836_bootparams(void) 828 { 829 const paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 830 const bus_space_tag_t iot = &bcm2836_bs_tag; 831 const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa); 832 833 bcm283x_bootparams(iot, ioh); 834 } 835 836 static void 837 bcm2711_bootparams(void) 838 { 839 const paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE); 840 const bus_space_tag_t iot = &bcm2711_bs_tag; 841 const bus_space_handle_t ioh = BCM2711_IOPHYSTOVIRT(pa); 842 843 bcm283x_bootparams(iot, ioh); 844 } 845 846 #if defined(MULTIPROCESSOR) 847 static int 848 cpu_enable_bcm2836(int phandle) 849 { 850 bus_space_tag_t iot = &bcm2836_bs_tag; 851 bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE; 852 uint64_t mpidr; 853 854 fdtbus_get_reg64(phandle, 0, &mpidr, NULL); 855 856 const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0); 857 858 bus_space_write_4(iot, ioh, BCM2836_LOCAL_MAILBOX3_SETN(cpuno), 859 KERN_VTOPHYS((vaddr_t)cpu_mpstart)); 860 861 return 0; 862 } 863 ARM_CPU_METHOD(bcm2836, "brcm,bcm2836-smp", cpu_enable_bcm2836); 864 #endif 865 866 #endif /* SOC_BCM2836 */ 867 868 #if NGENFB > 0 869 static bool 870 rpi_fb_parse_mode(const char *s, uint32_t *pwidth, uint32_t *pheight) 871 { 872 char *x; 873 874 if (strncmp(s, "disable", 7) == 0) 875 return false; 876 877 x = strchr(s, 'x'); 878 if (x) { 879 *pwidth = strtoul(s, NULL, 10); 880 *pheight = strtoul(x + 1, NULL, 10); 881 } 882 883 return true; 884 } 885 886 #define RPI_EDIDSIZE 1024 887 888 static bool 889 rpi_fb_get_edid_mode(uint32_t *pwidth, uint32_t *pheight) 890 { 891 struct edid_info ei; 892 uint32_t res; 893 int error; 894 895 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_edid, 896 sizeof(vb_edid), &res); 897 if (error) { 898 printf("%s: mbox request failed (%d)\n", __func__, error); 899 return false; 900 } 901 902 if (!vcprop_buffer_success_p(&vb_edid.vb_hdr) || 903 !vcprop_tag_success_p(&vb_edid.vbt_edid.tag) || 904 vb_edid.vbt_edid.status != 0) 905 return false; 906 907 uint8_t *edid_data = kmem_alloc(RPI_EDIDSIZE, KM_SLEEP); 908 909 memset(edid_data, 0, RPI_EDIDSIZE); 910 memcpy(edid_data, vb_edid.vbt_edid.data, 911 sizeof(vb_edid.vbt_edid.data)); 912 edid_parse(edid_data, &ei); 913 #ifdef VERBOSE_INIT_ARM 914 edid_print(&ei); 915 #endif 916 917 if (ei.edid_preferred_mode) { 918 *pwidth = ei.edid_preferred_mode->hdisplay; 919 *pheight = ei.edid_preferred_mode->vdisplay; 920 } 921 922 kmem_free(edid_data, RPI_EDIDSIZE); 923 924 return true; 925 } 926 927 /* 928 * Initialize framebuffer console. 929 * 930 * Some notes about boot parameters: 931 * - If "fb=disable" is present, ignore framebuffer completely. 932 * - If "fb=<width>x<height> is present, use the specified mode. 933 * - If "console=fb" is present, attach framebuffer to console. 934 */ 935 static bool 936 rpi_fb_init(prop_dictionary_t dict, void *aux) 937 { 938 uint32_t width = 0, height = 0; 939 uint32_t res; 940 char *ptr; 941 int integer; 942 int error; 943 bool is_bgr = true; 944 945 if (get_bootconf_option(boot_args, "fb", 946 BOOTOPT_TYPE_STRING, &ptr)) { 947 if (rpi_fb_parse_mode(ptr, &width, &height) == false) 948 return false; 949 } 950 if (width == 0 || height == 0) { 951 rpi_fb_get_edid_mode(&width, &height); 952 } 953 if (width == 0 || height == 0) { 954 width = RPI_FB_WIDTH; 955 height = RPI_FB_HEIGHT; 956 } 957 958 vb_setfb.vbt_res.width = width; 959 vb_setfb.vbt_res.height = height; 960 vb_setfb.vbt_vres.width = width; 961 vb_setfb.vbt_vres.height = height; 962 error = bcmmbox_request(BCMMBOX_CHANARM2VC, &vb_setfb, 963 sizeof(vb_setfb), &res); 964 if (error) { 965 printf("%s: mbox request failed (%d)\n", __func__, error); 966 return false; 967 } 968 969 if (!vcprop_buffer_success_p(&vb_setfb.vb_hdr) || 970 !vcprop_tag_success_p(&vb_setfb.vbt_res.tag) || 971 !vcprop_tag_success_p(&vb_setfb.vbt_vres.tag) || 972 !vcprop_tag_success_p(&vb_setfb.vbt_depth.tag) || 973 !vcprop_tag_success_p(&vb_setfb.vbt_allocbuf.tag) || 974 !vcprop_tag_success_p(&vb_setfb.vbt_blank.tag) || 975 !vcprop_tag_success_p(&vb_setfb.vbt_pitch.tag)) { 976 printf("%s: prop tag failed\n", __func__); 977 return false; 978 } 979 980 #ifdef VERBOSE_INIT_ARM 981 printf("%s: addr = 0x%x size = %d\n", __func__, 982 vb_setfb.vbt_allocbuf.address, 983 vb_setfb.vbt_allocbuf.size); 984 printf("%s: depth = %d\n", __func__, vb_setfb.vbt_depth.bpp); 985 printf("%s: pitch = %d\n", __func__, 986 vb_setfb.vbt_pitch.linebytes); 987 printf("%s: width = %d height = %d\n", __func__, 988 vb_setfb.vbt_res.width, vb_setfb.vbt_res.height); 989 printf("%s: vwidth = %d vheight = %d\n", __func__, 990 vb_setfb.vbt_vres.width, vb_setfb.vbt_vres.height); 991 #endif 992 993 if (vb_setfb.vbt_allocbuf.address == 0 || 994 vb_setfb.vbt_allocbuf.size == 0 || 995 vb_setfb.vbt_res.width == 0 || 996 vb_setfb.vbt_res.height == 0 || 997 vb_setfb.vbt_vres.width == 0 || 998 vb_setfb.vbt_vres.height == 0 || 999 vb_setfb.vbt_pitch.linebytes == 0) { 1000 printf("%s: failed to set mode %ux%u\n", __func__, 1001 width, height); 1002 return false; 1003 } 1004 1005 prop_dictionary_set_uint32(dict, "width", vb_setfb.vbt_res.width); 1006 prop_dictionary_set_uint32(dict, "height", vb_setfb.vbt_res.height); 1007 prop_dictionary_set_uint8(dict, "depth", vb_setfb.vbt_depth.bpp); 1008 prop_dictionary_set_uint16(dict, "linebytes", 1009 vb_setfb.vbt_pitch.linebytes); 1010 prop_dictionary_set_uint32(dict, "address", 1011 vb_setfb.vbt_allocbuf.address); 1012 1013 /* 1014 * Old firmware uses BGR. New firmware uses RGB. The get and set 1015 * pixel order mailbox properties don't seem to work. The firmware 1016 * adds a kernel cmdline option bcm2708_fb.fbswap=<0|1>, so use it 1017 * to determine pixel order. 0 means BGR, 1 means RGB. 1018 * 1019 * See https://github.com/raspberrypi/linux/issues/514 1020 */ 1021 if (get_bootconf_option(boot_args, "bcm2708_fb.fbswap", 1022 BOOTOPT_TYPE_INT, &integer)) { 1023 is_bgr = integer == 0; 1024 } 1025 prop_dictionary_set_bool(dict, "is_bgr", is_bgr); 1026 1027 /* if "genfb.type=<n>" is passed in cmdline, override wsdisplay type */ 1028 if (get_bootconf_option(boot_args, "genfb.type", 1029 BOOTOPT_TYPE_INT, &integer)) { 1030 prop_dictionary_set_uint32(dict, "wsdisplay_type", integer); 1031 } 1032 1033 #if defined(RPI_HWCURSOR) 1034 struct fdt_attach_args *faa = aux; 1035 bus_space_handle_t hc; 1036 1037 hcursor = rpi_alloc_mem(CURSOR_ARGB_SIZE, PAGE_SIZE, 1038 MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_HINT_PERMALOCK); 1039 pcursor = rpi_lock_mem(hcursor); 1040 #ifdef RPI_IOCTL_DEBUG 1041 printf("hcursor: %08x\n", hcursor); 1042 printf("pcursor: %08x\n", (uint32_t)pcursor); 1043 printf("fb: %08x\n", (uint32_t)vb_setfb.vbt_allocbuf.address); 1044 #endif 1045 if (bus_space_map(faa->faa_bst, pcursor, CURSOR_ARGB_SIZE, 1046 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_PREFETCHABLE, &hc) != 0) { 1047 printf("couldn't map cursor memory\n"); 1048 } else { 1049 int i, j, k; 1050 1051 cmem = bus_space_vaddr(faa->faa_bst, hc); 1052 k = 0; 1053 for (j = 0; j < 64; j++) { 1054 for (i = 0; i < 64; i++) { 1055 cmem[i + k] = 1056 ((i & 8) ^ (j & 8)) ? 0xa0ff0000 : 0xa000ff00; 1057 } 1058 k += 64; 1059 } 1060 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1061 rpi_fb_initcursor(pcursor, 0, 0); 1062 #ifdef RPI_IOCTL_DEBUG 1063 rpi_fb_movecursor(600, 400, 1); 1064 #else 1065 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1066 #endif 1067 } 1068 #endif 1069 1070 return true; 1071 } 1072 1073 1074 #if defined(RPI_HWCURSOR) 1075 static int 1076 rpi_fb_do_cursor(struct wsdisplay_cursor *cur) 1077 { 1078 int pos = 0; 1079 int shape = 0; 1080 1081 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 1082 if (cursor_on != cur->enable) { 1083 cursor_on = cur->enable; 1084 pos = 1; 1085 } 1086 } 1087 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 1088 1089 hot_x = cur->hot.x; 1090 hot_y = cur->hot.y; 1091 pos = 1; 1092 shape = 1; 1093 } 1094 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 1095 1096 cursor_x = cur->pos.x; 1097 cursor_y = cur->pos.y; 1098 pos = 1; 1099 } 1100 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 1101 int i; 1102 uint32_t val; 1103 1104 for (i = 0; i < uimin(cur->cmap.count, 3); i++) { 1105 val = (cur->cmap.red[i] << 16 ) | 1106 (cur->cmap.green[i] << 8) | 1107 (cur->cmap.blue[i] ) | 1108 0xff000000; 1109 cursor_cmap[i + cur->cmap.index + 2] = val; 1110 } 1111 shape = 1; 1112 } 1113 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 1114 int err; 1115 1116 err = copyin(cur->mask, cursor_mask, CURSOR_BITMAP_SIZE); 1117 err += copyin(cur->image, cursor_bitmap, CURSOR_BITMAP_SIZE); 1118 if (err != 0) 1119 return EFAULT; 1120 shape = 1; 1121 } 1122 if (shape) { 1123 int i, j, idx; 1124 uint8_t mask; 1125 1126 for (i = 0; i < CURSOR_BITMAP_SIZE; i++) { 1127 mask = 0x01; 1128 for (j = 0; j < 8; j++) { 1129 idx = ((cursor_mask[i] & mask) ? 2 : 0) | 1130 ((cursor_bitmap[i] & mask) ? 1 : 0); 1131 cmem[i * 8 + j] = cursor_cmap[idx]; 1132 mask = mask << 1; 1133 } 1134 } 1135 /* just in case */ 1136 cpu_dcache_wb_range((vaddr_t)cmem, CURSOR_ARGB_SIZE); 1137 rpi_fb_initcursor(pcursor, hot_x, hot_y); 1138 } 1139 if (pos) { 1140 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1141 } 1142 return 0; 1143 } 1144 #endif 1145 1146 static int 1147 rpi_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l) 1148 { 1149 1150 switch (cmd) { 1151 case WSDISPLAYIO_SVIDEO: 1152 { 1153 int d = *(int *)data; 1154 if (d == rpi_video_on) 1155 return 0; 1156 rpi_video_on = d; 1157 rpi_fb_set_video(d); 1158 #if defined(RPI_HWCURSOR) 1159 rpi_fb_movecursor(cursor_x, cursor_y, 1160 d ? cursor_on : 0); 1161 #endif 1162 } 1163 return 0; 1164 case WSDISPLAYIO_GVIDEO: 1165 *(int *)data = rpi_video_on; 1166 return 0; 1167 #if defined(RPI_HWCURSOR) 1168 case WSDISPLAYIO_GCURPOS: 1169 { 1170 struct wsdisplay_curpos *cp = (void *)data; 1171 1172 cp->x = cursor_x; 1173 cp->y = cursor_y; 1174 } 1175 return 0; 1176 case WSDISPLAYIO_SCURPOS: 1177 { 1178 struct wsdisplay_curpos *cp = (void *)data; 1179 1180 cursor_x = cp->x; 1181 cursor_y = cp->y; 1182 rpi_fb_movecursor(cursor_x, cursor_y, cursor_on); 1183 } 1184 return 0; 1185 case WSDISPLAYIO_GCURMAX: 1186 { 1187 struct wsdisplay_curpos *cp = (void *)data; 1188 1189 cp->x = 64; 1190 cp->y = 64; 1191 } 1192 return 0; 1193 case WSDISPLAYIO_SCURSOR: 1194 { 1195 struct wsdisplay_cursor *cursor = (void *)data; 1196 1197 return rpi_fb_do_cursor(cursor); 1198 } 1199 #endif 1200 default: 1201 return EPASSTHROUGH; 1202 } 1203 } 1204 1205 #endif 1206 1207 SYSCTL_SETUP(sysctl_machdep_rpi, "sysctl machdep subtree setup (rpi)") 1208 { 1209 sysctl_createv(clog, 0, NULL, NULL, 1210 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 1211 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL); 1212 1213 sysctl_createv(clog, 0, NULL, NULL, 1214 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1215 CTLTYPE_INT, "firmware_revision", NULL, NULL, 0, 1216 &vb.vbt_fwrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1217 1218 sysctl_createv(clog, 0, NULL, NULL, 1219 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1220 CTLTYPE_INT, "board_model", NULL, NULL, 0, 1221 &vb.vbt_boardmodel.model, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1222 1223 sysctl_createv(clog, 0, NULL, NULL, 1224 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 1225 CTLTYPE_INT, "board_revision", NULL, NULL, 0, 1226 &vb.vbt_boardrev.rev, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1227 1228 sysctl_createv(clog, 0, NULL, NULL, 1229 CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_HEX|CTLFLAG_PRIVATE, 1230 CTLTYPE_QUAD, "serial", NULL, NULL, 0, 1231 &vb.vbt_serial.sn, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL); 1232 } 1233 1234 #if defined(SOC_BCM2835) 1235 static void 1236 bcm2835_platform_bootstrap(void) 1237 { 1238 1239 bcm2835_bs_tag = arm_generic_bs_tag; 1240 bcm2835_a4x_bs_tag = arm_generic_a4x_bs_tag; 1241 1242 bcm2835_bs_tag.bs_map = bcm2835_bs_map; 1243 bcm2835_bs_tag.bs_mmap = bcm2835_bs_mmap; 1244 bcm2835_a4x_bs_tag.bs_map = bcm2835_bs_map; 1245 bcm2835_a4x_bs_tag.bs_mmap = bcm2835_a4x_bs_mmap; 1246 1247 fdtbus_set_decoderegprop(false); 1248 1249 bcm2835_uartinit(); 1250 1251 bcm2835_bootparams(); 1252 } 1253 #endif 1254 1255 #if defined(SOC_BCM2836) 1256 static void 1257 bcm2836_platform_bootstrap(void) 1258 { 1259 1260 bcm2836_bs_tag = arm_generic_bs_tag; 1261 bcm2836_a4x_bs_tag = arm_generic_a4x_bs_tag; 1262 1263 bcm2836_bs_tag.bs_map = bcm2836_bs_map; 1264 bcm2836_bs_tag.bs_mmap = bcm2836_bs_mmap; 1265 bcm2836_a4x_bs_tag.bs_map = bcm2836_bs_map; 1266 bcm2836_a4x_bs_tag.bs_mmap = bcm2836_a4x_bs_mmap; 1267 1268 fdtbus_set_decoderegprop(false); 1269 1270 bcm2836_uartinit(); 1271 1272 bcm2836_bootparams(); 1273 1274 #ifdef MULTIPROCESSOR 1275 arm_cpu_max = RPI_CPU_MAX; 1276 arm_fdt_cpu_bootstrap(); 1277 #endif 1278 } 1279 1280 static void 1281 bcm2711_platform_bootstrap(void) 1282 { 1283 1284 bcm2711_bs_tag = arm_generic_bs_tag; 1285 bcm2711_a4x_bs_tag = arm_generic_a4x_bs_tag; 1286 1287 bcm2711_bs_tag.bs_map = bcm2711_bs_map; 1288 bcm2711_bs_tag.bs_mmap = bcm2711_bs_mmap; 1289 bcm2711_a4x_bs_tag.bs_map = bcm2711_bs_map; 1290 bcm2711_a4x_bs_tag.bs_mmap = bcm2711_a4x_bs_mmap; 1291 1292 fdtbus_set_decoderegprop(false); 1293 1294 bcm2711_uartinit(); 1295 1296 bcm2711_bootparams(); 1297 1298 #ifdef MULTIPROCESSOR 1299 arm_cpu_max = RPI_CPU_MAX; 1300 arm_fdt_cpu_bootstrap(); 1301 #endif 1302 } 1303 #endif 1304 1305 #if defined(SOC_BCM2835) 1306 static void 1307 bcm2835_platform_init_attach_args(struct fdt_attach_args *faa) 1308 { 1309 1310 faa->faa_bst = &bcm2835_bs_tag; 1311 } 1312 #endif 1313 1314 #if defined(SOC_BCM2836) 1315 static void 1316 bcm2836_platform_init_attach_args(struct fdt_attach_args *faa) 1317 { 1318 1319 faa->faa_bst = &bcm2836_bs_tag; 1320 } 1321 1322 static void 1323 bcm2711_platform_init_attach_args(struct fdt_attach_args *faa) 1324 { 1325 1326 faa->faa_bst = &bcm2711_bs_tag; 1327 } 1328 #endif 1329 1330 1331 static void __noasan 1332 bcm283x_platform_early_putchar(vaddr_t va, paddr_t pa, char c) 1333 { 1334 volatile uint32_t *uartaddr = 1335 cpu_earlydevice_va_p() ? 1336 (volatile uint32_t *)va : 1337 (volatile uint32_t *)pa; 1338 1339 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFF) != 0) 1340 continue; 1341 1342 uartaddr[PL01XCOM_DR / 4] = c; 1343 1344 while ((uartaddr[PL01XCOM_FR / 4] & PL01X_FR_TXFE) == 0) 1345 continue; 1346 } 1347 1348 static void __noasan 1349 bcm283x_aux_platform_early_putchar(vaddr_t va, paddr_t pa, char c) 1350 { 1351 volatile uint32_t *uartaddr = 1352 cpu_earlydevice_va_p() ? 1353 (volatile uint32_t *)va : 1354 (volatile uint32_t *)pa; 1355 1356 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 1357 continue; 1358 1359 uartaddr[com_data] = c; 1360 } 1361 1362 void __noasan 1363 bcm2835_platform_early_putchar(char c) 1364 { 1365 paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1366 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1367 1368 bcm283x_platform_early_putchar(va, pa, c); 1369 } 1370 1371 void __noasan 1372 bcm2835_aux_platform_early_putchar(char c) 1373 { 1374 paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE); 1375 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1376 1377 bcm283x_aux_platform_early_putchar(va, pa, c); 1378 } 1379 1380 void __noasan 1381 bcm2836_platform_early_putchar(char c) 1382 { 1383 paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_UART0_BASE); 1384 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1385 1386 bcm283x_platform_early_putchar(va, pa, c); 1387 } 1388 1389 void __noasan 1390 bcm2837_platform_early_putchar(char c) 1391 { 1392 paddr_t pa = BCM2836_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE); 1393 vaddr_t va = BCM2835_IOPHYSTOVIRT(pa); 1394 1395 bcm283x_aux_platform_early_putchar(va, pa, c); 1396 } 1397 1398 void __noasan 1399 bcm2711_platform_early_putchar(char c) 1400 { 1401 paddr_t pa = BCM2711_PERIPHERALS_BUS_TO_PHYS(BCM2835_AUX_UART_BASE); 1402 vaddr_t va = BCM2711_IOPHYSTOVIRT(pa); 1403 1404 bcm283x_aux_platform_early_putchar(va, pa, c); 1405 } 1406 1407 #define BCM283x_REF_FREQ 19200000 1408 1409 static void 1410 bcm283x_platform_device_register(device_t dev, void *aux) 1411 { 1412 prop_dictionary_t dict = device_properties(dev); 1413 1414 if (device_is_a(dev, "bcmdmac") && 1415 vcprop_tag_success_p(&vb.vbt_dmachan.tag)) { 1416 prop_dictionary_set_uint32(dict, 1417 "chanmask", vb.vbt_dmachan.mask); 1418 } 1419 #if NSDHC > 0 1420 if (booted_device == NULL && 1421 device_is_a(dev, "ld") && 1422 device_is_a(device_parent(dev), "sdmmc")) { 1423 booted_partition = 0; 1424 booted_device = dev; 1425 } 1426 #endif 1427 if ((device_is_a(dev, "usmsc") || 1428 device_is_a(dev, "mue") || 1429 device_is_a(dev, "genet")) && 1430 vcprop_tag_success_p(&vb.vbt_macaddr.tag)) { 1431 const uint8_t enaddr[ETHER_ADDR_LEN] = { 1432 (vb.vbt_macaddr.addr >> 0) & 0xff, 1433 (vb.vbt_macaddr.addr >> 8) & 0xff, 1434 (vb.vbt_macaddr.addr >> 16) & 0xff, 1435 (vb.vbt_macaddr.addr >> 24) & 0xff, 1436 (vb.vbt_macaddr.addr >> 32) & 0xff, 1437 (vb.vbt_macaddr.addr >> 40) & 0xff 1438 }; 1439 1440 prop_dictionary_set_data(dict, "mac-address", enaddr, 1441 ETHER_ADDR_LEN); 1442 } 1443 1444 #if NGENFB > 0 1445 if (device_is_a(dev, "genfb")) { 1446 char *ptr; 1447 1448 bcmgenfb_set_console_dev(dev); 1449 bcmgenfb_set_ioctl(&rpi_ioctl); 1450 #ifdef DDB 1451 db_trap_callback = bcmgenfb_ddb_trap_callback; 1452 #endif 1453 if (rpi_fb_init(dict, aux) == false) 1454 return; 1455 if (get_bootconf_option(boot_args, "console", 1456 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { 1457 prop_dictionary_set_bool(dict, "is_console", true); 1458 #if NUKBD > 0 1459 /* allow ukbd to be the console keyboard */ 1460 ukbd_cnattach(); 1461 #endif 1462 } else { 1463 prop_dictionary_set_bool(dict, "is_console", false); 1464 } 1465 } 1466 #endif 1467 } 1468 1469 static u_int 1470 bcm283x_platform_uart_freq(void) 1471 { 1472 1473 /* 1474 * We are safe to access stdout phandle - consinit did before 1475 * calling ap_uart_freq 1476 */ 1477 const int phandle = fdtbus_get_stdout_phandle(); 1478 1479 static const char * const aux_compatible[] = { 1480 "brcm,bcm2835-aux-uart", 1481 NULL 1482 }; 1483 1484 if (of_match_compatible(phandle, aux_compatible)) 1485 return core_clk * 2; 1486 1487 return uart_clk; 1488 } 1489 1490 #if defined(SOC_BCM2835) 1491 static const struct arm_platform bcm2835_platform = { 1492 .ap_devmap = bcm2835_platform_devmap, 1493 .ap_bootstrap = bcm2835_platform_bootstrap, 1494 .ap_init_attach_args = bcm2835_platform_init_attach_args, 1495 .ap_device_register = bcm283x_platform_device_register, 1496 .ap_reset = bcm2835_system_reset, 1497 .ap_delay = bcm2835_tmr_delay, 1498 .ap_uart_freq = bcm283x_platform_uart_freq, 1499 }; 1500 1501 ARM_PLATFORM(bcm2835, "brcm,bcm2835", &bcm2835_platform); 1502 #endif 1503 1504 #if defined(SOC_BCM2836) 1505 1506 static const struct arm_platform bcm2836_platform = { 1507 .ap_devmap = bcm2836_platform_devmap, 1508 .ap_bootstrap = bcm2836_platform_bootstrap, 1509 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1510 .ap_device_register = bcm283x_platform_device_register, 1511 .ap_reset = bcm2835_system_reset, 1512 .ap_delay = gtmr_delay, 1513 .ap_uart_freq = bcm283x_platform_uart_freq, 1514 .ap_mpstart = arm_fdt_cpu_mpstart, 1515 }; 1516 1517 static const struct arm_platform bcm2837_platform = { 1518 .ap_devmap = bcm2836_platform_devmap, 1519 .ap_bootstrap = bcm2836_platform_bootstrap, 1520 .ap_init_attach_args = bcm2836_platform_init_attach_args, 1521 .ap_device_register = bcm283x_platform_device_register, 1522 .ap_reset = bcm2835_system_reset, 1523 .ap_delay = gtmr_delay, 1524 .ap_uart_freq = bcm283x_platform_uart_freq, 1525 .ap_mpstart = arm_fdt_cpu_mpstart, 1526 }; 1527 1528 static const struct arm_platform bcm2711_platform = { 1529 .ap_devmap = bcm2711_platform_devmap, 1530 .ap_bootstrap = bcm2711_platform_bootstrap, 1531 .ap_init_attach_args = bcm2711_platform_init_attach_args, 1532 .ap_device_register = bcm283x_platform_device_register, 1533 .ap_reset = bcm2835_system_reset, 1534 .ap_delay = gtmr_delay, 1535 .ap_uart_freq = bcm283x_platform_uart_freq, 1536 .ap_mpstart = arm_fdt_cpu_mpstart, 1537 }; 1538 1539 ARM_PLATFORM(bcm2836, "brcm,bcm2836", &bcm2836_platform); 1540 ARM_PLATFORM(bcm2837, "brcm,bcm2837", &bcm2837_platform); 1541 ARM_PLATFORM(bcm2711, "brcm,bcm2711", &bcm2711_platform); 1542 #endif 1543
Indexes created Tue Sep 30 11:09:46 GMT 2025