1 1.1 matt /*- 2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 1.1 matt * All rights reserved. 4 1.1 matt * 5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation 6 1.1 matt * by Matt Thomas of 3am Software Foundry. 7 1.1 matt * 8 1.1 matt * Redistribution and use in source and binary forms, with or without 9 1.1 matt * modification, are permitted provided that the following conditions 10 1.1 matt * are met: 11 1.1 matt * 1. Redistributions of source code must retain the above copyright 12 1.1 matt * notice, this list of conditions and the following disclaimer. 13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright 14 1.1 matt * notice, this list of conditions and the following disclaimer in the 15 1.1 matt * documentation and/or other materials provided with the distribution. 16 1.1 matt * 17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 1.1 matt * POSSIBILITY OF SUCH DAMAGE. 28 1.1 matt */ 29 1.1 matt 30 1.10 matt #define _ARM32_BUS_DMA_PRIVATE 31 1.1 matt #define GMAC_PRIVATE 32 1.1 matt 33 1.1 matt #include "locators.h" 34 1.18 matt #include "opt_broadcom.h" 35 1.1 matt 36 1.1 matt #include <sys/cdefs.h> 37 1.1 matt 38 1.45 andvar __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.45 2024/12/04 21:18:34 andvar Exp $"); 39 1.1 matt 40 1.1 matt #include <sys/param.h> 41 1.2 matt #include <sys/atomic.h> 42 1.1 matt #include <sys/bus.h> 43 1.1 matt #include <sys/device.h> 44 1.2 matt #include <sys/ioctl.h> 45 1.1 matt #include <sys/intr.h> 46 1.2 matt #include <sys/kmem.h> 47 1.1 matt #include <sys/mutex.h> 48 1.2 matt #include <sys/socket.h> 49 1.1 matt #include <sys/systm.h> 50 1.8 matt #include <sys/workqueue.h> 51 1.1 matt 52 1.1 matt #include <net/if.h> 53 1.1 matt #include <net/if_ether.h> 54 1.1 matt #include <net/if_media.h> 55 1.2 matt #include <net/if_dl.h> 56 1.2 matt #include <net/bpf.h> 57 1.2 matt 58 1.1 matt #include <dev/mii/miivar.h> 59 1.1 matt 60 1.26 matt #include <arm/locore.h> 61 1.26 matt 62 1.1 matt #include <arm/broadcom/bcm53xx_reg.h> 63 1.1 matt #include <arm/broadcom/bcm53xx_var.h> 64 1.1 matt 65 1.16 matt //#define BCMETH_MPSAFE 66 1.16 matt 67 1.18 matt #ifdef BCMETH_COUNTERS 68 1.36 msaitoh #define BCMETH_EVCNT_ADD(a, b) ((void)((a).ev_count += (b))) 69 1.18 matt #else 70 1.36 msaitoh #define BCMETH_EVCNT_ADD(a, b) do { } while (/*CONSTCOND*/0) 71 1.18 matt #endif 72 1.18 matt #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1) 73 1.18 matt 74 1.10 matt #define BCMETH_MAXTXMBUFS 128 75 1.2 matt #define BCMETH_NTXSEGS 30 76 1.2 matt #define BCMETH_MAXRXMBUFS 255 77 1.8 matt #define BCMETH_MINRXMBUFS 64 78 1.2 matt #define BCMETH_NRXSEGS 1 79 1.8 matt #define BCMETH_RINGSIZE PAGE_SIZE 80 1.2 matt 81 1.19 matt #if 1 82 1.10 matt #define BCMETH_RCVMAGIC 0xfeedface 83 1.16 matt #endif 84 1.10 matt 85 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *); 86 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *); 87 1.1 matt 88 1.2 matt struct bcmeth_txqueue { 89 1.2 matt bus_dmamap_t txq_descmap; 90 1.2 matt struct gmac_txdb *txq_consumer; 91 1.2 matt struct gmac_txdb *txq_producer; 92 1.2 matt struct gmac_txdb *txq_first; 93 1.2 matt struct gmac_txdb *txq_last; 94 1.2 matt struct ifqueue txq_mbufs; 95 1.2 matt struct mbuf *txq_next; 96 1.2 matt size_t txq_free; 97 1.2 matt size_t txq_threshold; 98 1.2 matt size_t txq_lastintr; 99 1.2 matt bus_size_t txq_reg_xmtaddrlo; 100 1.2 matt bus_size_t txq_reg_xmtptr; 101 1.2 matt bus_size_t txq_reg_xmtctl; 102 1.2 matt bus_size_t txq_reg_xmtsts0; 103 1.10 matt bus_size_t txq_reg_xmtsts1; 104 1.2 matt bus_dma_segment_t txq_descmap_seg; 105 1.2 matt }; 106 1.2 matt 107 1.2 matt struct bcmeth_rxqueue { 108 1.2 matt bus_dmamap_t rxq_descmap; 109 1.2 matt struct gmac_rxdb *rxq_consumer; 110 1.2 matt struct gmac_rxdb *rxq_producer; 111 1.2 matt struct gmac_rxdb *rxq_first; 112 1.2 matt struct gmac_rxdb *rxq_last; 113 1.2 matt struct mbuf *rxq_mhead; 114 1.2 matt struct mbuf **rxq_mtail; 115 1.2 matt struct mbuf *rxq_mconsumer; 116 1.2 matt size_t rxq_inuse; 117 1.2 matt size_t rxq_threshold; 118 1.2 matt bus_size_t rxq_reg_rcvaddrlo; 119 1.2 matt bus_size_t rxq_reg_rcvptr; 120 1.2 matt bus_size_t rxq_reg_rcvctl; 121 1.2 matt bus_size_t rxq_reg_rcvsts0; 122 1.10 matt bus_size_t rxq_reg_rcvsts1; 123 1.2 matt bus_dma_segment_t rxq_descmap_seg; 124 1.2 matt }; 125 1.2 matt 126 1.2 matt struct bcmeth_mapcache { 127 1.2 matt u_int dmc_nmaps; 128 1.2 matt u_int dmc_maxseg; 129 1.2 matt u_int dmc_maxmaps; 130 1.2 matt u_int dmc_maxmapsize; 131 1.2 matt bus_dmamap_t dmc_maps[0]; 132 1.2 matt }; 133 1.2 matt 134 1.1 matt struct bcmeth_softc { 135 1.1 matt device_t sc_dev; 136 1.1 matt bus_space_tag_t sc_bst; 137 1.1 matt bus_space_handle_t sc_bsh; 138 1.1 matt bus_dma_tag_t sc_dmat; 139 1.1 matt kmutex_t *sc_lock; 140 1.1 matt kmutex_t *sc_hwlock; 141 1.1 matt struct ethercom sc_ec; 142 1.2 matt #define sc_if sc_ec.ec_if 143 1.2 matt struct ifmedia sc_media; 144 1.2 matt void *sc_soft_ih; 145 1.1 matt void *sc_ih; 146 1.2 matt 147 1.2 matt struct bcmeth_rxqueue sc_rxq; 148 1.2 matt struct bcmeth_txqueue sc_txq; 149 1.2 matt 150 1.19 matt size_t sc_rcvoffset; 151 1.21 matt uint32_t sc_macaddr[2]; 152 1.2 matt uint32_t sc_maxfrm; 153 1.2 matt uint32_t sc_cmdcfg; 154 1.15 matt uint32_t sc_intmask; 155 1.8 matt uint32_t sc_rcvlazy; 156 1.2 matt volatile uint32_t sc_soft_flags; 157 1.2 matt #define SOFT_RXINTR 0x01 158 1.8 matt #define SOFT_TXINTR 0x02 159 1.2 matt 160 1.18 matt #ifdef BCMETH_COUNTERS 161 1.2 matt struct evcnt sc_ev_intr; 162 1.2 matt struct evcnt sc_ev_soft_intr; 163 1.10 matt struct evcnt sc_ev_work; 164 1.2 matt struct evcnt sc_ev_tx_stall; 165 1.10 matt struct evcnt sc_ev_rx_badmagic_lo; 166 1.10 matt struct evcnt sc_ev_rx_badmagic_hi; 167 1.18 matt #endif 168 1.2 matt 169 1.2 matt struct ifqueue sc_rx_bufcache; 170 1.35 msaitoh struct bcmeth_mapcache *sc_rx_mapcache; 171 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache; 172 1.2 matt 173 1.8 matt struct workqueue *sc_workq; 174 1.8 matt struct work sc_work; 175 1.8 matt 176 1.8 matt volatile uint32_t sc_work_flags; 177 1.8 matt #define WORK_RXINTR 0x01 178 1.8 matt #define WORK_RXUNDERFLOW 0x02 179 1.8 matt #define WORK_REINIT 0x04 180 1.8 matt 181 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN]; 182 1.1 matt }; 183 1.1 matt 184 1.2 matt static void bcmeth_ifstart(struct ifnet *); 185 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *); 186 1.2 matt static int bcmeth_ifinit(struct ifnet *); 187 1.2 matt static void bcmeth_ifstop(struct ifnet *, int); 188 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *); 189 1.2 matt 190 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *, 191 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t); 192 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *, 193 1.2 matt struct bcmeth_mapcache *); 194 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *, 195 1.2 matt struct bcmeth_mapcache *); 196 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *, 197 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t); 198 1.2 matt 199 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *, 200 1.2 matt struct bcmeth_txqueue *, u_int); 201 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *, 202 1.2 matt struct bcmeth_txqueue *); 203 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *, 204 1.2 matt struct bcmeth_txqueue *); 205 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *, 206 1.2 matt struct bcmeth_txqueue *); 207 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *, 208 1.2 matt struct bcmeth_txqueue *, struct mbuf *m); 209 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *, 210 1.2 matt struct bcmeth_txqueue *); 211 1.2 matt 212 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *, 213 1.2 matt struct bcmeth_rxqueue *, u_int); 214 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *, 215 1.2 matt struct bcmeth_rxqueue *); 216 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *, 217 1.2 matt struct bcmeth_rxqueue *, bool); 218 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *, 219 1.2 matt struct bcmeth_rxqueue *); 220 1.2 matt 221 1.1 matt static int bcmeth_intr(void *); 222 1.16 matt #ifdef BCMETH_MPSAFETX 223 1.16 matt static void bcmeth_soft_txintr(struct bcmeth_softc *); 224 1.16 matt #endif 225 1.2 matt static void bcmeth_soft_intr(void *); 226 1.8 matt static void bcmeth_worker(struct work *, void *); 227 1.2 matt 228 1.2 matt static int bcmeth_mediachange(struct ifnet *); 229 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *); 230 1.1 matt 231 1.1 matt static inline uint32_t 232 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o) 233 1.1 matt { 234 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 235 1.1 matt } 236 1.1 matt 237 1.1 matt static inline void 238 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v) 239 1.1 matt { 240 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 241 1.1 matt } 242 1.1 matt 243 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc), 244 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL); 245 1.1 matt 246 1.1 matt static int 247 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux) 248 1.1 matt { 249 1.1 matt struct bcmccb_attach_args * const ccbaa = aux; 250 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 251 1.1 matt 252 1.1 matt if (strcmp(cf->cf_name, loc->loc_name)) 253 1.1 matt return 0; 254 1.1 matt 255 1.43 skrll const int port __diagused = cf->cf_loc[BCMCCBCF_PORT]; 256 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port); 257 1.1 matt 258 1.1 matt return 1; 259 1.1 matt } 260 1.1 matt 261 1.1 matt static void 262 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux) 263 1.1 matt { 264 1.1 matt struct bcmeth_softc * const sc = device_private(self); 265 1.2 matt struct ethercom * const ec = &sc->sc_ec; 266 1.2 matt struct ifnet * const ifp = &ec->ec_if; 267 1.1 matt struct bcmccb_attach_args * const ccbaa = aux; 268 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 269 1.2 matt const char * const xname = device_xname(self); 270 1.2 matt prop_dictionary_t dict = device_properties(self); 271 1.2 matt int error; 272 1.1 matt 273 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst; 274 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat; 275 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh, 276 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh); 277 1.1 matt 278 1.10 matt /* 279 1.11 matt * We need to use the coherent dma tag for the GMAC. 280 1.10 matt */ 281 1.11 matt sc->sc_dmat = &bcm53xx_coherent_dma_tag; 282 1.24 matt #if _ARM32_NEED_BUS_DMA_BOUNCE 283 1.24 matt if (device_cfdata(self)->cf_flags & 2) { 284 1.24 matt sc->sc_dmat = &bcm53xx_bounce_dma_tag; 285 1.24 matt } 286 1.24 matt #endif 287 1.10 matt 288 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address"); 289 1.35 msaitoh if (eaprop == NULL) { 290 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0); 291 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1); 292 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) { 293 1.2 matt aprint_error(": mac-address property is missing\n"); 294 1.2 matt return; 295 1.2 matt } 296 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff; 297 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff; 298 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff; 299 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff; 300 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff; 301 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff; 302 1.2 matt } else { 303 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA); 304 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN); 305 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop), 306 1.2 matt ETHER_ADDR_LEN); 307 1.2 matt } 308 1.2 matt sc->sc_dev = self; 309 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); 310 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM); 311 1.2 matt 312 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts 313 1.1 matt 314 1.1 matt aprint_naive("\n"); 315 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n"); 316 1.1 matt 317 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0); 318 1.2 matt if (error) { 319 1.2 matt aprint_error(": failed to init rxq: %d\n", error); 320 1.30 msaitoh goto fail_1; 321 1.2 matt } 322 1.2 matt 323 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0); 324 1.2 matt if (error) { 325 1.2 matt aprint_error(": failed to init txq: %d\n", error); 326 1.30 msaitoh goto fail_1; 327 1.2 matt } 328 1.2 matt 329 1.35 msaitoh error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache, 330 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS); 331 1.2 matt if (error) { 332 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error); 333 1.30 msaitoh goto fail_1; 334 1.2 matt } 335 1.2 matt 336 1.35 msaitoh error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 337 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS); 338 1.2 matt if (error) { 339 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error); 340 1.30 msaitoh goto fail_1; 341 1.2 matt } 342 1.2 matt 343 1.8 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc, 344 1.9 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU); 345 1.8 matt if (error) { 346 1.8 matt aprint_error(": failed to create workqueue: %d\n", error); 347 1.44 skrll goto fail_1; 348 1.8 matt } 349 1.8 matt 350 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET, 351 1.2 matt bcmeth_soft_intr, sc); 352 1.1 matt 353 1.44 skrll if (sc->sc_soft_ih == NULL) { 354 1.44 skrll aprint_error_dev(self, "failed to establish soft interrupt\n"); 355 1.44 skrll goto fail_2; 356 1.30 msaitoh } 357 1.30 msaitoh 358 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL, 359 1.1 matt bcmeth_intr, sc); 360 1.1 matt 361 1.1 matt if (sc->sc_ih == NULL) { 362 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n", 363 1.1 matt loc->loc_intrs[0]); 364 1.44 skrll goto fail_3; 365 1.1 matt } else { 366 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n", 367 1.1 matt loc->loc_intrs[0]); 368 1.1 matt } 369 1.2 matt 370 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 371 1.2 matt ether_sprintf(sc->sc_enaddr)); 372 1.2 matt 373 1.2 matt /* 374 1.2 matt * Since each port in plugged into the switch/flow-accelerator, 375 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled. 376 1.2 matt */ 377 1.36 msaitoh int ifmedia = IFM_ETHER | IFM_1000_T | IFM_FDX; 378 1.36 msaitoh //ifmedia |= IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE; 379 1.37 msaitoh ec->ec_ifmedia = &sc->sc_media; 380 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange, 381 1.2 matt bcmeth_mediastatus); 382 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL); 383 1.2 matt ifmedia_set(&sc->sc_media, ifmedia); 384 1.2 matt 385 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU; 386 1.2 matt 387 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ); 388 1.2 matt ifp->if_softc = sc; 389 1.2 matt ifp->if_baudrate = IF_Mbps(1000); 390 1.2 matt ifp->if_capabilities = 0; 391 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 392 1.16 matt #ifdef BCMETH_MPSAFE 393 1.16 matt ifp->if_flags2 = IFF2_MPSAFE; 394 1.16 matt #endif 395 1.2 matt ifp->if_ioctl = bcmeth_ifioctl; 396 1.2 matt ifp->if_start = bcmeth_ifstart; 397 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog; 398 1.2 matt ifp->if_init = bcmeth_ifinit; 399 1.2 matt ifp->if_stop = bcmeth_ifstop; 400 1.2 matt IFQ_SET_READY(&ifp->if_snd); 401 1.2 matt 402 1.2 matt bcmeth_ifstop(ifp, true); 403 1.2 matt 404 1.2 matt /* 405 1.2 matt * Attach the interface. 406 1.2 matt */ 407 1.41 riastrad if_initialize(ifp); 408 1.2 matt ether_ifattach(ifp, sc->sc_enaddr); 409 1.27 ozaki if_register(ifp); 410 1.2 matt 411 1.18 matt #ifdef BCMETH_COUNTERS 412 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, 413 1.2 matt NULL, xname, "intr"); 414 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR, 415 1.2 matt NULL, xname, "soft intr"); 416 1.8 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC, 417 1.8 matt NULL, xname, "work items"); 418 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC, 419 1.2 matt NULL, xname, "tx stalls"); 420 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC, 421 1.10 matt NULL, xname, "rx badmagic lo"); 422 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC, 423 1.10 matt NULL, xname, "rx badmagic hi"); 424 1.18 matt #endif 425 1.30 msaitoh 426 1.30 msaitoh return; 427 1.30 msaitoh 428 1.30 msaitoh fail_3: 429 1.30 msaitoh softint_disestablish(sc->sc_soft_ih); 430 1.35 msaitoh fail_2: 431 1.30 msaitoh workqueue_destroy(sc->sc_workq); 432 1.35 msaitoh fail_1: 433 1.30 msaitoh mutex_obj_free(sc->sc_lock); 434 1.30 msaitoh mutex_obj_free(sc->sc_hwlock); 435 1.2 matt } 436 1.2 matt 437 1.2 matt static int 438 1.2 matt bcmeth_mediachange(struct ifnet *ifp) 439 1.2 matt { 440 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc; 441 1.2 matt return 0; 442 1.2 matt } 443 1.2 matt 444 1.2 matt static void 445 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm) 446 1.2 matt { 447 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc; 448 1.2 matt 449 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE; 450 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T; 451 1.2 matt } 452 1.2 matt 453 1.2 matt static uint64_t 454 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr) 455 1.2 matt { 456 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0 457 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0 458 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0 459 1.19 matt | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0 460 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1 461 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1 462 1.2 matt } 463 1.2 matt 464 1.2 matt static int 465 1.2 matt bcmeth_ifinit(struct ifnet *ifp) 466 1.2 matt { 467 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc; 468 1.2 matt int error = 0; 469 1.2 matt 470 1.32 riastrad sc->sc_maxfrm = uimax(ifp->if_mtu + 32, MCLBYTES); 471 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO) 472 1.2 matt return error; 473 1.2 matt 474 1.2 matt KASSERT(ifp->if_flags & IFF_UP); 475 1.2 matt 476 1.2 matt /* 477 1.2 matt * Stop the interface 478 1.2 matt */ 479 1.2 matt bcmeth_ifstop(ifp, 0); 480 1.2 matt 481 1.2 matt /* 482 1.19 matt * Reserve enough space at the front so that we can insert a maxsized 483 1.19 matt * link header and a VLAN tag. Also make sure we have enough room for 484 1.19 matt * the rcvsts field as well. 485 1.19 matt */ 486 1.19 matt KASSERT(ALIGN(max_linkhdr) == max_linkhdr); 487 1.19 matt KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu", 488 1.19 matt max_linkhdr, sizeof(struct ether_header)); 489 1.19 matt sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header); 490 1.19 matt if (sc->sc_rcvoffset <= 4) 491 1.19 matt sc->sc_rcvoffset += 4; 492 1.19 matt KASSERT((sc->sc_rcvoffset & 3) == 2); 493 1.19 matt KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET)); 494 1.19 matt KASSERT(sc->sc_rcvoffset >= 6); 495 1.19 matt 496 1.19 matt /* 497 1.2 matt * If our frame size has changed (or it's our first time through) 498 1.2 matt * destroy the existing transmit mapcache. 499 1.2 matt */ 500 1.2 matt if (sc->sc_tx_mapcache != NULL 501 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) { 502 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache); 503 1.2 matt sc->sc_tx_mapcache = NULL; 504 1.2 matt } 505 1.2 matt 506 1.2 matt if (sc->sc_tx_mapcache == NULL) { 507 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 508 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS); 509 1.2 matt if (error) 510 1.2 matt return error; 511 1.2 matt } 512 1.2 matt 513 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE 514 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED) 515 1.2 matt | RX_ENA | TX_ENA; 516 1.2 matt 517 1.2 matt if (ifp->if_flags & IFF_PROMISC) { 518 1.2 matt sc->sc_cmdcfg |= PROMISC_EN; 519 1.2 matt } else { 520 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN; 521 1.2 matt } 522 1.2 matt 523 1.21 matt const uint8_t * const lladdr = CLLADDR(ifp->if_sadl); 524 1.21 matt const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr); 525 1.21 matt 526 1.21 matt /* 527 1.21 matt * We make sure that a received Ethernet packet start on a non-word 528 1.21 matt * boundary so that the packet payload will be on a word boundary. 529 1.21 matt * So to check the destination address we keep around two words to 530 1.21 matt * quickly compare with. 531 1.21 matt */ 532 1.21 matt #if __ARMEL__ 533 1.21 matt sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8); 534 1.21 matt sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8) 535 1.21 matt | (lladdr[4] << 16) | (lladdr[5] << 24); 536 1.21 matt #else 537 1.21 matt sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8); 538 1.21 matt sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8) 539 1.21 matt | (lladdr[1] << 16) | (lladdr[2] << 24); 540 1.21 matt #endif 541 1.2 matt 542 1.36 msaitoh sc->sc_intmask = DESCPROTOERR | DATAERR | DESCERR; 543 1.2 matt 544 1.2 matt /* 5. Load RCVADDR_LO with new pointer */ 545 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq); 546 1.2 matt 547 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 548 1.19 matt __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET) 549 1.2 matt | RCVCTL_PARITY_DIS 550 1.2 matt | RCVCTL_OFLOW_CONTINUE 551 1.17 matt | __SHIFTIN(3, RCVCTL_BURSTLEN)); 552 1.2 matt 553 1.2 matt /* 6. Load XMTADDR_LO with new pointer */ 554 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq); 555 1.2 matt 556 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX 557 1.2 matt | XMTCTL_PARITY_DIS 558 1.17 matt | __SHIFTIN(3, XMTCTL_BURSTLEN)); 559 1.2 matt 560 1.2 matt /* 7. Setup other UNIMAC registers */ 561 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm); 562 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0)); 563 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32)); 564 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg); 565 1.2 matt 566 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); 567 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 568 1.2 matt devctl &= ~FLOW_CTRL_MODE; 569 1.2 matt devctl &= ~MIB_RD_RESET_EN; 570 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 571 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON; 572 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 573 1.2 matt 574 1.3 matt /* Setup lazy receive (at most 1ms). */ 575 1.22 matt const struct cpu_softc * const cpu = curcpu()->ci_softc; 576 1.8 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT) 577 1.22 matt | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT); 578 1.8 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy); 579 1.3 matt 580 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */ 581 1.36 msaitoh sc->sc_intmask |= XMTINT_0 | XMTUF; 582 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, 583 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE); 584 1.2 matt 585 1.2 matt 586 1.2 matt /* 12. Enable receive queues in RQUEUE, */ 587 1.36 msaitoh sc->sc_intmask |= RCVINT | RCVDESCUF | RCVFIFOOF; 588 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 589 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE); 590 1.2 matt 591 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */ 592 1.3 matt 593 1.3 matt #if 0 594 1.3 matt aprint_normal_dev(sc->sc_dev, 595 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 596 1.3 matt devctl, sc->sc_cmdcfg, 597 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl), 598 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl)); 599 1.2 matt #endif 600 1.2 matt 601 1.2 matt sc->sc_soft_flags = 0; 602 1.2 matt 603 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 604 1.2 matt 605 1.2 matt ifp->if_flags |= IFF_RUNNING; 606 1.2 matt 607 1.2 matt return error; 608 1.2 matt } 609 1.2 matt 610 1.2 matt static void 611 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable) 612 1.2 matt { 613 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc; 614 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq; 615 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 616 1.2 matt 617 1.2 matt KASSERT(!cpu_intr_p()); 618 1.2 matt 619 1.2 matt sc->sc_soft_flags = 0; 620 1.16 matt sc->sc_work_flags = 0; 621 1.2 matt 622 1.2 matt /* Disable Rx processing */ 623 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl, 624 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE); 625 1.2 matt 626 1.2 matt /* Disable Tx processing */ 627 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl, 628 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE); 629 1.2 matt 630 1.2 matt /* Disable all interrupts */ 631 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); 632 1.2 matt 633 1.2 matt for (;;) { 634 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 635 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 636 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS 637 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS) 638 1.2 matt break; 639 1.2 matt delay(50); 640 1.2 matt } 641 1.2 matt /* 642 1.2 matt * Now reset the controller. 643 1.2 matt * 644 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register 645 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register 646 1.2 matt */ 647 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET); 648 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0); 649 1.2 matt sc->sc_intmask = 0; 650 1.2 matt ifp->if_flags &= ~IFF_RUNNING; 651 1.2 matt 652 1.2 matt /* 653 1.2 matt * Let's consume any remaining transmitted packets. And if we are 654 1.2 matt * disabling the interface, purge ourselves of any untransmitted 655 1.2 matt * packets. But don't consume any received packets, just drop them. 656 1.2 matt * If we aren't disabling the interface, save the mbufs in the 657 1.2 matt * receive queue for reuse. 658 1.2 matt */ 659 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable); 660 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq); 661 1.2 matt if (disable) { 662 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq); 663 1.2 matt IF_PURGE(&ifp->if_snd); 664 1.2 matt } 665 1.2 matt 666 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0); 667 1.2 matt } 668 1.2 matt 669 1.2 matt static void 670 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp) 671 1.2 matt { 672 1.2 matt } 673 1.2 matt 674 1.2 matt static int 675 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 676 1.2 matt { 677 1.2 matt const int s = splnet(); 678 1.2 matt int error; 679 1.2 matt 680 1.2 matt switch (cmd) { 681 1.2 matt default: 682 1.2 matt error = ether_ioctl(ifp, cmd, data); 683 1.2 matt if (error != ENETRESET) 684 1.2 matt break; 685 1.2 matt 686 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) { 687 1.2 matt error = 0; 688 1.2 matt break; 689 1.2 matt } 690 1.2 matt error = bcmeth_ifinit(ifp); 691 1.2 matt break; 692 1.2 matt } 693 1.2 matt 694 1.2 matt splx(s); 695 1.2 matt return error; 696 1.2 matt } 697 1.2 matt 698 1.2 matt static void 699 1.2 matt bcmeth_rxq_desc_presync( 700 1.2 matt struct bcmeth_softc *sc, 701 1.2 matt struct bcmeth_rxqueue *rxq, 702 1.2 matt struct gmac_rxdb *rxdb, 703 1.2 matt size_t count) 704 1.2 matt { 705 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 706 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 707 1.2 matt BUS_DMASYNC_PREWRITE); 708 1.2 matt } 709 1.2 matt 710 1.2 matt static void 711 1.2 matt bcmeth_rxq_desc_postsync( 712 1.2 matt struct bcmeth_softc *sc, 713 1.2 matt struct bcmeth_rxqueue *rxq, 714 1.2 matt struct gmac_rxdb *rxdb, 715 1.2 matt size_t count) 716 1.2 matt { 717 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 718 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 719 1.2 matt BUS_DMASYNC_POSTWRITE); 720 1.2 matt } 721 1.2 matt 722 1.2 matt static void 723 1.2 matt bcmeth_txq_desc_presync( 724 1.2 matt struct bcmeth_softc *sc, 725 1.2 matt struct bcmeth_txqueue *txq, 726 1.2 matt struct gmac_txdb *txdb, 727 1.2 matt size_t count) 728 1.2 matt { 729 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 730 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 731 1.2 matt BUS_DMASYNC_PREWRITE); 732 1.2 matt } 733 1.2 matt 734 1.2 matt static void 735 1.2 matt bcmeth_txq_desc_postsync( 736 1.2 matt struct bcmeth_softc *sc, 737 1.2 matt struct bcmeth_txqueue *txq, 738 1.2 matt struct gmac_txdb *txdb, 739 1.2 matt size_t count) 740 1.2 matt { 741 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 742 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 743 1.2 matt BUS_DMASYNC_POSTWRITE); 744 1.2 matt } 745 1.2 matt 746 1.2 matt static bus_dmamap_t 747 1.2 matt bcmeth_mapcache_get( 748 1.2 matt struct bcmeth_softc *sc, 749 1.2 matt struct bcmeth_mapcache *dmc) 750 1.2 matt { 751 1.2 matt KASSERT(dmc->dmc_nmaps > 0); 752 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL); 753 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps]; 754 1.2 matt } 755 1.2 matt 756 1.2 matt static void 757 1.2 matt bcmeth_mapcache_put( 758 1.2 matt struct bcmeth_softc *sc, 759 1.2 matt struct bcmeth_mapcache *dmc, 760 1.2 matt bus_dmamap_t map) 761 1.2 matt { 762 1.2 matt KASSERT(map != NULL); 763 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps); 764 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map; 765 1.2 matt } 766 1.2 matt 767 1.2 matt static void 768 1.2 matt bcmeth_mapcache_destroy( 769 1.2 matt struct bcmeth_softc *sc, 770 1.2 matt struct bcmeth_mapcache *dmc) 771 1.2 matt { 772 1.2 matt const size_t dmc_size = 773 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]); 774 1.2 matt 775 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) { 776 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]); 777 1.2 matt } 778 1.2 matt kmem_intr_free(dmc, dmc_size); 779 1.2 matt } 780 1.2 matt 781 1.2 matt static int 782 1.2 matt bcmeth_mapcache_create( 783 1.2 matt struct bcmeth_softc *sc, 784 1.2 matt struct bcmeth_mapcache **dmc_p, 785 1.2 matt size_t maxmaps, 786 1.2 matt size_t maxmapsize, 787 1.2 matt size_t maxseg) 788 1.2 matt { 789 1.2 matt const size_t dmc_size = 790 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]); 791 1.2 matt struct bcmeth_mapcache * const dmc = 792 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP); 793 1.2 matt 794 1.2 matt dmc->dmc_maxmaps = maxmaps; 795 1.2 matt dmc->dmc_nmaps = maxmaps; 796 1.2 matt dmc->dmc_maxmapsize = maxmapsize; 797 1.2 matt dmc->dmc_maxseg = maxseg; 798 1.2 matt 799 1.2 matt for (u_int i = 0; i < maxmaps; i++) { 800 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize, 801 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0, 802 1.36 msaitoh BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]); 803 1.2 matt if (error) { 804 1.2 matt aprint_error_dev(sc->sc_dev, 805 1.2 matt "failed to creat dma map cache " 806 1.2 matt "entry %u of %zu: %d\n", 807 1.2 matt i, maxmaps, error); 808 1.2 matt while (i-- > 0) { 809 1.2 matt bus_dmamap_destroy(sc->sc_dmat, 810 1.2 matt dmc->dmc_maps[i]); 811 1.2 matt } 812 1.2 matt kmem_intr_free(dmc, dmc_size); 813 1.2 matt return error; 814 1.2 matt } 815 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL); 816 1.2 matt } 817 1.2 matt 818 1.2 matt *dmc_p = dmc; 819 1.2 matt 820 1.2 matt return 0; 821 1.2 matt } 822 1.2 matt 823 1.2 matt #if 0 824 1.2 matt static void 825 1.2 matt bcmeth_dmamem_free( 826 1.2 matt bus_dma_tag_t dmat, 827 1.2 matt size_t map_size, 828 1.2 matt bus_dma_segment_t *seg, 829 1.2 matt bus_dmamap_t map, 830 1.2 matt void *kvap) 831 1.2 matt { 832 1.2 matt bus_dmamap_destroy(dmat, map); 833 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size); 834 1.2 matt bus_dmamem_free(dmat, seg, 1); 835 1.2 matt } 836 1.2 matt #endif 837 1.2 matt 838 1.2 matt static int 839 1.2 matt bcmeth_dmamem_alloc( 840 1.2 matt bus_dma_tag_t dmat, 841 1.2 matt size_t map_size, 842 1.2 matt bus_dma_segment_t *seg, 843 1.2 matt bus_dmamap_t *map, 844 1.2 matt void **kvap) 845 1.2 matt { 846 1.2 matt int error; 847 1.2 matt int nseg; 848 1.2 matt 849 1.2 matt *kvap = NULL; 850 1.2 matt *map = NULL; 851 1.2 matt 852 1.10 matt error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0, 853 1.2 matt seg, 1, &nseg, 0); 854 1.2 matt if (error) 855 1.2 matt return error; 856 1.2 matt 857 1.2 matt KASSERT(nseg == 1); 858 1.2 matt 859 1.10 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0); 860 1.2 matt if (error == 0) { 861 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0, 862 1.2 matt map); 863 1.2 matt if (error == 0) { 864 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size, 865 1.2 matt NULL, 0); 866 1.2 matt if (error == 0) 867 1.2 matt return 0; 868 1.2 matt bus_dmamap_destroy(dmat, *map); 869 1.2 matt *map = NULL; 870 1.2 matt } 871 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size); 872 1.2 matt *kvap = NULL; 873 1.2 matt } 874 1.2 matt bus_dmamem_free(dmat, seg, nseg); 875 1.2 matt return 0; 876 1.2 matt } 877 1.2 matt 878 1.2 matt static struct mbuf * 879 1.2 matt bcmeth_rx_buf_alloc( 880 1.2 matt struct bcmeth_softc *sc) 881 1.2 matt { 882 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA); 883 1.2 matt if (m == NULL) { 884 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr"); 885 1.2 matt return NULL; 886 1.2 matt } 887 1.2 matt MCLGET(m, M_DONTWAIT); 888 1.2 matt if ((m->m_flags & M_EXT) == 0) { 889 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET"); 890 1.2 matt m_freem(m); 891 1.2 matt return NULL; 892 1.2 matt } 893 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 894 1.2 matt 895 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache); 896 1.2 matt if (map == NULL) { 897 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get"); 898 1.2 matt m_freem(m); 899 1.2 matt return NULL; 900 1.2 matt } 901 1.2 matt M_SETCTX(m, map); 902 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES; 903 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 904 1.36 msaitoh BUS_DMA_READ | BUS_DMA_NOWAIT); 905 1.2 matt if (error) { 906 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n", 907 1.2 matt error); 908 1.2 matt M_SETCTX(m, NULL); 909 1.2 matt m_freem(m); 910 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 911 1.2 matt return NULL; 912 1.2 matt } 913 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES); 914 1.16 matt #ifdef BCMETH_RCVMAGIC 915 1.25 matt *mtod(m, uint32_t *) = htole32(BCMETH_RCVMAGIC); 916 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t), 917 1.36 msaitoh BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 918 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t), 919 1.10 matt map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD); 920 1.16 matt #else 921 1.23 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 922 1.16 matt BUS_DMASYNC_PREREAD); 923 1.16 matt #endif 924 1.2 matt 925 1.2 matt return m; 926 1.2 matt } 927 1.2 matt 928 1.2 matt static void 929 1.2 matt bcmeth_rx_map_unload( 930 1.2 matt struct bcmeth_softc *sc, 931 1.2 matt struct mbuf *m) 932 1.2 matt { 933 1.2 matt KASSERT(m); 934 1.2 matt for (; m != NULL; m = m->m_next) { 935 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 936 1.2 matt KASSERT(map); 937 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES); 938 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len, 939 1.2 matt BUS_DMASYNC_POSTREAD); 940 1.2 matt bus_dmamap_unload(sc->sc_dmat, map); 941 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 942 1.2 matt M_SETCTX(m, NULL); 943 1.2 matt } 944 1.2 matt } 945 1.2 matt 946 1.2 matt static bool 947 1.2 matt bcmeth_rxq_produce( 948 1.2 matt struct bcmeth_softc *sc, 949 1.2 matt struct bcmeth_rxqueue *rxq) 950 1.2 matt { 951 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer; 952 1.7 matt bool produced = false; 953 1.7 matt 954 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) { 955 1.2 matt struct mbuf *m; 956 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m); 957 1.2 matt if (m == NULL) { 958 1.2 matt m = bcmeth_rx_buf_alloc(sc); 959 1.2 matt if (m == NULL) { 960 1.35 msaitoh printf("%s: bcmeth_rx_buf_alloc failed\n", 961 1.35 msaitoh __func__); 962 1.2 matt break; 963 1.2 matt } 964 1.2 matt } 965 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 966 1.2 matt KASSERT(map); 967 1.2 matt 968 1.25 matt producer->rxdb_buflen = htole32(MCLBYTES); 969 1.25 matt producer->rxdb_addrlo = htole32(map->dm_segs[0].ds_addr); 970 1.25 matt producer->rxdb_flags &= htole32(RXDB_FLAG_ET); 971 1.2 matt *rxq->rxq_mtail = m; 972 1.2 matt rxq->rxq_mtail = &m->m_next; 973 1.2 matt m->m_len = MCLBYTES; 974 1.2 matt m->m_next = NULL; 975 1.2 matt rxq->rxq_inuse++; 976 1.2 matt if (++producer == rxq->rxq_last) { 977 1.2 matt membar_producer(); 978 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 979 1.2 matt rxq->rxq_last - rxq->rxq_producer); 980 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first; 981 1.2 matt } 982 1.7 matt produced = true; 983 1.2 matt } 984 1.7 matt if (produced) { 985 1.2 matt membar_producer(); 986 1.7 matt if (producer != rxq->rxq_producer) { 987 1.7 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 988 1.7 matt producer - rxq->rxq_producer); 989 1.7 matt rxq->rxq_producer = producer; 990 1.7 matt } 991 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr, 992 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr 993 1.7 matt + ((uintptr_t)producer & RCVPTR)); 994 1.2 matt } 995 1.2 matt return true; 996 1.2 matt } 997 1.2 matt 998 1.2 matt static void 999 1.2 matt bcmeth_rx_input( 1000 1.2 matt struct bcmeth_softc *sc, 1001 1.2 matt struct mbuf *m, 1002 1.2 matt uint32_t rxdb_flags) 1003 1.2 matt { 1004 1.2 matt struct ifnet * const ifp = &sc->sc_if; 1005 1.2 matt 1006 1.2 matt bcmeth_rx_map_unload(sc, m); 1007 1.2 matt 1008 1.19 matt m_adj(m, sc->sc_rcvoffset); 1009 1.2 matt 1010 1.21 matt /* 1011 1.21 matt * If we are in promiscuous mode and this isn't a multicast, check the 1012 1.21 matt * destination address to make sure it matches our own. If it doesn't, 1013 1.21 matt * mark the packet as being received promiscuously. 1014 1.21 matt */ 1015 1.21 matt if ((sc->sc_cmdcfg & PROMISC_EN) 1016 1.21 matt && (m->m_data[0] & 1) == 0 1017 1.21 matt && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0] 1018 1.21 matt || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) { 1019 1.21 matt m->m_flags |= M_PROMISC; 1020 1.2 matt } 1021 1.28 ozaki m_set_rcvif(m, ifp); 1022 1.2 matt 1023 1.2 matt /* 1024 1.2 matt * Let's give it to the network subsystm to deal with. 1025 1.2 matt */ 1026 1.16 matt #ifdef BCMETH_MPSAFE 1027 1.16 matt mutex_exit(sc->sc_lock); 1028 1.27 ozaki if_input(ifp, m); 1029 1.16 matt mutex_enter(sc->sc_lock); 1030 1.16 matt #else 1031 1.2 matt int s = splnet(); 1032 1.27 ozaki if_input(ifp, m); 1033 1.2 matt splx(s); 1034 1.16 matt #endif 1035 1.2 matt } 1036 1.2 matt 1037 1.20 matt static bool 1038 1.2 matt bcmeth_rxq_consume( 1039 1.2 matt struct bcmeth_softc *sc, 1040 1.20 matt struct bcmeth_rxqueue *rxq, 1041 1.20 matt size_t atmost) 1042 1.2 matt { 1043 1.2 matt struct ifnet * const ifp = &sc->sc_if; 1044 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer; 1045 1.2 matt size_t rxconsumed = 0; 1046 1.20 matt bool didconsume = false; 1047 1.2 matt 1048 1.20 matt while (atmost-- > 0) { 1049 1.2 matt if (consumer == rxq->rxq_producer) { 1050 1.2 matt KASSERT(rxq->rxq_inuse == 0); 1051 1.20 matt break; 1052 1.2 matt } 1053 1.35 msaitoh 1054 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1055 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1056 1.2 matt if (consumer == rxq->rxq_first + currdscr) { 1057 1.20 matt break; 1058 1.2 matt } 1059 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1); 1060 1.2 matt 1061 1.2 matt /* 1062 1.2 matt * We own this packet again. Copy the rxsts word from it. 1063 1.2 matt */ 1064 1.2 matt rxconsumed++; 1065 1.20 matt didconsume = true; 1066 1.2 matt uint32_t rxsts; 1067 1.2 matt KASSERT(rxq->rxq_mhead != NULL); 1068 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t); 1069 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align, 1070 1.2 matt BUS_DMASYNC_POSTREAD); 1071 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4); 1072 1.25 matt rxsts = le32toh(rxsts); 1073 1.10 matt #if 0 1074 1.10 matt KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd", 1075 1.10 matt currdscr, consumer - rxq->rxq_first); 1076 1.10 matt #endif 1077 1.2 matt 1078 1.2 matt /* 1079 1.2 matt * Get the count of descriptors. Fetch the correct number 1080 1.2 matt * of mbufs. 1081 1.2 matt */ 1082 1.16 matt #ifdef BCMETH_RCVMAGIC 1083 1.35 msaitoh size_t desc_count = rxsts != BCMETH_RCVMAGIC 1084 1.35 msaitoh ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1; 1085 1.16 matt #else 1086 1.16 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1; 1087 1.16 matt #endif 1088 1.2 matt struct mbuf *m = rxq->rxq_mhead; 1089 1.2 matt struct mbuf *m_last = m; 1090 1.2 matt for (size_t i = 1; i < desc_count; i++) { 1091 1.2 matt if (++consumer == rxq->rxq_last) { 1092 1.2 matt consumer = rxq->rxq_first; 1093 1.2 matt } 1094 1.10 matt KASSERTMSG(consumer != rxq->rxq_first + currdscr, 1095 1.35 msaitoh "i=%zu rxsts=%#x desc_count=%zu currdscr=%u " 1096 1.35 msaitoh "consumer=%zd", i, rxsts, desc_count, currdscr, 1097 1.10 matt consumer - rxq->rxq_first); 1098 1.2 matt m_last = m_last->m_next; 1099 1.2 matt } 1100 1.2 matt 1101 1.2 matt /* 1102 1.2 matt * Now remove it/them from the list of enqueued mbufs. 1103 1.2 matt */ 1104 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL) 1105 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead; 1106 1.2 matt m_last->m_next = NULL; 1107 1.2 matt 1108 1.16 matt #ifdef BCMETH_RCVMAGIC 1109 1.35 msaitoh if (rxsts == BCMETH_RCVMAGIC) { 1110 1.40 skrll if_statinc(ifp, if_ierrors); 1111 1.10 matt if ((m->m_ext.ext_paddr >> 28) == 8) { 1112 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo); 1113 1.10 matt } else { 1114 1.18 matt BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi); 1115 1.10 matt } 1116 1.10 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1117 1.16 matt } else 1118 1.16 matt #endif /* BCMETH_RCVMAGIC */ 1119 1.35 msaitoh if (rxsts 1120 1.36 msaitoh & (RXSTS_CRC_ERROR |RXSTS_OVERSIZED |RXSTS_PKT_OVERFLOW)) { 1121 1.35 msaitoh aprint_error_dev(sc->sc_dev, 1122 1.35 msaitoh "[%zu]: count=%zu rxsts=%#x\n", 1123 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts); 1124 1.2 matt /* 1125 1.2 matt * We encountered an error, take the mbufs and add them 1126 1.2 matt * to the rx bufcache so we can quickly reuse them. 1127 1.2 matt */ 1128 1.40 skrll if_statinc(ifp, if_ierrors); 1129 1.2 matt do { 1130 1.2 matt struct mbuf *m0 = m->m_next; 1131 1.2 matt m->m_next = NULL; 1132 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1133 1.2 matt m = m0; 1134 1.2 matt } while (m); 1135 1.2 matt } else { 1136 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN); 1137 1.19 matt framelen += sc->sc_rcvoffset; 1138 1.2 matt m->m_pkthdr.len = framelen; 1139 1.2 matt if (desc_count == 1) { 1140 1.2 matt KASSERT(framelen <= MCLBYTES); 1141 1.2 matt m->m_len = framelen; 1142 1.2 matt } else { 1143 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1); 1144 1.2 matt } 1145 1.16 matt 1146 1.16 matt #ifdef BCMETH_MPSAFE 1147 1.16 matt /* 1148 1.16 matt * Wrap at the last entry! 1149 1.16 matt */ 1150 1.16 matt if (++consumer == rxq->rxq_last) { 1151 1.35 msaitoh KASSERT(consumer[-1].rxdb_flags 1152 1.35 msaitoh & htole32(RXDB_FLAG_ET)); 1153 1.16 matt rxq->rxq_consumer = rxq->rxq_first; 1154 1.16 matt } else { 1155 1.16 matt rxq->rxq_consumer = consumer; 1156 1.16 matt } 1157 1.16 matt rxq->rxq_inuse -= rxconsumed; 1158 1.16 matt #endif /* BCMETH_MPSAFE */ 1159 1.16 matt 1160 1.16 matt /* 1161 1.16 matt * Receive the packet (which releases our lock) 1162 1.16 matt */ 1163 1.2 matt bcmeth_rx_input(sc, m, rxsts); 1164 1.16 matt 1165 1.16 matt #ifdef BCMETH_MPSAFE 1166 1.16 matt /* 1167 1.16 matt * Since we had to give up our lock, we need to 1168 1.16 matt * refresh these. 1169 1.16 matt */ 1170 1.16 matt consumer = rxq->rxq_consumer; 1171 1.16 matt rxconsumed = 0; 1172 1.16 matt continue; 1173 1.16 matt #endif /* BCMETH_MPSAFE */ 1174 1.2 matt } 1175 1.2 matt 1176 1.2 matt /* 1177 1.2 matt * Wrap at the last entry! 1178 1.2 matt */ 1179 1.2 matt if (++consumer == rxq->rxq_last) { 1180 1.25 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET)); 1181 1.2 matt consumer = rxq->rxq_first; 1182 1.2 matt } 1183 1.2 matt } 1184 1.20 matt 1185 1.20 matt /* 1186 1.20 matt * Update queue info. 1187 1.20 matt */ 1188 1.20 matt rxq->rxq_consumer = consumer; 1189 1.20 matt rxq->rxq_inuse -= rxconsumed; 1190 1.20 matt 1191 1.20 matt /* 1192 1.20 matt * Did we consume anything? 1193 1.20 matt */ 1194 1.20 matt return didconsume; 1195 1.2 matt } 1196 1.2 matt 1197 1.2 matt static void 1198 1.2 matt bcmeth_rxq_purge( 1199 1.2 matt struct bcmeth_softc *sc, 1200 1.2 matt struct bcmeth_rxqueue *rxq, 1201 1.2 matt bool discard) 1202 1.2 matt { 1203 1.2 matt struct mbuf *m; 1204 1.2 matt 1205 1.2 matt if ((m = rxq->rxq_mhead) != NULL) { 1206 1.2 matt if (discard) { 1207 1.2 matt bcmeth_rx_map_unload(sc, m); 1208 1.2 matt m_freem(m); 1209 1.2 matt } else { 1210 1.2 matt while (m != NULL) { 1211 1.2 matt struct mbuf *m0 = m->m_next; 1212 1.2 matt m->m_next = NULL; 1213 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1214 1.2 matt m = m0; 1215 1.2 matt } 1216 1.2 matt } 1217 1.2 matt } 1218 1.2 matt 1219 1.2 matt rxq->rxq_mhead = NULL; 1220 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead; 1221 1.2 matt rxq->rxq_inuse = 0; 1222 1.1 matt } 1223 1.1 matt 1224 1.1 matt static void 1225 1.2 matt bcmeth_rxq_reset( 1226 1.2 matt struct bcmeth_softc *sc, 1227 1.2 matt struct bcmeth_rxqueue *rxq) 1228 1.2 matt { 1229 1.2 matt /* 1230 1.3 matt * sync all the descriptors 1231 1.3 matt */ 1232 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first, 1233 1.3 matt rxq->rxq_last - rxq->rxq_first); 1234 1.3 matt 1235 1.3 matt /* 1236 1.3 matt * Make sure we own all descriptors in the ring. 1237 1.3 matt */ 1238 1.3 matt struct gmac_rxdb *rxdb; 1239 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) { 1240 1.25 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_IC); 1241 1.3 matt } 1242 1.3 matt 1243 1.3 matt /* 1244 1.3 matt * Last descriptor has the wrap flag. 1245 1.3 matt */ 1246 1.36 msaitoh rxdb->rxdb_flags = htole32(RXDB_FLAG_ET | RXDB_FLAG_IC); 1247 1.3 matt 1248 1.3 matt /* 1249 1.2 matt * Reset the producer consumer indexes. 1250 1.2 matt */ 1251 1.2 matt rxq->rxq_consumer = rxq->rxq_first; 1252 1.2 matt rxq->rxq_producer = rxq->rxq_first; 1253 1.2 matt rxq->rxq_inuse = 0; 1254 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS) 1255 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS; 1256 1.2 matt 1257 1.36 msaitoh sc->sc_intmask |= RCVINT | RCVFIFOOF | RCVDESCUF; 1258 1.2 matt 1259 1.2 matt /* 1260 1.2 matt * Restart the receiver at the first descriptor 1261 1.2 matt */ 1262 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo, 1263 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr); 1264 1.2 matt } 1265 1.2 matt 1266 1.2 matt static int 1267 1.2 matt bcmeth_rxq_attach( 1268 1.2 matt struct bcmeth_softc *sc, 1269 1.2 matt struct bcmeth_rxqueue *rxq, 1270 1.2 matt u_int qno) 1271 1.2 matt { 1272 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]); 1273 1.2 matt int error; 1274 1.2 matt void *descs; 1275 1.2 matt 1276 1.2 matt KASSERT(desc_count == 256 || desc_count == 512); 1277 1.2 matt 1278 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1279 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs); 1280 1.2 matt if (error) 1281 1.2 matt return error; 1282 1.2 matt 1283 1.8 matt memset(descs, 0, BCMETH_RINGSIZE); 1284 1.2 matt rxq->rxq_first = descs; 1285 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count; 1286 1.2 matt rxq->rxq_consumer = descs; 1287 1.2 matt rxq->rxq_producer = descs; 1288 1.2 matt 1289 1.2 matt bcmeth_rxq_purge(sc, rxq, true); 1290 1.2 matt bcmeth_rxq_reset(sc, rxq); 1291 1.2 matt 1292 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW; 1293 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL; 1294 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR; 1295 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0; 1296 1.10 matt rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1; 1297 1.2 matt 1298 1.2 matt return 0; 1299 1.2 matt } 1300 1.2 matt 1301 1.2 matt static bool 1302 1.2 matt bcmeth_txq_active_p( 1303 1.2 matt struct bcmeth_softc * const sc, 1304 1.2 matt struct bcmeth_txqueue *txq) 1305 1.1 matt { 1306 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs); 1307 1.2 matt } 1308 1.2 matt 1309 1.2 matt static bool 1310 1.2 matt bcmeth_txq_fillable_p( 1311 1.2 matt struct bcmeth_softc * const sc, 1312 1.2 matt struct bcmeth_txqueue *txq) 1313 1.2 matt { 1314 1.2 matt return txq->txq_free >= txq->txq_threshold; 1315 1.2 matt } 1316 1.2 matt 1317 1.2 matt static int 1318 1.2 matt bcmeth_txq_attach( 1319 1.2 matt struct bcmeth_softc *sc, 1320 1.2 matt struct bcmeth_txqueue *txq, 1321 1.2 matt u_int qno) 1322 1.2 matt { 1323 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]); 1324 1.2 matt int error; 1325 1.2 matt void *descs; 1326 1.2 matt 1327 1.2 matt KASSERT(desc_count == 256 || desc_count == 512); 1328 1.2 matt 1329 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1330 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs); 1331 1.2 matt if (error) 1332 1.2 matt return error; 1333 1.2 matt 1334 1.8 matt memset(descs, 0, BCMETH_RINGSIZE); 1335 1.2 matt txq->txq_first = descs; 1336 1.2 matt txq->txq_last = txq->txq_first + desc_count; 1337 1.2 matt txq->txq_consumer = descs; 1338 1.2 matt txq->txq_producer = descs; 1339 1.2 matt 1340 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS); 1341 1.2 matt 1342 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW; 1343 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL; 1344 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR; 1345 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0; 1346 1.10 matt txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1; 1347 1.2 matt 1348 1.2 matt bcmeth_txq_reset(sc, txq); 1349 1.1 matt 1350 1.2 matt return 0; 1351 1.1 matt } 1352 1.1 matt 1353 1.1 matt static int 1354 1.2 matt bcmeth_txq_map_load( 1355 1.2 matt struct bcmeth_softc *sc, 1356 1.2 matt struct bcmeth_txqueue *txq, 1357 1.2 matt struct mbuf *m) 1358 1.2 matt { 1359 1.2 matt bus_dmamap_t map; 1360 1.2 matt int error; 1361 1.2 matt 1362 1.2 matt map = M_GETCTX(m, bus_dmamap_t); 1363 1.2 matt if (map != NULL) 1364 1.2 matt return 0; 1365 1.2 matt 1366 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache); 1367 1.2 matt if (map == NULL) 1368 1.2 matt return ENOMEM; 1369 1.2 matt 1370 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 1371 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT); 1372 1.2 matt if (error) 1373 1.2 matt return error; 1374 1.2 matt 1375 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len, 1376 1.2 matt BUS_DMASYNC_PREWRITE); 1377 1.2 matt M_SETCTX(m, map); 1378 1.2 matt return 0; 1379 1.2 matt } 1380 1.2 matt 1381 1.2 matt static void 1382 1.2 matt bcmeth_txq_map_unload( 1383 1.2 matt struct bcmeth_softc *sc, 1384 1.2 matt struct bcmeth_txqueue *txq, 1385 1.2 matt struct mbuf *m) 1386 1.2 matt { 1387 1.2 matt KASSERT(m); 1388 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1389 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 1390 1.2 matt BUS_DMASYNC_POSTWRITE); 1391 1.2 matt bus_dmamap_unload(sc->sc_dmat, map); 1392 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map); 1393 1.2 matt } 1394 1.2 matt 1395 1.2 matt static bool 1396 1.2 matt bcmeth_txq_produce( 1397 1.2 matt struct bcmeth_softc *sc, 1398 1.2 matt struct bcmeth_txqueue *txq, 1399 1.2 matt struct mbuf *m) 1400 1.2 matt { 1401 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1402 1.2 matt 1403 1.2 matt if (map->dm_nsegs > txq->txq_free) 1404 1.2 matt return false; 1405 1.2 matt 1406 1.2 matt /* 1407 1.2 matt * TCP Offload flag must be set in the first descriptor. 1408 1.2 matt */ 1409 1.2 matt struct gmac_txdb *producer = txq->txq_producer; 1410 1.2 matt uint32_t first_flags = TXDB_FLAG_SF; 1411 1.2 matt uint32_t last_flags = TXDB_FLAG_EF; 1412 1.2 matt 1413 1.2 matt /* 1414 1.2 matt * If we've produced enough descriptors without consuming any 1415 1.2 matt * we need to ask for an interrupt to reclaim some. 1416 1.2 matt */ 1417 1.2 matt txq->txq_lastintr += map->dm_nsegs; 1418 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold 1419 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) { 1420 1.2 matt txq->txq_lastintr = 0; 1421 1.2 matt last_flags |= TXDB_FLAG_IC; 1422 1.2 matt } 1423 1.2 matt 1424 1.2 matt KASSERT(producer != txq->txq_last); 1425 1.2 matt 1426 1.2 matt struct gmac_txdb *start = producer; 1427 1.2 matt size_t count = map->dm_nsegs; 1428 1.25 matt producer->txdb_flags |= htole32(first_flags); 1429 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[0].ds_addr); 1430 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[0].ds_len); 1431 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) { 1432 1.2 matt #if 0 1433 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1434 1.25 matt le32toh(producer->txdb_flags), 1435 1.25 matt le32toh(producer->txdb_buflen), 1436 1.25 matt le32toh(producer->txdb_addrlo), 1437 1.25 matt le32toh(producer->txdb_addrhi)); 1438 1.2 matt #endif 1439 1.2 matt if (__predict_false(++producer == txq->txq_last)) { 1440 1.2 matt bcmeth_txq_desc_presync(sc, txq, start, 1441 1.2 matt txq->txq_last - start); 1442 1.2 matt count -= txq->txq_last - start; 1443 1.2 matt producer = txq->txq_first; 1444 1.2 matt start = txq->txq_first; 1445 1.2 matt } 1446 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[i].ds_addr); 1447 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[i].ds_len); 1448 1.2 matt } 1449 1.25 matt producer->txdb_flags |= htole32(last_flags); 1450 1.2 matt #if 0 1451 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1452 1.25 matt le32toh(producer->txdb_flags), le32toh(producer->txdb_buflen), 1453 1.25 matt le32toh(producer->txdb_addrlo), le32toh(producer->txdb_addrhi)); 1454 1.2 matt #endif 1455 1.10 matt if (count) 1456 1.10 matt bcmeth_txq_desc_presync(sc, txq, start, count); 1457 1.2 matt 1458 1.2 matt /* 1459 1.2 matt * Reduce free count by the number of segments we consumed. 1460 1.2 matt */ 1461 1.2 matt txq->txq_free -= map->dm_nsegs; 1462 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer); 1463 1.35 msaitoh KASSERT(map->dm_nsegs == 1 1464 1.35 msaitoh || (txq->txq_producer->txdb_flags & htole32(TXDB_FLAG_EF)) == 0); 1465 1.25 matt KASSERT(producer->txdb_flags & htole32(TXDB_FLAG_EF)); 1466 1.2 matt 1467 1.2 matt #if 0 1468 1.35 msaitoh printf("%s: mbuf %p: produced a %u byte packet in %u segments " 1469 1.35 msaitoh "(%zd..%zd)\n", __func__, m, m->m_pkthdr.len, map->dm_nsegs, 1470 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first); 1471 1.2 matt #endif 1472 1.2 matt 1473 1.10 matt if (producer + 1 == txq->txq_last) 1474 1.2 matt txq->txq_producer = txq->txq_first; 1475 1.2 matt else 1476 1.10 matt txq->txq_producer = producer + 1; 1477 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m); 1478 1.2 matt 1479 1.2 matt /* 1480 1.2 matt * Let the transmitter know there's more to do 1481 1.2 matt */ 1482 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr, 1483 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr 1484 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR)); 1485 1.2 matt 1486 1.2 matt return true; 1487 1.2 matt } 1488 1.2 matt 1489 1.16 matt static struct mbuf * 1490 1.16 matt bcmeth_copy_packet(struct mbuf *m) 1491 1.16 matt { 1492 1.16 matt struct mbuf *mext = NULL; 1493 1.16 matt size_t misalignment = 0; 1494 1.16 matt size_t hlen = 0; 1495 1.16 matt 1496 1.16 matt for (mext = m; mext != NULL; mext = mext->m_next) { 1497 1.16 matt if (mext->m_flags & M_EXT) { 1498 1.16 matt misalignment = mtod(mext, vaddr_t) & arm_dcache_align; 1499 1.16 matt break; 1500 1.16 matt } 1501 1.16 matt hlen += m->m_len; 1502 1.16 matt } 1503 1.16 matt 1504 1.16 matt struct mbuf *n = m->m_next; 1505 1.16 matt if (m != mext && hlen + misalignment <= MHLEN && false) { 1506 1.35 msaitoh KASSERT(m->m_pktdat <= m->m_data 1507 1.35 msaitoh && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]); 1508 1.16 matt size_t oldoff = m->m_data - m->m_pktdat; 1509 1.16 matt size_t off; 1510 1.16 matt if (mext == NULL) { 1511 1.16 matt off = (oldoff + hlen > MHLEN) ? 0 : oldoff; 1512 1.16 matt } else { 1513 1.16 matt off = MHLEN - (hlen + misalignment); 1514 1.16 matt } 1515 1.16 matt KASSERT(off + hlen + misalignment <= MHLEN); 1516 1.16 matt if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) { 1517 1.16 matt memmove(&m->m_pktdat[off], m->m_data, m->m_len); 1518 1.16 matt m->m_data = &m->m_pktdat[off]; 1519 1.16 matt } 1520 1.16 matt m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]); 1521 1.16 matt m->m_len = hlen; 1522 1.16 matt m->m_next = mext; 1523 1.16 matt while (n != mext) { 1524 1.16 matt n = m_free(n); 1525 1.16 matt } 1526 1.16 matt return m; 1527 1.16 matt } 1528 1.16 matt 1529 1.16 matt struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type); 1530 1.16 matt if (m0 == NULL) { 1531 1.16 matt return NULL; 1532 1.16 matt } 1533 1.33 maxv m_copy_pkthdr(m0, m); 1534 1.16 matt MCLAIM(m0, m->m_owner); 1535 1.16 matt if (m0->m_pkthdr.len > MHLEN) { 1536 1.16 matt MCLGET(m0, M_DONTWAIT); 1537 1.16 matt if ((m0->m_flags & M_EXT) == 0) { 1538 1.16 matt m_freem(m0); 1539 1.16 matt return NULL; 1540 1.16 matt } 1541 1.16 matt } 1542 1.16 matt m0->m_len = m->m_pkthdr.len; 1543 1.16 matt m_copydata(m, 0, m0->m_len, mtod(m0, void *)); 1544 1.16 matt m_freem(m); 1545 1.16 matt return m0; 1546 1.16 matt } 1547 1.16 matt 1548 1.2 matt static bool 1549 1.2 matt bcmeth_txq_enqueue( 1550 1.2 matt struct bcmeth_softc *sc, 1551 1.2 matt struct bcmeth_txqueue *txq) 1552 1.2 matt { 1553 1.2 matt for (;;) { 1554 1.2 matt if (IF_QFULL(&txq->txq_mbufs)) 1555 1.2 matt return false; 1556 1.2 matt struct mbuf *m = txq->txq_next; 1557 1.2 matt if (m == NULL) { 1558 1.2 matt int s = splnet(); 1559 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m); 1560 1.2 matt splx(s); 1561 1.2 matt if (m == NULL) 1562 1.2 matt return true; 1563 1.2 matt M_SETCTX(m, NULL); 1564 1.2 matt } else { 1565 1.2 matt txq->txq_next = NULL; 1566 1.2 matt } 1567 1.15 matt /* 1568 1.15 matt * If LINK2 is set and this packet uses multiple mbufs, 1569 1.15 matt * consolidate it into a single mbuf. 1570 1.15 matt */ 1571 1.15 matt if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) { 1572 1.16 matt struct mbuf *m0 = bcmeth_copy_packet(m); 1573 1.15 matt if (m0 == NULL) { 1574 1.15 matt txq->txq_next = m; 1575 1.15 matt return true; 1576 1.15 matt } 1577 1.15 matt m = m0; 1578 1.15 matt } 1579 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m); 1580 1.2 matt if (error) { 1581 1.2 matt aprint_error_dev(sc->sc_dev, 1582 1.2 matt "discarded packet due to " 1583 1.2 matt "dmamap load failure: %d\n", error); 1584 1.2 matt m_freem(m); 1585 1.2 matt continue; 1586 1.2 matt } 1587 1.2 matt KASSERT(txq->txq_next == NULL); 1588 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) { 1589 1.2 matt txq->txq_next = m; 1590 1.2 matt return false; 1591 1.2 matt } 1592 1.2 matt KASSERT(txq->txq_next == NULL); 1593 1.2 matt } 1594 1.2 matt } 1595 1.2 matt 1596 1.2 matt static bool 1597 1.2 matt bcmeth_txq_consume( 1598 1.2 matt struct bcmeth_softc *sc, 1599 1.2 matt struct bcmeth_txqueue *txq) 1600 1.2 matt { 1601 1.2 matt struct ifnet * const ifp = &sc->sc_if; 1602 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer; 1603 1.2 matt size_t txfree = 0; 1604 1.2 matt 1605 1.2 matt #if 0 1606 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free); 1607 1.2 matt #endif 1608 1.2 matt 1609 1.2 matt for (;;) { 1610 1.2 matt if (consumer == txq->txq_producer) { 1611 1.2 matt txq->txq_consumer = consumer; 1612 1.2 matt txq->txq_free += txfree; 1613 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree); 1614 1.2 matt #if 0 1615 1.35 msaitoh printf("%s: empty: freed %zu descriptors going from " 1616 1.35 msaitoh "%zu to %zu\n", __func__, txfree, 1617 1.35 msaitoh txq->txq_free - txfree, txq->txq_free); 1618 1.2 matt #endif 1619 1.2 matt KASSERT(txq->txq_lastintr == 0); 1620 1.35 msaitoh KASSERT(txq->txq_free 1621 1.35 msaitoh == txq->txq_last - txq->txq_first - 1); 1622 1.2 matt return true; 1623 1.2 matt } 1624 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1); 1625 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 1626 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) { 1627 1.2 matt txq->txq_consumer = consumer; 1628 1.2 matt txq->txq_free += txfree; 1629 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree); 1630 1.2 matt #if 0 1631 1.2 matt printf("%s: freed %zu descriptors\n", 1632 1.2 matt __func__, txfree); 1633 1.2 matt #endif 1634 1.2 matt return bcmeth_txq_fillable_p(sc, txq); 1635 1.2 matt } 1636 1.2 matt 1637 1.2 matt /* 1638 1.2 matt * If this is the last descriptor in the chain, get the 1639 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself. 1640 1.2 matt */ 1641 1.25 matt const uint32_t txdb_flags = le32toh(consumer->txdb_flags); 1642 1.2 matt if (txdb_flags & TXDB_FLAG_EF) { 1643 1.2 matt struct mbuf *m; 1644 1.2 matt 1645 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m); 1646 1.2 matt KASSERT(m); 1647 1.2 matt bcmeth_txq_map_unload(sc, txq, m); 1648 1.2 matt #if 0 1649 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n", 1650 1.2 matt __func__, m, m->m_pkthdr.len); 1651 1.2 matt #endif 1652 1.31 msaitoh bpf_mtap(ifp, m, BPF_D_OUT); 1653 1.40 skrll if_statinc(ifp, if_opackets); 1654 1.40 skrll if_statadd(ifp, if_obytes, m->m_pkthdr.len); 1655 1.2 matt if (m->m_flags & M_MCAST) 1656 1.40 skrll if_statinc(ifp, if_omcasts); 1657 1.2 matt m_freem(m); 1658 1.2 matt } 1659 1.2 matt 1660 1.2 matt /* 1661 1.2 matt * We own this packet again. Clear all flags except wrap. 1662 1.2 matt */ 1663 1.2 matt txfree++; 1664 1.2 matt 1665 1.2 matt /* 1666 1.2 matt * Wrap at the last entry! 1667 1.2 matt */ 1668 1.2 matt if (txdb_flags & TXDB_FLAG_ET) { 1669 1.25 matt consumer->txdb_flags = htole32(TXDB_FLAG_ET); 1670 1.2 matt KASSERT(consumer + 1 == txq->txq_last); 1671 1.2 matt consumer = txq->txq_first; 1672 1.2 matt } else { 1673 1.2 matt consumer->txdb_flags = 0; 1674 1.2 matt consumer++; 1675 1.2 matt KASSERT(consumer < txq->txq_last); 1676 1.2 matt } 1677 1.2 matt } 1678 1.2 matt } 1679 1.2 matt 1680 1.2 matt static void 1681 1.2 matt bcmeth_txq_purge( 1682 1.2 matt struct bcmeth_softc *sc, 1683 1.2 matt struct bcmeth_txqueue *txq) 1684 1.2 matt { 1685 1.2 matt struct mbuf *m; 1686 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0); 1687 1.2 matt 1688 1.2 matt for (;;) { 1689 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m); 1690 1.2 matt if (m == NULL) 1691 1.2 matt break; 1692 1.2 matt bcmeth_txq_map_unload(sc, txq, m); 1693 1.2 matt m_freem(m); 1694 1.2 matt } 1695 1.2 matt if ((m = txq->txq_next) != NULL) { 1696 1.2 matt txq->txq_next = NULL; 1697 1.2 matt bcmeth_txq_map_unload(sc, txq, m); 1698 1.2 matt m_freem(m); 1699 1.2 matt } 1700 1.2 matt } 1701 1.2 matt 1702 1.2 matt static void 1703 1.2 matt bcmeth_txq_reset( 1704 1.2 matt struct bcmeth_softc *sc, 1705 1.2 matt struct bcmeth_txqueue *txq) 1706 1.2 matt { 1707 1.2 matt /* 1708 1.2 matt * sync all the descriptors 1709 1.2 matt */ 1710 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first, 1711 1.2 matt txq->txq_last - txq->txq_first); 1712 1.2 matt 1713 1.2 matt /* 1714 1.2 matt * Make sure we own all descriptors in the ring. 1715 1.2 matt */ 1716 1.2 matt struct gmac_txdb *txdb; 1717 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) { 1718 1.2 matt txdb->txdb_flags = 0; 1719 1.2 matt } 1720 1.2 matt 1721 1.2 matt /* 1722 1.2 matt * Last descriptor has the wrap flag. 1723 1.2 matt */ 1724 1.25 matt txdb->txdb_flags = htole32(TXDB_FLAG_ET); 1725 1.2 matt 1726 1.2 matt /* 1727 1.2 matt * Reset the producer consumer indexes. 1728 1.2 matt */ 1729 1.2 matt txq->txq_consumer = txq->txq_first; 1730 1.2 matt txq->txq_producer = txq->txq_first; 1731 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1; 1732 1.2 matt txq->txq_threshold = txq->txq_free / 2; 1733 1.2 matt txq->txq_lastintr = 0; 1734 1.2 matt 1735 1.2 matt /* 1736 1.2 matt * What do we want to get interrupted on? 1737 1.2 matt */ 1738 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF; 1739 1.2 matt 1740 1.2 matt /* 1741 1.45 andvar * Restart the transmitter at the first descriptor 1742 1.2 matt */ 1743 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo, 1744 1.2 matt txq->txq_descmap->dm_segs->ds_addr); 1745 1.2 matt } 1746 1.2 matt 1747 1.2 matt static void 1748 1.2 matt bcmeth_ifstart(struct ifnet *ifp) 1749 1.2 matt { 1750 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc; 1751 1.2 matt 1752 1.16 matt if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) { 1753 1.16 matt return; 1754 1.16 matt } 1755 1.16 matt 1756 1.16 matt #ifdef BCMETH_MPSAFETX 1757 1.16 matt if (cpu_intr_p()) { 1758 1.16 matt #endif 1759 1.16 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR); 1760 1.16 matt softint_schedule(sc->sc_soft_ih); 1761 1.16 matt #ifdef BCMETH_MPSAFETX 1762 1.16 matt } else { 1763 1.16 matt /* 1764 1.16 matt * Either we are in a softintr thread already or some other 1765 1.16 matt * thread so just borrow it to do the send and save ourselves 1766 1.16 matt * the overhead of a fast soft int. 1767 1.16 matt */ 1768 1.16 matt bcmeth_soft_txintr(sc); 1769 1.16 matt } 1770 1.16 matt #endif 1771 1.2 matt } 1772 1.2 matt 1773 1.2 matt int 1774 1.1 matt bcmeth_intr(void *arg) 1775 1.1 matt { 1776 1.1 matt struct bcmeth_softc * const sc = arg; 1777 1.2 matt uint32_t soft_flags = 0; 1778 1.8 matt uint32_t work_flags = 0; 1779 1.1 matt int rv = 0; 1780 1.1 matt 1781 1.1 matt mutex_enter(sc->sc_hwlock); 1782 1.1 matt 1783 1.15 matt uint32_t intmask = sc->sc_intmask; 1784 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_intr); 1785 1.2 matt 1786 1.2 matt for (;;) { 1787 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 1788 1.15 matt intstatus &= intmask; 1789 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */ 1790 1.2 matt if (intstatus == 0) { 1791 1.2 matt break; 1792 1.2 matt } 1793 1.2 matt #if 0 1794 1.35 msaitoh aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n", 1795 1.8 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK)); 1796 1.2 matt #endif 1797 1.2 matt if (intstatus & RCVINT) { 1798 1.8 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1799 1.15 matt intmask &= ~RCVINT; 1800 1.8 matt 1801 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1802 1.8 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1803 1.8 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) { 1804 1.8 matt /* 1805 1.8 matt * We wrapped at the end so count how far 1806 1.8 matt * we are from the end. 1807 1.8 matt */ 1808 1.8 matt descs += rxq->rxq_last - rxq->rxq_consumer; 1809 1.8 matt } else { 1810 1.8 matt descs -= rxq->rxq_consumer - rxq->rxq_first; 1811 1.8 matt } 1812 1.8 matt /* 1813 1.8 matt * If we "timedout" we can't be hogging so use 1814 1.8 matt * softints. If we exceeded then we might hogging 1815 1.8 matt * so let the workqueue deal with them. 1816 1.8 matt */ 1817 1.35 msaitoh const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, 1818 1.35 msaitoh INTRCVLAZY_FRAMECOUNT); 1819 1.9 matt if (descs < framecount 1820 1.9 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) { 1821 1.8 matt soft_flags |= SOFT_RXINTR; 1822 1.8 matt } else { 1823 1.8 matt work_flags |= WORK_RXINTR; 1824 1.8 matt } 1825 1.2 matt } 1826 1.2 matt 1827 1.2 matt if (intstatus & XMTINT_0) { 1828 1.15 matt intmask &= ~XMTINT_0; 1829 1.2 matt soft_flags |= SOFT_TXINTR; 1830 1.2 matt } 1831 1.2 matt 1832 1.2 matt if (intstatus & RCVDESCUF) { 1833 1.15 matt intmask &= ~RCVDESCUF; 1834 1.8 matt work_flags |= WORK_RXUNDERFLOW; 1835 1.2 matt } 1836 1.2 matt 1837 1.15 matt intstatus &= intmask; 1838 1.2 matt if (intstatus) { 1839 1.10 matt aprint_error_dev(sc->sc_dev, 1840 1.10 matt "intr: intstatus=%#x\n", intstatus); 1841 1.10 matt aprint_error_dev(sc->sc_dev, 1842 1.10 matt "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n", 1843 1.10 matt sc->sc_rxq.rxq_first, 1844 1.10 matt sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr, 1845 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr), 1846 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0), 1847 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1)); 1848 1.10 matt aprint_error_dev(sc->sc_dev, 1849 1.10 matt "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n", 1850 1.10 matt sc->sc_txq.txq_first, 1851 1.10 matt sc->sc_txq.txq_descmap->dm_segs[0].ds_addr, 1852 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr), 1853 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0), 1854 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1)); 1855 1.15 matt intmask &= ~intstatus; 1856 1.8 matt work_flags |= WORK_REINIT; 1857 1.2 matt break; 1858 1.2 matt } 1859 1.2 matt } 1860 1.2 matt 1861 1.15 matt if (intmask != sc->sc_intmask) { 1862 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1863 1.8 matt } 1864 1.8 matt 1865 1.8 matt if (work_flags) { 1866 1.8 matt if (sc->sc_work_flags == 0) { 1867 1.8 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL); 1868 1.8 matt } 1869 1.8 matt atomic_or_32(&sc->sc_work_flags, work_flags); 1870 1.8 matt rv = 1; 1871 1.8 matt } 1872 1.8 matt 1873 1.2 matt if (soft_flags) { 1874 1.8 matt if (sc->sc_soft_flags == 0) { 1875 1.8 matt softint_schedule(sc->sc_soft_ih); 1876 1.8 matt } 1877 1.8 matt atomic_or_32(&sc->sc_soft_flags, soft_flags); 1878 1.2 matt rv = 1; 1879 1.2 matt } 1880 1.1 matt 1881 1.1 matt mutex_exit(sc->sc_hwlock); 1882 1.1 matt 1883 1.1 matt return rv; 1884 1.1 matt } 1885 1.2 matt 1886 1.16 matt #ifdef BCMETH_MPSAFETX 1887 1.16 matt void 1888 1.16 matt bcmeth_soft_txintr(struct bcmeth_softc *sc) 1889 1.16 matt { 1890 1.16 matt mutex_enter(sc->sc_lock); 1891 1.16 matt /* 1892 1.16 matt * Let's do what we came here for. Consume transmitted 1893 1.34 msaitoh * packets off the transmit ring. 1894 1.16 matt */ 1895 1.16 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1896 1.16 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1897 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall); 1898 1.16 matt } 1899 1.16 matt if (sc->sc_if.if_flags & IFF_RUNNING) { 1900 1.16 matt mutex_spin_enter(sc->sc_hwlock); 1901 1.16 matt sc->sc_intmask |= XMTINT_0; 1902 1.16 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1903 1.16 matt mutex_spin_exit(sc->sc_hwlock); 1904 1.16 matt } 1905 1.16 matt mutex_exit(sc->sc_lock); 1906 1.16 matt } 1907 1.16 matt #endif /* BCMETH_MPSAFETX */ 1908 1.16 matt 1909 1.2 matt void 1910 1.2 matt bcmeth_soft_intr(void *arg) 1911 1.2 matt { 1912 1.2 matt struct bcmeth_softc * const sc = arg; 1913 1.2 matt struct ifnet * const ifp = &sc->sc_if; 1914 1.15 matt uint32_t intmask = 0; 1915 1.2 matt 1916 1.2 matt mutex_enter(sc->sc_lock); 1917 1.2 matt 1918 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0); 1919 1.2 matt 1920 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr); 1921 1.2 matt 1922 1.8 matt if ((soft_flags & SOFT_TXINTR) 1923 1.8 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) { 1924 1.8 matt /* 1925 1.8 matt * Let's do what we came here for. Consume transmitted 1926 1.34 msaitoh * packets off the transmit ring. 1927 1.8 matt */ 1928 1.8 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1929 1.8 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1930 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall); 1931 1.8 matt } 1932 1.15 matt intmask |= XMTINT_0; 1933 1.8 matt } 1934 1.8 matt 1935 1.8 matt if (soft_flags & SOFT_RXINTR) { 1936 1.8 matt /* 1937 1.35 msaitoh * Let's consume 1938 1.8 matt */ 1939 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq, 1940 1.20 matt sc->sc_rxq.rxq_threshold / 4)) { 1941 1.20 matt /* 1942 1.20 matt * We've consumed a quarter of the ring and still have 1943 1.20 matt * more to do. Refill the ring. 1944 1.20 matt */ 1945 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); 1946 1.20 matt } 1947 1.15 matt intmask |= RCVINT; 1948 1.8 matt } 1949 1.8 matt 1950 1.8 matt if (ifp->if_flags & IFF_RUNNING) { 1951 1.8 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); 1952 1.14 matt mutex_spin_enter(sc->sc_hwlock); 1953 1.15 matt sc->sc_intmask |= intmask; 1954 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1955 1.14 matt mutex_spin_exit(sc->sc_hwlock); 1956 1.8 matt } 1957 1.8 matt 1958 1.8 matt mutex_exit(sc->sc_lock); 1959 1.8 matt } 1960 1.8 matt 1961 1.8 matt void 1962 1.8 matt bcmeth_worker(struct work *wk, void *arg) 1963 1.8 matt { 1964 1.8 matt struct bcmeth_softc * const sc = arg; 1965 1.8 matt struct ifnet * const ifp = &sc->sc_if; 1966 1.15 matt uint32_t intmask = 0; 1967 1.8 matt 1968 1.8 matt mutex_enter(sc->sc_lock); 1969 1.8 matt 1970 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_work); 1971 1.8 matt 1972 1.8 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0); 1973 1.8 matt if (work_flags & WORK_REINIT) { 1974 1.2 matt int s = splnet(); 1975 1.8 matt sc->sc_soft_flags = 0; 1976 1.2 matt bcmeth_ifinit(ifp); 1977 1.2 matt splx(s); 1978 1.8 matt work_flags &= ~WORK_RXUNDERFLOW; 1979 1.2 matt } 1980 1.2 matt 1981 1.8 matt if (work_flags & WORK_RXUNDERFLOW) { 1982 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1983 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4; 1984 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) { 1985 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1; 1986 1.2 matt } else { 1987 1.15 matt intmask |= RCVDESCUF; 1988 1.2 matt } 1989 1.2 matt aprint_normal_dev(sc->sc_dev, 1990 1.2 matt "increasing receive buffers from %zu to %zu\n", 1991 1.2 matt rxq->rxq_threshold, threshold); 1992 1.2 matt rxq->rxq_threshold = threshold; 1993 1.2 matt } 1994 1.2 matt 1995 1.8 matt if (work_flags & WORK_RXINTR) { 1996 1.2 matt /* 1997 1.35 msaitoh * Let's consume 1998 1.2 matt */ 1999 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq, 2000 1.20 matt sc->sc_rxq.rxq_threshold / 4)) { 2001 1.20 matt /* 2002 1.20 matt * We've consumed a quarter of the ring and still have 2003 1.20 matt * more to do. Refill the ring. 2004 1.20 matt */ 2005 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); 2006 1.20 matt } 2007 1.15 matt intmask |= RCVINT; 2008 1.2 matt } 2009 1.2 matt 2010 1.2 matt if (ifp->if_flags & IFF_RUNNING) { 2011 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); 2012 1.16 matt #if 0 2013 1.16 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 2014 1.16 matt if (intstatus & RCVINT) { 2015 1.16 matt bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT); 2016 1.16 matt work_flags |= WORK_RXINTR; 2017 1.16 matt continue; 2018 1.16 matt } 2019 1.16 matt #endif 2020 1.14 matt mutex_spin_enter(sc->sc_hwlock); 2021 1.15 matt sc->sc_intmask |= intmask; 2022 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 2023 1.14 matt mutex_spin_exit(sc->sc_hwlock); 2024 1.2 matt } 2025 1.2 matt 2026 1.2 matt mutex_exit(sc->sc_lock); 2027 1.2 matt } 2028