bcm53xx_eth.c revision 1.1.2.2 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.1.2.1 tls #define _ARM32_BUS_DMA_PRIVATE
31 1.1 matt #define GMAC_PRIVATE
32 1.1 matt
33 1.1 matt #include "locators.h"
34 1.1.2.2 tls #include "opt_broadcom.h"
35 1.1 matt
36 1.1 matt #include <sys/cdefs.h>
37 1.1 matt
38 1.1.2.2 tls __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.1.2.2 2013/02/25 00:28:25 tls Exp $");
39 1.1 matt
40 1.1 matt #include <sys/param.h>
41 1.1.2.1 tls #include <sys/atomic.h>
42 1.1 matt #include <sys/bus.h>
43 1.1 matt #include <sys/device.h>
44 1.1.2.1 tls #include <sys/ioctl.h>
45 1.1 matt #include <sys/intr.h>
46 1.1.2.1 tls #include <sys/kmem.h>
47 1.1 matt #include <sys/mutex.h>
48 1.1.2.1 tls #include <sys/socket.h>
49 1.1 matt #include <sys/systm.h>
50 1.1.2.1 tls #include <sys/workqueue.h>
51 1.1 matt
52 1.1 matt #include <net/if.h>
53 1.1 matt #include <net/if_ether.h>
54 1.1 matt #include <net/if_media.h>
55 1.1 matt
56 1.1.2.1 tls #include <net/if_dl.h>
57 1.1.2.1 tls
58 1.1.2.1 tls #include <net/bpf.h>
59 1.1.2.1 tls
60 1.1 matt #include <dev/mii/miivar.h>
61 1.1 matt
62 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
63 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
64 1.1 matt
65 1.1.2.1 tls //#define BCMETH_MPSAFE
66 1.1.2.1 tls
67 1.1.2.2 tls #ifdef BCMETH_COUNTERS
68 1.1.2.2 tls #define BCMETH_EVCNT_ADD(a,b) ((void)((a).ev_count += (b)))
69 1.1.2.2 tls #else
70 1.1.2.2 tls #define BCMETH_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0)
71 1.1.2.2 tls #endif
72 1.1.2.2 tls #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1)
73 1.1.2.2 tls
74 1.1.2.1 tls #define BCMETH_MAXTXMBUFS 128
75 1.1.2.1 tls #define BCMETH_NTXSEGS 30
76 1.1.2.1 tls #define BCMETH_MAXRXMBUFS 255
77 1.1.2.1 tls #define BCMETH_MINRXMBUFS 64
78 1.1.2.1 tls #define BCMETH_NRXSEGS 1
79 1.1.2.1 tls #define BCMETH_RINGSIZE PAGE_SIZE
80 1.1.2.1 tls
81 1.1.2.2 tls #if 1
82 1.1.2.1 tls #define BCMETH_RCVMAGIC 0xfeedface
83 1.1.2.1 tls #endif
84 1.1.2.1 tls
85 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
86 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
87 1.1 matt
88 1.1.2.1 tls struct bcmeth_txqueue {
89 1.1.2.1 tls bus_dmamap_t txq_descmap;
90 1.1.2.1 tls struct gmac_txdb *txq_consumer;
91 1.1.2.1 tls struct gmac_txdb *txq_producer;
92 1.1.2.1 tls struct gmac_txdb *txq_first;
93 1.1.2.1 tls struct gmac_txdb *txq_last;
94 1.1.2.1 tls struct ifqueue txq_mbufs;
95 1.1.2.1 tls struct mbuf *txq_next;
96 1.1.2.1 tls size_t txq_free;
97 1.1.2.1 tls size_t txq_threshold;
98 1.1.2.1 tls size_t txq_lastintr;
99 1.1.2.1 tls bus_size_t txq_reg_xmtaddrlo;
100 1.1.2.1 tls bus_size_t txq_reg_xmtptr;
101 1.1.2.1 tls bus_size_t txq_reg_xmtctl;
102 1.1.2.1 tls bus_size_t txq_reg_xmtsts0;
103 1.1.2.1 tls bus_size_t txq_reg_xmtsts1;
104 1.1.2.1 tls bus_dma_segment_t txq_descmap_seg;
105 1.1.2.1 tls };
106 1.1.2.1 tls
107 1.1.2.1 tls struct bcmeth_rxqueue {
108 1.1.2.1 tls bus_dmamap_t rxq_descmap;
109 1.1.2.1 tls struct gmac_rxdb *rxq_consumer;
110 1.1.2.1 tls struct gmac_rxdb *rxq_producer;
111 1.1.2.1 tls struct gmac_rxdb *rxq_first;
112 1.1.2.1 tls struct gmac_rxdb *rxq_last;
113 1.1.2.1 tls struct mbuf *rxq_mhead;
114 1.1.2.1 tls struct mbuf **rxq_mtail;
115 1.1.2.1 tls struct mbuf *rxq_mconsumer;
116 1.1.2.1 tls size_t rxq_inuse;
117 1.1.2.1 tls size_t rxq_threshold;
118 1.1.2.1 tls bus_size_t rxq_reg_rcvaddrlo;
119 1.1.2.1 tls bus_size_t rxq_reg_rcvptr;
120 1.1.2.1 tls bus_size_t rxq_reg_rcvctl;
121 1.1.2.1 tls bus_size_t rxq_reg_rcvsts0;
122 1.1.2.1 tls bus_size_t rxq_reg_rcvsts1;
123 1.1.2.1 tls bus_dma_segment_t rxq_descmap_seg;
124 1.1.2.1 tls };
125 1.1.2.1 tls
126 1.1.2.1 tls struct bcmeth_mapcache {
127 1.1.2.1 tls u_int dmc_nmaps;
128 1.1.2.1 tls u_int dmc_maxseg;
129 1.1.2.1 tls u_int dmc_maxmaps;
130 1.1.2.1 tls u_int dmc_maxmapsize;
131 1.1.2.1 tls bus_dmamap_t dmc_maps[0];
132 1.1.2.1 tls };
133 1.1.2.1 tls
134 1.1 matt struct bcmeth_softc {
135 1.1 matt device_t sc_dev;
136 1.1 matt bus_space_tag_t sc_bst;
137 1.1 matt bus_space_handle_t sc_bsh;
138 1.1 matt bus_dma_tag_t sc_dmat;
139 1.1 matt kmutex_t *sc_lock;
140 1.1 matt kmutex_t *sc_hwlock;
141 1.1 matt struct ethercom sc_ec;
142 1.1.2.1 tls #define sc_if sc_ec.ec_if
143 1.1.2.1 tls struct ifmedia sc_media;
144 1.1.2.1 tls void *sc_soft_ih;
145 1.1 matt void *sc_ih;
146 1.1.2.1 tls
147 1.1.2.1 tls struct bcmeth_rxqueue sc_rxq;
148 1.1.2.1 tls struct bcmeth_txqueue sc_txq;
149 1.1.2.1 tls
150 1.1.2.2 tls size_t sc_rcvoffset;
151 1.1.2.2 tls uint32_t sc_macaddr[2];
152 1.1.2.1 tls uint32_t sc_maxfrm;
153 1.1.2.1 tls uint32_t sc_cmdcfg;
154 1.1.2.1 tls uint32_t sc_intmask;
155 1.1.2.1 tls uint32_t sc_rcvlazy;
156 1.1.2.1 tls volatile uint32_t sc_soft_flags;
157 1.1.2.1 tls #define SOFT_RXINTR 0x01
158 1.1.2.1 tls #define SOFT_TXINTR 0x02
159 1.1.2.1 tls
160 1.1.2.2 tls #ifdef BCMETH_COUNTERS
161 1.1.2.1 tls struct evcnt sc_ev_intr;
162 1.1.2.1 tls struct evcnt sc_ev_soft_intr;
163 1.1.2.1 tls struct evcnt sc_ev_work;
164 1.1.2.1 tls struct evcnt sc_ev_tx_stall;
165 1.1.2.1 tls struct evcnt sc_ev_rx_badmagic_lo;
166 1.1.2.1 tls struct evcnt sc_ev_rx_badmagic_hi;
167 1.1.2.2 tls #endif
168 1.1.2.1 tls
169 1.1.2.1 tls struct ifqueue sc_rx_bufcache;
170 1.1.2.1 tls struct bcmeth_mapcache *sc_rx_mapcache;
171 1.1.2.1 tls struct bcmeth_mapcache *sc_tx_mapcache;
172 1.1.2.1 tls
173 1.1.2.1 tls struct workqueue *sc_workq;
174 1.1.2.1 tls struct work sc_work;
175 1.1.2.1 tls
176 1.1.2.1 tls volatile uint32_t sc_work_flags;
177 1.1.2.1 tls #define WORK_RXINTR 0x01
178 1.1.2.1 tls #define WORK_RXUNDERFLOW 0x02
179 1.1.2.1 tls #define WORK_REINIT 0x04
180 1.1.2.1 tls
181 1.1.2.1 tls uint8_t sc_enaddr[ETHER_ADDR_LEN];
182 1.1 matt };
183 1.1 matt
184 1.1.2.1 tls static void bcmeth_ifstart(struct ifnet *);
185 1.1.2.1 tls static void bcmeth_ifwatchdog(struct ifnet *);
186 1.1.2.1 tls static int bcmeth_ifinit(struct ifnet *);
187 1.1.2.1 tls static void bcmeth_ifstop(struct ifnet *, int);
188 1.1.2.1 tls static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
189 1.1.2.1 tls
190 1.1.2.1 tls static int bcmeth_mapcache_create(struct bcmeth_softc *,
191 1.1.2.1 tls struct bcmeth_mapcache **, size_t, size_t, size_t);
192 1.1.2.1 tls static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
193 1.1.2.1 tls struct bcmeth_mapcache *);
194 1.1.2.1 tls static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
195 1.1.2.1 tls struct bcmeth_mapcache *);
196 1.1.2.1 tls static void bcmeth_mapcache_put(struct bcmeth_softc *,
197 1.1.2.1 tls struct bcmeth_mapcache *, bus_dmamap_t);
198 1.1.2.1 tls
199 1.1.2.1 tls static int bcmeth_txq_attach(struct bcmeth_softc *,
200 1.1.2.1 tls struct bcmeth_txqueue *, u_int);
201 1.1.2.1 tls static void bcmeth_txq_purge(struct bcmeth_softc *,
202 1.1.2.1 tls struct bcmeth_txqueue *);
203 1.1.2.1 tls static void bcmeth_txq_reset(struct bcmeth_softc *,
204 1.1.2.1 tls struct bcmeth_txqueue *);
205 1.1.2.1 tls static bool bcmeth_txq_consume(struct bcmeth_softc *,
206 1.1.2.1 tls struct bcmeth_txqueue *);
207 1.1.2.1 tls static bool bcmeth_txq_produce(struct bcmeth_softc *,
208 1.1.2.1 tls struct bcmeth_txqueue *, struct mbuf *m);
209 1.1.2.1 tls static bool bcmeth_txq_active_p(struct bcmeth_softc *,
210 1.1.2.1 tls struct bcmeth_txqueue *);
211 1.1.2.1 tls
212 1.1.2.1 tls static int bcmeth_rxq_attach(struct bcmeth_softc *,
213 1.1.2.1 tls struct bcmeth_rxqueue *, u_int);
214 1.1.2.1 tls static bool bcmeth_rxq_produce(struct bcmeth_softc *,
215 1.1.2.1 tls struct bcmeth_rxqueue *);
216 1.1.2.1 tls static void bcmeth_rxq_purge(struct bcmeth_softc *,
217 1.1.2.1 tls struct bcmeth_rxqueue *, bool);
218 1.1.2.1 tls static void bcmeth_rxq_reset(struct bcmeth_softc *,
219 1.1.2.1 tls struct bcmeth_rxqueue *);
220 1.1.2.1 tls
221 1.1 matt static int bcmeth_intr(void *);
222 1.1.2.1 tls #ifdef BCMETH_MPSAFETX
223 1.1.2.1 tls static void bcmeth_soft_txintr(struct bcmeth_softc *);
224 1.1.2.1 tls #endif
225 1.1.2.1 tls static void bcmeth_soft_intr(void *);
226 1.1.2.1 tls static void bcmeth_worker(struct work *, void *);
227 1.1.2.1 tls
228 1.1.2.1 tls static int bcmeth_mediachange(struct ifnet *);
229 1.1.2.1 tls static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
230 1.1 matt
231 1.1 matt static inline uint32_t
232 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
233 1.1 matt {
234 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
235 1.1 matt }
236 1.1 matt
237 1.1 matt static inline void
238 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
239 1.1 matt {
240 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
241 1.1 matt }
242 1.1 matt
243 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
244 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
245 1.1 matt
246 1.1 matt static int
247 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
248 1.1 matt {
249 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
250 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
251 1.1 matt
252 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
253 1.1 matt return 0;
254 1.1 matt
255 1.1 matt #ifdef DIAGNOSTIC
256 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
257 1.1 matt #endif
258 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
259 1.1 matt
260 1.1 matt return 1;
261 1.1 matt }
262 1.1 matt
263 1.1 matt static void
264 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
265 1.1 matt {
266 1.1 matt struct bcmeth_softc * const sc = device_private(self);
267 1.1.2.1 tls struct ethercom * const ec = &sc->sc_ec;
268 1.1.2.1 tls struct ifnet * const ifp = &ec->ec_if;
269 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
270 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
271 1.1.2.1 tls const char * const xname = device_xname(self);
272 1.1.2.1 tls prop_dictionary_t dict = device_properties(self);
273 1.1.2.1 tls int error;
274 1.1 matt
275 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
276 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
277 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
278 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
279 1.1 matt
280 1.1.2.1 tls /*
281 1.1.2.1 tls * We need to use the coherent dma tag for the GMAC.
282 1.1.2.1 tls */
283 1.1.2.1 tls sc->sc_dmat = &bcm53xx_coherent_dma_tag;
284 1.1.2.2 tls #if _ARM32_NEED_BUS_DMA_BOUNCE
285 1.1.2.2 tls if (device_cfdata(self)->cf_flags & 2) {
286 1.1.2.2 tls sc->sc_dmat = &bcm53xx_bounce_dma_tag;
287 1.1.2.2 tls }
288 1.1.2.2 tls #endif
289 1.1.2.1 tls
290 1.1.2.1 tls prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
291 1.1.2.1 tls if (eaprop == NULL) {
292 1.1.2.1 tls uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
293 1.1.2.1 tls uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
294 1.1.2.1 tls if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
295 1.1.2.1 tls aprint_error(": mac-address property is missing\n");
296 1.1.2.1 tls return;
297 1.1.2.1 tls }
298 1.1.2.1 tls sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
299 1.1.2.1 tls sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
300 1.1.2.1 tls sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
301 1.1.2.1 tls sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
302 1.1.2.1 tls sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
303 1.1.2.1 tls sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
304 1.1.2.1 tls } else {
305 1.1.2.1 tls KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
306 1.1.2.1 tls KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
307 1.1.2.1 tls memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
308 1.1.2.1 tls ETHER_ADDR_LEN);
309 1.1.2.1 tls }
310 1.1.2.1 tls sc->sc_dev = self;
311 1.1.2.1 tls sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
312 1.1.2.1 tls sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
313 1.1.2.1 tls
314 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
315 1.1 matt
316 1.1 matt aprint_naive("\n");
317 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
318 1.1 matt
319 1.1.2.1 tls error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
320 1.1.2.1 tls if (error) {
321 1.1.2.1 tls aprint_error(": failed to init rxq: %d\n", error);
322 1.1.2.1 tls return;
323 1.1.2.1 tls }
324 1.1.2.1 tls
325 1.1.2.1 tls error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
326 1.1.2.1 tls if (error) {
327 1.1.2.1 tls aprint_error(": failed to init txq: %d\n", error);
328 1.1.2.1 tls return;
329 1.1.2.1 tls }
330 1.1.2.1 tls
331 1.1.2.1 tls error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
332 1.1.2.1 tls BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
333 1.1.2.1 tls if (error) {
334 1.1.2.1 tls aprint_error(": failed to allocate rx dmamaps: %d\n", error);
335 1.1.2.1 tls return;
336 1.1.2.1 tls }
337 1.1.2.1 tls
338 1.1.2.1 tls error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
339 1.1.2.1 tls BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
340 1.1.2.1 tls if (error) {
341 1.1.2.1 tls aprint_error(": failed to allocate tx dmamaps: %d\n", error);
342 1.1.2.1 tls return;
343 1.1.2.1 tls }
344 1.1.2.1 tls
345 1.1.2.1 tls error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
346 1.1.2.1 tls (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
347 1.1.2.1 tls if (error) {
348 1.1.2.1 tls aprint_error(": failed to create workqueue: %d\n", error);
349 1.1.2.1 tls return;
350 1.1.2.1 tls }
351 1.1.2.1 tls
352 1.1.2.1 tls sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
353 1.1.2.1 tls bcmeth_soft_intr, sc);
354 1.1 matt
355 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
356 1.1 matt bcmeth_intr, sc);
357 1.1 matt
358 1.1 matt if (sc->sc_ih == NULL) {
359 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
360 1.1 matt loc->loc_intrs[0]);
361 1.1 matt } else {
362 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
363 1.1 matt loc->loc_intrs[0]);
364 1.1 matt }
365 1.1.2.1 tls
366 1.1.2.1 tls aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
367 1.1.2.1 tls ether_sprintf(sc->sc_enaddr));
368 1.1.2.1 tls
369 1.1.2.1 tls /*
370 1.1.2.1 tls * Since each port in plugged into the switch/flow-accelerator,
371 1.1.2.1 tls * we hard code at Gige Full-Duplex with Flow Control enabled.
372 1.1.2.1 tls */
373 1.1.2.1 tls int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
374 1.1.2.1 tls //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
375 1.1.2.1 tls ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
376 1.1.2.1 tls bcmeth_mediastatus);
377 1.1.2.1 tls ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
378 1.1.2.1 tls ifmedia_set(&sc->sc_media, ifmedia);
379 1.1.2.1 tls
380 1.1.2.1 tls ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
381 1.1.2.1 tls
382 1.1.2.1 tls strlcpy(ifp->if_xname, xname, IFNAMSIZ);
383 1.1.2.1 tls ifp->if_softc = sc;
384 1.1.2.1 tls ifp->if_baudrate = IF_Mbps(1000);
385 1.1.2.1 tls ifp->if_capabilities = 0;
386 1.1.2.1 tls ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
387 1.1.2.1 tls #ifdef BCMETH_MPSAFE
388 1.1.2.1 tls ifp->if_flags2 = IFF2_MPSAFE;
389 1.1.2.1 tls #endif
390 1.1.2.1 tls ifp->if_ioctl = bcmeth_ifioctl;
391 1.1.2.1 tls ifp->if_start = bcmeth_ifstart;
392 1.1.2.1 tls ifp->if_watchdog = bcmeth_ifwatchdog;
393 1.1.2.1 tls ifp->if_init = bcmeth_ifinit;
394 1.1.2.1 tls ifp->if_stop = bcmeth_ifstop;
395 1.1.2.1 tls IFQ_SET_READY(&ifp->if_snd);
396 1.1.2.1 tls
397 1.1.2.1 tls bcmeth_ifstop(ifp, true);
398 1.1.2.1 tls
399 1.1.2.1 tls /*
400 1.1.2.1 tls * Attach the interface.
401 1.1.2.1 tls */
402 1.1.2.1 tls if_attach(ifp);
403 1.1.2.1 tls ether_ifattach(ifp, sc->sc_enaddr);
404 1.1.2.1 tls
405 1.1.2.2 tls #ifdef BCMETH_COUNTERS
406 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
407 1.1.2.1 tls NULL, xname, "intr");
408 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
409 1.1.2.1 tls NULL, xname, "soft intr");
410 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
411 1.1.2.1 tls NULL, xname, "work items");
412 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
413 1.1.2.1 tls NULL, xname, "tx stalls");
414 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC,
415 1.1.2.1 tls NULL, xname, "rx badmagic lo");
416 1.1.2.1 tls evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC,
417 1.1.2.1 tls NULL, xname, "rx badmagic hi");
418 1.1.2.2 tls #endif
419 1.1.2.1 tls }
420 1.1.2.1 tls
421 1.1.2.1 tls static int
422 1.1.2.1 tls bcmeth_mediachange(struct ifnet *ifp)
423 1.1.2.1 tls {
424 1.1.2.1 tls //struct bcmeth_softc * const sc = ifp->if_softc;
425 1.1.2.1 tls return 0;
426 1.1 matt }
427 1.1 matt
428 1.1 matt static void
429 1.1.2.1 tls bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
430 1.1 matt {
431 1.1.2.1 tls //struct bcmeth_softc * const sc = ifp->if_softc;
432 1.1 matt
433 1.1.2.1 tls ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
434 1.1.2.1 tls ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
435 1.1.2.1 tls }
436 1.1.2.1 tls
437 1.1.2.1 tls static uint64_t
438 1.1.2.1 tls bcmeth_macaddr_create(const uint8_t *enaddr)
439 1.1.2.1 tls {
440 1.1.2.1 tls return (enaddr[3] << 0) // UNIMAC_MAC_0
441 1.1.2.1 tls | (enaddr[2] << 8) // UNIMAC_MAC_0
442 1.1.2.1 tls | (enaddr[1] << 16) // UNIMAC_MAC_0
443 1.1.2.2 tls | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0
444 1.1.2.1 tls | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
445 1.1.2.1 tls | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
446 1.1.2.1 tls }
447 1.1.2.1 tls
448 1.1.2.1 tls static int
449 1.1.2.1 tls bcmeth_ifinit(struct ifnet *ifp)
450 1.1.2.1 tls {
451 1.1.2.1 tls struct bcmeth_softc * const sc = ifp->if_softc;
452 1.1.2.1 tls int error = 0;
453 1.1.2.1 tls
454 1.1.2.1 tls sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES);
455 1.1.2.1 tls if (ifp->if_mtu > ETHERMTU_JUMBO)
456 1.1.2.1 tls return error;
457 1.1.2.1 tls
458 1.1.2.1 tls KASSERT(ifp->if_flags & IFF_UP);
459 1.1.2.1 tls
460 1.1.2.1 tls /*
461 1.1.2.1 tls * Stop the interface
462 1.1.2.1 tls */
463 1.1.2.1 tls bcmeth_ifstop(ifp, 0);
464 1.1.2.1 tls
465 1.1.2.1 tls /*
466 1.1.2.2 tls * Reserve enough space at the front so that we can insert a maxsized
467 1.1.2.2 tls * link header and a VLAN tag. Also make sure we have enough room for
468 1.1.2.2 tls * the rcvsts field as well.
469 1.1.2.2 tls */
470 1.1.2.2 tls KASSERT(ALIGN(max_linkhdr) == max_linkhdr);
471 1.1.2.2 tls KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu",
472 1.1.2.2 tls max_linkhdr, sizeof(struct ether_header));
473 1.1.2.2 tls sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header);
474 1.1.2.2 tls if (sc->sc_rcvoffset <= 4)
475 1.1.2.2 tls sc->sc_rcvoffset += 4;
476 1.1.2.2 tls KASSERT((sc->sc_rcvoffset & 3) == 2);
477 1.1.2.2 tls KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET));
478 1.1.2.2 tls KASSERT(sc->sc_rcvoffset >= 6);
479 1.1.2.2 tls
480 1.1.2.2 tls /*
481 1.1.2.1 tls * If our frame size has changed (or it's our first time through)
482 1.1.2.1 tls * destroy the existing transmit mapcache.
483 1.1.2.1 tls */
484 1.1.2.1 tls if (sc->sc_tx_mapcache != NULL
485 1.1.2.1 tls && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
486 1.1.2.1 tls bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
487 1.1.2.1 tls sc->sc_tx_mapcache = NULL;
488 1.1.2.1 tls }
489 1.1.2.1 tls
490 1.1.2.1 tls if (sc->sc_tx_mapcache == NULL) {
491 1.1.2.1 tls error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
492 1.1.2.1 tls BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
493 1.1.2.1 tls if (error)
494 1.1.2.1 tls return error;
495 1.1.2.1 tls }
496 1.1.2.1 tls
497 1.1.2.1 tls sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
498 1.1.2.1 tls | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
499 1.1.2.1 tls | RX_ENA | TX_ENA;
500 1.1.2.1 tls
501 1.1.2.1 tls if (ifp->if_flags & IFF_PROMISC) {
502 1.1.2.1 tls sc->sc_cmdcfg |= PROMISC_EN;
503 1.1.2.1 tls } else {
504 1.1.2.1 tls sc->sc_cmdcfg &= ~PROMISC_EN;
505 1.1.2.1 tls }
506 1.1.2.1 tls
507 1.1.2.2 tls const uint8_t * const lladdr = CLLADDR(ifp->if_sadl);
508 1.1.2.2 tls const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr);
509 1.1.2.2 tls
510 1.1.2.2 tls /*
511 1.1.2.2 tls * We make sure that a received Ethernet packet start on a non-word
512 1.1.2.2 tls * boundary so that the packet payload will be on a word boundary.
513 1.1.2.2 tls * So to check the destination address we keep around two words to
514 1.1.2.2 tls * quickly compare with.
515 1.1.2.2 tls */
516 1.1.2.2 tls #if __ARMEL__
517 1.1.2.2 tls sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8);
518 1.1.2.2 tls sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8)
519 1.1.2.2 tls | (lladdr[4] << 16) | (lladdr[5] << 24);
520 1.1.2.2 tls #else
521 1.1.2.2 tls sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8);
522 1.1.2.2 tls sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8)
523 1.1.2.2 tls | (lladdr[1] << 16) | (lladdr[2] << 24);
524 1.1.2.2 tls #endif
525 1.1.2.1 tls
526 1.1.2.1 tls sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
527 1.1.2.1 tls
528 1.1.2.1 tls /* 5. Load RCVADDR_LO with new pointer */
529 1.1.2.1 tls bcmeth_rxq_reset(sc, &sc->sc_rxq);
530 1.1.2.1 tls
531 1.1.2.1 tls bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
532 1.1.2.2 tls __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET)
533 1.1.2.1 tls | RCVCTL_PARITY_DIS
534 1.1.2.1 tls | RCVCTL_OFLOW_CONTINUE
535 1.1.2.1 tls | __SHIFTIN(3, RCVCTL_BURSTLEN));
536 1.1.2.1 tls
537 1.1.2.1 tls /* 6. Load XMTADDR_LO with new pointer */
538 1.1.2.1 tls bcmeth_txq_reset(sc, &sc->sc_txq);
539 1.1.2.1 tls
540 1.1.2.1 tls bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
541 1.1.2.1 tls | XMTCTL_PARITY_DIS
542 1.1.2.1 tls | __SHIFTIN(3, XMTCTL_BURSTLEN));
543 1.1.2.1 tls
544 1.1.2.1 tls /* 7. Setup other UNIMAC registers */
545 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
546 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
547 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
548 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
549 1.1.2.1 tls
550 1.1.2.1 tls uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
551 1.1.2.1 tls devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
552 1.1.2.1 tls devctl &= ~FLOW_CTRL_MODE;
553 1.1.2.1 tls devctl &= ~MIB_RD_RESET_EN;
554 1.1.2.1 tls devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
555 1.1.2.1 tls devctl &= ~CPU_FLOW_CTRL_ON;
556 1.1.2.1 tls bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
557 1.1.2.1 tls
558 1.1.2.1 tls /* Setup lazy receive (at most 1ms). */
559 1.1.2.2 tls const struct cpu_softc * const cpu = curcpu()->ci_softc;
560 1.1.2.1 tls sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
561 1.1.2.2 tls | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT);
562 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
563 1.1.2.1 tls
564 1.1.2.1 tls /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
565 1.1.2.1 tls sc->sc_intmask |= XMTINT_0|XMTUF;
566 1.1.2.1 tls bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
567 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
568 1.1.2.1 tls
569 1.1.2.1 tls
570 1.1.2.1 tls /* 12. Enable receive queues in RQUEUE, */
571 1.1.2.1 tls sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
572 1.1.2.1 tls bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
573 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
574 1.1.2.1 tls
575 1.1.2.1 tls bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
576 1.1.2.1 tls
577 1.1.2.1 tls #if 0
578 1.1.2.1 tls aprint_normal_dev(sc->sc_dev,
579 1.1.2.1 tls "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
580 1.1.2.1 tls devctl, sc->sc_cmdcfg,
581 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
582 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
583 1.1.2.1 tls #endif
584 1.1.2.1 tls
585 1.1.2.1 tls sc->sc_soft_flags = 0;
586 1.1.2.1 tls
587 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
588 1.1.2.1 tls
589 1.1.2.1 tls ifp->if_flags |= IFF_RUNNING;
590 1.1.2.1 tls
591 1.1.2.1 tls return error;
592 1.1.2.1 tls }
593 1.1.2.1 tls
594 1.1.2.1 tls static void
595 1.1.2.1 tls bcmeth_ifstop(struct ifnet *ifp, int disable)
596 1.1.2.1 tls {
597 1.1.2.1 tls struct bcmeth_softc * const sc = ifp->if_softc;
598 1.1.2.1 tls struct bcmeth_txqueue * const txq = &sc->sc_txq;
599 1.1.2.1 tls struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
600 1.1.2.1 tls
601 1.1.2.1 tls KASSERT(!cpu_intr_p());
602 1.1.2.1 tls
603 1.1.2.1 tls sc->sc_soft_flags = 0;
604 1.1.2.1 tls sc->sc_work_flags = 0;
605 1.1.2.1 tls
606 1.1.2.1 tls /* Disable Rx processing */
607 1.1.2.1 tls bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
608 1.1.2.1 tls bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
609 1.1.2.1 tls
610 1.1.2.1 tls /* Disable Tx processing */
611 1.1.2.1 tls bcmeth_write_4(sc, txq->txq_reg_xmtctl,
612 1.1.2.1 tls bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
613 1.1.2.1 tls
614 1.1.2.1 tls /* Disable all interrupts */
615 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, 0);
616 1.1.2.1 tls
617 1.1.2.1 tls for (;;) {
618 1.1.2.1 tls uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
619 1.1.2.1 tls uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
620 1.1.2.1 tls if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
621 1.1.2.1 tls && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
622 1.1.2.1 tls break;
623 1.1.2.1 tls delay(50);
624 1.1.2.1 tls }
625 1.1.2.1 tls /*
626 1.1.2.1 tls * Now reset the controller.
627 1.1.2.1 tls *
628 1.1.2.1 tls * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
629 1.1.2.1 tls * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
630 1.1.2.1 tls */
631 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
632 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
633 1.1.2.1 tls sc->sc_intmask = 0;
634 1.1.2.1 tls ifp->if_flags &= ~IFF_RUNNING;
635 1.1.2.1 tls
636 1.1.2.1 tls /*
637 1.1.2.1 tls * Let's consume any remaining transmitted packets. And if we are
638 1.1.2.1 tls * disabling the interface, purge ourselves of any untransmitted
639 1.1.2.1 tls * packets. But don't consume any received packets, just drop them.
640 1.1.2.1 tls * If we aren't disabling the interface, save the mbufs in the
641 1.1.2.1 tls * receive queue for reuse.
642 1.1.2.1 tls */
643 1.1.2.1 tls bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
644 1.1.2.1 tls bcmeth_txq_consume(sc, &sc->sc_txq);
645 1.1.2.1 tls if (disable) {
646 1.1.2.1 tls bcmeth_txq_purge(sc, &sc->sc_txq);
647 1.1.2.1 tls IF_PURGE(&ifp->if_snd);
648 1.1.2.1 tls }
649 1.1.2.1 tls
650 1.1.2.1 tls bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
651 1.1.2.1 tls }
652 1.1.2.1 tls
653 1.1.2.1 tls static void
654 1.1.2.1 tls bcmeth_ifwatchdog(struct ifnet *ifp)
655 1.1.2.1 tls {
656 1.1.2.1 tls }
657 1.1.2.1 tls
658 1.1.2.1 tls static int
659 1.1.2.1 tls bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
660 1.1.2.1 tls {
661 1.1.2.1 tls struct bcmeth_softc *sc = ifp->if_softc;
662 1.1.2.1 tls struct ifreq * const ifr = data;
663 1.1.2.1 tls const int s = splnet();
664 1.1.2.1 tls int error;
665 1.1.2.1 tls
666 1.1.2.1 tls switch (cmd) {
667 1.1.2.1 tls case SIOCSIFMEDIA:
668 1.1.2.1 tls case SIOCGIFMEDIA:
669 1.1.2.1 tls error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
670 1.1.2.1 tls break;
671 1.1.2.1 tls
672 1.1.2.1 tls default:
673 1.1.2.1 tls error = ether_ioctl(ifp, cmd, data);
674 1.1.2.1 tls if (error != ENETRESET)
675 1.1.2.1 tls break;
676 1.1.2.1 tls
677 1.1.2.1 tls if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
678 1.1.2.1 tls error = 0;
679 1.1.2.1 tls break;
680 1.1.2.1 tls }
681 1.1.2.1 tls error = bcmeth_ifinit(ifp);
682 1.1.2.1 tls break;
683 1.1.2.1 tls }
684 1.1.2.1 tls
685 1.1.2.1 tls splx(s);
686 1.1.2.1 tls return error;
687 1.1.2.1 tls }
688 1.1.2.1 tls
689 1.1.2.1 tls static void
690 1.1.2.1 tls bcmeth_rxq_desc_presync(
691 1.1.2.1 tls struct bcmeth_softc *sc,
692 1.1.2.1 tls struct bcmeth_rxqueue *rxq,
693 1.1.2.1 tls struct gmac_rxdb *rxdb,
694 1.1.2.1 tls size_t count)
695 1.1.2.1 tls {
696 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
697 1.1.2.1 tls (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
698 1.1.2.1 tls BUS_DMASYNC_PREWRITE);
699 1.1.2.1 tls }
700 1.1.2.1 tls
701 1.1.2.1 tls static void
702 1.1.2.1 tls bcmeth_rxq_desc_postsync(
703 1.1.2.1 tls struct bcmeth_softc *sc,
704 1.1.2.1 tls struct bcmeth_rxqueue *rxq,
705 1.1.2.1 tls struct gmac_rxdb *rxdb,
706 1.1.2.1 tls size_t count)
707 1.1.2.1 tls {
708 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
709 1.1.2.1 tls (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
710 1.1.2.1 tls BUS_DMASYNC_POSTWRITE);
711 1.1.2.1 tls }
712 1.1.2.1 tls
713 1.1.2.1 tls static void
714 1.1.2.1 tls bcmeth_txq_desc_presync(
715 1.1.2.1 tls struct bcmeth_softc *sc,
716 1.1.2.1 tls struct bcmeth_txqueue *txq,
717 1.1.2.1 tls struct gmac_txdb *txdb,
718 1.1.2.1 tls size_t count)
719 1.1.2.1 tls {
720 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
721 1.1.2.1 tls (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
722 1.1.2.1 tls BUS_DMASYNC_PREWRITE);
723 1.1.2.1 tls }
724 1.1.2.1 tls
725 1.1.2.1 tls static void
726 1.1.2.1 tls bcmeth_txq_desc_postsync(
727 1.1.2.1 tls struct bcmeth_softc *sc,
728 1.1.2.1 tls struct bcmeth_txqueue *txq,
729 1.1.2.1 tls struct gmac_txdb *txdb,
730 1.1.2.1 tls size_t count)
731 1.1.2.1 tls {
732 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
733 1.1.2.1 tls (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
734 1.1.2.1 tls BUS_DMASYNC_POSTWRITE);
735 1.1.2.1 tls }
736 1.1.2.1 tls
737 1.1.2.1 tls static bus_dmamap_t
738 1.1.2.1 tls bcmeth_mapcache_get(
739 1.1.2.1 tls struct bcmeth_softc *sc,
740 1.1.2.1 tls struct bcmeth_mapcache *dmc)
741 1.1.2.1 tls {
742 1.1.2.1 tls KASSERT(dmc->dmc_nmaps > 0);
743 1.1.2.1 tls KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
744 1.1.2.1 tls return dmc->dmc_maps[--dmc->dmc_nmaps];
745 1.1.2.1 tls }
746 1.1.2.1 tls
747 1.1.2.1 tls static void
748 1.1.2.1 tls bcmeth_mapcache_put(
749 1.1.2.1 tls struct bcmeth_softc *sc,
750 1.1.2.1 tls struct bcmeth_mapcache *dmc,
751 1.1.2.1 tls bus_dmamap_t map)
752 1.1.2.1 tls {
753 1.1.2.1 tls KASSERT(map != NULL);
754 1.1.2.1 tls KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
755 1.1.2.1 tls dmc->dmc_maps[dmc->dmc_nmaps++] = map;
756 1.1.2.1 tls }
757 1.1.2.1 tls
758 1.1.2.1 tls static void
759 1.1.2.1 tls bcmeth_mapcache_destroy(
760 1.1.2.1 tls struct bcmeth_softc *sc,
761 1.1.2.1 tls struct bcmeth_mapcache *dmc)
762 1.1.2.1 tls {
763 1.1.2.1 tls const size_t dmc_size =
764 1.1.2.1 tls offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
765 1.1.2.1 tls
766 1.1.2.1 tls for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
767 1.1.2.1 tls bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
768 1.1.2.1 tls }
769 1.1.2.1 tls kmem_intr_free(dmc, dmc_size);
770 1.1.2.1 tls }
771 1.1.2.1 tls
772 1.1.2.1 tls static int
773 1.1.2.1 tls bcmeth_mapcache_create(
774 1.1.2.1 tls struct bcmeth_softc *sc,
775 1.1.2.1 tls struct bcmeth_mapcache **dmc_p,
776 1.1.2.1 tls size_t maxmaps,
777 1.1.2.1 tls size_t maxmapsize,
778 1.1.2.1 tls size_t maxseg)
779 1.1.2.1 tls {
780 1.1.2.1 tls const size_t dmc_size =
781 1.1.2.1 tls offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
782 1.1.2.1 tls struct bcmeth_mapcache * const dmc =
783 1.1.2.1 tls kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
784 1.1.2.1 tls
785 1.1.2.1 tls dmc->dmc_maxmaps = maxmaps;
786 1.1.2.1 tls dmc->dmc_nmaps = maxmaps;
787 1.1.2.1 tls dmc->dmc_maxmapsize = maxmapsize;
788 1.1.2.1 tls dmc->dmc_maxseg = maxseg;
789 1.1.2.1 tls
790 1.1.2.1 tls for (u_int i = 0; i < maxmaps; i++) {
791 1.1.2.1 tls int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
792 1.1.2.1 tls dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
793 1.1.2.1 tls BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
794 1.1.2.1 tls if (error) {
795 1.1.2.1 tls aprint_error_dev(sc->sc_dev,
796 1.1.2.1 tls "failed to creat dma map cache "
797 1.1.2.1 tls "entry %u of %zu: %d\n",
798 1.1.2.1 tls i, maxmaps, error);
799 1.1.2.1 tls while (i-- > 0) {
800 1.1.2.1 tls bus_dmamap_destroy(sc->sc_dmat,
801 1.1.2.1 tls dmc->dmc_maps[i]);
802 1.1.2.1 tls }
803 1.1.2.1 tls kmem_intr_free(dmc, dmc_size);
804 1.1.2.1 tls return error;
805 1.1.2.1 tls }
806 1.1.2.1 tls KASSERT(dmc->dmc_maps[i] != NULL);
807 1.1.2.1 tls }
808 1.1.2.1 tls
809 1.1.2.1 tls *dmc_p = dmc;
810 1.1.2.1 tls
811 1.1.2.1 tls return 0;
812 1.1.2.1 tls }
813 1.1.2.1 tls
814 1.1.2.1 tls #if 0
815 1.1.2.1 tls static void
816 1.1.2.1 tls bcmeth_dmamem_free(
817 1.1.2.1 tls bus_dma_tag_t dmat,
818 1.1.2.1 tls size_t map_size,
819 1.1.2.1 tls bus_dma_segment_t *seg,
820 1.1.2.1 tls bus_dmamap_t map,
821 1.1.2.1 tls void *kvap)
822 1.1.2.1 tls {
823 1.1.2.1 tls bus_dmamap_destroy(dmat, map);
824 1.1.2.1 tls bus_dmamem_unmap(dmat, kvap, map_size);
825 1.1.2.1 tls bus_dmamem_free(dmat, seg, 1);
826 1.1.2.1 tls }
827 1.1.2.1 tls #endif
828 1.1.2.1 tls
829 1.1.2.1 tls static int
830 1.1.2.1 tls bcmeth_dmamem_alloc(
831 1.1.2.1 tls bus_dma_tag_t dmat,
832 1.1.2.1 tls size_t map_size,
833 1.1.2.1 tls bus_dma_segment_t *seg,
834 1.1.2.1 tls bus_dmamap_t *map,
835 1.1.2.1 tls void **kvap)
836 1.1.2.1 tls {
837 1.1.2.1 tls int error;
838 1.1.2.1 tls int nseg;
839 1.1.2.1 tls
840 1.1.2.1 tls *kvap = NULL;
841 1.1.2.1 tls *map = NULL;
842 1.1.2.1 tls
843 1.1.2.1 tls error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0,
844 1.1.2.1 tls seg, 1, &nseg, 0);
845 1.1.2.1 tls if (error)
846 1.1.2.1 tls return error;
847 1.1.2.1 tls
848 1.1.2.1 tls KASSERT(nseg == 1);
849 1.1.2.1 tls
850 1.1.2.1 tls error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0);
851 1.1.2.1 tls if (error == 0) {
852 1.1.2.1 tls error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
853 1.1.2.1 tls map);
854 1.1.2.1 tls if (error == 0) {
855 1.1.2.1 tls error = bus_dmamap_load(dmat, *map, *kvap, map_size,
856 1.1.2.1 tls NULL, 0);
857 1.1.2.1 tls if (error == 0)
858 1.1.2.1 tls return 0;
859 1.1.2.1 tls bus_dmamap_destroy(dmat, *map);
860 1.1.2.1 tls *map = NULL;
861 1.1.2.1 tls }
862 1.1.2.1 tls bus_dmamem_unmap(dmat, *kvap, map_size);
863 1.1.2.1 tls *kvap = NULL;
864 1.1.2.1 tls }
865 1.1.2.1 tls bus_dmamem_free(dmat, seg, nseg);
866 1.1.2.1 tls return 0;
867 1.1.2.1 tls }
868 1.1.2.1 tls
869 1.1.2.1 tls static struct mbuf *
870 1.1.2.1 tls bcmeth_rx_buf_alloc(
871 1.1.2.1 tls struct bcmeth_softc *sc)
872 1.1.2.1 tls {
873 1.1.2.1 tls struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
874 1.1.2.1 tls if (m == NULL) {
875 1.1.2.1 tls printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
876 1.1.2.1 tls return NULL;
877 1.1.2.1 tls }
878 1.1.2.1 tls MCLGET(m, M_DONTWAIT);
879 1.1.2.1 tls if ((m->m_flags & M_EXT) == 0) {
880 1.1.2.1 tls printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
881 1.1.2.1 tls m_freem(m);
882 1.1.2.1 tls return NULL;
883 1.1.2.1 tls }
884 1.1.2.1 tls m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
885 1.1.2.1 tls
886 1.1.2.1 tls bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
887 1.1.2.1 tls if (map == NULL) {
888 1.1.2.1 tls printf("%s:%d: %s\n", __func__, __LINE__, "map get");
889 1.1.2.1 tls m_freem(m);
890 1.1.2.1 tls return NULL;
891 1.1.2.1 tls }
892 1.1.2.1 tls M_SETCTX(m, map);
893 1.1.2.1 tls m->m_len = m->m_pkthdr.len = MCLBYTES;
894 1.1.2.1 tls int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
895 1.1.2.1 tls BUS_DMA_READ|BUS_DMA_NOWAIT);
896 1.1.2.1 tls if (error) {
897 1.1.2.1 tls aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
898 1.1.2.1 tls error);
899 1.1.2.1 tls M_SETCTX(m, NULL);
900 1.1.2.1 tls m_freem(m);
901 1.1.2.1 tls bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
902 1.1.2.1 tls return NULL;
903 1.1.2.1 tls }
904 1.1.2.1 tls KASSERT(map->dm_mapsize == MCLBYTES);
905 1.1.2.1 tls #ifdef BCMETH_RCVMAGIC
906 1.1.2.1 tls *mtod(m, uint32_t *) = BCMETH_RCVMAGIC;
907 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
908 1.1.2.1 tls BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
909 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t),
910 1.1.2.1 tls map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD);
911 1.1.2.1 tls #else
912 1.1.2.2 tls bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
913 1.1.2.1 tls BUS_DMASYNC_PREREAD);
914 1.1.2.1 tls #endif
915 1.1.2.1 tls
916 1.1.2.1 tls return m;
917 1.1.2.1 tls }
918 1.1.2.1 tls
919 1.1.2.1 tls static void
920 1.1.2.1 tls bcmeth_rx_map_unload(
921 1.1.2.1 tls struct bcmeth_softc *sc,
922 1.1.2.1 tls struct mbuf *m)
923 1.1.2.1 tls {
924 1.1.2.1 tls KASSERT(m);
925 1.1.2.1 tls for (; m != NULL; m = m->m_next) {
926 1.1.2.1 tls bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
927 1.1.2.1 tls KASSERT(map);
928 1.1.2.1 tls KASSERT(map->dm_mapsize == MCLBYTES);
929 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
930 1.1.2.1 tls BUS_DMASYNC_POSTREAD);
931 1.1.2.1 tls bus_dmamap_unload(sc->sc_dmat, map);
932 1.1.2.1 tls bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
933 1.1.2.1 tls M_SETCTX(m, NULL);
934 1.1.2.1 tls }
935 1.1.2.1 tls }
936 1.1.2.1 tls
937 1.1.2.1 tls static bool
938 1.1.2.1 tls bcmeth_rxq_produce(
939 1.1.2.1 tls struct bcmeth_softc *sc,
940 1.1.2.1 tls struct bcmeth_rxqueue *rxq)
941 1.1.2.1 tls {
942 1.1.2.1 tls struct gmac_rxdb *producer = rxq->rxq_producer;
943 1.1.2.1 tls bool produced = false;
944 1.1.2.1 tls
945 1.1.2.1 tls while (rxq->rxq_inuse < rxq->rxq_threshold) {
946 1.1.2.1 tls struct mbuf *m;
947 1.1.2.1 tls IF_DEQUEUE(&sc->sc_rx_bufcache, m);
948 1.1.2.1 tls if (m == NULL) {
949 1.1.2.1 tls m = bcmeth_rx_buf_alloc(sc);
950 1.1.2.1 tls if (m == NULL) {
951 1.1.2.1 tls printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
952 1.1.2.1 tls break;
953 1.1.2.1 tls }
954 1.1.2.1 tls }
955 1.1.2.1 tls bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
956 1.1.2.1 tls KASSERT(map);
957 1.1.2.1 tls
958 1.1.2.1 tls producer->rxdb_buflen = MCLBYTES;
959 1.1.2.1 tls producer->rxdb_addrlo = map->dm_segs[0].ds_addr;
960 1.1.2.1 tls producer->rxdb_flags &= RXDB_FLAG_ET;
961 1.1.2.1 tls *rxq->rxq_mtail = m;
962 1.1.2.1 tls rxq->rxq_mtail = &m->m_next;
963 1.1.2.1 tls m->m_len = MCLBYTES;
964 1.1.2.1 tls m->m_next = NULL;
965 1.1.2.1 tls rxq->rxq_inuse++;
966 1.1.2.1 tls if (++producer == rxq->rxq_last) {
967 1.1.2.1 tls membar_producer();
968 1.1.2.1 tls bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
969 1.1.2.1 tls rxq->rxq_last - rxq->rxq_producer);
970 1.1.2.1 tls producer = rxq->rxq_producer = rxq->rxq_first;
971 1.1.2.1 tls }
972 1.1.2.1 tls produced = true;
973 1.1.2.1 tls }
974 1.1.2.1 tls if (produced) {
975 1.1.2.1 tls membar_producer();
976 1.1.2.1 tls if (producer != rxq->rxq_producer) {
977 1.1.2.1 tls bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
978 1.1.2.1 tls producer - rxq->rxq_producer);
979 1.1.2.1 tls rxq->rxq_producer = producer;
980 1.1.2.1 tls }
981 1.1.2.1 tls bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
982 1.1.2.1 tls rxq->rxq_descmap->dm_segs[0].ds_addr
983 1.1.2.1 tls + ((uintptr_t)producer & RCVPTR));
984 1.1.2.1 tls }
985 1.1.2.1 tls return true;
986 1.1.2.1 tls }
987 1.1.2.1 tls
988 1.1.2.1 tls static void
989 1.1.2.1 tls bcmeth_rx_input(
990 1.1.2.1 tls struct bcmeth_softc *sc,
991 1.1.2.1 tls struct mbuf *m,
992 1.1.2.1 tls uint32_t rxdb_flags)
993 1.1.2.1 tls {
994 1.1.2.1 tls struct ifnet * const ifp = &sc->sc_if;
995 1.1.2.1 tls
996 1.1.2.1 tls bcmeth_rx_map_unload(sc, m);
997 1.1.2.1 tls
998 1.1.2.2 tls m_adj(m, sc->sc_rcvoffset);
999 1.1.2.1 tls
1000 1.1.2.2 tls /*
1001 1.1.2.2 tls * If we are in promiscuous mode and this isn't a multicast, check the
1002 1.1.2.2 tls * destination address to make sure it matches our own. If it doesn't,
1003 1.1.2.2 tls * mark the packet as being received promiscuously.
1004 1.1.2.2 tls */
1005 1.1.2.2 tls if ((sc->sc_cmdcfg & PROMISC_EN)
1006 1.1.2.2 tls && (m->m_data[0] & 1) == 0
1007 1.1.2.2 tls && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0]
1008 1.1.2.2 tls || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) {
1009 1.1.2.2 tls m->m_flags |= M_PROMISC;
1010 1.1.2.1 tls }
1011 1.1.2.1 tls m->m_pkthdr.rcvif = ifp;
1012 1.1.2.1 tls
1013 1.1.2.1 tls ifp->if_ipackets++;
1014 1.1.2.1 tls ifp->if_ibytes += m->m_pkthdr.len;
1015 1.1.2.1 tls
1016 1.1.2.1 tls /*
1017 1.1.2.1 tls * Let's give it to the network subsystm to deal with.
1018 1.1.2.1 tls */
1019 1.1.2.1 tls #ifdef BCMETH_MPSAFE
1020 1.1 matt mutex_exit(sc->sc_lock);
1021 1.1.2.1 tls (*ifp->if_input)(ifp, m);
1022 1.1.2.1 tls mutex_enter(sc->sc_lock);
1023 1.1.2.1 tls #else
1024 1.1.2.1 tls int s = splnet();
1025 1.1.2.1 tls bpf_mtap(ifp, m);
1026 1.1.2.1 tls (*ifp->if_input)(ifp, m);
1027 1.1.2.1 tls splx(s);
1028 1.1.2.1 tls #endif
1029 1.1.2.1 tls }
1030 1.1.2.1 tls
1031 1.1.2.2 tls static bool
1032 1.1.2.1 tls bcmeth_rxq_consume(
1033 1.1.2.1 tls struct bcmeth_softc *sc,
1034 1.1.2.2 tls struct bcmeth_rxqueue *rxq,
1035 1.1.2.2 tls size_t atmost)
1036 1.1.2.1 tls {
1037 1.1.2.1 tls struct ifnet * const ifp = &sc->sc_if;
1038 1.1.2.1 tls struct gmac_rxdb *consumer = rxq->rxq_consumer;
1039 1.1.2.1 tls size_t rxconsumed = 0;
1040 1.1.2.2 tls bool didconsume = false;
1041 1.1.2.1 tls
1042 1.1.2.2 tls while (atmost-- > 0) {
1043 1.1.2.1 tls if (consumer == rxq->rxq_producer) {
1044 1.1.2.1 tls KASSERT(rxq->rxq_inuse == 0);
1045 1.1.2.2 tls break;
1046 1.1.2.1 tls }
1047 1.1.2.1 tls
1048 1.1.2.1 tls uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1049 1.1.2.1 tls uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1050 1.1.2.1 tls if (consumer == rxq->rxq_first + currdscr) {
1051 1.1.2.2 tls break;
1052 1.1.2.1 tls }
1053 1.1.2.1 tls bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
1054 1.1.2.1 tls
1055 1.1.2.1 tls /*
1056 1.1.2.1 tls * We own this packet again. Copy the rxsts word from it.
1057 1.1.2.1 tls */
1058 1.1.2.1 tls rxconsumed++;
1059 1.1.2.2 tls didconsume = true;
1060 1.1.2.1 tls uint32_t rxsts;
1061 1.1.2.1 tls KASSERT(rxq->rxq_mhead != NULL);
1062 1.1.2.1 tls bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
1063 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1064 1.1.2.1 tls BUS_DMASYNC_POSTREAD);
1065 1.1.2.1 tls memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
1066 1.1.2.1 tls #if 0
1067 1.1.2.1 tls KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd",
1068 1.1.2.1 tls currdscr, consumer - rxq->rxq_first);
1069 1.1.2.1 tls #endif
1070 1.1.2.1 tls
1071 1.1.2.1 tls /*
1072 1.1.2.1 tls * Get the count of descriptors. Fetch the correct number
1073 1.1.2.1 tls * of mbufs.
1074 1.1.2.1 tls */
1075 1.1.2.1 tls #ifdef BCMETH_RCVMAGIC
1076 1.1.2.1 tls size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1;
1077 1.1.2.1 tls #else
1078 1.1.2.1 tls size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
1079 1.1.2.1 tls #endif
1080 1.1.2.1 tls struct mbuf *m = rxq->rxq_mhead;
1081 1.1.2.1 tls struct mbuf *m_last = m;
1082 1.1.2.1 tls for (size_t i = 1; i < desc_count; i++) {
1083 1.1.2.1 tls if (++consumer == rxq->rxq_last) {
1084 1.1.2.1 tls consumer = rxq->rxq_first;
1085 1.1.2.1 tls }
1086 1.1.2.1 tls KASSERTMSG(consumer != rxq->rxq_first + currdscr,
1087 1.1.2.1 tls "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd",
1088 1.1.2.1 tls i, rxsts, desc_count, currdscr,
1089 1.1.2.1 tls consumer - rxq->rxq_first);
1090 1.1.2.1 tls m_last = m_last->m_next;
1091 1.1.2.1 tls }
1092 1.1.2.1 tls
1093 1.1.2.1 tls /*
1094 1.1.2.1 tls * Now remove it/them from the list of enqueued mbufs.
1095 1.1.2.1 tls */
1096 1.1.2.1 tls if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1097 1.1.2.1 tls rxq->rxq_mtail = &rxq->rxq_mhead;
1098 1.1.2.1 tls m_last->m_next = NULL;
1099 1.1.2.1 tls
1100 1.1.2.1 tls #ifdef BCMETH_RCVMAGIC
1101 1.1.2.1 tls if (rxsts == BCMETH_RCVMAGIC) {
1102 1.1.2.1 tls ifp->if_ierrors++;
1103 1.1.2.1 tls if ((m->m_ext.ext_paddr >> 28) == 8) {
1104 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo);
1105 1.1.2.1 tls } else {
1106 1.1.2.2 tls BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi);
1107 1.1.2.1 tls }
1108 1.1.2.1 tls IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1109 1.1.2.1 tls } else
1110 1.1.2.1 tls #endif /* BCMETH_RCVMAGIC */
1111 1.1.2.1 tls if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
1112 1.1.2.1 tls aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
1113 1.1.2.1 tls consumer - rxq->rxq_first, desc_count, rxsts);
1114 1.1.2.1 tls /*
1115 1.1.2.1 tls * We encountered an error, take the mbufs and add them
1116 1.1.2.1 tls * to the rx bufcache so we can quickly reuse them.
1117 1.1.2.1 tls */
1118 1.1.2.1 tls ifp->if_ierrors++;
1119 1.1.2.1 tls do {
1120 1.1.2.1 tls struct mbuf *m0 = m->m_next;
1121 1.1.2.1 tls m->m_next = NULL;
1122 1.1.2.1 tls IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1123 1.1.2.1 tls m = m0;
1124 1.1.2.1 tls } while (m);
1125 1.1.2.1 tls } else {
1126 1.1.2.1 tls uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1127 1.1.2.2 tls framelen += sc->sc_rcvoffset;
1128 1.1.2.1 tls m->m_pkthdr.len = framelen;
1129 1.1.2.1 tls if (desc_count == 1) {
1130 1.1.2.1 tls KASSERT(framelen <= MCLBYTES);
1131 1.1.2.1 tls m->m_len = framelen;
1132 1.1.2.1 tls } else {
1133 1.1.2.1 tls m_last->m_len = framelen & (MCLBYTES - 1);
1134 1.1.2.1 tls }
1135 1.1.2.1 tls
1136 1.1.2.1 tls #ifdef BCMETH_MPSAFE
1137 1.1.2.1 tls /*
1138 1.1.2.1 tls * Wrap at the last entry!
1139 1.1.2.1 tls */
1140 1.1.2.1 tls if (++consumer == rxq->rxq_last) {
1141 1.1.2.1 tls KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1142 1.1.2.1 tls rxq->rxq_consumer = rxq->rxq_first;
1143 1.1.2.1 tls } else {
1144 1.1.2.1 tls rxq->rxq_consumer = consumer;
1145 1.1.2.1 tls }
1146 1.1.2.1 tls rxq->rxq_inuse -= rxconsumed;
1147 1.1.2.1 tls #endif /* BCMETH_MPSAFE */
1148 1.1.2.1 tls
1149 1.1.2.1 tls /*
1150 1.1.2.1 tls * Receive the packet (which releases our lock)
1151 1.1.2.1 tls */
1152 1.1.2.1 tls bcmeth_rx_input(sc, m, rxsts);
1153 1.1.2.1 tls
1154 1.1.2.1 tls #ifdef BCMETH_MPSAFE
1155 1.1.2.1 tls /*
1156 1.1.2.1 tls * Since we had to give up our lock, we need to
1157 1.1.2.1 tls * refresh these.
1158 1.1.2.1 tls */
1159 1.1.2.1 tls consumer = rxq->rxq_consumer;
1160 1.1.2.1 tls rxconsumed = 0;
1161 1.1.2.1 tls continue;
1162 1.1.2.1 tls #endif /* BCMETH_MPSAFE */
1163 1.1.2.1 tls }
1164 1.1.2.1 tls
1165 1.1.2.1 tls /*
1166 1.1.2.1 tls * Wrap at the last entry!
1167 1.1.2.1 tls */
1168 1.1.2.1 tls if (++consumer == rxq->rxq_last) {
1169 1.1.2.1 tls KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1170 1.1.2.1 tls consumer = rxq->rxq_first;
1171 1.1.2.1 tls }
1172 1.1.2.1 tls }
1173 1.1.2.2 tls
1174 1.1.2.2 tls /*
1175 1.1.2.2 tls * Update queue info.
1176 1.1.2.2 tls */
1177 1.1.2.2 tls rxq->rxq_consumer = consumer;
1178 1.1.2.2 tls rxq->rxq_inuse -= rxconsumed;
1179 1.1.2.2 tls
1180 1.1.2.2 tls /*
1181 1.1.2.2 tls * Did we consume anything?
1182 1.1.2.2 tls */
1183 1.1.2.2 tls return didconsume;
1184 1.1.2.1 tls }
1185 1.1.2.1 tls
1186 1.1.2.1 tls static void
1187 1.1.2.1 tls bcmeth_rxq_purge(
1188 1.1.2.1 tls struct bcmeth_softc *sc,
1189 1.1.2.1 tls struct bcmeth_rxqueue *rxq,
1190 1.1.2.1 tls bool discard)
1191 1.1.2.1 tls {
1192 1.1.2.1 tls struct mbuf *m;
1193 1.1.2.1 tls
1194 1.1.2.1 tls if ((m = rxq->rxq_mhead) != NULL) {
1195 1.1.2.1 tls if (discard) {
1196 1.1.2.1 tls bcmeth_rx_map_unload(sc, m);
1197 1.1.2.1 tls m_freem(m);
1198 1.1.2.1 tls } else {
1199 1.1.2.1 tls while (m != NULL) {
1200 1.1.2.1 tls struct mbuf *m0 = m->m_next;
1201 1.1.2.1 tls m->m_next = NULL;
1202 1.1.2.1 tls IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1203 1.1.2.1 tls m = m0;
1204 1.1.2.1 tls }
1205 1.1.2.1 tls }
1206 1.1.2.1 tls
1207 1.1.2.1 tls }
1208 1.1.2.1 tls
1209 1.1.2.1 tls rxq->rxq_mhead = NULL;
1210 1.1.2.1 tls rxq->rxq_mtail = &rxq->rxq_mhead;
1211 1.1.2.1 tls rxq->rxq_inuse = 0;
1212 1.1.2.1 tls }
1213 1.1.2.1 tls
1214 1.1.2.1 tls static void
1215 1.1.2.1 tls bcmeth_rxq_reset(
1216 1.1.2.1 tls struct bcmeth_softc *sc,
1217 1.1.2.1 tls struct bcmeth_rxqueue *rxq)
1218 1.1.2.1 tls {
1219 1.1.2.1 tls /*
1220 1.1.2.1 tls * sync all the descriptors
1221 1.1.2.1 tls */
1222 1.1.2.1 tls bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1223 1.1.2.1 tls rxq->rxq_last - rxq->rxq_first);
1224 1.1.2.1 tls
1225 1.1.2.1 tls /*
1226 1.1.2.1 tls * Make sure we own all descriptors in the ring.
1227 1.1.2.1 tls */
1228 1.1.2.1 tls struct gmac_rxdb *rxdb;
1229 1.1.2.1 tls for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1230 1.1.2.1 tls rxdb->rxdb_flags = RXDB_FLAG_IC;
1231 1.1.2.1 tls }
1232 1.1.2.1 tls
1233 1.1.2.1 tls /*
1234 1.1.2.1 tls * Last descriptor has the wrap flag.
1235 1.1.2.1 tls */
1236 1.1.2.1 tls rxdb->rxdb_flags = RXDB_FLAG_ET|RXDB_FLAG_IC;
1237 1.1.2.1 tls
1238 1.1.2.1 tls /*
1239 1.1.2.1 tls * Reset the producer consumer indexes.
1240 1.1.2.1 tls */
1241 1.1.2.1 tls rxq->rxq_consumer = rxq->rxq_first;
1242 1.1.2.1 tls rxq->rxq_producer = rxq->rxq_first;
1243 1.1.2.1 tls rxq->rxq_inuse = 0;
1244 1.1.2.1 tls if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1245 1.1.2.1 tls rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1246 1.1.2.1 tls
1247 1.1.2.1 tls sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1248 1.1.2.1 tls
1249 1.1.2.1 tls /*
1250 1.1.2.1 tls * Restart the receiver at the first descriptor
1251 1.1.2.1 tls */
1252 1.1.2.1 tls bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1253 1.1.2.1 tls rxq->rxq_descmap->dm_segs[0].ds_addr);
1254 1.1 matt }
1255 1.1 matt
1256 1.1 matt static int
1257 1.1.2.1 tls bcmeth_rxq_attach(
1258 1.1.2.1 tls struct bcmeth_softc *sc,
1259 1.1.2.1 tls struct bcmeth_rxqueue *rxq,
1260 1.1.2.1 tls u_int qno)
1261 1.1.2.1 tls {
1262 1.1.2.1 tls size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1263 1.1.2.1 tls int error;
1264 1.1.2.1 tls void *descs;
1265 1.1.2.1 tls
1266 1.1.2.1 tls KASSERT(desc_count == 256 || desc_count == 512);
1267 1.1.2.1 tls
1268 1.1.2.1 tls error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1269 1.1.2.1 tls &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1270 1.1.2.1 tls if (error)
1271 1.1.2.1 tls return error;
1272 1.1.2.1 tls
1273 1.1.2.1 tls memset(descs, 0, BCMETH_RINGSIZE);
1274 1.1.2.1 tls rxq->rxq_first = descs;
1275 1.1.2.1 tls rxq->rxq_last = rxq->rxq_first + desc_count;
1276 1.1.2.1 tls rxq->rxq_consumer = descs;
1277 1.1.2.1 tls rxq->rxq_producer = descs;
1278 1.1.2.1 tls
1279 1.1.2.1 tls bcmeth_rxq_purge(sc, rxq, true);
1280 1.1.2.1 tls bcmeth_rxq_reset(sc, rxq);
1281 1.1.2.1 tls
1282 1.1.2.1 tls rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1283 1.1.2.1 tls rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1284 1.1.2.1 tls rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1285 1.1.2.1 tls rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1286 1.1.2.1 tls rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1;
1287 1.1.2.1 tls
1288 1.1.2.1 tls return 0;
1289 1.1.2.1 tls }
1290 1.1.2.1 tls
1291 1.1.2.1 tls static bool
1292 1.1.2.1 tls bcmeth_txq_active_p(
1293 1.1.2.1 tls struct bcmeth_softc * const sc,
1294 1.1.2.1 tls struct bcmeth_txqueue *txq)
1295 1.1.2.1 tls {
1296 1.1.2.1 tls return !IF_IS_EMPTY(&txq->txq_mbufs);
1297 1.1.2.1 tls }
1298 1.1.2.1 tls
1299 1.1.2.1 tls static bool
1300 1.1.2.1 tls bcmeth_txq_fillable_p(
1301 1.1.2.1 tls struct bcmeth_softc * const sc,
1302 1.1.2.1 tls struct bcmeth_txqueue *txq)
1303 1.1.2.1 tls {
1304 1.1.2.1 tls return txq->txq_free >= txq->txq_threshold;
1305 1.1.2.1 tls }
1306 1.1.2.1 tls
1307 1.1.2.1 tls static int
1308 1.1.2.1 tls bcmeth_txq_attach(
1309 1.1.2.1 tls struct bcmeth_softc *sc,
1310 1.1.2.1 tls struct bcmeth_txqueue *txq,
1311 1.1.2.1 tls u_int qno)
1312 1.1.2.1 tls {
1313 1.1.2.1 tls size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1314 1.1.2.1 tls int error;
1315 1.1.2.1 tls void *descs;
1316 1.1.2.1 tls
1317 1.1.2.1 tls KASSERT(desc_count == 256 || desc_count == 512);
1318 1.1.2.1 tls
1319 1.1.2.1 tls error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1320 1.1.2.1 tls &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1321 1.1.2.1 tls if (error)
1322 1.1.2.1 tls return error;
1323 1.1.2.1 tls
1324 1.1.2.1 tls memset(descs, 0, BCMETH_RINGSIZE);
1325 1.1.2.1 tls txq->txq_first = descs;
1326 1.1.2.1 tls txq->txq_last = txq->txq_first + desc_count;
1327 1.1.2.1 tls txq->txq_consumer = descs;
1328 1.1.2.1 tls txq->txq_producer = descs;
1329 1.1.2.1 tls
1330 1.1.2.1 tls IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1331 1.1.2.1 tls
1332 1.1.2.1 tls txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1333 1.1.2.1 tls txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1334 1.1.2.1 tls txq->txq_reg_xmtptr = GMAC_XMTPTR;
1335 1.1.2.1 tls txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1336 1.1.2.1 tls txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1;
1337 1.1.2.1 tls
1338 1.1.2.1 tls bcmeth_txq_reset(sc, txq);
1339 1.1.2.1 tls
1340 1.1.2.1 tls return 0;
1341 1.1.2.1 tls }
1342 1.1.2.1 tls
1343 1.1.2.1 tls static int
1344 1.1.2.1 tls bcmeth_txq_map_load(
1345 1.1.2.1 tls struct bcmeth_softc *sc,
1346 1.1.2.1 tls struct bcmeth_txqueue *txq,
1347 1.1.2.1 tls struct mbuf *m)
1348 1.1.2.1 tls {
1349 1.1.2.1 tls bus_dmamap_t map;
1350 1.1.2.1 tls int error;
1351 1.1.2.1 tls
1352 1.1.2.1 tls map = M_GETCTX(m, bus_dmamap_t);
1353 1.1.2.1 tls if (map != NULL)
1354 1.1.2.1 tls return 0;
1355 1.1.2.1 tls
1356 1.1.2.1 tls map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1357 1.1.2.1 tls if (map == NULL)
1358 1.1.2.1 tls return ENOMEM;
1359 1.1.2.1 tls
1360 1.1.2.1 tls error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1361 1.1.2.1 tls BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1362 1.1.2.1 tls if (error)
1363 1.1.2.1 tls return error;
1364 1.1.2.1 tls
1365 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1366 1.1.2.1 tls BUS_DMASYNC_PREWRITE);
1367 1.1.2.1 tls M_SETCTX(m, map);
1368 1.1.2.1 tls return 0;
1369 1.1.2.1 tls }
1370 1.1.2.1 tls
1371 1.1.2.1 tls static void
1372 1.1.2.1 tls bcmeth_txq_map_unload(
1373 1.1.2.1 tls struct bcmeth_softc *sc,
1374 1.1.2.1 tls struct bcmeth_txqueue *txq,
1375 1.1.2.1 tls struct mbuf *m)
1376 1.1.2.1 tls {
1377 1.1.2.1 tls KASSERT(m);
1378 1.1.2.1 tls bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1379 1.1.2.1 tls bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1380 1.1.2.1 tls BUS_DMASYNC_POSTWRITE);
1381 1.1.2.1 tls bus_dmamap_unload(sc->sc_dmat, map);
1382 1.1.2.1 tls bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1383 1.1.2.1 tls }
1384 1.1.2.1 tls
1385 1.1.2.1 tls static bool
1386 1.1.2.1 tls bcmeth_txq_produce(
1387 1.1.2.1 tls struct bcmeth_softc *sc,
1388 1.1.2.1 tls struct bcmeth_txqueue *txq,
1389 1.1.2.1 tls struct mbuf *m)
1390 1.1.2.1 tls {
1391 1.1.2.1 tls bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1392 1.1.2.1 tls
1393 1.1.2.1 tls if (map->dm_nsegs > txq->txq_free)
1394 1.1.2.1 tls return false;
1395 1.1.2.1 tls
1396 1.1.2.1 tls /*
1397 1.1.2.1 tls * TCP Offload flag must be set in the first descriptor.
1398 1.1.2.1 tls */
1399 1.1.2.1 tls struct gmac_txdb *producer = txq->txq_producer;
1400 1.1.2.1 tls uint32_t first_flags = TXDB_FLAG_SF;
1401 1.1.2.1 tls uint32_t last_flags = TXDB_FLAG_EF;
1402 1.1.2.1 tls
1403 1.1.2.1 tls /*
1404 1.1.2.1 tls * If we've produced enough descriptors without consuming any
1405 1.1.2.1 tls * we need to ask for an interrupt to reclaim some.
1406 1.1.2.1 tls */
1407 1.1.2.1 tls txq->txq_lastintr += map->dm_nsegs;
1408 1.1.2.1 tls if (txq->txq_lastintr >= txq->txq_threshold
1409 1.1.2.1 tls || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1410 1.1.2.1 tls txq->txq_lastintr = 0;
1411 1.1.2.1 tls last_flags |= TXDB_FLAG_IC;
1412 1.1.2.1 tls }
1413 1.1.2.1 tls
1414 1.1.2.1 tls KASSERT(producer != txq->txq_last);
1415 1.1.2.1 tls
1416 1.1.2.1 tls struct gmac_txdb *start = producer;
1417 1.1.2.1 tls size_t count = map->dm_nsegs;
1418 1.1.2.1 tls producer->txdb_flags |= first_flags;
1419 1.1.2.1 tls producer->txdb_addrlo = map->dm_segs[0].ds_addr;
1420 1.1.2.1 tls producer->txdb_buflen = map->dm_segs[0].ds_len;
1421 1.1.2.1 tls for (u_int i = 1; i < map->dm_nsegs; i++) {
1422 1.1.2.1 tls #if 0
1423 1.1.2.1 tls printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1424 1.1.2.1 tls producer->txdb_flags, producer->txdb_buflen,
1425 1.1.2.1 tls producer->txdb_addrlo, producer->txdb_addrhi);
1426 1.1.2.1 tls #endif
1427 1.1.2.1 tls if (__predict_false(++producer == txq->txq_last)) {
1428 1.1.2.1 tls bcmeth_txq_desc_presync(sc, txq, start,
1429 1.1.2.1 tls txq->txq_last - start);
1430 1.1.2.1 tls count -= txq->txq_last - start;
1431 1.1.2.1 tls producer = txq->txq_first;
1432 1.1.2.1 tls start = txq->txq_first;
1433 1.1.2.1 tls }
1434 1.1.2.1 tls producer->txdb_addrlo = map->dm_segs[i].ds_addr;
1435 1.1.2.1 tls producer->txdb_buflen = map->dm_segs[i].ds_len;
1436 1.1.2.1 tls }
1437 1.1.2.1 tls producer->txdb_flags |= last_flags;
1438 1.1.2.1 tls #if 0
1439 1.1.2.1 tls printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1440 1.1.2.1 tls producer->txdb_flags, producer->txdb_buflen,
1441 1.1.2.1 tls producer->txdb_addrlo, producer->txdb_addrhi);
1442 1.1.2.1 tls #endif
1443 1.1.2.1 tls if (count)
1444 1.1.2.1 tls bcmeth_txq_desc_presync(sc, txq, start, count);
1445 1.1.2.1 tls
1446 1.1.2.1 tls /*
1447 1.1.2.1 tls * Reduce free count by the number of segments we consumed.
1448 1.1.2.1 tls */
1449 1.1.2.1 tls txq->txq_free -= map->dm_nsegs;
1450 1.1.2.1 tls KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1451 1.1.2.1 tls KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0);
1452 1.1.2.1 tls KASSERT(producer->txdb_flags & TXDB_FLAG_EF);
1453 1.1.2.1 tls
1454 1.1.2.1 tls #if 0
1455 1.1.2.1 tls printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1456 1.1.2.1 tls __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1457 1.1.2.1 tls txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1458 1.1.2.1 tls #endif
1459 1.1.2.1 tls
1460 1.1.2.1 tls if (producer + 1 == txq->txq_last)
1461 1.1.2.1 tls txq->txq_producer = txq->txq_first;
1462 1.1.2.1 tls else
1463 1.1.2.1 tls txq->txq_producer = producer + 1;
1464 1.1.2.1 tls IF_ENQUEUE(&txq->txq_mbufs, m);
1465 1.1.2.1 tls
1466 1.1.2.1 tls /*
1467 1.1.2.1 tls * Let the transmitter know there's more to do
1468 1.1.2.1 tls */
1469 1.1.2.1 tls bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1470 1.1.2.1 tls txq->txq_descmap->dm_segs[0].ds_addr
1471 1.1.2.1 tls + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1472 1.1.2.1 tls
1473 1.1.2.1 tls return true;
1474 1.1.2.1 tls }
1475 1.1.2.1 tls
1476 1.1.2.1 tls static struct mbuf *
1477 1.1.2.1 tls bcmeth_copy_packet(struct mbuf *m)
1478 1.1.2.1 tls {
1479 1.1.2.1 tls struct mbuf *mext = NULL;
1480 1.1.2.1 tls size_t misalignment = 0;
1481 1.1.2.1 tls size_t hlen = 0;
1482 1.1.2.1 tls
1483 1.1.2.1 tls for (mext = m; mext != NULL; mext = mext->m_next) {
1484 1.1.2.1 tls if (mext->m_flags & M_EXT) {
1485 1.1.2.1 tls misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1486 1.1.2.1 tls break;
1487 1.1.2.1 tls }
1488 1.1.2.1 tls hlen += m->m_len;
1489 1.1.2.1 tls }
1490 1.1.2.1 tls
1491 1.1.2.1 tls struct mbuf *n = m->m_next;
1492 1.1.2.1 tls if (m != mext && hlen + misalignment <= MHLEN && false) {
1493 1.1.2.1 tls KASSERT(m->m_pktdat <= m->m_data && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]);
1494 1.1.2.1 tls size_t oldoff = m->m_data - m->m_pktdat;
1495 1.1.2.1 tls size_t off;
1496 1.1.2.1 tls if (mext == NULL) {
1497 1.1.2.1 tls off = (oldoff + hlen > MHLEN) ? 0 : oldoff;
1498 1.1.2.1 tls } else {
1499 1.1.2.1 tls off = MHLEN - (hlen + misalignment);
1500 1.1.2.1 tls }
1501 1.1.2.1 tls KASSERT(off + hlen + misalignment <= MHLEN);
1502 1.1.2.1 tls if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
1503 1.1.2.1 tls memmove(&m->m_pktdat[off], m->m_data, m->m_len);
1504 1.1.2.1 tls m->m_data = &m->m_pktdat[off];
1505 1.1.2.1 tls }
1506 1.1.2.1 tls m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]);
1507 1.1.2.1 tls m->m_len = hlen;
1508 1.1.2.1 tls m->m_next = mext;
1509 1.1.2.1 tls while (n != mext) {
1510 1.1.2.1 tls n = m_free(n);
1511 1.1.2.1 tls }
1512 1.1.2.1 tls return m;
1513 1.1.2.1 tls }
1514 1.1.2.1 tls
1515 1.1.2.1 tls struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type);
1516 1.1.2.1 tls if (m0 == NULL) {
1517 1.1.2.1 tls return NULL;
1518 1.1.2.1 tls }
1519 1.1.2.1 tls M_COPY_PKTHDR(m0, m);
1520 1.1.2.1 tls MCLAIM(m0, m->m_owner);
1521 1.1.2.1 tls if (m0->m_pkthdr.len > MHLEN) {
1522 1.1.2.1 tls MCLGET(m0, M_DONTWAIT);
1523 1.1.2.1 tls if ((m0->m_flags & M_EXT) == 0) {
1524 1.1.2.1 tls m_freem(m0);
1525 1.1.2.1 tls return NULL;
1526 1.1.2.1 tls }
1527 1.1.2.1 tls }
1528 1.1.2.1 tls m0->m_len = m->m_pkthdr.len;
1529 1.1.2.1 tls m_copydata(m, 0, m0->m_len, mtod(m0, void *));
1530 1.1.2.1 tls m_freem(m);
1531 1.1.2.1 tls return m0;
1532 1.1.2.1 tls }
1533 1.1.2.1 tls
1534 1.1.2.1 tls static bool
1535 1.1.2.1 tls bcmeth_txq_enqueue(
1536 1.1.2.1 tls struct bcmeth_softc *sc,
1537 1.1.2.1 tls struct bcmeth_txqueue *txq)
1538 1.1.2.1 tls {
1539 1.1.2.1 tls for (;;) {
1540 1.1.2.1 tls if (IF_QFULL(&txq->txq_mbufs))
1541 1.1.2.1 tls return false;
1542 1.1.2.1 tls struct mbuf *m = txq->txq_next;
1543 1.1.2.1 tls if (m == NULL) {
1544 1.1.2.1 tls int s = splnet();
1545 1.1.2.1 tls IF_DEQUEUE(&sc->sc_if.if_snd, m);
1546 1.1.2.1 tls splx(s);
1547 1.1.2.1 tls if (m == NULL)
1548 1.1.2.1 tls return true;
1549 1.1.2.1 tls M_SETCTX(m, NULL);
1550 1.1.2.1 tls } else {
1551 1.1.2.1 tls txq->txq_next = NULL;
1552 1.1.2.1 tls }
1553 1.1.2.1 tls /*
1554 1.1.2.1 tls * If LINK2 is set and this packet uses multiple mbufs,
1555 1.1.2.1 tls * consolidate it into a single mbuf.
1556 1.1.2.1 tls */
1557 1.1.2.1 tls if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) {
1558 1.1.2.1 tls struct mbuf *m0 = bcmeth_copy_packet(m);
1559 1.1.2.1 tls if (m0 == NULL) {
1560 1.1.2.1 tls txq->txq_next = m;
1561 1.1.2.1 tls return true;
1562 1.1.2.1 tls }
1563 1.1.2.1 tls m = m0;
1564 1.1.2.1 tls }
1565 1.1.2.1 tls int error = bcmeth_txq_map_load(sc, txq, m);
1566 1.1.2.1 tls if (error) {
1567 1.1.2.1 tls aprint_error_dev(sc->sc_dev,
1568 1.1.2.1 tls "discarded packet due to "
1569 1.1.2.1 tls "dmamap load failure: %d\n", error);
1570 1.1.2.1 tls m_freem(m);
1571 1.1.2.1 tls continue;
1572 1.1.2.1 tls }
1573 1.1.2.1 tls KASSERT(txq->txq_next == NULL);
1574 1.1.2.1 tls if (!bcmeth_txq_produce(sc, txq, m)) {
1575 1.1.2.1 tls txq->txq_next = m;
1576 1.1.2.1 tls return false;
1577 1.1.2.1 tls }
1578 1.1.2.1 tls KASSERT(txq->txq_next == NULL);
1579 1.1.2.1 tls }
1580 1.1.2.1 tls }
1581 1.1.2.1 tls
1582 1.1.2.1 tls static bool
1583 1.1.2.1 tls bcmeth_txq_consume(
1584 1.1.2.1 tls struct bcmeth_softc *sc,
1585 1.1.2.1 tls struct bcmeth_txqueue *txq)
1586 1.1.2.1 tls {
1587 1.1.2.1 tls struct ifnet * const ifp = &sc->sc_if;
1588 1.1.2.1 tls struct gmac_txdb *consumer = txq->txq_consumer;
1589 1.1.2.1 tls size_t txfree = 0;
1590 1.1.2.1 tls
1591 1.1.2.1 tls #if 0
1592 1.1.2.1 tls printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1593 1.1.2.1 tls #endif
1594 1.1.2.1 tls
1595 1.1.2.1 tls for (;;) {
1596 1.1.2.1 tls if (consumer == txq->txq_producer) {
1597 1.1.2.1 tls txq->txq_consumer = consumer;
1598 1.1.2.1 tls txq->txq_free += txfree;
1599 1.1.2.1 tls txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1600 1.1.2.1 tls #if 0
1601 1.1.2.1 tls printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1602 1.1.2.1 tls __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1603 1.1.2.1 tls #endif
1604 1.1.2.1 tls KASSERT(txq->txq_lastintr == 0);
1605 1.1.2.1 tls KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1606 1.1.2.1 tls return true;
1607 1.1.2.1 tls }
1608 1.1.2.1 tls bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1609 1.1.2.1 tls uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1610 1.1.2.1 tls if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1611 1.1.2.1 tls txq->txq_consumer = consumer;
1612 1.1.2.1 tls txq->txq_free += txfree;
1613 1.1.2.1 tls txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1614 1.1.2.1 tls #if 0
1615 1.1.2.1 tls printf("%s: freed %zu descriptors\n",
1616 1.1.2.1 tls __func__, txfree);
1617 1.1.2.1 tls #endif
1618 1.1.2.1 tls return bcmeth_txq_fillable_p(sc, txq);
1619 1.1.2.1 tls }
1620 1.1.2.1 tls
1621 1.1.2.1 tls /*
1622 1.1.2.1 tls * If this is the last descriptor in the chain, get the
1623 1.1.2.1 tls * mbuf, free its dmamap, and free the mbuf chain itself.
1624 1.1.2.1 tls */
1625 1.1.2.1 tls const uint32_t txdb_flags = consumer->txdb_flags;
1626 1.1.2.1 tls if (txdb_flags & TXDB_FLAG_EF) {
1627 1.1.2.1 tls struct mbuf *m;
1628 1.1.2.1 tls
1629 1.1.2.1 tls IF_DEQUEUE(&txq->txq_mbufs, m);
1630 1.1.2.1 tls KASSERT(m);
1631 1.1.2.1 tls bcmeth_txq_map_unload(sc, txq, m);
1632 1.1.2.1 tls #if 0
1633 1.1.2.1 tls printf("%s: mbuf %p: consumed a %u byte packet\n",
1634 1.1.2.1 tls __func__, m, m->m_pkthdr.len);
1635 1.1.2.1 tls #endif
1636 1.1.2.1 tls bpf_mtap(ifp, m);
1637 1.1.2.1 tls ifp->if_opackets++;
1638 1.1.2.1 tls ifp->if_obytes += m->m_pkthdr.len;
1639 1.1.2.1 tls if (m->m_flags & M_MCAST)
1640 1.1.2.1 tls ifp->if_omcasts++;
1641 1.1.2.1 tls m_freem(m);
1642 1.1.2.1 tls }
1643 1.1.2.1 tls
1644 1.1.2.1 tls /*
1645 1.1.2.1 tls * We own this packet again. Clear all flags except wrap.
1646 1.1.2.1 tls */
1647 1.1.2.1 tls txfree++;
1648 1.1.2.1 tls
1649 1.1.2.1 tls /*
1650 1.1.2.1 tls * Wrap at the last entry!
1651 1.1.2.1 tls */
1652 1.1.2.1 tls if (txdb_flags & TXDB_FLAG_ET) {
1653 1.1.2.1 tls consumer->txdb_flags = TXDB_FLAG_ET;
1654 1.1.2.1 tls KASSERT(consumer + 1 == txq->txq_last);
1655 1.1.2.1 tls consumer = txq->txq_first;
1656 1.1.2.1 tls } else {
1657 1.1.2.1 tls consumer->txdb_flags = 0;
1658 1.1.2.1 tls consumer++;
1659 1.1.2.1 tls KASSERT(consumer < txq->txq_last);
1660 1.1.2.1 tls }
1661 1.1.2.1 tls }
1662 1.1.2.1 tls }
1663 1.1.2.1 tls
1664 1.1.2.1 tls static void
1665 1.1.2.1 tls bcmeth_txq_purge(
1666 1.1.2.1 tls struct bcmeth_softc *sc,
1667 1.1.2.1 tls struct bcmeth_txqueue *txq)
1668 1.1.2.1 tls {
1669 1.1.2.1 tls struct mbuf *m;
1670 1.1.2.1 tls KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1671 1.1.2.1 tls
1672 1.1.2.1 tls for (;;) {
1673 1.1.2.1 tls IF_DEQUEUE(&txq->txq_mbufs, m);
1674 1.1.2.1 tls if (m == NULL)
1675 1.1.2.1 tls break;
1676 1.1.2.1 tls bcmeth_txq_map_unload(sc, txq, m);
1677 1.1.2.1 tls m_freem(m);
1678 1.1.2.1 tls }
1679 1.1.2.1 tls if ((m = txq->txq_next) != NULL) {
1680 1.1.2.1 tls txq->txq_next = NULL;
1681 1.1.2.1 tls bcmeth_txq_map_unload(sc, txq, m);
1682 1.1.2.1 tls m_freem(m);
1683 1.1.2.1 tls }
1684 1.1.2.1 tls }
1685 1.1.2.1 tls
1686 1.1.2.1 tls static void
1687 1.1.2.1 tls bcmeth_txq_reset(
1688 1.1.2.1 tls struct bcmeth_softc *sc,
1689 1.1.2.1 tls struct bcmeth_txqueue *txq)
1690 1.1.2.1 tls {
1691 1.1.2.1 tls /*
1692 1.1.2.1 tls * sync all the descriptors
1693 1.1.2.1 tls */
1694 1.1.2.1 tls bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1695 1.1.2.1 tls txq->txq_last - txq->txq_first);
1696 1.1.2.1 tls
1697 1.1.2.1 tls /*
1698 1.1.2.1 tls * Make sure we own all descriptors in the ring.
1699 1.1.2.1 tls */
1700 1.1.2.1 tls struct gmac_txdb *txdb;
1701 1.1.2.1 tls for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1702 1.1.2.1 tls txdb->txdb_flags = 0;
1703 1.1.2.1 tls }
1704 1.1.2.1 tls
1705 1.1.2.1 tls /*
1706 1.1.2.1 tls * Last descriptor has the wrap flag.
1707 1.1.2.1 tls */
1708 1.1.2.1 tls txdb->txdb_flags = TXDB_FLAG_ET;
1709 1.1.2.1 tls
1710 1.1.2.1 tls /*
1711 1.1.2.1 tls * Reset the producer consumer indexes.
1712 1.1.2.1 tls */
1713 1.1.2.1 tls txq->txq_consumer = txq->txq_first;
1714 1.1.2.1 tls txq->txq_producer = txq->txq_first;
1715 1.1.2.1 tls txq->txq_free = txq->txq_last - txq->txq_first - 1;
1716 1.1.2.1 tls txq->txq_threshold = txq->txq_free / 2;
1717 1.1.2.1 tls txq->txq_lastintr = 0;
1718 1.1.2.1 tls
1719 1.1.2.1 tls /*
1720 1.1.2.1 tls * What do we want to get interrupted on?
1721 1.1.2.1 tls */
1722 1.1.2.1 tls sc->sc_intmask |= XMTINT_0 | XMTUF;
1723 1.1.2.1 tls
1724 1.1.2.1 tls /*
1725 1.1.2.1 tls * Restart the transmiter at the first descriptor
1726 1.1.2.1 tls */
1727 1.1.2.1 tls bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1728 1.1.2.1 tls txq->txq_descmap->dm_segs->ds_addr);
1729 1.1.2.1 tls }
1730 1.1.2.1 tls
1731 1.1.2.1 tls static void
1732 1.1.2.1 tls bcmeth_ifstart(struct ifnet *ifp)
1733 1.1.2.1 tls {
1734 1.1.2.1 tls struct bcmeth_softc * const sc = ifp->if_softc;
1735 1.1.2.1 tls
1736 1.1.2.1 tls if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) {
1737 1.1.2.1 tls return;
1738 1.1.2.1 tls }
1739 1.1.2.1 tls
1740 1.1.2.1 tls #ifdef BCMETH_MPSAFETX
1741 1.1.2.1 tls if (cpu_intr_p()) {
1742 1.1.2.1 tls #endif
1743 1.1.2.1 tls atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1744 1.1.2.1 tls softint_schedule(sc->sc_soft_ih);
1745 1.1.2.1 tls #ifdef BCMETH_MPSAFETX
1746 1.1.2.1 tls } else {
1747 1.1.2.1 tls /*
1748 1.1.2.1 tls * Either we are in a softintr thread already or some other
1749 1.1.2.1 tls * thread so just borrow it to do the send and save ourselves
1750 1.1.2.1 tls * the overhead of a fast soft int.
1751 1.1.2.1 tls */
1752 1.1.2.1 tls bcmeth_soft_txintr(sc);
1753 1.1.2.1 tls }
1754 1.1.2.1 tls #endif
1755 1.1.2.1 tls }
1756 1.1.2.1 tls
1757 1.1.2.1 tls int
1758 1.1 matt bcmeth_intr(void *arg)
1759 1.1 matt {
1760 1.1 matt struct bcmeth_softc * const sc = arg;
1761 1.1.2.1 tls uint32_t soft_flags = 0;
1762 1.1.2.1 tls uint32_t work_flags = 0;
1763 1.1 matt int rv = 0;
1764 1.1 matt
1765 1.1 matt mutex_enter(sc->sc_hwlock);
1766 1.1 matt
1767 1.1.2.1 tls uint32_t intmask = sc->sc_intmask;
1768 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_intr);
1769 1.1.2.1 tls
1770 1.1.2.1 tls for (;;) {
1771 1.1.2.1 tls uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1772 1.1.2.1 tls intstatus &= intmask;
1773 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1774 1.1.2.1 tls if (intstatus == 0) {
1775 1.1.2.1 tls break;
1776 1.1.2.1 tls }
1777 1.1.2.1 tls #if 0
1778 1.1.2.1 tls aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1779 1.1.2.1 tls __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1780 1.1.2.1 tls #endif
1781 1.1.2.1 tls if (intstatus & RCVINT) {
1782 1.1.2.1 tls struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1783 1.1.2.1 tls intmask &= ~RCVINT;
1784 1.1.2.1 tls
1785 1.1.2.1 tls uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1786 1.1.2.1 tls uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1787 1.1.2.1 tls if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1788 1.1.2.1 tls /*
1789 1.1.2.1 tls * We wrapped at the end so count how far
1790 1.1.2.1 tls * we are from the end.
1791 1.1.2.1 tls */
1792 1.1.2.1 tls descs += rxq->rxq_last - rxq->rxq_consumer;
1793 1.1.2.1 tls } else {
1794 1.1.2.1 tls descs -= rxq->rxq_consumer - rxq->rxq_first;
1795 1.1.2.1 tls }
1796 1.1.2.1 tls /*
1797 1.1.2.1 tls * If we "timedout" we can't be hogging so use
1798 1.1.2.1 tls * softints. If we exceeded then we might hogging
1799 1.1.2.1 tls * so let the workqueue deal with them.
1800 1.1.2.1 tls */
1801 1.1.2.1 tls const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT);
1802 1.1.2.1 tls if (descs < framecount
1803 1.1.2.1 tls || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1804 1.1.2.1 tls soft_flags |= SOFT_RXINTR;
1805 1.1.2.1 tls } else {
1806 1.1.2.1 tls work_flags |= WORK_RXINTR;
1807 1.1.2.1 tls }
1808 1.1.2.1 tls }
1809 1.1.2.1 tls
1810 1.1.2.1 tls if (intstatus & XMTINT_0) {
1811 1.1.2.1 tls intmask &= ~XMTINT_0;
1812 1.1.2.1 tls soft_flags |= SOFT_TXINTR;
1813 1.1.2.1 tls }
1814 1.1.2.1 tls
1815 1.1.2.1 tls if (intstatus & RCVDESCUF) {
1816 1.1.2.1 tls intmask &= ~RCVDESCUF;
1817 1.1.2.1 tls work_flags |= WORK_RXUNDERFLOW;
1818 1.1.2.1 tls }
1819 1.1.2.1 tls
1820 1.1.2.1 tls intstatus &= intmask;
1821 1.1.2.1 tls if (intstatus) {
1822 1.1.2.1 tls aprint_error_dev(sc->sc_dev,
1823 1.1.2.1 tls "intr: intstatus=%#x\n", intstatus);
1824 1.1.2.1 tls aprint_error_dev(sc->sc_dev,
1825 1.1.2.1 tls "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n",
1826 1.1.2.1 tls sc->sc_rxq.rxq_first,
1827 1.1.2.1 tls sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr,
1828 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr),
1829 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0),
1830 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1));
1831 1.1.2.1 tls aprint_error_dev(sc->sc_dev,
1832 1.1.2.1 tls "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n",
1833 1.1.2.1 tls sc->sc_txq.txq_first,
1834 1.1.2.1 tls sc->sc_txq.txq_descmap->dm_segs[0].ds_addr,
1835 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr),
1836 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0),
1837 1.1.2.1 tls bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1));
1838 1.1.2.1 tls intmask &= ~intstatus;
1839 1.1.2.1 tls work_flags |= WORK_REINIT;
1840 1.1.2.1 tls break;
1841 1.1.2.1 tls }
1842 1.1.2.1 tls }
1843 1.1.2.1 tls
1844 1.1.2.1 tls if (intmask != sc->sc_intmask) {
1845 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1846 1.1.2.1 tls }
1847 1.1.2.1 tls
1848 1.1.2.1 tls if (work_flags) {
1849 1.1.2.1 tls if (sc->sc_work_flags == 0) {
1850 1.1.2.1 tls workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1851 1.1.2.1 tls }
1852 1.1.2.1 tls atomic_or_32(&sc->sc_work_flags, work_flags);
1853 1.1.2.1 tls rv = 1;
1854 1.1.2.1 tls }
1855 1.1.2.1 tls
1856 1.1.2.1 tls if (soft_flags) {
1857 1.1.2.1 tls if (sc->sc_soft_flags == 0) {
1858 1.1.2.1 tls softint_schedule(sc->sc_soft_ih);
1859 1.1.2.1 tls }
1860 1.1.2.1 tls atomic_or_32(&sc->sc_soft_flags, soft_flags);
1861 1.1.2.1 tls rv = 1;
1862 1.1.2.1 tls }
1863 1.1 matt
1864 1.1 matt mutex_exit(sc->sc_hwlock);
1865 1.1 matt
1866 1.1 matt return rv;
1867 1.1 matt }
1868 1.1.2.1 tls
1869 1.1.2.1 tls #ifdef BCMETH_MPSAFETX
1870 1.1.2.1 tls void
1871 1.1.2.1 tls bcmeth_soft_txintr(struct bcmeth_softc *sc)
1872 1.1.2.1 tls {
1873 1.1.2.1 tls mutex_enter(sc->sc_lock);
1874 1.1.2.1 tls /*
1875 1.1.2.1 tls * Let's do what we came here for. Consume transmitted
1876 1.1.2.1 tls * packets off the the transmit ring.
1877 1.1.2.1 tls */
1878 1.1.2.1 tls if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1879 1.1.2.1 tls || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1880 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1881 1.1.2.1 tls sc->sc_if.if_flags |= IFF_OACTIVE;
1882 1.1.2.1 tls } else {
1883 1.1.2.1 tls sc->sc_if.if_flags &= ~IFF_OACTIVE;
1884 1.1.2.1 tls }
1885 1.1.2.1 tls if (sc->sc_if.if_flags & IFF_RUNNING) {
1886 1.1.2.1 tls mutex_spin_enter(sc->sc_hwlock);
1887 1.1.2.1 tls sc->sc_intmask |= XMTINT_0;
1888 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1889 1.1.2.1 tls mutex_spin_exit(sc->sc_hwlock);
1890 1.1.2.1 tls }
1891 1.1.2.1 tls mutex_exit(sc->sc_lock);
1892 1.1.2.1 tls }
1893 1.1.2.1 tls #endif /* BCMETH_MPSAFETX */
1894 1.1.2.1 tls
1895 1.1.2.1 tls void
1896 1.1.2.1 tls bcmeth_soft_intr(void *arg)
1897 1.1.2.1 tls {
1898 1.1.2.1 tls struct bcmeth_softc * const sc = arg;
1899 1.1.2.1 tls struct ifnet * const ifp = &sc->sc_if;
1900 1.1.2.1 tls uint32_t intmask = 0;
1901 1.1.2.1 tls
1902 1.1.2.1 tls mutex_enter(sc->sc_lock);
1903 1.1.2.1 tls
1904 1.1.2.1 tls u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1905 1.1.2.1 tls
1906 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr);
1907 1.1.2.1 tls
1908 1.1.2.1 tls if ((soft_flags & SOFT_TXINTR)
1909 1.1.2.1 tls || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1910 1.1.2.1 tls /*
1911 1.1.2.1 tls * Let's do what we came here for. Consume transmitted
1912 1.1.2.1 tls * packets off the the transmit ring.
1913 1.1.2.1 tls */
1914 1.1.2.1 tls if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1915 1.1.2.1 tls || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1916 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1917 1.1.2.1 tls ifp->if_flags |= IFF_OACTIVE;
1918 1.1.2.1 tls } else {
1919 1.1.2.1 tls ifp->if_flags &= ~IFF_OACTIVE;
1920 1.1.2.1 tls }
1921 1.1.2.1 tls intmask |= XMTINT_0;
1922 1.1.2.1 tls }
1923 1.1.2.1 tls
1924 1.1.2.1 tls if (soft_flags & SOFT_RXINTR) {
1925 1.1.2.1 tls /*
1926 1.1.2.1 tls * Let's consume
1927 1.1.2.1 tls */
1928 1.1.2.2 tls while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1929 1.1.2.2 tls sc->sc_rxq.rxq_threshold / 4)) {
1930 1.1.2.2 tls /*
1931 1.1.2.2 tls * We've consumed a quarter of the ring and still have
1932 1.1.2.2 tls * more to do. Refill the ring.
1933 1.1.2.2 tls */
1934 1.1.2.2 tls bcmeth_rxq_produce(sc, &sc->sc_rxq);
1935 1.1.2.2 tls }
1936 1.1.2.1 tls intmask |= RCVINT;
1937 1.1.2.1 tls }
1938 1.1.2.1 tls
1939 1.1.2.1 tls if (ifp->if_flags & IFF_RUNNING) {
1940 1.1.2.1 tls bcmeth_rxq_produce(sc, &sc->sc_rxq);
1941 1.1.2.1 tls mutex_spin_enter(sc->sc_hwlock);
1942 1.1.2.1 tls sc->sc_intmask |= intmask;
1943 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1944 1.1.2.1 tls mutex_spin_exit(sc->sc_hwlock);
1945 1.1.2.1 tls }
1946 1.1.2.1 tls
1947 1.1.2.1 tls mutex_exit(sc->sc_lock);
1948 1.1.2.1 tls }
1949 1.1.2.1 tls
1950 1.1.2.1 tls void
1951 1.1.2.1 tls bcmeth_worker(struct work *wk, void *arg)
1952 1.1.2.1 tls {
1953 1.1.2.1 tls struct bcmeth_softc * const sc = arg;
1954 1.1.2.1 tls struct ifnet * const ifp = &sc->sc_if;
1955 1.1.2.1 tls uint32_t intmask = 0;
1956 1.1.2.1 tls
1957 1.1.2.1 tls mutex_enter(sc->sc_lock);
1958 1.1.2.1 tls
1959 1.1.2.2 tls BCMETH_EVCNT_INCR(sc->sc_ev_work);
1960 1.1.2.1 tls
1961 1.1.2.1 tls uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1962 1.1.2.1 tls if (work_flags & WORK_REINIT) {
1963 1.1.2.1 tls int s = splnet();
1964 1.1.2.1 tls sc->sc_soft_flags = 0;
1965 1.1.2.1 tls bcmeth_ifinit(ifp);
1966 1.1.2.1 tls splx(s);
1967 1.1.2.1 tls work_flags &= ~WORK_RXUNDERFLOW;
1968 1.1.2.1 tls }
1969 1.1.2.1 tls
1970 1.1.2.1 tls if (work_flags & WORK_RXUNDERFLOW) {
1971 1.1.2.1 tls struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1972 1.1.2.1 tls size_t threshold = 5 * rxq->rxq_threshold / 4;
1973 1.1.2.1 tls if (threshold >= rxq->rxq_last - rxq->rxq_first) {
1974 1.1.2.1 tls threshold = rxq->rxq_last - rxq->rxq_first - 1;
1975 1.1.2.1 tls } else {
1976 1.1.2.1 tls intmask |= RCVDESCUF;
1977 1.1.2.1 tls }
1978 1.1.2.1 tls aprint_normal_dev(sc->sc_dev,
1979 1.1.2.1 tls "increasing receive buffers from %zu to %zu\n",
1980 1.1.2.1 tls rxq->rxq_threshold, threshold);
1981 1.1.2.1 tls rxq->rxq_threshold = threshold;
1982 1.1.2.1 tls }
1983 1.1.2.1 tls
1984 1.1.2.1 tls if (work_flags & WORK_RXINTR) {
1985 1.1.2.1 tls /*
1986 1.1.2.1 tls * Let's consume
1987 1.1.2.1 tls */
1988 1.1.2.2 tls while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1989 1.1.2.2 tls sc->sc_rxq.rxq_threshold / 4)) {
1990 1.1.2.2 tls /*
1991 1.1.2.2 tls * We've consumed a quarter of the ring and still have
1992 1.1.2.2 tls * more to do. Refill the ring.
1993 1.1.2.2 tls */
1994 1.1.2.2 tls bcmeth_rxq_produce(sc, &sc->sc_rxq);
1995 1.1.2.2 tls }
1996 1.1.2.1 tls intmask |= RCVINT;
1997 1.1.2.1 tls }
1998 1.1.2.1 tls
1999 1.1.2.1 tls if (ifp->if_flags & IFF_RUNNING) {
2000 1.1.2.1 tls bcmeth_rxq_produce(sc, &sc->sc_rxq);
2001 1.1.2.1 tls #if 0
2002 1.1.2.1 tls uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
2003 1.1.2.1 tls if (intstatus & RCVINT) {
2004 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT);
2005 1.1.2.1 tls work_flags |= WORK_RXINTR;
2006 1.1.2.1 tls continue;
2007 1.1.2.1 tls }
2008 1.1.2.1 tls #endif
2009 1.1.2.1 tls mutex_spin_enter(sc->sc_hwlock);
2010 1.1.2.1 tls sc->sc_intmask |= intmask;
2011 1.1.2.1 tls bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
2012 1.1.2.1 tls mutex_spin_exit(sc->sc_hwlock);
2013 1.1.2.1 tls }
2014 1.1.2.1 tls
2015 1.1.2.1 tls mutex_exit(sc->sc_lock);
2016 1.1.2.1 tls }
2017