bcm53xx_eth.c revision 1.17 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.10 matt #define _ARM32_BUS_DMA_PRIVATE
31 1.1 matt #define GMAC_PRIVATE
32 1.1 matt
33 1.1 matt #include "locators.h"
34 1.1 matt
35 1.1 matt #include <sys/cdefs.h>
36 1.1 matt
37 1.17 matt __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.17 2012/11/08 21:32:48 matt Exp $");
38 1.1 matt
39 1.1 matt #include <sys/param.h>
40 1.2 matt #include <sys/atomic.h>
41 1.1 matt #include <sys/bus.h>
42 1.1 matt #include <sys/device.h>
43 1.2 matt #include <sys/ioctl.h>
44 1.1 matt #include <sys/intr.h>
45 1.2 matt #include <sys/kmem.h>
46 1.1 matt #include <sys/mutex.h>
47 1.2 matt #include <sys/socket.h>
48 1.1 matt #include <sys/systm.h>
49 1.8 matt #include <sys/workqueue.h>
50 1.1 matt
51 1.1 matt #include <net/if.h>
52 1.1 matt #include <net/if_ether.h>
53 1.1 matt #include <net/if_media.h>
54 1.1 matt
55 1.2 matt #include <net/if_dl.h>
56 1.2 matt
57 1.2 matt #include <net/bpf.h>
58 1.2 matt
59 1.1 matt #include <dev/mii/miivar.h>
60 1.1 matt
61 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
62 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
63 1.1 matt
64 1.16 matt //#define BCMETH_MPSAFE
65 1.16 matt
66 1.16 matt #define BCMETH_RCVOFFSET 10
67 1.10 matt #define BCMETH_MAXTXMBUFS 128
68 1.2 matt #define BCMETH_NTXSEGS 30
69 1.2 matt #define BCMETH_MAXRXMBUFS 255
70 1.8 matt #define BCMETH_MINRXMBUFS 64
71 1.2 matt #define BCMETH_NRXSEGS 1
72 1.8 matt #define BCMETH_RINGSIZE PAGE_SIZE
73 1.2 matt
74 1.16 matt #if 0
75 1.10 matt #define BCMETH_RCVMAGIC 0xfeedface
76 1.16 matt #endif
77 1.10 matt
78 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
79 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
80 1.1 matt
81 1.2 matt struct bcmeth_txqueue {
82 1.2 matt bus_dmamap_t txq_descmap;
83 1.2 matt struct gmac_txdb *txq_consumer;
84 1.2 matt struct gmac_txdb *txq_producer;
85 1.2 matt struct gmac_txdb *txq_first;
86 1.2 matt struct gmac_txdb *txq_last;
87 1.2 matt struct ifqueue txq_mbufs;
88 1.2 matt struct mbuf *txq_next;
89 1.2 matt size_t txq_free;
90 1.2 matt size_t txq_threshold;
91 1.2 matt size_t txq_lastintr;
92 1.2 matt bus_size_t txq_reg_xmtaddrlo;
93 1.2 matt bus_size_t txq_reg_xmtptr;
94 1.2 matt bus_size_t txq_reg_xmtctl;
95 1.2 matt bus_size_t txq_reg_xmtsts0;
96 1.10 matt bus_size_t txq_reg_xmtsts1;
97 1.2 matt bus_dma_segment_t txq_descmap_seg;
98 1.2 matt };
99 1.2 matt
100 1.2 matt struct bcmeth_rxqueue {
101 1.2 matt bus_dmamap_t rxq_descmap;
102 1.2 matt struct gmac_rxdb *rxq_consumer;
103 1.2 matt struct gmac_rxdb *rxq_producer;
104 1.2 matt struct gmac_rxdb *rxq_first;
105 1.2 matt struct gmac_rxdb *rxq_last;
106 1.2 matt struct mbuf *rxq_mhead;
107 1.2 matt struct mbuf **rxq_mtail;
108 1.2 matt struct mbuf *rxq_mconsumer;
109 1.2 matt size_t rxq_inuse;
110 1.2 matt size_t rxq_threshold;
111 1.2 matt bus_size_t rxq_reg_rcvaddrlo;
112 1.2 matt bus_size_t rxq_reg_rcvptr;
113 1.2 matt bus_size_t rxq_reg_rcvctl;
114 1.2 matt bus_size_t rxq_reg_rcvsts0;
115 1.10 matt bus_size_t rxq_reg_rcvsts1;
116 1.2 matt bus_dma_segment_t rxq_descmap_seg;
117 1.2 matt };
118 1.2 matt
119 1.2 matt struct bcmeth_mapcache {
120 1.2 matt u_int dmc_nmaps;
121 1.2 matt u_int dmc_maxseg;
122 1.2 matt u_int dmc_maxmaps;
123 1.2 matt u_int dmc_maxmapsize;
124 1.2 matt bus_dmamap_t dmc_maps[0];
125 1.2 matt };
126 1.2 matt
127 1.1 matt struct bcmeth_softc {
128 1.1 matt device_t sc_dev;
129 1.1 matt bus_space_tag_t sc_bst;
130 1.1 matt bus_space_handle_t sc_bsh;
131 1.1 matt bus_dma_tag_t sc_dmat;
132 1.1 matt kmutex_t *sc_lock;
133 1.1 matt kmutex_t *sc_hwlock;
134 1.1 matt struct ethercom sc_ec;
135 1.2 matt #define sc_if sc_ec.ec_if
136 1.2 matt struct ifmedia sc_media;
137 1.2 matt void *sc_soft_ih;
138 1.1 matt void *sc_ih;
139 1.2 matt
140 1.2 matt struct bcmeth_rxqueue sc_rxq;
141 1.2 matt struct bcmeth_txqueue sc_txq;
142 1.2 matt
143 1.2 matt uint32_t sc_maxfrm;
144 1.2 matt uint32_t sc_cmdcfg;
145 1.15 matt uint32_t sc_intmask;
146 1.8 matt uint32_t sc_rcvlazy;
147 1.2 matt volatile uint32_t sc_soft_flags;
148 1.2 matt #define SOFT_RXINTR 0x01
149 1.8 matt #define SOFT_TXINTR 0x02
150 1.2 matt
151 1.2 matt struct evcnt sc_ev_intr;
152 1.2 matt struct evcnt sc_ev_soft_intr;
153 1.10 matt struct evcnt sc_ev_work;
154 1.2 matt struct evcnt sc_ev_tx_stall;
155 1.10 matt struct evcnt sc_ev_rx_badmagic_lo;
156 1.10 matt struct evcnt sc_ev_rx_badmagic_hi;
157 1.2 matt
158 1.2 matt struct ifqueue sc_rx_bufcache;
159 1.2 matt struct bcmeth_mapcache *sc_rx_mapcache;
160 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
161 1.2 matt
162 1.8 matt struct workqueue *sc_workq;
163 1.8 matt struct work sc_work;
164 1.8 matt
165 1.8 matt volatile uint32_t sc_work_flags;
166 1.8 matt #define WORK_RXINTR 0x01
167 1.8 matt #define WORK_RXUNDERFLOW 0x02
168 1.8 matt #define WORK_REINIT 0x04
169 1.8 matt
170 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
171 1.1 matt };
172 1.1 matt
173 1.2 matt static void bcmeth_ifstart(struct ifnet *);
174 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
175 1.2 matt static int bcmeth_ifinit(struct ifnet *);
176 1.2 matt static void bcmeth_ifstop(struct ifnet *, int);
177 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
178 1.2 matt
179 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
180 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
181 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
182 1.2 matt struct bcmeth_mapcache *);
183 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
184 1.2 matt struct bcmeth_mapcache *);
185 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
186 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
187 1.2 matt
188 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
189 1.2 matt struct bcmeth_txqueue *, u_int);
190 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
191 1.2 matt struct bcmeth_txqueue *);
192 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
193 1.2 matt struct bcmeth_txqueue *);
194 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
195 1.2 matt struct bcmeth_txqueue *);
196 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
197 1.2 matt struct bcmeth_txqueue *, struct mbuf *m);
198 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
199 1.2 matt struct bcmeth_txqueue *);
200 1.2 matt
201 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
202 1.2 matt struct bcmeth_rxqueue *, u_int);
203 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
204 1.2 matt struct bcmeth_rxqueue *);
205 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
206 1.2 matt struct bcmeth_rxqueue *, bool);
207 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
208 1.2 matt struct bcmeth_rxqueue *);
209 1.2 matt
210 1.1 matt static int bcmeth_intr(void *);
211 1.16 matt #ifdef BCMETH_MPSAFETX
212 1.16 matt static void bcmeth_soft_txintr(struct bcmeth_softc *);
213 1.16 matt #endif
214 1.2 matt static void bcmeth_soft_intr(void *);
215 1.8 matt static void bcmeth_worker(struct work *, void *);
216 1.2 matt
217 1.2 matt static int bcmeth_mediachange(struct ifnet *);
218 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
219 1.1 matt
220 1.1 matt static inline uint32_t
221 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
222 1.1 matt {
223 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
224 1.1 matt }
225 1.1 matt
226 1.1 matt static inline void
227 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
228 1.1 matt {
229 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
230 1.1 matt }
231 1.1 matt
232 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
233 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
234 1.1 matt
235 1.1 matt static int
236 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
237 1.1 matt {
238 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
239 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
240 1.1 matt
241 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
242 1.1 matt return 0;
243 1.1 matt
244 1.1 matt #ifdef DIAGNOSTIC
245 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
246 1.1 matt #endif
247 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
248 1.1 matt
249 1.1 matt return 1;
250 1.1 matt }
251 1.1 matt
252 1.1 matt static void
253 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
254 1.1 matt {
255 1.1 matt struct bcmeth_softc * const sc = device_private(self);
256 1.2 matt struct ethercom * const ec = &sc->sc_ec;
257 1.2 matt struct ifnet * const ifp = &ec->ec_if;
258 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
259 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
260 1.2 matt const char * const xname = device_xname(self);
261 1.2 matt prop_dictionary_t dict = device_properties(self);
262 1.2 matt int error;
263 1.1 matt
264 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
265 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
266 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
267 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
268 1.1 matt
269 1.10 matt /*
270 1.11 matt * We need to use the coherent dma tag for the GMAC.
271 1.10 matt */
272 1.11 matt sc->sc_dmat = &bcm53xx_coherent_dma_tag;
273 1.10 matt
274 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
275 1.2 matt if (eaprop == NULL) {
276 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
277 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
278 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
279 1.2 matt aprint_error(": mac-address property is missing\n");
280 1.2 matt return;
281 1.2 matt }
282 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
283 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
284 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
285 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
286 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
287 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
288 1.2 matt } else {
289 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
290 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
291 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
292 1.2 matt ETHER_ADDR_LEN);
293 1.2 matt }
294 1.2 matt sc->sc_dev = self;
295 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
296 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
297 1.2 matt
298 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
299 1.1 matt
300 1.1 matt aprint_naive("\n");
301 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
302 1.1 matt
303 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
304 1.2 matt if (error) {
305 1.2 matt aprint_error(": failed to init rxq: %d\n", error);
306 1.2 matt return;
307 1.2 matt }
308 1.2 matt
309 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
310 1.2 matt if (error) {
311 1.2 matt aprint_error(": failed to init txq: %d\n", error);
312 1.2 matt return;
313 1.2 matt }
314 1.2 matt
315 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
316 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
317 1.2 matt if (error) {
318 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
319 1.2 matt return;
320 1.2 matt }
321 1.2 matt
322 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
323 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
324 1.2 matt if (error) {
325 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
326 1.2 matt return;
327 1.2 matt }
328 1.2 matt
329 1.8 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
330 1.9 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
331 1.8 matt if (error) {
332 1.8 matt aprint_error(": failed to create workqueue: %d\n", error);
333 1.8 matt return;
334 1.8 matt }
335 1.8 matt
336 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
337 1.2 matt bcmeth_soft_intr, sc);
338 1.1 matt
339 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
340 1.1 matt bcmeth_intr, sc);
341 1.1 matt
342 1.1 matt if (sc->sc_ih == NULL) {
343 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
344 1.1 matt loc->loc_intrs[0]);
345 1.1 matt } else {
346 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
347 1.1 matt loc->loc_intrs[0]);
348 1.1 matt }
349 1.2 matt
350 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
351 1.2 matt ether_sprintf(sc->sc_enaddr));
352 1.2 matt
353 1.2 matt /*
354 1.2 matt * Since each port in plugged into the switch/flow-accelerator,
355 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
356 1.2 matt */
357 1.2 matt int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
358 1.2 matt //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
359 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
360 1.2 matt bcmeth_mediastatus);
361 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
362 1.2 matt ifmedia_set(&sc->sc_media, ifmedia);
363 1.2 matt
364 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
365 1.2 matt
366 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
367 1.2 matt ifp->if_softc = sc;
368 1.2 matt ifp->if_baudrate = IF_Mbps(1000);
369 1.2 matt ifp->if_capabilities = 0;
370 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
371 1.16 matt #ifdef BCMETH_MPSAFE
372 1.16 matt ifp->if_flags2 = IFF2_MPSAFE;
373 1.16 matt #endif
374 1.2 matt ifp->if_ioctl = bcmeth_ifioctl;
375 1.2 matt ifp->if_start = bcmeth_ifstart;
376 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
377 1.2 matt ifp->if_init = bcmeth_ifinit;
378 1.2 matt ifp->if_stop = bcmeth_ifstop;
379 1.2 matt IFQ_SET_READY(&ifp->if_snd);
380 1.2 matt
381 1.2 matt bcmeth_ifstop(ifp, true);
382 1.2 matt
383 1.2 matt /*
384 1.2 matt * Attach the interface.
385 1.2 matt */
386 1.2 matt if_attach(ifp);
387 1.2 matt ether_ifattach(ifp, sc->sc_enaddr);
388 1.2 matt
389 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
390 1.2 matt NULL, xname, "intr");
391 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
392 1.2 matt NULL, xname, "soft intr");
393 1.8 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
394 1.8 matt NULL, xname, "work items");
395 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
396 1.2 matt NULL, xname, "tx stalls");
397 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC,
398 1.10 matt NULL, xname, "rx badmagic lo");
399 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC,
400 1.10 matt NULL, xname, "rx badmagic hi");
401 1.2 matt }
402 1.2 matt
403 1.2 matt static int
404 1.2 matt bcmeth_mediachange(struct ifnet *ifp)
405 1.2 matt {
406 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
407 1.2 matt return 0;
408 1.2 matt }
409 1.2 matt
410 1.2 matt static void
411 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
412 1.2 matt {
413 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
414 1.2 matt
415 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
416 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
417 1.2 matt }
418 1.2 matt
419 1.2 matt static uint64_t
420 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
421 1.2 matt {
422 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
423 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
424 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
425 1.5 matt | (enaddr[0] << 24) // UNIMAC_MAC_0
426 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
427 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
428 1.2 matt }
429 1.2 matt
430 1.2 matt static int
431 1.2 matt bcmeth_ifinit(struct ifnet *ifp)
432 1.2 matt {
433 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
434 1.2 matt int error = 0;
435 1.2 matt
436 1.2 matt sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES);
437 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
438 1.2 matt return error;
439 1.2 matt
440 1.2 matt KASSERT(ifp->if_flags & IFF_UP);
441 1.2 matt
442 1.2 matt /*
443 1.2 matt * Stop the interface
444 1.2 matt */
445 1.2 matt bcmeth_ifstop(ifp, 0);
446 1.2 matt
447 1.2 matt /*
448 1.2 matt * If our frame size has changed (or it's our first time through)
449 1.2 matt * destroy the existing transmit mapcache.
450 1.2 matt */
451 1.2 matt if (sc->sc_tx_mapcache != NULL
452 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
453 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
454 1.2 matt sc->sc_tx_mapcache = NULL;
455 1.2 matt }
456 1.2 matt
457 1.2 matt if (sc->sc_tx_mapcache == NULL) {
458 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
459 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
460 1.2 matt if (error)
461 1.2 matt return error;
462 1.2 matt }
463 1.2 matt
464 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
465 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
466 1.2 matt | RX_ENA | TX_ENA;
467 1.2 matt
468 1.2 matt if (ifp->if_flags & IFF_PROMISC) {
469 1.2 matt sc->sc_cmdcfg |= PROMISC_EN;
470 1.2 matt } else {
471 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
472 1.2 matt }
473 1.2 matt
474 1.2 matt const uint64_t macstnaddr =
475 1.2 matt bcmeth_macaddr_create(CLLADDR(ifp->if_sadl));
476 1.2 matt
477 1.2 matt sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
478 1.2 matt
479 1.2 matt /* 5. Load RCVADDR_LO with new pointer */
480 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
481 1.2 matt
482 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
483 1.4 matt __SHIFTIN(BCMETH_RCVOFFSET, RCVCTL_RCVOFFSET)
484 1.2 matt | RCVCTL_PARITY_DIS
485 1.2 matt | RCVCTL_OFLOW_CONTINUE
486 1.17 matt | __SHIFTIN(3, RCVCTL_BURSTLEN));
487 1.2 matt
488 1.2 matt /* 6. Load XMTADDR_LO with new pointer */
489 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
490 1.2 matt
491 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
492 1.2 matt | XMTCTL_PARITY_DIS
493 1.17 matt | __SHIFTIN(3, XMTCTL_BURSTLEN));
494 1.2 matt
495 1.2 matt /* 7. Setup other UNIMAC registers */
496 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
497 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
498 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
499 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
500 1.2 matt
501 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
502 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
503 1.2 matt devctl &= ~FLOW_CTRL_MODE;
504 1.2 matt devctl &= ~MIB_RD_RESET_EN;
505 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
506 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
507 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
508 1.2 matt
509 1.3 matt /* Setup lazy receive (at most 1ms). */
510 1.8 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
511 1.8 matt | __SHIFTIN(125000000 / 1000, INTRCVLAZY_TIMEOUT);
512 1.8 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
513 1.3 matt
514 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
515 1.2 matt sc->sc_intmask |= XMTINT_0|XMTUF;
516 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
517 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
518 1.2 matt
519 1.2 matt
520 1.2 matt /* 12. Enable receive queues in RQUEUE, */
521 1.2 matt sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
522 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
523 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
524 1.2 matt
525 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
526 1.3 matt
527 1.3 matt #if 0
528 1.3 matt aprint_normal_dev(sc->sc_dev,
529 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
530 1.3 matt devctl, sc->sc_cmdcfg,
531 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
532 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
533 1.2 matt #endif
534 1.2 matt
535 1.2 matt sc->sc_soft_flags = 0;
536 1.2 matt
537 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
538 1.2 matt
539 1.2 matt ifp->if_flags |= IFF_RUNNING;
540 1.2 matt
541 1.2 matt return error;
542 1.2 matt }
543 1.2 matt
544 1.2 matt static void
545 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
546 1.2 matt {
547 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
548 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
549 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
550 1.2 matt
551 1.2 matt KASSERT(!cpu_intr_p());
552 1.2 matt
553 1.2 matt sc->sc_soft_flags = 0;
554 1.16 matt sc->sc_work_flags = 0;
555 1.2 matt
556 1.2 matt /* Disable Rx processing */
557 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
558 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
559 1.2 matt
560 1.2 matt /* Disable Tx processing */
561 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
562 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
563 1.2 matt
564 1.2 matt /* Disable all interrupts */
565 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
566 1.2 matt
567 1.2 matt for (;;) {
568 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
569 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
570 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
571 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
572 1.2 matt break;
573 1.2 matt delay(50);
574 1.2 matt }
575 1.2 matt /*
576 1.2 matt * Now reset the controller.
577 1.2 matt *
578 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
579 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
580 1.2 matt */
581 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
582 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
583 1.2 matt sc->sc_intmask = 0;
584 1.2 matt ifp->if_flags &= ~IFF_RUNNING;
585 1.2 matt
586 1.2 matt /*
587 1.2 matt * Let's consume any remaining transmitted packets. And if we are
588 1.2 matt * disabling the interface, purge ourselves of any untransmitted
589 1.2 matt * packets. But don't consume any received packets, just drop them.
590 1.2 matt * If we aren't disabling the interface, save the mbufs in the
591 1.2 matt * receive queue for reuse.
592 1.2 matt */
593 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
594 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
595 1.2 matt if (disable) {
596 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
597 1.2 matt IF_PURGE(&ifp->if_snd);
598 1.2 matt }
599 1.2 matt
600 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
601 1.2 matt }
602 1.2 matt
603 1.2 matt static void
604 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
605 1.2 matt {
606 1.2 matt }
607 1.2 matt
608 1.2 matt static int
609 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
610 1.2 matt {
611 1.2 matt struct bcmeth_softc *sc = ifp->if_softc;
612 1.2 matt struct ifreq * const ifr = data;
613 1.2 matt const int s = splnet();
614 1.2 matt int error;
615 1.2 matt
616 1.2 matt switch (cmd) {
617 1.2 matt case SIOCSIFMEDIA:
618 1.2 matt case SIOCGIFMEDIA:
619 1.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
620 1.2 matt break;
621 1.2 matt
622 1.2 matt default:
623 1.2 matt error = ether_ioctl(ifp, cmd, data);
624 1.2 matt if (error != ENETRESET)
625 1.2 matt break;
626 1.2 matt
627 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
628 1.2 matt error = 0;
629 1.2 matt break;
630 1.2 matt }
631 1.2 matt error = bcmeth_ifinit(ifp);
632 1.2 matt break;
633 1.2 matt }
634 1.2 matt
635 1.2 matt splx(s);
636 1.2 matt return error;
637 1.2 matt }
638 1.2 matt
639 1.2 matt static void
640 1.2 matt bcmeth_rxq_desc_presync(
641 1.2 matt struct bcmeth_softc *sc,
642 1.2 matt struct bcmeth_rxqueue *rxq,
643 1.2 matt struct gmac_rxdb *rxdb,
644 1.2 matt size_t count)
645 1.2 matt {
646 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
647 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
648 1.2 matt BUS_DMASYNC_PREWRITE);
649 1.2 matt }
650 1.2 matt
651 1.2 matt static void
652 1.2 matt bcmeth_rxq_desc_postsync(
653 1.2 matt struct bcmeth_softc *sc,
654 1.2 matt struct bcmeth_rxqueue *rxq,
655 1.2 matt struct gmac_rxdb *rxdb,
656 1.2 matt size_t count)
657 1.2 matt {
658 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
659 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
660 1.2 matt BUS_DMASYNC_POSTWRITE);
661 1.2 matt }
662 1.2 matt
663 1.2 matt static void
664 1.2 matt bcmeth_txq_desc_presync(
665 1.2 matt struct bcmeth_softc *sc,
666 1.2 matt struct bcmeth_txqueue *txq,
667 1.2 matt struct gmac_txdb *txdb,
668 1.2 matt size_t count)
669 1.2 matt {
670 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
671 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
672 1.2 matt BUS_DMASYNC_PREWRITE);
673 1.2 matt }
674 1.2 matt
675 1.2 matt static void
676 1.2 matt bcmeth_txq_desc_postsync(
677 1.2 matt struct bcmeth_softc *sc,
678 1.2 matt struct bcmeth_txqueue *txq,
679 1.2 matt struct gmac_txdb *txdb,
680 1.2 matt size_t count)
681 1.2 matt {
682 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
683 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
684 1.2 matt BUS_DMASYNC_POSTWRITE);
685 1.2 matt }
686 1.2 matt
687 1.2 matt static bus_dmamap_t
688 1.2 matt bcmeth_mapcache_get(
689 1.2 matt struct bcmeth_softc *sc,
690 1.2 matt struct bcmeth_mapcache *dmc)
691 1.2 matt {
692 1.2 matt KASSERT(dmc->dmc_nmaps > 0);
693 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
694 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
695 1.2 matt }
696 1.2 matt
697 1.2 matt static void
698 1.2 matt bcmeth_mapcache_put(
699 1.2 matt struct bcmeth_softc *sc,
700 1.2 matt struct bcmeth_mapcache *dmc,
701 1.2 matt bus_dmamap_t map)
702 1.2 matt {
703 1.2 matt KASSERT(map != NULL);
704 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
705 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
706 1.2 matt }
707 1.2 matt
708 1.2 matt static void
709 1.2 matt bcmeth_mapcache_destroy(
710 1.2 matt struct bcmeth_softc *sc,
711 1.2 matt struct bcmeth_mapcache *dmc)
712 1.2 matt {
713 1.2 matt const size_t dmc_size =
714 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
715 1.2 matt
716 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
717 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
718 1.2 matt }
719 1.2 matt kmem_intr_free(dmc, dmc_size);
720 1.2 matt }
721 1.2 matt
722 1.2 matt static int
723 1.2 matt bcmeth_mapcache_create(
724 1.2 matt struct bcmeth_softc *sc,
725 1.2 matt struct bcmeth_mapcache **dmc_p,
726 1.2 matt size_t maxmaps,
727 1.2 matt size_t maxmapsize,
728 1.2 matt size_t maxseg)
729 1.2 matt {
730 1.2 matt const size_t dmc_size =
731 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
732 1.2 matt struct bcmeth_mapcache * const dmc =
733 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
734 1.2 matt
735 1.2 matt dmc->dmc_maxmaps = maxmaps;
736 1.2 matt dmc->dmc_nmaps = maxmaps;
737 1.2 matt dmc->dmc_maxmapsize = maxmapsize;
738 1.2 matt dmc->dmc_maxseg = maxseg;
739 1.2 matt
740 1.2 matt for (u_int i = 0; i < maxmaps; i++) {
741 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
742 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
743 1.2 matt BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
744 1.2 matt if (error) {
745 1.2 matt aprint_error_dev(sc->sc_dev,
746 1.2 matt "failed to creat dma map cache "
747 1.2 matt "entry %u of %zu: %d\n",
748 1.2 matt i, maxmaps, error);
749 1.2 matt while (i-- > 0) {
750 1.2 matt bus_dmamap_destroy(sc->sc_dmat,
751 1.2 matt dmc->dmc_maps[i]);
752 1.2 matt }
753 1.2 matt kmem_intr_free(dmc, dmc_size);
754 1.2 matt return error;
755 1.2 matt }
756 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
757 1.2 matt }
758 1.2 matt
759 1.2 matt *dmc_p = dmc;
760 1.2 matt
761 1.2 matt return 0;
762 1.2 matt }
763 1.2 matt
764 1.2 matt #if 0
765 1.2 matt static void
766 1.2 matt bcmeth_dmamem_free(
767 1.2 matt bus_dma_tag_t dmat,
768 1.2 matt size_t map_size,
769 1.2 matt bus_dma_segment_t *seg,
770 1.2 matt bus_dmamap_t map,
771 1.2 matt void *kvap)
772 1.2 matt {
773 1.2 matt bus_dmamap_destroy(dmat, map);
774 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
775 1.2 matt bus_dmamem_free(dmat, seg, 1);
776 1.2 matt }
777 1.2 matt #endif
778 1.2 matt
779 1.2 matt static int
780 1.2 matt bcmeth_dmamem_alloc(
781 1.2 matt bus_dma_tag_t dmat,
782 1.2 matt size_t map_size,
783 1.2 matt bus_dma_segment_t *seg,
784 1.2 matt bus_dmamap_t *map,
785 1.2 matt void **kvap)
786 1.2 matt {
787 1.2 matt int error;
788 1.2 matt int nseg;
789 1.2 matt
790 1.2 matt *kvap = NULL;
791 1.2 matt *map = NULL;
792 1.2 matt
793 1.10 matt error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0,
794 1.2 matt seg, 1, &nseg, 0);
795 1.2 matt if (error)
796 1.2 matt return error;
797 1.2 matt
798 1.2 matt KASSERT(nseg == 1);
799 1.2 matt
800 1.10 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0);
801 1.2 matt if (error == 0) {
802 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
803 1.2 matt map);
804 1.2 matt if (error == 0) {
805 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
806 1.2 matt NULL, 0);
807 1.2 matt if (error == 0)
808 1.2 matt return 0;
809 1.2 matt bus_dmamap_destroy(dmat, *map);
810 1.2 matt *map = NULL;
811 1.2 matt }
812 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
813 1.2 matt *kvap = NULL;
814 1.2 matt }
815 1.2 matt bus_dmamem_free(dmat, seg, nseg);
816 1.2 matt return 0;
817 1.2 matt }
818 1.2 matt
819 1.2 matt static struct mbuf *
820 1.2 matt bcmeth_rx_buf_alloc(
821 1.2 matt struct bcmeth_softc *sc)
822 1.2 matt {
823 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
824 1.2 matt if (m == NULL) {
825 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
826 1.2 matt return NULL;
827 1.2 matt }
828 1.2 matt MCLGET(m, M_DONTWAIT);
829 1.2 matt if ((m->m_flags & M_EXT) == 0) {
830 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
831 1.2 matt m_freem(m);
832 1.2 matt return NULL;
833 1.2 matt }
834 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
835 1.2 matt
836 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
837 1.2 matt if (map == NULL) {
838 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
839 1.2 matt m_freem(m);
840 1.2 matt return NULL;
841 1.2 matt }
842 1.2 matt M_SETCTX(m, map);
843 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
844 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
845 1.2 matt BUS_DMA_READ|BUS_DMA_NOWAIT);
846 1.2 matt if (error) {
847 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
848 1.2 matt error);
849 1.2 matt M_SETCTX(m, NULL);
850 1.2 matt m_freem(m);
851 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
852 1.2 matt return NULL;
853 1.2 matt }
854 1.12 matt KASSERT(((map->_dm_flags ^ sc->sc_dmat->_ranges[0].dr_flags) & _BUS_DMAMAP_COHERENT) == 0);
855 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
856 1.16 matt #ifdef BCMETH_RCVMAGIC
857 1.10 matt *mtod(m, uint32_t *) = BCMETH_RCVMAGIC;
858 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
859 1.10 matt BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
860 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t),
861 1.10 matt map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD);
862 1.16 matt #else
863 1.16 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
864 1.16 matt BUS_DMASYNC_PREREAD);
865 1.16 matt #endif
866 1.2 matt
867 1.2 matt return m;
868 1.2 matt }
869 1.2 matt
870 1.2 matt static void
871 1.2 matt bcmeth_rx_map_unload(
872 1.2 matt struct bcmeth_softc *sc,
873 1.2 matt struct mbuf *m)
874 1.2 matt {
875 1.2 matt KASSERT(m);
876 1.2 matt for (; m != NULL; m = m->m_next) {
877 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
878 1.2 matt KASSERT(map);
879 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
880 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
881 1.2 matt BUS_DMASYNC_POSTREAD);
882 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
883 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
884 1.2 matt M_SETCTX(m, NULL);
885 1.2 matt }
886 1.2 matt }
887 1.2 matt
888 1.2 matt static bool
889 1.2 matt bcmeth_rxq_produce(
890 1.2 matt struct bcmeth_softc *sc,
891 1.2 matt struct bcmeth_rxqueue *rxq)
892 1.2 matt {
893 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
894 1.7 matt bool produced = false;
895 1.7 matt
896 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
897 1.2 matt struct mbuf *m;
898 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
899 1.2 matt if (m == NULL) {
900 1.2 matt m = bcmeth_rx_buf_alloc(sc);
901 1.2 matt if (m == NULL) {
902 1.2 matt printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
903 1.2 matt break;
904 1.2 matt }
905 1.2 matt }
906 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
907 1.2 matt KASSERT(map);
908 1.2 matt
909 1.2 matt producer->rxdb_buflen = MCLBYTES;
910 1.2 matt producer->rxdb_addrlo = map->dm_segs[0].ds_addr;
911 1.4 matt producer->rxdb_flags &= RXDB_FLAG_ET;
912 1.2 matt *rxq->rxq_mtail = m;
913 1.2 matt rxq->rxq_mtail = &m->m_next;
914 1.2 matt m->m_len = MCLBYTES;
915 1.2 matt m->m_next = NULL;
916 1.2 matt rxq->rxq_inuse++;
917 1.2 matt if (++producer == rxq->rxq_last) {
918 1.2 matt membar_producer();
919 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
920 1.2 matt rxq->rxq_last - rxq->rxq_producer);
921 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
922 1.2 matt }
923 1.7 matt produced = true;
924 1.2 matt }
925 1.7 matt if (produced) {
926 1.2 matt membar_producer();
927 1.7 matt if (producer != rxq->rxq_producer) {
928 1.7 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
929 1.7 matt producer - rxq->rxq_producer);
930 1.7 matt rxq->rxq_producer = producer;
931 1.7 matt }
932 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
933 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
934 1.7 matt + ((uintptr_t)producer & RCVPTR));
935 1.2 matt }
936 1.2 matt return true;
937 1.2 matt }
938 1.2 matt
939 1.2 matt static void
940 1.2 matt bcmeth_rx_input(
941 1.2 matt struct bcmeth_softc *sc,
942 1.2 matt struct mbuf *m,
943 1.2 matt uint32_t rxdb_flags)
944 1.2 matt {
945 1.2 matt struct ifnet * const ifp = &sc->sc_if;
946 1.2 matt
947 1.2 matt bcmeth_rx_map_unload(sc, m);
948 1.2 matt
949 1.2 matt m_adj(m, BCMETH_RCVOFFSET);
950 1.2 matt
951 1.2 matt switch (__SHIFTOUT(rxdb_flags, RXSTS_PKTTYPE)) {
952 1.2 matt case RXSTS_PKTTYPE_UC:
953 1.2 matt break;
954 1.2 matt case RXSTS_PKTTYPE_MC:
955 1.2 matt m->m_flags |= M_MCAST;
956 1.2 matt break;
957 1.2 matt case RXSTS_PKTTYPE_BC:
958 1.2 matt m->m_flags |= M_BCAST|M_MCAST;
959 1.2 matt break;
960 1.6 matt default:
961 1.6 matt if (sc->sc_cmdcfg & PROMISC_EN)
962 1.6 matt m->m_flags |= M_PROMISC;
963 1.6 matt break;
964 1.2 matt }
965 1.2 matt m->m_pkthdr.rcvif = ifp;
966 1.2 matt
967 1.2 matt ifp->if_ipackets++;
968 1.2 matt ifp->if_ibytes += m->m_pkthdr.len;
969 1.2 matt
970 1.2 matt /*
971 1.2 matt * Let's give it to the network subsystm to deal with.
972 1.2 matt */
973 1.16 matt #ifdef BCMETH_MPSAFE
974 1.16 matt mutex_exit(sc->sc_lock);
975 1.16 matt (*ifp->if_input)(ifp, m);
976 1.16 matt mutex_enter(sc->sc_lock);
977 1.16 matt #else
978 1.2 matt int s = splnet();
979 1.2 matt bpf_mtap(ifp, m);
980 1.2 matt (*ifp->if_input)(ifp, m);
981 1.2 matt splx(s);
982 1.16 matt #endif
983 1.2 matt }
984 1.2 matt
985 1.2 matt static void
986 1.2 matt bcmeth_rxq_consume(
987 1.2 matt struct bcmeth_softc *sc,
988 1.2 matt struct bcmeth_rxqueue *rxq)
989 1.2 matt {
990 1.2 matt struct ifnet * const ifp = &sc->sc_if;
991 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
992 1.2 matt size_t rxconsumed = 0;
993 1.2 matt
994 1.2 matt for (;;) {
995 1.2 matt if (consumer == rxq->rxq_producer) {
996 1.2 matt rxq->rxq_consumer = consumer;
997 1.2 matt rxq->rxq_inuse -= rxconsumed;
998 1.2 matt KASSERT(rxq->rxq_inuse == 0);
999 1.2 matt return;
1000 1.2 matt }
1001 1.2 matt
1002 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1003 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1004 1.2 matt if (consumer == rxq->rxq_first + currdscr) {
1005 1.2 matt rxq->rxq_consumer = consumer;
1006 1.2 matt rxq->rxq_inuse -= rxconsumed;
1007 1.2 matt return;
1008 1.2 matt }
1009 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
1010 1.2 matt
1011 1.2 matt /*
1012 1.2 matt * We own this packet again. Copy the rxsts word from it.
1013 1.2 matt */
1014 1.2 matt rxconsumed++;
1015 1.2 matt uint32_t rxsts;
1016 1.2 matt KASSERT(rxq->rxq_mhead != NULL);
1017 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
1018 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1019 1.2 matt BUS_DMASYNC_POSTREAD);
1020 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
1021 1.10 matt #if 0
1022 1.10 matt KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd",
1023 1.10 matt currdscr, consumer - rxq->rxq_first);
1024 1.10 matt #endif
1025 1.2 matt
1026 1.2 matt /*
1027 1.2 matt * Get the count of descriptors. Fetch the correct number
1028 1.2 matt * of mbufs.
1029 1.2 matt */
1030 1.16 matt #ifdef BCMETH_RCVMAGIC
1031 1.10 matt size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1;
1032 1.16 matt #else
1033 1.16 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
1034 1.16 matt #endif
1035 1.2 matt struct mbuf *m = rxq->rxq_mhead;
1036 1.2 matt struct mbuf *m_last = m;
1037 1.2 matt for (size_t i = 1; i < desc_count; i++) {
1038 1.2 matt if (++consumer == rxq->rxq_last) {
1039 1.2 matt consumer = rxq->rxq_first;
1040 1.2 matt }
1041 1.10 matt KASSERTMSG(consumer != rxq->rxq_first + currdscr,
1042 1.10 matt "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd",
1043 1.10 matt i, rxsts, desc_count, currdscr,
1044 1.10 matt consumer - rxq->rxq_first);
1045 1.2 matt m_last = m_last->m_next;
1046 1.2 matt }
1047 1.2 matt
1048 1.2 matt /*
1049 1.2 matt * Now remove it/them from the list of enqueued mbufs.
1050 1.2 matt */
1051 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1052 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1053 1.2 matt m_last->m_next = NULL;
1054 1.2 matt
1055 1.16 matt #ifdef BCMETH_RCVMAGIC
1056 1.10 matt if (rxsts == BCMETH_RCVMAGIC) {
1057 1.10 matt ifp->if_ierrors++;
1058 1.10 matt if ((m->m_ext.ext_paddr >> 28) == 8) {
1059 1.10 matt sc->sc_ev_rx_badmagic_lo.ev_count++;
1060 1.10 matt } else {
1061 1.10 matt sc->sc_ev_rx_badmagic_hi.ev_count++;
1062 1.10 matt }
1063 1.10 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1064 1.16 matt } else
1065 1.16 matt #endif /* BCMETH_RCVMAGIC */
1066 1.16 matt if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
1067 1.2 matt aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
1068 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
1069 1.2 matt /*
1070 1.2 matt * We encountered an error, take the mbufs and add them
1071 1.2 matt * to the rx bufcache so we can quickly reuse them.
1072 1.2 matt */
1073 1.2 matt ifp->if_ierrors++;
1074 1.2 matt do {
1075 1.2 matt struct mbuf *m0 = m->m_next;
1076 1.2 matt m->m_next = NULL;
1077 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1078 1.2 matt m = m0;
1079 1.2 matt } while (m);
1080 1.2 matt } else {
1081 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1082 1.2 matt framelen += BCMETH_RCVOFFSET;
1083 1.2 matt m->m_pkthdr.len = framelen;
1084 1.2 matt if (desc_count == 1) {
1085 1.2 matt KASSERT(framelen <= MCLBYTES);
1086 1.2 matt m->m_len = framelen;
1087 1.2 matt } else {
1088 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1089 1.2 matt }
1090 1.16 matt
1091 1.16 matt #ifdef BCMETH_MPSAFE
1092 1.16 matt /*
1093 1.16 matt * Wrap at the last entry!
1094 1.16 matt */
1095 1.16 matt if (++consumer == rxq->rxq_last) {
1096 1.16 matt KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1097 1.16 matt rxq->rxq_consumer = rxq->rxq_first;
1098 1.16 matt } else {
1099 1.16 matt rxq->rxq_consumer = consumer;
1100 1.16 matt }
1101 1.16 matt rxq->rxq_inuse -= rxconsumed;
1102 1.16 matt #endif /* BCMETH_MPSAFE */
1103 1.16 matt
1104 1.16 matt /*
1105 1.16 matt * Receive the packet (which releases our lock)
1106 1.16 matt */
1107 1.2 matt bcmeth_rx_input(sc, m, rxsts);
1108 1.16 matt
1109 1.16 matt #ifdef BCMETH_MPSAFE
1110 1.16 matt /*
1111 1.16 matt * Since we had to give up our lock, we need to
1112 1.16 matt * refresh these.
1113 1.16 matt */
1114 1.16 matt consumer = rxq->rxq_consumer;
1115 1.16 matt rxconsumed = 0;
1116 1.16 matt continue;
1117 1.16 matt #endif /* BCMETH_MPSAFE */
1118 1.2 matt }
1119 1.2 matt
1120 1.2 matt /*
1121 1.2 matt * Wrap at the last entry!
1122 1.2 matt */
1123 1.2 matt if (++consumer == rxq->rxq_last) {
1124 1.2 matt KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1125 1.2 matt consumer = rxq->rxq_first;
1126 1.2 matt }
1127 1.2 matt }
1128 1.2 matt }
1129 1.2 matt
1130 1.2 matt static void
1131 1.2 matt bcmeth_rxq_purge(
1132 1.2 matt struct bcmeth_softc *sc,
1133 1.2 matt struct bcmeth_rxqueue *rxq,
1134 1.2 matt bool discard)
1135 1.2 matt {
1136 1.2 matt struct mbuf *m;
1137 1.2 matt
1138 1.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1139 1.2 matt if (discard) {
1140 1.2 matt bcmeth_rx_map_unload(sc, m);
1141 1.2 matt m_freem(m);
1142 1.2 matt } else {
1143 1.2 matt while (m != NULL) {
1144 1.2 matt struct mbuf *m0 = m->m_next;
1145 1.2 matt m->m_next = NULL;
1146 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1147 1.2 matt m = m0;
1148 1.2 matt }
1149 1.2 matt }
1150 1.2 matt
1151 1.2 matt }
1152 1.2 matt
1153 1.2 matt rxq->rxq_mhead = NULL;
1154 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1155 1.2 matt rxq->rxq_inuse = 0;
1156 1.1 matt }
1157 1.1 matt
1158 1.1 matt static void
1159 1.2 matt bcmeth_rxq_reset(
1160 1.2 matt struct bcmeth_softc *sc,
1161 1.2 matt struct bcmeth_rxqueue *rxq)
1162 1.2 matt {
1163 1.2 matt /*
1164 1.3 matt * sync all the descriptors
1165 1.3 matt */
1166 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1167 1.3 matt rxq->rxq_last - rxq->rxq_first);
1168 1.3 matt
1169 1.3 matt /*
1170 1.3 matt * Make sure we own all descriptors in the ring.
1171 1.3 matt */
1172 1.3 matt struct gmac_rxdb *rxdb;
1173 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1174 1.7 matt rxdb->rxdb_flags = RXDB_FLAG_IC;
1175 1.3 matt }
1176 1.3 matt
1177 1.3 matt /*
1178 1.3 matt * Last descriptor has the wrap flag.
1179 1.3 matt */
1180 1.7 matt rxdb->rxdb_flags = RXDB_FLAG_ET|RXDB_FLAG_IC;
1181 1.3 matt
1182 1.3 matt /*
1183 1.2 matt * Reset the producer consumer indexes.
1184 1.2 matt */
1185 1.2 matt rxq->rxq_consumer = rxq->rxq_first;
1186 1.2 matt rxq->rxq_producer = rxq->rxq_first;
1187 1.2 matt rxq->rxq_inuse = 0;
1188 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1189 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1190 1.2 matt
1191 1.2 matt sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1192 1.2 matt
1193 1.2 matt /*
1194 1.2 matt * Restart the receiver at the first descriptor
1195 1.2 matt */
1196 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1197 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1198 1.2 matt }
1199 1.2 matt
1200 1.2 matt static int
1201 1.2 matt bcmeth_rxq_attach(
1202 1.2 matt struct bcmeth_softc *sc,
1203 1.2 matt struct bcmeth_rxqueue *rxq,
1204 1.2 matt u_int qno)
1205 1.2 matt {
1206 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1207 1.2 matt int error;
1208 1.2 matt void *descs;
1209 1.2 matt
1210 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1211 1.2 matt
1212 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1213 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1214 1.2 matt if (error)
1215 1.2 matt return error;
1216 1.2 matt
1217 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1218 1.2 matt rxq->rxq_first = descs;
1219 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1220 1.2 matt rxq->rxq_consumer = descs;
1221 1.2 matt rxq->rxq_producer = descs;
1222 1.2 matt
1223 1.2 matt bcmeth_rxq_purge(sc, rxq, true);
1224 1.2 matt bcmeth_rxq_reset(sc, rxq);
1225 1.2 matt
1226 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1227 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1228 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1229 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1230 1.10 matt rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1;
1231 1.2 matt
1232 1.2 matt return 0;
1233 1.2 matt }
1234 1.2 matt
1235 1.2 matt static bool
1236 1.2 matt bcmeth_txq_active_p(
1237 1.2 matt struct bcmeth_softc * const sc,
1238 1.2 matt struct bcmeth_txqueue *txq)
1239 1.1 matt {
1240 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1241 1.2 matt }
1242 1.2 matt
1243 1.2 matt static bool
1244 1.2 matt bcmeth_txq_fillable_p(
1245 1.2 matt struct bcmeth_softc * const sc,
1246 1.2 matt struct bcmeth_txqueue *txq)
1247 1.2 matt {
1248 1.2 matt return txq->txq_free >= txq->txq_threshold;
1249 1.2 matt }
1250 1.2 matt
1251 1.2 matt static int
1252 1.2 matt bcmeth_txq_attach(
1253 1.2 matt struct bcmeth_softc *sc,
1254 1.2 matt struct bcmeth_txqueue *txq,
1255 1.2 matt u_int qno)
1256 1.2 matt {
1257 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1258 1.2 matt int error;
1259 1.2 matt void *descs;
1260 1.2 matt
1261 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1262 1.2 matt
1263 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1264 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1265 1.2 matt if (error)
1266 1.2 matt return error;
1267 1.2 matt
1268 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1269 1.2 matt txq->txq_first = descs;
1270 1.2 matt txq->txq_last = txq->txq_first + desc_count;
1271 1.2 matt txq->txq_consumer = descs;
1272 1.2 matt txq->txq_producer = descs;
1273 1.2 matt
1274 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1275 1.2 matt
1276 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1277 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1278 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1279 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1280 1.10 matt txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1;
1281 1.2 matt
1282 1.2 matt bcmeth_txq_reset(sc, txq);
1283 1.1 matt
1284 1.2 matt return 0;
1285 1.1 matt }
1286 1.1 matt
1287 1.1 matt static int
1288 1.2 matt bcmeth_txq_map_load(
1289 1.2 matt struct bcmeth_softc *sc,
1290 1.2 matt struct bcmeth_txqueue *txq,
1291 1.2 matt struct mbuf *m)
1292 1.2 matt {
1293 1.2 matt bus_dmamap_t map;
1294 1.2 matt int error;
1295 1.2 matt
1296 1.2 matt map = M_GETCTX(m, bus_dmamap_t);
1297 1.2 matt if (map != NULL)
1298 1.2 matt return 0;
1299 1.2 matt
1300 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1301 1.2 matt if (map == NULL)
1302 1.2 matt return ENOMEM;
1303 1.2 matt
1304 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1305 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1306 1.2 matt if (error)
1307 1.2 matt return error;
1308 1.2 matt
1309 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1310 1.2 matt BUS_DMASYNC_PREWRITE);
1311 1.2 matt M_SETCTX(m, map);
1312 1.2 matt return 0;
1313 1.2 matt }
1314 1.2 matt
1315 1.2 matt static void
1316 1.2 matt bcmeth_txq_map_unload(
1317 1.2 matt struct bcmeth_softc *sc,
1318 1.2 matt struct bcmeth_txqueue *txq,
1319 1.2 matt struct mbuf *m)
1320 1.2 matt {
1321 1.2 matt KASSERT(m);
1322 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1323 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1324 1.2 matt BUS_DMASYNC_POSTWRITE);
1325 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1326 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1327 1.2 matt }
1328 1.2 matt
1329 1.2 matt static bool
1330 1.2 matt bcmeth_txq_produce(
1331 1.2 matt struct bcmeth_softc *sc,
1332 1.2 matt struct bcmeth_txqueue *txq,
1333 1.2 matt struct mbuf *m)
1334 1.2 matt {
1335 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1336 1.2 matt
1337 1.2 matt if (map->dm_nsegs > txq->txq_free)
1338 1.2 matt return false;
1339 1.2 matt
1340 1.2 matt /*
1341 1.2 matt * TCP Offload flag must be set in the first descriptor.
1342 1.2 matt */
1343 1.2 matt struct gmac_txdb *producer = txq->txq_producer;
1344 1.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1345 1.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1346 1.2 matt
1347 1.2 matt /*
1348 1.2 matt * If we've produced enough descriptors without consuming any
1349 1.2 matt * we need to ask for an interrupt to reclaim some.
1350 1.2 matt */
1351 1.2 matt txq->txq_lastintr += map->dm_nsegs;
1352 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1353 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1354 1.2 matt txq->txq_lastintr = 0;
1355 1.2 matt last_flags |= TXDB_FLAG_IC;
1356 1.2 matt }
1357 1.2 matt
1358 1.2 matt KASSERT(producer != txq->txq_last);
1359 1.2 matt
1360 1.2 matt struct gmac_txdb *start = producer;
1361 1.2 matt size_t count = map->dm_nsegs;
1362 1.2 matt producer->txdb_flags |= first_flags;
1363 1.2 matt producer->txdb_addrlo = map->dm_segs[0].ds_addr;
1364 1.2 matt producer->txdb_buflen = map->dm_segs[0].ds_len;
1365 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1366 1.2 matt #if 0
1367 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1368 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1369 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1370 1.2 matt #endif
1371 1.2 matt if (__predict_false(++producer == txq->txq_last)) {
1372 1.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1373 1.2 matt txq->txq_last - start);
1374 1.2 matt count -= txq->txq_last - start;
1375 1.2 matt producer = txq->txq_first;
1376 1.2 matt start = txq->txq_first;
1377 1.2 matt }
1378 1.2 matt producer->txdb_addrlo = map->dm_segs[i].ds_addr;
1379 1.2 matt producer->txdb_buflen = map->dm_segs[i].ds_len;
1380 1.2 matt }
1381 1.2 matt producer->txdb_flags |= last_flags;
1382 1.2 matt #if 0
1383 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1384 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1385 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1386 1.2 matt #endif
1387 1.10 matt if (count)
1388 1.10 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1389 1.2 matt
1390 1.2 matt /*
1391 1.2 matt * Reduce free count by the number of segments we consumed.
1392 1.2 matt */
1393 1.2 matt txq->txq_free -= map->dm_nsegs;
1394 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1395 1.2 matt KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0);
1396 1.2 matt KASSERT(producer->txdb_flags & TXDB_FLAG_EF);
1397 1.2 matt
1398 1.2 matt #if 0
1399 1.2 matt printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1400 1.2 matt __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1401 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1402 1.2 matt #endif
1403 1.2 matt
1404 1.10 matt if (producer + 1 == txq->txq_last)
1405 1.2 matt txq->txq_producer = txq->txq_first;
1406 1.2 matt else
1407 1.10 matt txq->txq_producer = producer + 1;
1408 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1409 1.2 matt
1410 1.2 matt /*
1411 1.2 matt * Let the transmitter know there's more to do
1412 1.2 matt */
1413 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1414 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1415 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1416 1.2 matt
1417 1.2 matt return true;
1418 1.2 matt }
1419 1.2 matt
1420 1.16 matt static struct mbuf *
1421 1.16 matt bcmeth_copy_packet(struct mbuf *m)
1422 1.16 matt {
1423 1.16 matt struct mbuf *mext = NULL;
1424 1.16 matt size_t misalignment = 0;
1425 1.16 matt size_t hlen = 0;
1426 1.16 matt
1427 1.16 matt for (mext = m; mext != NULL; mext = mext->m_next) {
1428 1.16 matt if (mext->m_flags & M_EXT) {
1429 1.16 matt misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1430 1.16 matt break;
1431 1.16 matt }
1432 1.16 matt hlen += m->m_len;
1433 1.16 matt }
1434 1.16 matt
1435 1.16 matt struct mbuf *n = m->m_next;
1436 1.16 matt if (m != mext && hlen + misalignment <= MHLEN && false) {
1437 1.16 matt KASSERT(m->m_pktdat <= m->m_data && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]);
1438 1.16 matt size_t oldoff = m->m_data - m->m_pktdat;
1439 1.16 matt size_t off;
1440 1.16 matt if (mext == NULL) {
1441 1.16 matt off = (oldoff + hlen > MHLEN) ? 0 : oldoff;
1442 1.16 matt } else {
1443 1.16 matt off = MHLEN - (hlen + misalignment);
1444 1.16 matt }
1445 1.16 matt KASSERT(off + hlen + misalignment <= MHLEN);
1446 1.16 matt if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
1447 1.16 matt memmove(&m->m_pktdat[off], m->m_data, m->m_len);
1448 1.16 matt m->m_data = &m->m_pktdat[off];
1449 1.16 matt }
1450 1.16 matt m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]);
1451 1.16 matt m->m_len = hlen;
1452 1.16 matt m->m_next = mext;
1453 1.16 matt while (n != mext) {
1454 1.16 matt n = m_free(n);
1455 1.16 matt }
1456 1.16 matt return m;
1457 1.16 matt }
1458 1.16 matt
1459 1.16 matt struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type);
1460 1.16 matt if (m0 == NULL) {
1461 1.16 matt return NULL;
1462 1.16 matt }
1463 1.16 matt M_COPY_PKTHDR(m0, m);
1464 1.16 matt MCLAIM(m0, m->m_owner);
1465 1.16 matt if (m0->m_pkthdr.len > MHLEN) {
1466 1.16 matt MCLGET(m0, M_DONTWAIT);
1467 1.16 matt if ((m0->m_flags & M_EXT) == 0) {
1468 1.16 matt m_freem(m0);
1469 1.16 matt return NULL;
1470 1.16 matt }
1471 1.16 matt }
1472 1.16 matt m0->m_len = m->m_pkthdr.len;
1473 1.16 matt m_copydata(m, 0, m0->m_len, mtod(m0, void *));
1474 1.16 matt m_freem(m);
1475 1.16 matt return m0;
1476 1.16 matt }
1477 1.16 matt
1478 1.2 matt static bool
1479 1.2 matt bcmeth_txq_enqueue(
1480 1.2 matt struct bcmeth_softc *sc,
1481 1.2 matt struct bcmeth_txqueue *txq)
1482 1.2 matt {
1483 1.2 matt for (;;) {
1484 1.2 matt if (IF_QFULL(&txq->txq_mbufs))
1485 1.2 matt return false;
1486 1.2 matt struct mbuf *m = txq->txq_next;
1487 1.2 matt if (m == NULL) {
1488 1.2 matt int s = splnet();
1489 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1490 1.2 matt splx(s);
1491 1.2 matt if (m == NULL)
1492 1.2 matt return true;
1493 1.2 matt M_SETCTX(m, NULL);
1494 1.2 matt } else {
1495 1.2 matt txq->txq_next = NULL;
1496 1.2 matt }
1497 1.15 matt /*
1498 1.15 matt * If LINK2 is set and this packet uses multiple mbufs,
1499 1.15 matt * consolidate it into a single mbuf.
1500 1.15 matt */
1501 1.15 matt if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) {
1502 1.16 matt struct mbuf *m0 = bcmeth_copy_packet(m);
1503 1.15 matt if (m0 == NULL) {
1504 1.15 matt txq->txq_next = m;
1505 1.15 matt return true;
1506 1.15 matt }
1507 1.15 matt m = m0;
1508 1.15 matt }
1509 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1510 1.2 matt if (error) {
1511 1.2 matt aprint_error_dev(sc->sc_dev,
1512 1.2 matt "discarded packet due to "
1513 1.2 matt "dmamap load failure: %d\n", error);
1514 1.2 matt m_freem(m);
1515 1.2 matt continue;
1516 1.2 matt }
1517 1.2 matt KASSERT(txq->txq_next == NULL);
1518 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1519 1.2 matt txq->txq_next = m;
1520 1.2 matt return false;
1521 1.2 matt }
1522 1.2 matt KASSERT(txq->txq_next == NULL);
1523 1.2 matt }
1524 1.2 matt }
1525 1.2 matt
1526 1.2 matt static bool
1527 1.2 matt bcmeth_txq_consume(
1528 1.2 matt struct bcmeth_softc *sc,
1529 1.2 matt struct bcmeth_txqueue *txq)
1530 1.2 matt {
1531 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1532 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1533 1.2 matt size_t txfree = 0;
1534 1.2 matt
1535 1.2 matt #if 0
1536 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1537 1.2 matt #endif
1538 1.2 matt
1539 1.2 matt for (;;) {
1540 1.2 matt if (consumer == txq->txq_producer) {
1541 1.2 matt txq->txq_consumer = consumer;
1542 1.2 matt txq->txq_free += txfree;
1543 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1544 1.2 matt #if 0
1545 1.5 matt printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1546 1.2 matt __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1547 1.2 matt #endif
1548 1.2 matt KASSERT(txq->txq_lastintr == 0);
1549 1.2 matt KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1550 1.2 matt return true;
1551 1.2 matt }
1552 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1553 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1554 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1555 1.2 matt txq->txq_consumer = consumer;
1556 1.2 matt txq->txq_free += txfree;
1557 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1558 1.2 matt #if 0
1559 1.2 matt printf("%s: freed %zu descriptors\n",
1560 1.2 matt __func__, txfree);
1561 1.2 matt #endif
1562 1.2 matt return bcmeth_txq_fillable_p(sc, txq);
1563 1.2 matt }
1564 1.2 matt
1565 1.2 matt /*
1566 1.2 matt * If this is the last descriptor in the chain, get the
1567 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1568 1.2 matt */
1569 1.2 matt const uint32_t txdb_flags = consumer->txdb_flags;
1570 1.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1571 1.2 matt struct mbuf *m;
1572 1.2 matt
1573 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1574 1.2 matt KASSERT(m);
1575 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1576 1.2 matt #if 0
1577 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1578 1.2 matt __func__, m, m->m_pkthdr.len);
1579 1.2 matt #endif
1580 1.10 matt bpf_mtap(ifp, m);
1581 1.2 matt ifp->if_opackets++;
1582 1.2 matt ifp->if_obytes += m->m_pkthdr.len;
1583 1.2 matt if (m->m_flags & M_MCAST)
1584 1.2 matt ifp->if_omcasts++;
1585 1.2 matt m_freem(m);
1586 1.2 matt }
1587 1.2 matt
1588 1.2 matt /*
1589 1.2 matt * We own this packet again. Clear all flags except wrap.
1590 1.2 matt */
1591 1.2 matt txfree++;
1592 1.2 matt
1593 1.2 matt /*
1594 1.2 matt * Wrap at the last entry!
1595 1.2 matt */
1596 1.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1597 1.2 matt consumer->txdb_flags = TXDB_FLAG_ET;
1598 1.2 matt KASSERT(consumer + 1 == txq->txq_last);
1599 1.2 matt consumer = txq->txq_first;
1600 1.2 matt } else {
1601 1.2 matt consumer->txdb_flags = 0;
1602 1.2 matt consumer++;
1603 1.2 matt KASSERT(consumer < txq->txq_last);
1604 1.2 matt }
1605 1.2 matt }
1606 1.2 matt }
1607 1.2 matt
1608 1.2 matt static void
1609 1.2 matt bcmeth_txq_purge(
1610 1.2 matt struct bcmeth_softc *sc,
1611 1.2 matt struct bcmeth_txqueue *txq)
1612 1.2 matt {
1613 1.2 matt struct mbuf *m;
1614 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1615 1.2 matt
1616 1.2 matt for (;;) {
1617 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1618 1.2 matt if (m == NULL)
1619 1.2 matt break;
1620 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1621 1.2 matt m_freem(m);
1622 1.2 matt }
1623 1.2 matt if ((m = txq->txq_next) != NULL) {
1624 1.2 matt txq->txq_next = NULL;
1625 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1626 1.2 matt m_freem(m);
1627 1.2 matt }
1628 1.2 matt }
1629 1.2 matt
1630 1.2 matt static void
1631 1.2 matt bcmeth_txq_reset(
1632 1.2 matt struct bcmeth_softc *sc,
1633 1.2 matt struct bcmeth_txqueue *txq)
1634 1.2 matt {
1635 1.2 matt /*
1636 1.2 matt * sync all the descriptors
1637 1.2 matt */
1638 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1639 1.2 matt txq->txq_last - txq->txq_first);
1640 1.2 matt
1641 1.2 matt /*
1642 1.2 matt * Make sure we own all descriptors in the ring.
1643 1.2 matt */
1644 1.2 matt struct gmac_txdb *txdb;
1645 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1646 1.2 matt txdb->txdb_flags = 0;
1647 1.2 matt }
1648 1.2 matt
1649 1.2 matt /*
1650 1.2 matt * Last descriptor has the wrap flag.
1651 1.2 matt */
1652 1.2 matt txdb->txdb_flags = TXDB_FLAG_ET;
1653 1.2 matt
1654 1.2 matt /*
1655 1.2 matt * Reset the producer consumer indexes.
1656 1.2 matt */
1657 1.2 matt txq->txq_consumer = txq->txq_first;
1658 1.2 matt txq->txq_producer = txq->txq_first;
1659 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1660 1.2 matt txq->txq_threshold = txq->txq_free / 2;
1661 1.2 matt txq->txq_lastintr = 0;
1662 1.2 matt
1663 1.2 matt /*
1664 1.2 matt * What do we want to get interrupted on?
1665 1.2 matt */
1666 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1667 1.2 matt
1668 1.2 matt /*
1669 1.2 matt * Restart the transmiter at the first descriptor
1670 1.2 matt */
1671 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1672 1.2 matt txq->txq_descmap->dm_segs->ds_addr);
1673 1.2 matt }
1674 1.2 matt
1675 1.2 matt static void
1676 1.2 matt bcmeth_ifstart(struct ifnet *ifp)
1677 1.2 matt {
1678 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1679 1.2 matt
1680 1.16 matt if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) {
1681 1.16 matt return;
1682 1.16 matt }
1683 1.16 matt
1684 1.16 matt #ifdef BCMETH_MPSAFETX
1685 1.16 matt if (cpu_intr_p()) {
1686 1.16 matt #endif
1687 1.16 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1688 1.16 matt softint_schedule(sc->sc_soft_ih);
1689 1.16 matt #ifdef BCMETH_MPSAFETX
1690 1.16 matt } else {
1691 1.16 matt /*
1692 1.16 matt * Either we are in a softintr thread already or some other
1693 1.16 matt * thread so just borrow it to do the send and save ourselves
1694 1.16 matt * the overhead of a fast soft int.
1695 1.16 matt */
1696 1.16 matt bcmeth_soft_txintr(sc);
1697 1.16 matt }
1698 1.16 matt #endif
1699 1.2 matt }
1700 1.2 matt
1701 1.2 matt int
1702 1.1 matt bcmeth_intr(void *arg)
1703 1.1 matt {
1704 1.1 matt struct bcmeth_softc * const sc = arg;
1705 1.2 matt uint32_t soft_flags = 0;
1706 1.8 matt uint32_t work_flags = 0;
1707 1.1 matt int rv = 0;
1708 1.1 matt
1709 1.1 matt mutex_enter(sc->sc_hwlock);
1710 1.1 matt
1711 1.15 matt uint32_t intmask = sc->sc_intmask;
1712 1.2 matt sc->sc_ev_intr.ev_count++;
1713 1.2 matt
1714 1.2 matt for (;;) {
1715 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1716 1.15 matt intstatus &= intmask;
1717 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1718 1.2 matt if (intstatus == 0) {
1719 1.2 matt break;
1720 1.2 matt }
1721 1.2 matt #if 0
1722 1.8 matt aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1723 1.8 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1724 1.2 matt #endif
1725 1.2 matt if (intstatus & RCVINT) {
1726 1.8 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1727 1.15 matt intmask &= ~RCVINT;
1728 1.8 matt
1729 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1730 1.8 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1731 1.8 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1732 1.8 matt /*
1733 1.8 matt * We wrapped at the end so count how far
1734 1.8 matt * we are from the end.
1735 1.8 matt */
1736 1.8 matt descs += rxq->rxq_last - rxq->rxq_consumer;
1737 1.8 matt } else {
1738 1.8 matt descs -= rxq->rxq_consumer - rxq->rxq_first;
1739 1.8 matt }
1740 1.8 matt /*
1741 1.8 matt * If we "timedout" we can't be hogging so use
1742 1.8 matt * softints. If we exceeded then we might hogging
1743 1.8 matt * so let the workqueue deal with them.
1744 1.8 matt */
1745 1.8 matt const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT);
1746 1.9 matt if (descs < framecount
1747 1.9 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1748 1.8 matt soft_flags |= SOFT_RXINTR;
1749 1.8 matt } else {
1750 1.8 matt work_flags |= WORK_RXINTR;
1751 1.8 matt }
1752 1.2 matt }
1753 1.2 matt
1754 1.2 matt if (intstatus & XMTINT_0) {
1755 1.15 matt intmask &= ~XMTINT_0;
1756 1.2 matt soft_flags |= SOFT_TXINTR;
1757 1.2 matt }
1758 1.2 matt
1759 1.2 matt if (intstatus & RCVDESCUF) {
1760 1.15 matt intmask &= ~RCVDESCUF;
1761 1.8 matt work_flags |= WORK_RXUNDERFLOW;
1762 1.2 matt }
1763 1.2 matt
1764 1.15 matt intstatus &= intmask;
1765 1.2 matt if (intstatus) {
1766 1.10 matt aprint_error_dev(sc->sc_dev,
1767 1.10 matt "intr: intstatus=%#x\n", intstatus);
1768 1.10 matt aprint_error_dev(sc->sc_dev,
1769 1.10 matt "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n",
1770 1.10 matt sc->sc_rxq.rxq_first,
1771 1.10 matt sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr,
1772 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr),
1773 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0),
1774 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1));
1775 1.10 matt aprint_error_dev(sc->sc_dev,
1776 1.10 matt "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n",
1777 1.10 matt sc->sc_txq.txq_first,
1778 1.10 matt sc->sc_txq.txq_descmap->dm_segs[0].ds_addr,
1779 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr),
1780 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0),
1781 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1));
1782 1.15 matt intmask &= ~intstatus;
1783 1.8 matt work_flags |= WORK_REINIT;
1784 1.2 matt break;
1785 1.2 matt }
1786 1.2 matt }
1787 1.2 matt
1788 1.15 matt if (intmask != sc->sc_intmask) {
1789 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1790 1.8 matt }
1791 1.8 matt
1792 1.8 matt if (work_flags) {
1793 1.8 matt if (sc->sc_work_flags == 0) {
1794 1.8 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1795 1.8 matt }
1796 1.8 matt atomic_or_32(&sc->sc_work_flags, work_flags);
1797 1.8 matt rv = 1;
1798 1.8 matt }
1799 1.8 matt
1800 1.2 matt if (soft_flags) {
1801 1.8 matt if (sc->sc_soft_flags == 0) {
1802 1.8 matt softint_schedule(sc->sc_soft_ih);
1803 1.8 matt }
1804 1.8 matt atomic_or_32(&sc->sc_soft_flags, soft_flags);
1805 1.2 matt rv = 1;
1806 1.2 matt }
1807 1.1 matt
1808 1.1 matt mutex_exit(sc->sc_hwlock);
1809 1.1 matt
1810 1.1 matt return rv;
1811 1.1 matt }
1812 1.2 matt
1813 1.16 matt #ifdef BCMETH_MPSAFETX
1814 1.16 matt void
1815 1.16 matt bcmeth_soft_txintr(struct bcmeth_softc *sc)
1816 1.16 matt {
1817 1.16 matt mutex_enter(sc->sc_lock);
1818 1.16 matt /*
1819 1.16 matt * Let's do what we came here for. Consume transmitted
1820 1.16 matt * packets off the the transmit ring.
1821 1.16 matt */
1822 1.16 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1823 1.16 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1824 1.16 matt sc->sc_ev_tx_stall.ev_count++;
1825 1.16 matt sc->sc_if.if_flags |= IFF_OACTIVE;
1826 1.16 matt } else {
1827 1.16 matt sc->sc_if.if_flags &= ~IFF_OACTIVE;
1828 1.16 matt }
1829 1.16 matt if (sc->sc_if.if_flags & IFF_RUNNING) {
1830 1.16 matt mutex_spin_enter(sc->sc_hwlock);
1831 1.16 matt sc->sc_intmask |= XMTINT_0;
1832 1.16 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1833 1.16 matt mutex_spin_exit(sc->sc_hwlock);
1834 1.16 matt }
1835 1.16 matt mutex_exit(sc->sc_lock);
1836 1.16 matt }
1837 1.16 matt #endif /* BCMETH_MPSAFETX */
1838 1.16 matt
1839 1.2 matt void
1840 1.2 matt bcmeth_soft_intr(void *arg)
1841 1.2 matt {
1842 1.2 matt struct bcmeth_softc * const sc = arg;
1843 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1844 1.15 matt uint32_t intmask = 0;
1845 1.2 matt
1846 1.2 matt mutex_enter(sc->sc_lock);
1847 1.2 matt
1848 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1849 1.2 matt
1850 1.2 matt sc->sc_ev_soft_intr.ev_count++;
1851 1.2 matt
1852 1.8 matt if ((soft_flags & SOFT_TXINTR)
1853 1.8 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1854 1.8 matt /*
1855 1.8 matt * Let's do what we came here for. Consume transmitted
1856 1.8 matt * packets off the the transmit ring.
1857 1.8 matt */
1858 1.8 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1859 1.8 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1860 1.8 matt sc->sc_ev_tx_stall.ev_count++;
1861 1.8 matt ifp->if_flags |= IFF_OACTIVE;
1862 1.8 matt } else {
1863 1.8 matt ifp->if_flags &= ~IFF_OACTIVE;
1864 1.8 matt }
1865 1.15 matt intmask |= XMTINT_0;
1866 1.8 matt }
1867 1.8 matt
1868 1.8 matt if (soft_flags & SOFT_RXINTR) {
1869 1.8 matt /*
1870 1.8 matt * Let's consume
1871 1.8 matt */
1872 1.8 matt bcmeth_rxq_consume(sc, &sc->sc_rxq);
1873 1.15 matt intmask |= RCVINT;
1874 1.8 matt }
1875 1.8 matt
1876 1.8 matt if (ifp->if_flags & IFF_RUNNING) {
1877 1.8 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1878 1.14 matt mutex_spin_enter(sc->sc_hwlock);
1879 1.15 matt sc->sc_intmask |= intmask;
1880 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1881 1.14 matt mutex_spin_exit(sc->sc_hwlock);
1882 1.8 matt }
1883 1.8 matt
1884 1.8 matt mutex_exit(sc->sc_lock);
1885 1.8 matt }
1886 1.8 matt
1887 1.8 matt void
1888 1.8 matt bcmeth_worker(struct work *wk, void *arg)
1889 1.8 matt {
1890 1.8 matt struct bcmeth_softc * const sc = arg;
1891 1.8 matt struct ifnet * const ifp = &sc->sc_if;
1892 1.15 matt uint32_t intmask = 0;
1893 1.8 matt
1894 1.8 matt mutex_enter(sc->sc_lock);
1895 1.8 matt
1896 1.8 matt sc->sc_ev_work.ev_count++;
1897 1.8 matt
1898 1.8 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1899 1.8 matt if (work_flags & WORK_REINIT) {
1900 1.2 matt int s = splnet();
1901 1.8 matt sc->sc_soft_flags = 0;
1902 1.2 matt bcmeth_ifinit(ifp);
1903 1.2 matt splx(s);
1904 1.8 matt work_flags &= ~WORK_RXUNDERFLOW;
1905 1.2 matt }
1906 1.2 matt
1907 1.8 matt if (work_flags & WORK_RXUNDERFLOW) {
1908 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1909 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
1910 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
1911 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
1912 1.2 matt } else {
1913 1.15 matt intmask |= RCVDESCUF;
1914 1.2 matt }
1915 1.2 matt aprint_normal_dev(sc->sc_dev,
1916 1.2 matt "increasing receive buffers from %zu to %zu\n",
1917 1.2 matt rxq->rxq_threshold, threshold);
1918 1.2 matt rxq->rxq_threshold = threshold;
1919 1.2 matt }
1920 1.2 matt
1921 1.8 matt if (work_flags & WORK_RXINTR) {
1922 1.2 matt /*
1923 1.2 matt * Let's consume
1924 1.2 matt */
1925 1.2 matt bcmeth_rxq_consume(sc, &sc->sc_rxq);
1926 1.15 matt intmask |= RCVINT;
1927 1.2 matt }
1928 1.2 matt
1929 1.2 matt if (ifp->if_flags & IFF_RUNNING) {
1930 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1931 1.16 matt #if 0
1932 1.16 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1933 1.16 matt if (intstatus & RCVINT) {
1934 1.16 matt bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT);
1935 1.16 matt work_flags |= WORK_RXINTR;
1936 1.16 matt continue;
1937 1.16 matt }
1938 1.16 matt #endif
1939 1.14 matt mutex_spin_enter(sc->sc_hwlock);
1940 1.15 matt sc->sc_intmask |= intmask;
1941 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1942 1.14 matt mutex_spin_exit(sc->sc_hwlock);
1943 1.2 matt }
1944 1.2 matt
1945 1.2 matt mutex_exit(sc->sc_lock);
1946 1.2 matt }
1947