bcm53xx_eth.c revision 1.25.2.2 1 1.25.2.2 matt /*-
2 1.25.2.2 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.25.2.2 matt * All rights reserved.
4 1.25.2.2 matt *
5 1.25.2.2 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.25.2.2 matt * by Matt Thomas of 3am Software Foundry.
7 1.25.2.2 matt *
8 1.25.2.2 matt * Redistribution and use in source and binary forms, with or without
9 1.25.2.2 matt * modification, are permitted provided that the following conditions
10 1.25.2.2 matt * are met:
11 1.25.2.2 matt * 1. Redistributions of source code must retain the above copyright
12 1.25.2.2 matt * notice, this list of conditions and the following disclaimer.
13 1.25.2.2 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.25.2.2 matt * notice, this list of conditions and the following disclaimer in the
15 1.25.2.2 matt * documentation and/or other materials provided with the distribution.
16 1.25.2.2 matt *
17 1.25.2.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.25.2.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.25.2.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.25.2.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.25.2.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.25.2.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.25.2.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.25.2.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.25.2.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.25.2.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.25.2.2 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.25.2.2 matt */
29 1.25.2.2 matt
30 1.25.2.2 matt #define _ARM32_BUS_DMA_PRIVATE
31 1.25.2.2 matt #define GMAC_PRIVATE
32 1.25.2.2 matt
33 1.25.2.2 matt #include "locators.h"
34 1.25.2.2 matt #include "opt_broadcom.h"
35 1.25.2.2 matt
36 1.25.2.2 matt #include <sys/cdefs.h>
37 1.25.2.2 matt
38 1.25.2.2 matt __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.25.2.2 2014/02/15 16:18:36 matt Exp $");
39 1.25.2.2 matt
40 1.25.2.2 matt #include <sys/param.h>
41 1.25.2.2 matt #include <sys/atomic.h>
42 1.25.2.2 matt #include <sys/bus.h>
43 1.25.2.2 matt #include <sys/device.h>
44 1.25.2.2 matt #include <sys/ioctl.h>
45 1.25.2.2 matt #include <sys/intr.h>
46 1.25.2.2 matt //#include <sys/kmem.h>
47 1.25.2.2 matt #include <sys/malloc.h>
48 1.25.2.2 matt #include <sys/mutex.h>
49 1.25.2.2 matt #include <sys/socket.h>
50 1.25.2.2 matt #include <sys/systm.h>
51 1.25.2.2 matt #include <sys/workqueue.h>
52 1.25.2.2 matt
53 1.25.2.2 matt #include <net/if.h>
54 1.25.2.2 matt #include <net/if_ether.h>
55 1.25.2.2 matt #include <net/if_media.h>
56 1.25.2.2 matt
57 1.25.2.2 matt #include <net/if_dl.h>
58 1.25.2.2 matt
59 1.25.2.2 matt #include <net/bpf.h>
60 1.25.2.2 matt
61 1.25.2.2 matt #include <dev/mii/miivar.h>
62 1.25.2.2 matt
63 1.25.2.2 matt #include <arm/broadcom/bcm53xx_reg.h>
64 1.25.2.2 matt #include <arm/broadcom/bcm53xx_var.h>
65 1.25.2.2 matt
66 1.25.2.2 matt //#define BCMETH_MPSAFE
67 1.25.2.2 matt
68 1.25.2.2 matt #ifdef BCMETH_COUNTERS
69 1.25.2.2 matt #define BCMETH_EVCNT_ADD(a,b) ((void)((a).ev_count += (b)))
70 1.25.2.2 matt #else
71 1.25.2.2 matt #define BCMETH_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0)
72 1.25.2.2 matt #endif
73 1.25.2.2 matt #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1)
74 1.25.2.2 matt
75 1.25.2.2 matt #define BCMETH_MAXTXMBUFS 128
76 1.25.2.2 matt #define BCMETH_NTXSEGS 30
77 1.25.2.2 matt #define BCMETH_MAXRXMBUFS 255
78 1.25.2.2 matt #define BCMETH_MINRXMBUFS 64
79 1.25.2.2 matt #define BCMETH_NRXSEGS 1
80 1.25.2.2 matt #define BCMETH_RINGSIZE PAGE_SIZE
81 1.25.2.2 matt
82 1.25.2.2 matt #if 1
83 1.25.2.2 matt #define BCMETH_RCVMAGIC 0xfeedface
84 1.25.2.2 matt #endif
85 1.25.2.2 matt
86 1.25.2.2 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
87 1.25.2.2 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
88 1.25.2.2 matt
89 1.25.2.2 matt struct bcmeth_txqueue {
90 1.25.2.2 matt bus_dmamap_t txq_descmap;
91 1.25.2.2 matt struct gmac_txdb *txq_consumer;
92 1.25.2.2 matt struct gmac_txdb *txq_producer;
93 1.25.2.2 matt struct gmac_txdb *txq_first;
94 1.25.2.2 matt struct gmac_txdb *txq_last;
95 1.25.2.2 matt struct ifqueue txq_mbufs;
96 1.25.2.2 matt struct mbuf *txq_next;
97 1.25.2.2 matt size_t txq_free;
98 1.25.2.2 matt size_t txq_threshold;
99 1.25.2.2 matt size_t txq_lastintr;
100 1.25.2.2 matt bus_size_t txq_reg_xmtaddrlo;
101 1.25.2.2 matt bus_size_t txq_reg_xmtptr;
102 1.25.2.2 matt bus_size_t txq_reg_xmtctl;
103 1.25.2.2 matt bus_size_t txq_reg_xmtsts0;
104 1.25.2.2 matt bus_size_t txq_reg_xmtsts1;
105 1.25.2.2 matt bus_dma_segment_t txq_descmap_seg;
106 1.25.2.2 matt };
107 1.25.2.2 matt
108 1.25.2.2 matt struct bcmeth_rxqueue {
109 1.25.2.2 matt bus_dmamap_t rxq_descmap;
110 1.25.2.2 matt struct gmac_rxdb *rxq_consumer;
111 1.25.2.2 matt struct gmac_rxdb *rxq_producer;
112 1.25.2.2 matt struct gmac_rxdb *rxq_first;
113 1.25.2.2 matt struct gmac_rxdb *rxq_last;
114 1.25.2.2 matt struct mbuf *rxq_mhead;
115 1.25.2.2 matt struct mbuf **rxq_mtail;
116 1.25.2.2 matt struct mbuf *rxq_mconsumer;
117 1.25.2.2 matt size_t rxq_inuse;
118 1.25.2.2 matt size_t rxq_threshold;
119 1.25.2.2 matt bus_size_t rxq_reg_rcvaddrlo;
120 1.25.2.2 matt bus_size_t rxq_reg_rcvptr;
121 1.25.2.2 matt bus_size_t rxq_reg_rcvctl;
122 1.25.2.2 matt bus_size_t rxq_reg_rcvsts0;
123 1.25.2.2 matt bus_size_t rxq_reg_rcvsts1;
124 1.25.2.2 matt bus_dma_segment_t rxq_descmap_seg;
125 1.25.2.2 matt };
126 1.25.2.2 matt
127 1.25.2.2 matt struct bcmeth_mapcache {
128 1.25.2.2 matt u_int dmc_nmaps;
129 1.25.2.2 matt u_int dmc_maxseg;
130 1.25.2.2 matt u_int dmc_maxmaps;
131 1.25.2.2 matt u_int dmc_maxmapsize;
132 1.25.2.2 matt bus_dmamap_t dmc_maps[0];
133 1.25.2.2 matt };
134 1.25.2.2 matt
135 1.25.2.2 matt struct bcmeth_softc {
136 1.25.2.2 matt device_t sc_dev;
137 1.25.2.2 matt bus_space_tag_t sc_bst;
138 1.25.2.2 matt bus_space_handle_t sc_bsh;
139 1.25.2.2 matt bus_dma_tag_t sc_dmat;
140 1.25.2.2 matt kmutex_t *sc_lock;
141 1.25.2.2 matt kmutex_t *sc_hwlock;
142 1.25.2.2 matt struct ethercom sc_ec;
143 1.25.2.2 matt #define sc_if sc_ec.ec_if
144 1.25.2.2 matt struct ifmedia sc_media;
145 1.25.2.2 matt void *sc_soft_ih;
146 1.25.2.2 matt void *sc_ih;
147 1.25.2.2 matt
148 1.25.2.2 matt struct bcmeth_rxqueue sc_rxq;
149 1.25.2.2 matt struct bcmeth_txqueue sc_txq;
150 1.25.2.2 matt
151 1.25.2.2 matt size_t sc_rcvoffset;
152 1.25.2.2 matt uint32_t sc_macaddr[2];
153 1.25.2.2 matt uint32_t sc_maxfrm;
154 1.25.2.2 matt uint32_t sc_cmdcfg;
155 1.25.2.2 matt uint32_t sc_intmask;
156 1.25.2.2 matt uint32_t sc_rcvlazy;
157 1.25.2.2 matt volatile uint32_t sc_soft_flags;
158 1.25.2.2 matt #define SOFT_RXINTR 0x01
159 1.25.2.2 matt #define SOFT_TXINTR 0x02
160 1.25.2.2 matt
161 1.25.2.2 matt #ifdef BCMETH_COUNTERS
162 1.25.2.2 matt struct evcnt sc_ev_intr;
163 1.25.2.2 matt struct evcnt sc_ev_soft_intr;
164 1.25.2.2 matt struct evcnt sc_ev_work;
165 1.25.2.2 matt struct evcnt sc_ev_tx_stall;
166 1.25.2.2 matt struct evcnt sc_ev_rx_badmagic_lo;
167 1.25.2.2 matt struct evcnt sc_ev_rx_badmagic_hi;
168 1.25.2.2 matt #endif
169 1.25.2.2 matt
170 1.25.2.2 matt struct ifqueue sc_rx_bufcache;
171 1.25.2.2 matt struct bcmeth_mapcache *sc_rx_mapcache;
172 1.25.2.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
173 1.25.2.2 matt
174 1.25.2.2 matt struct workqueue *sc_workq;
175 1.25.2.2 matt struct work sc_work;
176 1.25.2.2 matt
177 1.25.2.2 matt volatile uint32_t sc_work_flags;
178 1.25.2.2 matt #define WORK_RXINTR 0x01
179 1.25.2.2 matt #define WORK_RXUNDERFLOW 0x02
180 1.25.2.2 matt #define WORK_REINIT 0x04
181 1.25.2.2 matt
182 1.25.2.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
183 1.25.2.2 matt };
184 1.25.2.2 matt
185 1.25.2.2 matt static void bcmeth_ifstart(struct ifnet *);
186 1.25.2.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
187 1.25.2.2 matt static int bcmeth_ifinit(struct ifnet *);
188 1.25.2.2 matt static void bcmeth_ifstop(struct ifnet *, int);
189 1.25.2.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
190 1.25.2.2 matt
191 1.25.2.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
192 1.25.2.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
193 1.25.2.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
194 1.25.2.2 matt struct bcmeth_mapcache *);
195 1.25.2.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
196 1.25.2.2 matt struct bcmeth_mapcache *);
197 1.25.2.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
198 1.25.2.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
199 1.25.2.2 matt
200 1.25.2.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
201 1.25.2.2 matt struct bcmeth_txqueue *, u_int);
202 1.25.2.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
203 1.25.2.2 matt struct bcmeth_txqueue *);
204 1.25.2.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
205 1.25.2.2 matt struct bcmeth_txqueue *);
206 1.25.2.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
207 1.25.2.2 matt struct bcmeth_txqueue *);
208 1.25.2.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
209 1.25.2.2 matt struct bcmeth_txqueue *, struct mbuf *m);
210 1.25.2.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
211 1.25.2.2 matt struct bcmeth_txqueue *);
212 1.25.2.2 matt
213 1.25.2.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
214 1.25.2.2 matt struct bcmeth_rxqueue *, u_int);
215 1.25.2.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
216 1.25.2.2 matt struct bcmeth_rxqueue *);
217 1.25.2.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
218 1.25.2.2 matt struct bcmeth_rxqueue *, bool);
219 1.25.2.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
220 1.25.2.2 matt struct bcmeth_rxqueue *);
221 1.25.2.2 matt
222 1.25.2.2 matt static int bcmeth_intr(void *);
223 1.25.2.2 matt #ifdef BCMETH_MPSAFETX
224 1.25.2.2 matt static void bcmeth_soft_txintr(struct bcmeth_softc *);
225 1.25.2.2 matt #endif
226 1.25.2.2 matt static void bcmeth_soft_intr(void *);
227 1.25.2.2 matt static void bcmeth_worker(struct work *, void *);
228 1.25.2.2 matt
229 1.25.2.2 matt static int bcmeth_mediachange(struct ifnet *);
230 1.25.2.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
231 1.25.2.2 matt
232 1.25.2.2 matt static inline uint32_t
233 1.25.2.2 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
234 1.25.2.2 matt {
235 1.25.2.2 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
236 1.25.2.2 matt }
237 1.25.2.2 matt
238 1.25.2.2 matt static inline void
239 1.25.2.2 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
240 1.25.2.2 matt {
241 1.25.2.2 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
242 1.25.2.2 matt }
243 1.25.2.2 matt
244 1.25.2.2 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
245 1.25.2.2 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
246 1.25.2.2 matt
247 1.25.2.2 matt static int
248 1.25.2.2 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
249 1.25.2.2 matt {
250 1.25.2.2 matt struct bcmccb_attach_args * const ccbaa = aux;
251 1.25.2.2 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
252 1.25.2.2 matt
253 1.25.2.2 matt if (strcmp(cf->cf_name, loc->loc_name))
254 1.25.2.2 matt return 0;
255 1.25.2.2 matt
256 1.25.2.2 matt #ifdef DIAGNOSTIC
257 1.25.2.2 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
258 1.25.2.2 matt #endif
259 1.25.2.2 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
260 1.25.2.2 matt
261 1.25.2.2 matt return 1;
262 1.25.2.2 matt }
263 1.25.2.2 matt
264 1.25.2.2 matt static void
265 1.25.2.2 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
266 1.25.2.2 matt {
267 1.25.2.2 matt struct bcmeth_softc * const sc = device_private(self);
268 1.25.2.2 matt struct ethercom * const ec = &sc->sc_ec;
269 1.25.2.2 matt struct ifnet * const ifp = &ec->ec_if;
270 1.25.2.2 matt struct bcmccb_attach_args * const ccbaa = aux;
271 1.25.2.2 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
272 1.25.2.2 matt const char * const xname = device_xname(self);
273 1.25.2.2 matt prop_dictionary_t dict = device_properties(self);
274 1.25.2.2 matt int error;
275 1.25.2.2 matt
276 1.25.2.2 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
277 1.25.2.2 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
278 1.25.2.2 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
279 1.25.2.2 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
280 1.25.2.2 matt
281 1.25.2.2 matt /*
282 1.25.2.2 matt * We need to use the coherent dma tag for the GMAC.
283 1.25.2.2 matt */
284 1.25.2.2 matt sc->sc_dmat = &bcm53xx_coherent_dma_tag;
285 1.25.2.2 matt #if _ARM32_NEED_BUS_DMA_BOUNCE
286 1.25.2.2 matt if (device_cfdata(self)->cf_flags & 2) {
287 1.25.2.2 matt sc->sc_dmat = &bcm53xx_bounce_dma_tag;
288 1.25.2.2 matt }
289 1.25.2.2 matt #endif
290 1.25.2.2 matt
291 1.25.2.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
292 1.25.2.2 matt if (eaprop == NULL) {
293 1.25.2.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
294 1.25.2.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
295 1.25.2.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
296 1.25.2.2 matt aprint_error(": mac-address property is missing\n");
297 1.25.2.2 matt return;
298 1.25.2.2 matt }
299 1.25.2.2 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
300 1.25.2.2 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
301 1.25.2.2 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
302 1.25.2.2 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
303 1.25.2.2 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
304 1.25.2.2 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
305 1.25.2.2 matt } else {
306 1.25.2.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
307 1.25.2.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
308 1.25.2.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
309 1.25.2.2 matt ETHER_ADDR_LEN);
310 1.25.2.2 matt }
311 1.25.2.2 matt sc->sc_dev = self;
312 1.25.2.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
313 1.25.2.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
314 1.25.2.2 matt
315 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
316 1.25.2.2 matt
317 1.25.2.2 matt aprint_naive("\n");
318 1.25.2.2 matt aprint_normal(": Gigabit Ethernet Controller\n");
319 1.25.2.2 matt
320 1.25.2.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
321 1.25.2.2 matt if (error) {
322 1.25.2.2 matt aprint_error(": failed to init rxq: %d\n", error);
323 1.25.2.2 matt return;
324 1.25.2.2 matt }
325 1.25.2.2 matt
326 1.25.2.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
327 1.25.2.2 matt if (error) {
328 1.25.2.2 matt aprint_error(": failed to init txq: %d\n", error);
329 1.25.2.2 matt return;
330 1.25.2.2 matt }
331 1.25.2.2 matt
332 1.25.2.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
333 1.25.2.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
334 1.25.2.2 matt if (error) {
335 1.25.2.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
336 1.25.2.2 matt return;
337 1.25.2.2 matt }
338 1.25.2.2 matt
339 1.25.2.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
340 1.25.2.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
341 1.25.2.2 matt if (error) {
342 1.25.2.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
343 1.25.2.2 matt return;
344 1.25.2.2 matt }
345 1.25.2.2 matt
346 1.25.2.2 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
347 1.25.2.2 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
348 1.25.2.2 matt if (error) {
349 1.25.2.2 matt aprint_error(": failed to create workqueue: %d\n", error);
350 1.25.2.2 matt return;
351 1.25.2.2 matt }
352 1.25.2.2 matt
353 1.25.2.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
354 1.25.2.2 matt bcmeth_soft_intr, sc);
355 1.25.2.2 matt
356 1.25.2.2 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
357 1.25.2.2 matt bcmeth_intr, sc);
358 1.25.2.2 matt
359 1.25.2.2 matt if (sc->sc_ih == NULL) {
360 1.25.2.2 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
361 1.25.2.2 matt loc->loc_intrs[0]);
362 1.25.2.2 matt } else {
363 1.25.2.2 matt aprint_normal_dev(self, "interrupting on irq %d\n",
364 1.25.2.2 matt loc->loc_intrs[0]);
365 1.25.2.2 matt }
366 1.25.2.2 matt
367 1.25.2.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
368 1.25.2.2 matt ether_sprintf(sc->sc_enaddr));
369 1.25.2.2 matt
370 1.25.2.2 matt /*
371 1.25.2.2 matt * Since each port in plugged into the switch/flow-accelerator,
372 1.25.2.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
373 1.25.2.2 matt */
374 1.25.2.2 matt int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
375 1.25.2.2 matt //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
376 1.25.2.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
377 1.25.2.2 matt bcmeth_mediastatus);
378 1.25.2.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
379 1.25.2.2 matt ifmedia_set(&sc->sc_media, ifmedia);
380 1.25.2.2 matt
381 1.25.2.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
382 1.25.2.2 matt
383 1.25.2.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
384 1.25.2.2 matt ifp->if_softc = sc;
385 1.25.2.2 matt ifp->if_baudrate = IF_Mbps(1000);
386 1.25.2.2 matt ifp->if_capabilities = 0;
387 1.25.2.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
388 1.25.2.2 matt #ifdef BCMETH_MPSAFE
389 1.25.2.2 matt ifp->if_flags2 = IFF2_MPSAFE;
390 1.25.2.2 matt #endif
391 1.25.2.2 matt ifp->if_ioctl = bcmeth_ifioctl;
392 1.25.2.2 matt ifp->if_start = bcmeth_ifstart;
393 1.25.2.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
394 1.25.2.2 matt ifp->if_init = bcmeth_ifinit;
395 1.25.2.2 matt ifp->if_stop = bcmeth_ifstop;
396 1.25.2.2 matt IFQ_SET_READY(&ifp->if_snd);
397 1.25.2.2 matt
398 1.25.2.2 matt bcmeth_ifstop(ifp, true);
399 1.25.2.2 matt
400 1.25.2.2 matt /*
401 1.25.2.2 matt * Attach the interface.
402 1.25.2.2 matt */
403 1.25.2.2 matt if_attach(ifp);
404 1.25.2.2 matt ether_ifattach(ifp, sc->sc_enaddr);
405 1.25.2.2 matt
406 1.25.2.2 matt #ifdef BCMETH_COUNTERS
407 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
408 1.25.2.2 matt NULL, xname, "intr");
409 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
410 1.25.2.2 matt NULL, xname, "soft intr");
411 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
412 1.25.2.2 matt NULL, xname, "work items");
413 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
414 1.25.2.2 matt NULL, xname, "tx stalls");
415 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC,
416 1.25.2.2 matt NULL, xname, "rx badmagic lo");
417 1.25.2.2 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC,
418 1.25.2.2 matt NULL, xname, "rx badmagic hi");
419 1.25.2.2 matt #endif
420 1.25.2.2 matt }
421 1.25.2.2 matt
422 1.25.2.2 matt static int
423 1.25.2.2 matt bcmeth_mediachange(struct ifnet *ifp)
424 1.25.2.2 matt {
425 1.25.2.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
426 1.25.2.2 matt return 0;
427 1.25.2.2 matt }
428 1.25.2.2 matt
429 1.25.2.2 matt static void
430 1.25.2.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
431 1.25.2.2 matt {
432 1.25.2.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
433 1.25.2.2 matt
434 1.25.2.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
435 1.25.2.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
436 1.25.2.2 matt }
437 1.25.2.2 matt
438 1.25.2.2 matt static uint64_t
439 1.25.2.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
440 1.25.2.2 matt {
441 1.25.2.2 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
442 1.25.2.2 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
443 1.25.2.2 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
444 1.25.2.2 matt | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0
445 1.25.2.2 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
446 1.25.2.2 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
447 1.25.2.2 matt }
448 1.25.2.2 matt
449 1.25.2.2 matt static int
450 1.25.2.2 matt bcmeth_ifinit(struct ifnet *ifp)
451 1.25.2.2 matt {
452 1.25.2.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
453 1.25.2.2 matt int error = 0;
454 1.25.2.2 matt
455 1.25.2.2 matt sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES);
456 1.25.2.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
457 1.25.2.2 matt return error;
458 1.25.2.2 matt
459 1.25.2.2 matt KASSERT(ifp->if_flags & IFF_UP);
460 1.25.2.2 matt
461 1.25.2.2 matt /*
462 1.25.2.2 matt * Stop the interface
463 1.25.2.2 matt */
464 1.25.2.2 matt bcmeth_ifstop(ifp, 0);
465 1.25.2.2 matt
466 1.25.2.2 matt /*
467 1.25.2.2 matt * Reserve enough space at the front so that we can insert a maxsized
468 1.25.2.2 matt * link header and a VLAN tag. Also make sure we have enough room for
469 1.25.2.2 matt * the rcvsts field as well.
470 1.25.2.2 matt */
471 1.25.2.2 matt KASSERT(ALIGN(max_linkhdr) == max_linkhdr);
472 1.25.2.2 matt KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu",
473 1.25.2.2 matt max_linkhdr, sizeof(struct ether_header));
474 1.25.2.2 matt sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header);
475 1.25.2.2 matt if (sc->sc_rcvoffset <= 4)
476 1.25.2.2 matt sc->sc_rcvoffset += 4;
477 1.25.2.2 matt KASSERT((sc->sc_rcvoffset & 3) == 2);
478 1.25.2.2 matt KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET));
479 1.25.2.2 matt KASSERT(sc->sc_rcvoffset >= 6);
480 1.25.2.2 matt
481 1.25.2.2 matt /*
482 1.25.2.2 matt * If our frame size has changed (or it's our first time through)
483 1.25.2.2 matt * destroy the existing transmit mapcache.
484 1.25.2.2 matt */
485 1.25.2.2 matt if (sc->sc_tx_mapcache != NULL
486 1.25.2.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
487 1.25.2.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
488 1.25.2.2 matt sc->sc_tx_mapcache = NULL;
489 1.25.2.2 matt }
490 1.25.2.2 matt
491 1.25.2.2 matt if (sc->sc_tx_mapcache == NULL) {
492 1.25.2.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
493 1.25.2.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
494 1.25.2.2 matt if (error)
495 1.25.2.2 matt return error;
496 1.25.2.2 matt }
497 1.25.2.2 matt
498 1.25.2.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
499 1.25.2.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
500 1.25.2.2 matt | RX_ENA | TX_ENA;
501 1.25.2.2 matt
502 1.25.2.2 matt if (ifp->if_flags & IFF_PROMISC) {
503 1.25.2.2 matt sc->sc_cmdcfg |= PROMISC_EN;
504 1.25.2.2 matt } else {
505 1.25.2.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
506 1.25.2.2 matt }
507 1.25.2.2 matt
508 1.25.2.2 matt const uint8_t * const lladdr = CLLADDR(ifp->if_sadl);
509 1.25.2.2 matt const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr);
510 1.25.2.2 matt
511 1.25.2.2 matt /*
512 1.25.2.2 matt * We make sure that a received Ethernet packet start on a non-word
513 1.25.2.2 matt * boundary so that the packet payload will be on a word boundary.
514 1.25.2.2 matt * So to check the destination address we keep around two words to
515 1.25.2.2 matt * quickly compare with.
516 1.25.2.2 matt */
517 1.25.2.2 matt #if __ARMEL__
518 1.25.2.2 matt sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8);
519 1.25.2.2 matt sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8)
520 1.25.2.2 matt | (lladdr[4] << 16) | (lladdr[5] << 24);
521 1.25.2.2 matt #else
522 1.25.2.2 matt sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8);
523 1.25.2.2 matt sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8)
524 1.25.2.2 matt | (lladdr[1] << 16) | (lladdr[2] << 24);
525 1.25.2.2 matt #endif
526 1.25.2.2 matt
527 1.25.2.2 matt sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
528 1.25.2.2 matt
529 1.25.2.2 matt /* 5. Load RCVADDR_LO with new pointer */
530 1.25.2.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
531 1.25.2.2 matt
532 1.25.2.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
533 1.25.2.2 matt __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET)
534 1.25.2.2 matt | RCVCTL_PARITY_DIS
535 1.25.2.2 matt | RCVCTL_OFLOW_CONTINUE
536 1.25.2.2 matt | __SHIFTIN(3, RCVCTL_BURSTLEN));
537 1.25.2.2 matt
538 1.25.2.2 matt /* 6. Load XMTADDR_LO with new pointer */
539 1.25.2.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
540 1.25.2.2 matt
541 1.25.2.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
542 1.25.2.2 matt | XMTCTL_PARITY_DIS
543 1.25.2.2 matt | __SHIFTIN(3, XMTCTL_BURSTLEN));
544 1.25.2.2 matt
545 1.25.2.2 matt /* 7. Setup other UNIMAC registers */
546 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
547 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
548 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
549 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
550 1.25.2.2 matt
551 1.25.2.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
552 1.25.2.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
553 1.25.2.2 matt devctl &= ~FLOW_CTRL_MODE;
554 1.25.2.2 matt devctl &= ~MIB_RD_RESET_EN;
555 1.25.2.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
556 1.25.2.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
557 1.25.2.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
558 1.25.2.2 matt
559 1.25.2.2 matt /* Setup lazy receive (at most 1ms). */
560 1.25.2.2 matt const struct cpu_softc * const cpu = curcpu()->ci_softc;
561 1.25.2.2 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
562 1.25.2.2 matt | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT);
563 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
564 1.25.2.2 matt
565 1.25.2.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
566 1.25.2.2 matt sc->sc_intmask |= XMTINT_0|XMTUF;
567 1.25.2.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
568 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
569 1.25.2.2 matt
570 1.25.2.2 matt
571 1.25.2.2 matt /* 12. Enable receive queues in RQUEUE, */
572 1.25.2.2 matt sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
573 1.25.2.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
574 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
575 1.25.2.2 matt
576 1.25.2.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
577 1.25.2.2 matt
578 1.25.2.2 matt #if 0
579 1.25.2.2 matt aprint_normal_dev(sc->sc_dev,
580 1.25.2.2 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
581 1.25.2.2 matt devctl, sc->sc_cmdcfg,
582 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
583 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
584 1.25.2.2 matt #endif
585 1.25.2.2 matt
586 1.25.2.2 matt sc->sc_soft_flags = 0;
587 1.25.2.2 matt
588 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
589 1.25.2.2 matt
590 1.25.2.2 matt ifp->if_flags |= IFF_RUNNING;
591 1.25.2.2 matt
592 1.25.2.2 matt return error;
593 1.25.2.2 matt }
594 1.25.2.2 matt
595 1.25.2.2 matt static void
596 1.25.2.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
597 1.25.2.2 matt {
598 1.25.2.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
599 1.25.2.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
600 1.25.2.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
601 1.25.2.2 matt
602 1.25.2.2 matt KASSERT(!cpu_intr_p());
603 1.25.2.2 matt
604 1.25.2.2 matt sc->sc_soft_flags = 0;
605 1.25.2.2 matt sc->sc_work_flags = 0;
606 1.25.2.2 matt
607 1.25.2.2 matt /* Disable Rx processing */
608 1.25.2.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
609 1.25.2.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
610 1.25.2.2 matt
611 1.25.2.2 matt /* Disable Tx processing */
612 1.25.2.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
613 1.25.2.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
614 1.25.2.2 matt
615 1.25.2.2 matt /* Disable all interrupts */
616 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
617 1.25.2.2 matt
618 1.25.2.2 matt for (;;) {
619 1.25.2.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
620 1.25.2.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
621 1.25.2.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
622 1.25.2.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
623 1.25.2.2 matt break;
624 1.25.2.2 matt delay(50);
625 1.25.2.2 matt }
626 1.25.2.2 matt /*
627 1.25.2.2 matt * Now reset the controller.
628 1.25.2.2 matt *
629 1.25.2.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
630 1.25.2.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
631 1.25.2.2 matt */
632 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
633 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
634 1.25.2.2 matt sc->sc_intmask = 0;
635 1.25.2.2 matt ifp->if_flags &= ~IFF_RUNNING;
636 1.25.2.2 matt
637 1.25.2.2 matt /*
638 1.25.2.2 matt * Let's consume any remaining transmitted packets. And if we are
639 1.25.2.2 matt * disabling the interface, purge ourselves of any untransmitted
640 1.25.2.2 matt * packets. But don't consume any received packets, just drop them.
641 1.25.2.2 matt * If we aren't disabling the interface, save the mbufs in the
642 1.25.2.2 matt * receive queue for reuse.
643 1.25.2.2 matt */
644 1.25.2.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
645 1.25.2.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
646 1.25.2.2 matt if (disable) {
647 1.25.2.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
648 1.25.2.2 matt IF_PURGE(&ifp->if_snd);
649 1.25.2.2 matt }
650 1.25.2.2 matt
651 1.25.2.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
652 1.25.2.2 matt }
653 1.25.2.2 matt
654 1.25.2.2 matt static void
655 1.25.2.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
656 1.25.2.2 matt {
657 1.25.2.2 matt }
658 1.25.2.2 matt
659 1.25.2.2 matt static int
660 1.25.2.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
661 1.25.2.2 matt {
662 1.25.2.2 matt struct bcmeth_softc *sc = ifp->if_softc;
663 1.25.2.2 matt struct ifreq * const ifr = data;
664 1.25.2.2 matt const int s = splnet();
665 1.25.2.2 matt int error;
666 1.25.2.2 matt
667 1.25.2.2 matt switch (cmd) {
668 1.25.2.2 matt case SIOCSIFMEDIA:
669 1.25.2.2 matt case SIOCGIFMEDIA:
670 1.25.2.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
671 1.25.2.2 matt break;
672 1.25.2.2 matt
673 1.25.2.2 matt default:
674 1.25.2.2 matt error = ether_ioctl(ifp, cmd, data);
675 1.25.2.2 matt if (error != ENETRESET)
676 1.25.2.2 matt break;
677 1.25.2.2 matt
678 1.25.2.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
679 1.25.2.2 matt error = 0;
680 1.25.2.2 matt break;
681 1.25.2.2 matt }
682 1.25.2.2 matt error = bcmeth_ifinit(ifp);
683 1.25.2.2 matt break;
684 1.25.2.2 matt }
685 1.25.2.2 matt
686 1.25.2.2 matt splx(s);
687 1.25.2.2 matt return error;
688 1.25.2.2 matt }
689 1.25.2.2 matt
690 1.25.2.2 matt static void
691 1.25.2.2 matt bcmeth_rxq_desc_presync(
692 1.25.2.2 matt struct bcmeth_softc *sc,
693 1.25.2.2 matt struct bcmeth_rxqueue *rxq,
694 1.25.2.2 matt struct gmac_rxdb *rxdb,
695 1.25.2.2 matt size_t count)
696 1.25.2.2 matt {
697 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
698 1.25.2.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
699 1.25.2.2 matt BUS_DMASYNC_PREWRITE);
700 1.25.2.2 matt }
701 1.25.2.2 matt
702 1.25.2.2 matt static void
703 1.25.2.2 matt bcmeth_rxq_desc_postsync(
704 1.25.2.2 matt struct bcmeth_softc *sc,
705 1.25.2.2 matt struct bcmeth_rxqueue *rxq,
706 1.25.2.2 matt struct gmac_rxdb *rxdb,
707 1.25.2.2 matt size_t count)
708 1.25.2.2 matt {
709 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
710 1.25.2.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
711 1.25.2.2 matt BUS_DMASYNC_POSTWRITE);
712 1.25.2.2 matt }
713 1.25.2.2 matt
714 1.25.2.2 matt static void
715 1.25.2.2 matt bcmeth_txq_desc_presync(
716 1.25.2.2 matt struct bcmeth_softc *sc,
717 1.25.2.2 matt struct bcmeth_txqueue *txq,
718 1.25.2.2 matt struct gmac_txdb *txdb,
719 1.25.2.2 matt size_t count)
720 1.25.2.2 matt {
721 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
722 1.25.2.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
723 1.25.2.2 matt BUS_DMASYNC_PREWRITE);
724 1.25.2.2 matt }
725 1.25.2.2 matt
726 1.25.2.2 matt static void
727 1.25.2.2 matt bcmeth_txq_desc_postsync(
728 1.25.2.2 matt struct bcmeth_softc *sc,
729 1.25.2.2 matt struct bcmeth_txqueue *txq,
730 1.25.2.2 matt struct gmac_txdb *txdb,
731 1.25.2.2 matt size_t count)
732 1.25.2.2 matt {
733 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
734 1.25.2.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
735 1.25.2.2 matt BUS_DMASYNC_POSTWRITE);
736 1.25.2.2 matt }
737 1.25.2.2 matt
738 1.25.2.2 matt static bus_dmamap_t
739 1.25.2.2 matt bcmeth_mapcache_get(
740 1.25.2.2 matt struct bcmeth_softc *sc,
741 1.25.2.2 matt struct bcmeth_mapcache *dmc)
742 1.25.2.2 matt {
743 1.25.2.2 matt KASSERT(dmc->dmc_nmaps > 0);
744 1.25.2.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
745 1.25.2.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
746 1.25.2.2 matt }
747 1.25.2.2 matt
748 1.25.2.2 matt static void
749 1.25.2.2 matt bcmeth_mapcache_put(
750 1.25.2.2 matt struct bcmeth_softc *sc,
751 1.25.2.2 matt struct bcmeth_mapcache *dmc,
752 1.25.2.2 matt bus_dmamap_t map)
753 1.25.2.2 matt {
754 1.25.2.2 matt KASSERT(map != NULL);
755 1.25.2.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
756 1.25.2.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
757 1.25.2.2 matt }
758 1.25.2.2 matt
759 1.25.2.2 matt static void
760 1.25.2.2 matt bcmeth_mapcache_destroy(
761 1.25.2.2 matt struct bcmeth_softc *sc,
762 1.25.2.2 matt struct bcmeth_mapcache *dmc)
763 1.25.2.2 matt {
764 1.25.2.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
765 1.25.2.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
766 1.25.2.2 matt }
767 1.25.2.2 matt //const size_t dmc_size =
768 1.25.2.2 matt // offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
769 1.25.2.2 matt //kmem_intr_free(dmc, dmc_size);
770 1.25.2.2 matt free(dmc, M_DEVBUF);
771 1.25.2.2 matt }
772 1.25.2.2 matt
773 1.25.2.2 matt static int
774 1.25.2.2 matt bcmeth_mapcache_create(
775 1.25.2.2 matt struct bcmeth_softc *sc,
776 1.25.2.2 matt struct bcmeth_mapcache **dmc_p,
777 1.25.2.2 matt size_t maxmaps,
778 1.25.2.2 matt size_t maxmapsize,
779 1.25.2.2 matt size_t maxseg)
780 1.25.2.2 matt {
781 1.25.2.2 matt const size_t dmc_size =
782 1.25.2.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
783 1.25.2.2 matt struct bcmeth_mapcache * const dmc =
784 1.25.2.2 matt malloc(dmc_size, M_DEVBUF, M_NOWAIT|M_ZERO);
785 1.25.2.2 matt //kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
786 1.25.2.2 matt
787 1.25.2.2 matt dmc->dmc_maxmaps = maxmaps;
788 1.25.2.2 matt dmc->dmc_nmaps = maxmaps;
789 1.25.2.2 matt dmc->dmc_maxmapsize = maxmapsize;
790 1.25.2.2 matt dmc->dmc_maxseg = maxseg;
791 1.25.2.2 matt
792 1.25.2.2 matt for (u_int i = 0; i < maxmaps; i++) {
793 1.25.2.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
794 1.25.2.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
795 1.25.2.2 matt BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
796 1.25.2.2 matt if (error) {
797 1.25.2.2 matt aprint_error_dev(sc->sc_dev,
798 1.25.2.2 matt "failed to creat dma map cache "
799 1.25.2.2 matt "entry %u of %zu: %d\n",
800 1.25.2.2 matt i, maxmaps, error);
801 1.25.2.2 matt while (i-- > 0) {
802 1.25.2.2 matt bus_dmamap_destroy(sc->sc_dmat,
803 1.25.2.2 matt dmc->dmc_maps[i]);
804 1.25.2.2 matt }
805 1.25.2.2 matt free(dmc, M_DEVBUF);
806 1.25.2.2 matt //kmem_intr_free(dmc, dmc_size);
807 1.25.2.2 matt return error;
808 1.25.2.2 matt }
809 1.25.2.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
810 1.25.2.2 matt }
811 1.25.2.2 matt
812 1.25.2.2 matt *dmc_p = dmc;
813 1.25.2.2 matt
814 1.25.2.2 matt return 0;
815 1.25.2.2 matt }
816 1.25.2.2 matt
817 1.25.2.2 matt #if 0
818 1.25.2.2 matt static void
819 1.25.2.2 matt bcmeth_dmamem_free(
820 1.25.2.2 matt bus_dma_tag_t dmat,
821 1.25.2.2 matt size_t map_size,
822 1.25.2.2 matt bus_dma_segment_t *seg,
823 1.25.2.2 matt bus_dmamap_t map,
824 1.25.2.2 matt void *kvap)
825 1.25.2.2 matt {
826 1.25.2.2 matt bus_dmamap_destroy(dmat, map);
827 1.25.2.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
828 1.25.2.2 matt bus_dmamem_free(dmat, seg, 1);
829 1.25.2.2 matt }
830 1.25.2.2 matt #endif
831 1.25.2.2 matt
832 1.25.2.2 matt static int
833 1.25.2.2 matt bcmeth_dmamem_alloc(
834 1.25.2.2 matt bus_dma_tag_t dmat,
835 1.25.2.2 matt size_t map_size,
836 1.25.2.2 matt bus_dma_segment_t *seg,
837 1.25.2.2 matt bus_dmamap_t *map,
838 1.25.2.2 matt void **kvap)
839 1.25.2.2 matt {
840 1.25.2.2 matt int error;
841 1.25.2.2 matt int nseg;
842 1.25.2.2 matt
843 1.25.2.2 matt *kvap = NULL;
844 1.25.2.2 matt *map = NULL;
845 1.25.2.2 matt
846 1.25.2.2 matt error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0,
847 1.25.2.2 matt seg, 1, &nseg, 0);
848 1.25.2.2 matt if (error)
849 1.25.2.2 matt return error;
850 1.25.2.2 matt
851 1.25.2.2 matt KASSERT(nseg == 1);
852 1.25.2.2 matt
853 1.25.2.2 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0);
854 1.25.2.2 matt if (error == 0) {
855 1.25.2.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
856 1.25.2.2 matt map);
857 1.25.2.2 matt if (error == 0) {
858 1.25.2.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
859 1.25.2.2 matt NULL, 0);
860 1.25.2.2 matt if (error == 0)
861 1.25.2.2 matt return 0;
862 1.25.2.2 matt bus_dmamap_destroy(dmat, *map);
863 1.25.2.2 matt *map = NULL;
864 1.25.2.2 matt }
865 1.25.2.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
866 1.25.2.2 matt *kvap = NULL;
867 1.25.2.2 matt }
868 1.25.2.2 matt bus_dmamem_free(dmat, seg, nseg);
869 1.25.2.2 matt return 0;
870 1.25.2.2 matt }
871 1.25.2.2 matt
872 1.25.2.2 matt static struct mbuf *
873 1.25.2.2 matt bcmeth_rx_buf_alloc(
874 1.25.2.2 matt struct bcmeth_softc *sc)
875 1.25.2.2 matt {
876 1.25.2.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
877 1.25.2.2 matt if (m == NULL) {
878 1.25.2.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
879 1.25.2.2 matt return NULL;
880 1.25.2.2 matt }
881 1.25.2.2 matt MCLGET(m, M_DONTWAIT);
882 1.25.2.2 matt if ((m->m_flags & M_EXT) == 0) {
883 1.25.2.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
884 1.25.2.2 matt m_freem(m);
885 1.25.2.2 matt return NULL;
886 1.25.2.2 matt }
887 1.25.2.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
888 1.25.2.2 matt
889 1.25.2.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
890 1.25.2.2 matt if (map == NULL) {
891 1.25.2.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
892 1.25.2.2 matt m_freem(m);
893 1.25.2.2 matt return NULL;
894 1.25.2.2 matt }
895 1.25.2.2 matt M_SETCTX(m, map);
896 1.25.2.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
897 1.25.2.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
898 1.25.2.2 matt BUS_DMA_READ|BUS_DMA_NOWAIT);
899 1.25.2.2 matt if (error) {
900 1.25.2.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
901 1.25.2.2 matt error);
902 1.25.2.2 matt M_SETCTX(m, NULL);
903 1.25.2.2 matt m_freem(m);
904 1.25.2.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
905 1.25.2.2 matt return NULL;
906 1.25.2.2 matt }
907 1.25.2.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
908 1.25.2.2 matt #ifdef BCMETH_RCVMAGIC
909 1.25.2.2 matt *mtod(m, uint32_t *) = htole32(BCMETH_RCVMAGIC);
910 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
911 1.25.2.2 matt BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
912 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t),
913 1.25.2.2 matt map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD);
914 1.25.2.2 matt #else
915 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
916 1.25.2.2 matt BUS_DMASYNC_PREREAD);
917 1.25.2.2 matt #endif
918 1.25.2.2 matt
919 1.25.2.2 matt return m;
920 1.25.2.2 matt }
921 1.25.2.2 matt
922 1.25.2.2 matt static void
923 1.25.2.2 matt bcmeth_rx_map_unload(
924 1.25.2.2 matt struct bcmeth_softc *sc,
925 1.25.2.2 matt struct mbuf *m)
926 1.25.2.2 matt {
927 1.25.2.2 matt KASSERT(m);
928 1.25.2.2 matt for (; m != NULL; m = m->m_next) {
929 1.25.2.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
930 1.25.2.2 matt KASSERT(map);
931 1.25.2.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
932 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
933 1.25.2.2 matt BUS_DMASYNC_POSTREAD);
934 1.25.2.2 matt bus_dmamap_unload(sc->sc_dmat, map);
935 1.25.2.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
936 1.25.2.2 matt M_SETCTX(m, NULL);
937 1.25.2.2 matt }
938 1.25.2.2 matt }
939 1.25.2.2 matt
940 1.25.2.2 matt static bool
941 1.25.2.2 matt bcmeth_rxq_produce(
942 1.25.2.2 matt struct bcmeth_softc *sc,
943 1.25.2.2 matt struct bcmeth_rxqueue *rxq)
944 1.25.2.2 matt {
945 1.25.2.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
946 1.25.2.2 matt bool produced = false;
947 1.25.2.2 matt
948 1.25.2.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
949 1.25.2.2 matt struct mbuf *m;
950 1.25.2.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
951 1.25.2.2 matt if (m == NULL) {
952 1.25.2.2 matt m = bcmeth_rx_buf_alloc(sc);
953 1.25.2.2 matt if (m == NULL) {
954 1.25.2.2 matt printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
955 1.25.2.2 matt break;
956 1.25.2.2 matt }
957 1.25.2.2 matt }
958 1.25.2.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
959 1.25.2.2 matt KASSERT(map);
960 1.25.2.2 matt
961 1.25.2.2 matt producer->rxdb_buflen = htole32(MCLBYTES);
962 1.25.2.2 matt producer->rxdb_addrlo = htole32(map->dm_segs[0].ds_addr);
963 1.25.2.2 matt producer->rxdb_flags &= htole32(RXDB_FLAG_ET);
964 1.25.2.2 matt *rxq->rxq_mtail = m;
965 1.25.2.2 matt rxq->rxq_mtail = &m->m_next;
966 1.25.2.2 matt m->m_len = MCLBYTES;
967 1.25.2.2 matt m->m_next = NULL;
968 1.25.2.2 matt rxq->rxq_inuse++;
969 1.25.2.2 matt if (++producer == rxq->rxq_last) {
970 1.25.2.2 matt membar_producer();
971 1.25.2.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
972 1.25.2.2 matt rxq->rxq_last - rxq->rxq_producer);
973 1.25.2.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
974 1.25.2.2 matt }
975 1.25.2.2 matt produced = true;
976 1.25.2.2 matt }
977 1.25.2.2 matt if (produced) {
978 1.25.2.2 matt membar_producer();
979 1.25.2.2 matt if (producer != rxq->rxq_producer) {
980 1.25.2.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
981 1.25.2.2 matt producer - rxq->rxq_producer);
982 1.25.2.2 matt rxq->rxq_producer = producer;
983 1.25.2.2 matt }
984 1.25.2.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
985 1.25.2.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
986 1.25.2.2 matt + ((uintptr_t)producer & RCVPTR));
987 1.25.2.2 matt }
988 1.25.2.2 matt return true;
989 1.25.2.2 matt }
990 1.25.2.2 matt
991 1.25.2.2 matt static void
992 1.25.2.2 matt bcmeth_rx_input(
993 1.25.2.2 matt struct bcmeth_softc *sc,
994 1.25.2.2 matt struct mbuf *m,
995 1.25.2.2 matt uint32_t rxdb_flags)
996 1.25.2.2 matt {
997 1.25.2.2 matt struct ifnet * const ifp = &sc->sc_if;
998 1.25.2.2 matt
999 1.25.2.2 matt bcmeth_rx_map_unload(sc, m);
1000 1.25.2.2 matt
1001 1.25.2.2 matt m_adj(m, sc->sc_rcvoffset);
1002 1.25.2.2 matt
1003 1.25.2.2 matt /*
1004 1.25.2.2 matt * If we are in promiscuous mode and this isn't a multicast, check the
1005 1.25.2.2 matt * destination address to make sure it matches our own. If it doesn't,
1006 1.25.2.2 matt * mark the packet as being received promiscuously.
1007 1.25.2.2 matt */
1008 1.25.2.2 matt if ((sc->sc_cmdcfg & PROMISC_EN)
1009 1.25.2.2 matt && (m->m_data[0] & 1) == 0
1010 1.25.2.2 matt && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0]
1011 1.25.2.2 matt || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) {
1012 1.25.2.2 matt m->m_flags |= M_PROMISC;
1013 1.25.2.2 matt }
1014 1.25.2.2 matt m->m_pkthdr.rcvif = ifp;
1015 1.25.2.2 matt
1016 1.25.2.2 matt ifp->if_ipackets++;
1017 1.25.2.2 matt ifp->if_ibytes += m->m_pkthdr.len;
1018 1.25.2.2 matt
1019 1.25.2.2 matt /*
1020 1.25.2.2 matt * Let's give it to the network subsystm to deal with.
1021 1.25.2.2 matt */
1022 1.25.2.2 matt #ifdef BCMETH_MPSAFE
1023 1.25.2.2 matt mutex_exit(sc->sc_lock);
1024 1.25.2.2 matt (*ifp->if_input)(ifp, m);
1025 1.25.2.2 matt mutex_enter(sc->sc_lock);
1026 1.25.2.2 matt #else
1027 1.25.2.2 matt int s = splnet();
1028 1.25.2.2 matt bpf_mtap(ifp, m);
1029 1.25.2.2 matt (*ifp->if_input)(ifp, m);
1030 1.25.2.2 matt splx(s);
1031 1.25.2.2 matt #endif
1032 1.25.2.2 matt }
1033 1.25.2.2 matt
1034 1.25.2.2 matt static bool
1035 1.25.2.2 matt bcmeth_rxq_consume(
1036 1.25.2.2 matt struct bcmeth_softc *sc,
1037 1.25.2.2 matt struct bcmeth_rxqueue *rxq,
1038 1.25.2.2 matt size_t atmost)
1039 1.25.2.2 matt {
1040 1.25.2.2 matt struct ifnet * const ifp = &sc->sc_if;
1041 1.25.2.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
1042 1.25.2.2 matt size_t rxconsumed = 0;
1043 1.25.2.2 matt bool didconsume = false;
1044 1.25.2.2 matt
1045 1.25.2.2 matt while (atmost-- > 0) {
1046 1.25.2.2 matt if (consumer == rxq->rxq_producer) {
1047 1.25.2.2 matt KASSERT(rxq->rxq_inuse == 0);
1048 1.25.2.2 matt break;
1049 1.25.2.2 matt }
1050 1.25.2.2 matt
1051 1.25.2.2 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1052 1.25.2.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1053 1.25.2.2 matt if (consumer == rxq->rxq_first + currdscr) {
1054 1.25.2.2 matt break;
1055 1.25.2.2 matt }
1056 1.25.2.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
1057 1.25.2.2 matt
1058 1.25.2.2 matt /*
1059 1.25.2.2 matt * We own this packet again. Copy the rxsts word from it.
1060 1.25.2.2 matt */
1061 1.25.2.2 matt rxconsumed++;
1062 1.25.2.2 matt didconsume = true;
1063 1.25.2.2 matt uint32_t rxsts;
1064 1.25.2.2 matt KASSERT(rxq->rxq_mhead != NULL);
1065 1.25.2.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
1066 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1067 1.25.2.2 matt BUS_DMASYNC_POSTREAD);
1068 1.25.2.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
1069 1.25.2.2 matt rxsts = le32toh(rxsts);
1070 1.25.2.2 matt #if 0
1071 1.25.2.2 matt KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd",
1072 1.25.2.2 matt currdscr, consumer - rxq->rxq_first);
1073 1.25.2.2 matt #endif
1074 1.25.2.2 matt
1075 1.25.2.2 matt /*
1076 1.25.2.2 matt * Get the count of descriptors. Fetch the correct number
1077 1.25.2.2 matt * of mbufs.
1078 1.25.2.2 matt */
1079 1.25.2.2 matt #ifdef BCMETH_RCVMAGIC
1080 1.25.2.2 matt size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1;
1081 1.25.2.2 matt #else
1082 1.25.2.2 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
1083 1.25.2.2 matt #endif
1084 1.25.2.2 matt struct mbuf *m = rxq->rxq_mhead;
1085 1.25.2.2 matt struct mbuf *m_last = m;
1086 1.25.2.2 matt for (size_t i = 1; i < desc_count; i++) {
1087 1.25.2.2 matt if (++consumer == rxq->rxq_last) {
1088 1.25.2.2 matt consumer = rxq->rxq_first;
1089 1.25.2.2 matt }
1090 1.25.2.2 matt KASSERTMSG(consumer != rxq->rxq_first + currdscr,
1091 1.25.2.2 matt "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd",
1092 1.25.2.2 matt i, rxsts, desc_count, currdscr,
1093 1.25.2.2 matt consumer - rxq->rxq_first);
1094 1.25.2.2 matt m_last = m_last->m_next;
1095 1.25.2.2 matt }
1096 1.25.2.2 matt
1097 1.25.2.2 matt /*
1098 1.25.2.2 matt * Now remove it/them from the list of enqueued mbufs.
1099 1.25.2.2 matt */
1100 1.25.2.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1101 1.25.2.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1102 1.25.2.2 matt m_last->m_next = NULL;
1103 1.25.2.2 matt
1104 1.25.2.2 matt #ifdef BCMETH_RCVMAGIC
1105 1.25.2.2 matt if (rxsts == BCMETH_RCVMAGIC) {
1106 1.25.2.2 matt ifp->if_ierrors++;
1107 1.25.2.2 matt if ((m->m_ext.ext_paddr >> 28) == 8) {
1108 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo);
1109 1.25.2.2 matt } else {
1110 1.25.2.2 matt BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi);
1111 1.25.2.2 matt }
1112 1.25.2.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1113 1.25.2.2 matt } else
1114 1.25.2.2 matt #endif /* BCMETH_RCVMAGIC */
1115 1.25.2.2 matt if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
1116 1.25.2.2 matt aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
1117 1.25.2.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
1118 1.25.2.2 matt /*
1119 1.25.2.2 matt * We encountered an error, take the mbufs and add them
1120 1.25.2.2 matt * to the rx bufcache so we can quickly reuse them.
1121 1.25.2.2 matt */
1122 1.25.2.2 matt ifp->if_ierrors++;
1123 1.25.2.2 matt do {
1124 1.25.2.2 matt struct mbuf *m0 = m->m_next;
1125 1.25.2.2 matt m->m_next = NULL;
1126 1.25.2.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1127 1.25.2.2 matt m = m0;
1128 1.25.2.2 matt } while (m);
1129 1.25.2.2 matt } else {
1130 1.25.2.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1131 1.25.2.2 matt framelen += sc->sc_rcvoffset;
1132 1.25.2.2 matt m->m_pkthdr.len = framelen;
1133 1.25.2.2 matt if (desc_count == 1) {
1134 1.25.2.2 matt KASSERT(framelen <= MCLBYTES);
1135 1.25.2.2 matt m->m_len = framelen;
1136 1.25.2.2 matt } else {
1137 1.25.2.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1138 1.25.2.2 matt }
1139 1.25.2.2 matt
1140 1.25.2.2 matt #ifdef BCMETH_MPSAFE
1141 1.25.2.2 matt /*
1142 1.25.2.2 matt * Wrap at the last entry!
1143 1.25.2.2 matt */
1144 1.25.2.2 matt if (++consumer == rxq->rxq_last) {
1145 1.25.2.2 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET));
1146 1.25.2.2 matt rxq->rxq_consumer = rxq->rxq_first;
1147 1.25.2.2 matt } else {
1148 1.25.2.2 matt rxq->rxq_consumer = consumer;
1149 1.25.2.2 matt }
1150 1.25.2.2 matt rxq->rxq_inuse -= rxconsumed;
1151 1.25.2.2 matt #endif /* BCMETH_MPSAFE */
1152 1.25.2.2 matt
1153 1.25.2.2 matt /*
1154 1.25.2.2 matt * Receive the packet (which releases our lock)
1155 1.25.2.2 matt */
1156 1.25.2.2 matt bcmeth_rx_input(sc, m, rxsts);
1157 1.25.2.2 matt
1158 1.25.2.2 matt #ifdef BCMETH_MPSAFE
1159 1.25.2.2 matt /*
1160 1.25.2.2 matt * Since we had to give up our lock, we need to
1161 1.25.2.2 matt * refresh these.
1162 1.25.2.2 matt */
1163 1.25.2.2 matt consumer = rxq->rxq_consumer;
1164 1.25.2.2 matt rxconsumed = 0;
1165 1.25.2.2 matt continue;
1166 1.25.2.2 matt #endif /* BCMETH_MPSAFE */
1167 1.25.2.2 matt }
1168 1.25.2.2 matt
1169 1.25.2.2 matt /*
1170 1.25.2.2 matt * Wrap at the last entry!
1171 1.25.2.2 matt */
1172 1.25.2.2 matt if (++consumer == rxq->rxq_last) {
1173 1.25.2.2 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET));
1174 1.25.2.2 matt consumer = rxq->rxq_first;
1175 1.25.2.2 matt }
1176 1.25.2.2 matt }
1177 1.25.2.2 matt
1178 1.25.2.2 matt /*
1179 1.25.2.2 matt * Update queue info.
1180 1.25.2.2 matt */
1181 1.25.2.2 matt rxq->rxq_consumer = consumer;
1182 1.25.2.2 matt rxq->rxq_inuse -= rxconsumed;
1183 1.25.2.2 matt
1184 1.25.2.2 matt /*
1185 1.25.2.2 matt * Did we consume anything?
1186 1.25.2.2 matt */
1187 1.25.2.2 matt return didconsume;
1188 1.25.2.2 matt }
1189 1.25.2.2 matt
1190 1.25.2.2 matt static void
1191 1.25.2.2 matt bcmeth_rxq_purge(
1192 1.25.2.2 matt struct bcmeth_softc *sc,
1193 1.25.2.2 matt struct bcmeth_rxqueue *rxq,
1194 1.25.2.2 matt bool discard)
1195 1.25.2.2 matt {
1196 1.25.2.2 matt struct mbuf *m;
1197 1.25.2.2 matt
1198 1.25.2.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1199 1.25.2.2 matt if (discard) {
1200 1.25.2.2 matt bcmeth_rx_map_unload(sc, m);
1201 1.25.2.2 matt m_freem(m);
1202 1.25.2.2 matt } else {
1203 1.25.2.2 matt while (m != NULL) {
1204 1.25.2.2 matt struct mbuf *m0 = m->m_next;
1205 1.25.2.2 matt m->m_next = NULL;
1206 1.25.2.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1207 1.25.2.2 matt m = m0;
1208 1.25.2.2 matt }
1209 1.25.2.2 matt }
1210 1.25.2.2 matt
1211 1.25.2.2 matt }
1212 1.25.2.2 matt
1213 1.25.2.2 matt rxq->rxq_mhead = NULL;
1214 1.25.2.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1215 1.25.2.2 matt rxq->rxq_inuse = 0;
1216 1.25.2.2 matt }
1217 1.25.2.2 matt
1218 1.25.2.2 matt static void
1219 1.25.2.2 matt bcmeth_rxq_reset(
1220 1.25.2.2 matt struct bcmeth_softc *sc,
1221 1.25.2.2 matt struct bcmeth_rxqueue *rxq)
1222 1.25.2.2 matt {
1223 1.25.2.2 matt /*
1224 1.25.2.2 matt * sync all the descriptors
1225 1.25.2.2 matt */
1226 1.25.2.2 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1227 1.25.2.2 matt rxq->rxq_last - rxq->rxq_first);
1228 1.25.2.2 matt
1229 1.25.2.2 matt /*
1230 1.25.2.2 matt * Make sure we own all descriptors in the ring.
1231 1.25.2.2 matt */
1232 1.25.2.2 matt struct gmac_rxdb *rxdb;
1233 1.25.2.2 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1234 1.25.2.2 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_IC);
1235 1.25.2.2 matt }
1236 1.25.2.2 matt
1237 1.25.2.2 matt /*
1238 1.25.2.2 matt * Last descriptor has the wrap flag.
1239 1.25.2.2 matt */
1240 1.25.2.2 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_ET|RXDB_FLAG_IC);
1241 1.25.2.2 matt
1242 1.25.2.2 matt /*
1243 1.25.2.2 matt * Reset the producer consumer indexes.
1244 1.25.2.2 matt */
1245 1.25.2.2 matt rxq->rxq_consumer = rxq->rxq_first;
1246 1.25.2.2 matt rxq->rxq_producer = rxq->rxq_first;
1247 1.25.2.2 matt rxq->rxq_inuse = 0;
1248 1.25.2.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1249 1.25.2.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1250 1.25.2.2 matt
1251 1.25.2.2 matt sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1252 1.25.2.2 matt
1253 1.25.2.2 matt /*
1254 1.25.2.2 matt * Restart the receiver at the first descriptor
1255 1.25.2.2 matt */
1256 1.25.2.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1257 1.25.2.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1258 1.25.2.2 matt }
1259 1.25.2.2 matt
1260 1.25.2.2 matt static int
1261 1.25.2.2 matt bcmeth_rxq_attach(
1262 1.25.2.2 matt struct bcmeth_softc *sc,
1263 1.25.2.2 matt struct bcmeth_rxqueue *rxq,
1264 1.25.2.2 matt u_int qno)
1265 1.25.2.2 matt {
1266 1.25.2.2 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1267 1.25.2.2 matt int error;
1268 1.25.2.2 matt void *descs;
1269 1.25.2.2 matt
1270 1.25.2.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1271 1.25.2.2 matt
1272 1.25.2.2 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1273 1.25.2.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1274 1.25.2.2 matt if (error)
1275 1.25.2.2 matt return error;
1276 1.25.2.2 matt
1277 1.25.2.2 matt memset(descs, 0, BCMETH_RINGSIZE);
1278 1.25.2.2 matt rxq->rxq_first = descs;
1279 1.25.2.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1280 1.25.2.2 matt rxq->rxq_consumer = descs;
1281 1.25.2.2 matt rxq->rxq_producer = descs;
1282 1.25.2.2 matt
1283 1.25.2.2 matt bcmeth_rxq_purge(sc, rxq, true);
1284 1.25.2.2 matt bcmeth_rxq_reset(sc, rxq);
1285 1.25.2.2 matt
1286 1.25.2.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1287 1.25.2.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1288 1.25.2.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1289 1.25.2.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1290 1.25.2.2 matt rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1;
1291 1.25.2.2 matt
1292 1.25.2.2 matt return 0;
1293 1.25.2.2 matt }
1294 1.25.2.2 matt
1295 1.25.2.2 matt static bool
1296 1.25.2.2 matt bcmeth_txq_active_p(
1297 1.25.2.2 matt struct bcmeth_softc * const sc,
1298 1.25.2.2 matt struct bcmeth_txqueue *txq)
1299 1.25.2.2 matt {
1300 1.25.2.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1301 1.25.2.2 matt }
1302 1.25.2.2 matt
1303 1.25.2.2 matt static bool
1304 1.25.2.2 matt bcmeth_txq_fillable_p(
1305 1.25.2.2 matt struct bcmeth_softc * const sc,
1306 1.25.2.2 matt struct bcmeth_txqueue *txq)
1307 1.25.2.2 matt {
1308 1.25.2.2 matt return txq->txq_free >= txq->txq_threshold;
1309 1.25.2.2 matt }
1310 1.25.2.2 matt
1311 1.25.2.2 matt static int
1312 1.25.2.2 matt bcmeth_txq_attach(
1313 1.25.2.2 matt struct bcmeth_softc *sc,
1314 1.25.2.2 matt struct bcmeth_txqueue *txq,
1315 1.25.2.2 matt u_int qno)
1316 1.25.2.2 matt {
1317 1.25.2.2 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1318 1.25.2.2 matt int error;
1319 1.25.2.2 matt void *descs;
1320 1.25.2.2 matt
1321 1.25.2.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1322 1.25.2.2 matt
1323 1.25.2.2 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1324 1.25.2.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1325 1.25.2.2 matt if (error)
1326 1.25.2.2 matt return error;
1327 1.25.2.2 matt
1328 1.25.2.2 matt memset(descs, 0, BCMETH_RINGSIZE);
1329 1.25.2.2 matt txq->txq_first = descs;
1330 1.25.2.2 matt txq->txq_last = txq->txq_first + desc_count;
1331 1.25.2.2 matt txq->txq_consumer = descs;
1332 1.25.2.2 matt txq->txq_producer = descs;
1333 1.25.2.2 matt
1334 1.25.2.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1335 1.25.2.2 matt
1336 1.25.2.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1337 1.25.2.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1338 1.25.2.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1339 1.25.2.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1340 1.25.2.2 matt txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1;
1341 1.25.2.2 matt
1342 1.25.2.2 matt bcmeth_txq_reset(sc, txq);
1343 1.25.2.2 matt
1344 1.25.2.2 matt return 0;
1345 1.25.2.2 matt }
1346 1.25.2.2 matt
1347 1.25.2.2 matt static int
1348 1.25.2.2 matt bcmeth_txq_map_load(
1349 1.25.2.2 matt struct bcmeth_softc *sc,
1350 1.25.2.2 matt struct bcmeth_txqueue *txq,
1351 1.25.2.2 matt struct mbuf *m)
1352 1.25.2.2 matt {
1353 1.25.2.2 matt bus_dmamap_t map;
1354 1.25.2.2 matt int error;
1355 1.25.2.2 matt
1356 1.25.2.2 matt map = M_GETCTX(m, bus_dmamap_t);
1357 1.25.2.2 matt if (map != NULL)
1358 1.25.2.2 matt return 0;
1359 1.25.2.2 matt
1360 1.25.2.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1361 1.25.2.2 matt if (map == NULL)
1362 1.25.2.2 matt return ENOMEM;
1363 1.25.2.2 matt
1364 1.25.2.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1365 1.25.2.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1366 1.25.2.2 matt if (error)
1367 1.25.2.2 matt return error;
1368 1.25.2.2 matt
1369 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1370 1.25.2.2 matt BUS_DMASYNC_PREWRITE);
1371 1.25.2.2 matt M_SETCTX(m, map);
1372 1.25.2.2 matt return 0;
1373 1.25.2.2 matt }
1374 1.25.2.2 matt
1375 1.25.2.2 matt static void
1376 1.25.2.2 matt bcmeth_txq_map_unload(
1377 1.25.2.2 matt struct bcmeth_softc *sc,
1378 1.25.2.2 matt struct bcmeth_txqueue *txq,
1379 1.25.2.2 matt struct mbuf *m)
1380 1.25.2.2 matt {
1381 1.25.2.2 matt KASSERT(m);
1382 1.25.2.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1383 1.25.2.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1384 1.25.2.2 matt BUS_DMASYNC_POSTWRITE);
1385 1.25.2.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1386 1.25.2.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1387 1.25.2.2 matt }
1388 1.25.2.2 matt
1389 1.25.2.2 matt static bool
1390 1.25.2.2 matt bcmeth_txq_produce(
1391 1.25.2.2 matt struct bcmeth_softc *sc,
1392 1.25.2.2 matt struct bcmeth_txqueue *txq,
1393 1.25.2.2 matt struct mbuf *m)
1394 1.25.2.2 matt {
1395 1.25.2.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1396 1.25.2.2 matt
1397 1.25.2.2 matt if (map->dm_nsegs > txq->txq_free)
1398 1.25.2.2 matt return false;
1399 1.25.2.2 matt
1400 1.25.2.2 matt /*
1401 1.25.2.2 matt * TCP Offload flag must be set in the first descriptor.
1402 1.25.2.2 matt */
1403 1.25.2.2 matt struct gmac_txdb *producer = txq->txq_producer;
1404 1.25.2.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1405 1.25.2.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1406 1.25.2.2 matt
1407 1.25.2.2 matt /*
1408 1.25.2.2 matt * If we've produced enough descriptors without consuming any
1409 1.25.2.2 matt * we need to ask for an interrupt to reclaim some.
1410 1.25.2.2 matt */
1411 1.25.2.2 matt txq->txq_lastintr += map->dm_nsegs;
1412 1.25.2.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1413 1.25.2.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1414 1.25.2.2 matt txq->txq_lastintr = 0;
1415 1.25.2.2 matt last_flags |= TXDB_FLAG_IC;
1416 1.25.2.2 matt }
1417 1.25.2.2 matt
1418 1.25.2.2 matt KASSERT(producer != txq->txq_last);
1419 1.25.2.2 matt
1420 1.25.2.2 matt struct gmac_txdb *start = producer;
1421 1.25.2.2 matt size_t count = map->dm_nsegs;
1422 1.25.2.2 matt producer->txdb_flags |= htole32(first_flags);
1423 1.25.2.2 matt producer->txdb_addrlo = htole32(map->dm_segs[0].ds_addr);
1424 1.25.2.2 matt producer->txdb_buflen = htole32(map->dm_segs[0].ds_len);
1425 1.25.2.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1426 1.25.2.2 matt #if 0
1427 1.25.2.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1428 1.25.2.2 matt le32toh(producer->txdb_flags),
1429 1.25.2.2 matt le32toh(producer->txdb_buflen),
1430 1.25.2.2 matt le32toh(producer->txdb_addrlo),
1431 1.25.2.2 matt le32toh(producer->txdb_addrhi));
1432 1.25.2.2 matt #endif
1433 1.25.2.2 matt if (__predict_false(++producer == txq->txq_last)) {
1434 1.25.2.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1435 1.25.2.2 matt txq->txq_last - start);
1436 1.25.2.2 matt count -= txq->txq_last - start;
1437 1.25.2.2 matt producer = txq->txq_first;
1438 1.25.2.2 matt start = txq->txq_first;
1439 1.25.2.2 matt }
1440 1.25.2.2 matt producer->txdb_addrlo = htole32(map->dm_segs[i].ds_addr);
1441 1.25.2.2 matt producer->txdb_buflen = htole32(map->dm_segs[i].ds_len);
1442 1.25.2.2 matt }
1443 1.25.2.2 matt producer->txdb_flags |= htole32(last_flags);
1444 1.25.2.2 matt #if 0
1445 1.25.2.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1446 1.25.2.2 matt le32toh(producer->txdb_flags), le32toh(producer->txdb_buflen),
1447 1.25.2.2 matt le32toh(producer->txdb_addrlo), le32toh(producer->txdb_addrhi));
1448 1.25.2.2 matt #endif
1449 1.25.2.2 matt if (count)
1450 1.25.2.2 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1451 1.25.2.2 matt
1452 1.25.2.2 matt /*
1453 1.25.2.2 matt * Reduce free count by the number of segments we consumed.
1454 1.25.2.2 matt */
1455 1.25.2.2 matt txq->txq_free -= map->dm_nsegs;
1456 1.25.2.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1457 1.25.2.2 matt KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & htole32(TXDB_FLAG_EF)) == 0);
1458 1.25.2.2 matt KASSERT(producer->txdb_flags & htole32(TXDB_FLAG_EF));
1459 1.25.2.2 matt
1460 1.25.2.2 matt #if 0
1461 1.25.2.2 matt printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1462 1.25.2.2 matt __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1463 1.25.2.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1464 1.25.2.2 matt #endif
1465 1.25.2.2 matt
1466 1.25.2.2 matt if (producer + 1 == txq->txq_last)
1467 1.25.2.2 matt txq->txq_producer = txq->txq_first;
1468 1.25.2.2 matt else
1469 1.25.2.2 matt txq->txq_producer = producer + 1;
1470 1.25.2.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1471 1.25.2.2 matt
1472 1.25.2.2 matt /*
1473 1.25.2.2 matt * Let the transmitter know there's more to do
1474 1.25.2.2 matt */
1475 1.25.2.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1476 1.25.2.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1477 1.25.2.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1478 1.25.2.2 matt
1479 1.25.2.2 matt return true;
1480 1.25.2.2 matt }
1481 1.25.2.2 matt
1482 1.25.2.2 matt static struct mbuf *
1483 1.25.2.2 matt bcmeth_copy_packet(struct mbuf *m)
1484 1.25.2.2 matt {
1485 1.25.2.2 matt struct mbuf *mext = NULL;
1486 1.25.2.2 matt size_t misalignment = 0;
1487 1.25.2.2 matt size_t hlen = 0;
1488 1.25.2.2 matt
1489 1.25.2.2 matt for (mext = m; mext != NULL; mext = mext->m_next) {
1490 1.25.2.2 matt if (mext->m_flags & M_EXT) {
1491 1.25.2.2 matt misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1492 1.25.2.2 matt break;
1493 1.25.2.2 matt }
1494 1.25.2.2 matt hlen += m->m_len;
1495 1.25.2.2 matt }
1496 1.25.2.2 matt
1497 1.25.2.2 matt struct mbuf *n = m->m_next;
1498 1.25.2.2 matt if (m != mext && hlen + misalignment <= MHLEN && false) {
1499 1.25.2.2 matt KASSERT(m->m_pktdat <= m->m_data && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]);
1500 1.25.2.2 matt size_t oldoff = m->m_data - m->m_pktdat;
1501 1.25.2.2 matt size_t off;
1502 1.25.2.2 matt if (mext == NULL) {
1503 1.25.2.2 matt off = (oldoff + hlen > MHLEN) ? 0 : oldoff;
1504 1.25.2.2 matt } else {
1505 1.25.2.2 matt off = MHLEN - (hlen + misalignment);
1506 1.25.2.2 matt }
1507 1.25.2.2 matt KASSERT(off + hlen + misalignment <= MHLEN);
1508 1.25.2.2 matt if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
1509 1.25.2.2 matt memmove(&m->m_pktdat[off], m->m_data, m->m_len);
1510 1.25.2.2 matt m->m_data = &m->m_pktdat[off];
1511 1.25.2.2 matt }
1512 1.25.2.2 matt m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]);
1513 1.25.2.2 matt m->m_len = hlen;
1514 1.25.2.2 matt m->m_next = mext;
1515 1.25.2.2 matt while (n != mext) {
1516 1.25.2.2 matt n = m_free(n);
1517 1.25.2.2 matt }
1518 1.25.2.2 matt return m;
1519 1.25.2.2 matt }
1520 1.25.2.2 matt
1521 1.25.2.2 matt struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type);
1522 1.25.2.2 matt if (m0 == NULL) {
1523 1.25.2.2 matt return NULL;
1524 1.25.2.2 matt }
1525 1.25.2.2 matt M_COPY_PKTHDR(m0, m);
1526 1.25.2.2 matt MCLAIM(m0, m->m_owner);
1527 1.25.2.2 matt if (m0->m_pkthdr.len > MHLEN) {
1528 1.25.2.2 matt MCLGET(m0, M_DONTWAIT);
1529 1.25.2.2 matt if ((m0->m_flags & M_EXT) == 0) {
1530 1.25.2.2 matt m_freem(m0);
1531 1.25.2.2 matt return NULL;
1532 1.25.2.2 matt }
1533 1.25.2.2 matt }
1534 1.25.2.2 matt m0->m_len = m->m_pkthdr.len;
1535 1.25.2.2 matt m_copydata(m, 0, m0->m_len, mtod(m0, void *));
1536 1.25.2.2 matt m_freem(m);
1537 1.25.2.2 matt return m0;
1538 1.25.2.2 matt }
1539 1.25.2.2 matt
1540 1.25.2.2 matt static bool
1541 1.25.2.2 matt bcmeth_txq_enqueue(
1542 1.25.2.2 matt struct bcmeth_softc *sc,
1543 1.25.2.2 matt struct bcmeth_txqueue *txq)
1544 1.25.2.2 matt {
1545 1.25.2.2 matt for (;;) {
1546 1.25.2.2 matt if (IF_QFULL(&txq->txq_mbufs))
1547 1.25.2.2 matt return false;
1548 1.25.2.2 matt struct mbuf *m = txq->txq_next;
1549 1.25.2.2 matt if (m == NULL) {
1550 1.25.2.2 matt int s = splnet();
1551 1.25.2.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1552 1.25.2.2 matt splx(s);
1553 1.25.2.2 matt if (m == NULL)
1554 1.25.2.2 matt return true;
1555 1.25.2.2 matt M_SETCTX(m, NULL);
1556 1.25.2.2 matt } else {
1557 1.25.2.2 matt txq->txq_next = NULL;
1558 1.25.2.2 matt }
1559 1.25.2.2 matt /*
1560 1.25.2.2 matt * If LINK2 is set and this packet uses multiple mbufs,
1561 1.25.2.2 matt * consolidate it into a single mbuf.
1562 1.25.2.2 matt */
1563 1.25.2.2 matt if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) {
1564 1.25.2.2 matt struct mbuf *m0 = bcmeth_copy_packet(m);
1565 1.25.2.2 matt if (m0 == NULL) {
1566 1.25.2.2 matt txq->txq_next = m;
1567 1.25.2.2 matt return true;
1568 1.25.2.2 matt }
1569 1.25.2.2 matt m = m0;
1570 1.25.2.2 matt }
1571 1.25.2.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1572 1.25.2.2 matt if (error) {
1573 1.25.2.2 matt aprint_error_dev(sc->sc_dev,
1574 1.25.2.2 matt "discarded packet due to "
1575 1.25.2.2 matt "dmamap load failure: %d\n", error);
1576 1.25.2.2 matt m_freem(m);
1577 1.25.2.2 matt continue;
1578 1.25.2.2 matt }
1579 1.25.2.2 matt KASSERT(txq->txq_next == NULL);
1580 1.25.2.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1581 1.25.2.2 matt txq->txq_next = m;
1582 1.25.2.2 matt return false;
1583 1.25.2.2 matt }
1584 1.25.2.2 matt KASSERT(txq->txq_next == NULL);
1585 1.25.2.2 matt }
1586 1.25.2.2 matt }
1587 1.25.2.2 matt
1588 1.25.2.2 matt static bool
1589 1.25.2.2 matt bcmeth_txq_consume(
1590 1.25.2.2 matt struct bcmeth_softc *sc,
1591 1.25.2.2 matt struct bcmeth_txqueue *txq)
1592 1.25.2.2 matt {
1593 1.25.2.2 matt struct ifnet * const ifp = &sc->sc_if;
1594 1.25.2.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1595 1.25.2.2 matt size_t txfree = 0;
1596 1.25.2.2 matt
1597 1.25.2.2 matt #if 0
1598 1.25.2.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1599 1.25.2.2 matt #endif
1600 1.25.2.2 matt
1601 1.25.2.2 matt for (;;) {
1602 1.25.2.2 matt if (consumer == txq->txq_producer) {
1603 1.25.2.2 matt txq->txq_consumer = consumer;
1604 1.25.2.2 matt txq->txq_free += txfree;
1605 1.25.2.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1606 1.25.2.2 matt #if 0
1607 1.25.2.2 matt printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1608 1.25.2.2 matt __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1609 1.25.2.2 matt #endif
1610 1.25.2.2 matt KASSERT(txq->txq_lastintr == 0);
1611 1.25.2.2 matt KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1612 1.25.2.2 matt return true;
1613 1.25.2.2 matt }
1614 1.25.2.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1615 1.25.2.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1616 1.25.2.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1617 1.25.2.2 matt txq->txq_consumer = consumer;
1618 1.25.2.2 matt txq->txq_free += txfree;
1619 1.25.2.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1620 1.25.2.2 matt #if 0
1621 1.25.2.2 matt printf("%s: freed %zu descriptors\n",
1622 1.25.2.2 matt __func__, txfree);
1623 1.25.2.2 matt #endif
1624 1.25.2.2 matt return bcmeth_txq_fillable_p(sc, txq);
1625 1.25.2.2 matt }
1626 1.25.2.2 matt
1627 1.25.2.2 matt /*
1628 1.25.2.2 matt * If this is the last descriptor in the chain, get the
1629 1.25.2.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1630 1.25.2.2 matt */
1631 1.25.2.2 matt const uint32_t txdb_flags = le32toh(consumer->txdb_flags);
1632 1.25.2.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1633 1.25.2.2 matt struct mbuf *m;
1634 1.25.2.2 matt
1635 1.25.2.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1636 1.25.2.2 matt KASSERT(m);
1637 1.25.2.2 matt bcmeth_txq_map_unload(sc, txq, m);
1638 1.25.2.2 matt #if 0
1639 1.25.2.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1640 1.25.2.2 matt __func__, m, m->m_pkthdr.len);
1641 1.25.2.2 matt #endif
1642 1.25.2.2 matt bpf_mtap(ifp, m);
1643 1.25.2.2 matt ifp->if_opackets++;
1644 1.25.2.2 matt ifp->if_obytes += m->m_pkthdr.len;
1645 1.25.2.2 matt if (m->m_flags & M_MCAST)
1646 1.25.2.2 matt ifp->if_omcasts++;
1647 1.25.2.2 matt m_freem(m);
1648 1.25.2.2 matt }
1649 1.25.2.2 matt
1650 1.25.2.2 matt /*
1651 1.25.2.2 matt * We own this packet again. Clear all flags except wrap.
1652 1.25.2.2 matt */
1653 1.25.2.2 matt txfree++;
1654 1.25.2.2 matt
1655 1.25.2.2 matt /*
1656 1.25.2.2 matt * Wrap at the last entry!
1657 1.25.2.2 matt */
1658 1.25.2.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1659 1.25.2.2 matt consumer->txdb_flags = htole32(TXDB_FLAG_ET);
1660 1.25.2.2 matt KASSERT(consumer + 1 == txq->txq_last);
1661 1.25.2.2 matt consumer = txq->txq_first;
1662 1.25.2.2 matt } else {
1663 1.25.2.2 matt consumer->txdb_flags = 0;
1664 1.25.2.2 matt consumer++;
1665 1.25.2.2 matt KASSERT(consumer < txq->txq_last);
1666 1.25.2.2 matt }
1667 1.25.2.2 matt }
1668 1.25.2.2 matt }
1669 1.25.2.2 matt
1670 1.25.2.2 matt static void
1671 1.25.2.2 matt bcmeth_txq_purge(
1672 1.25.2.2 matt struct bcmeth_softc *sc,
1673 1.25.2.2 matt struct bcmeth_txqueue *txq)
1674 1.25.2.2 matt {
1675 1.25.2.2 matt struct mbuf *m;
1676 1.25.2.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1677 1.25.2.2 matt
1678 1.25.2.2 matt for (;;) {
1679 1.25.2.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1680 1.25.2.2 matt if (m == NULL)
1681 1.25.2.2 matt break;
1682 1.25.2.2 matt bcmeth_txq_map_unload(sc, txq, m);
1683 1.25.2.2 matt m_freem(m);
1684 1.25.2.2 matt }
1685 1.25.2.2 matt if ((m = txq->txq_next) != NULL) {
1686 1.25.2.2 matt txq->txq_next = NULL;
1687 1.25.2.2 matt bcmeth_txq_map_unload(sc, txq, m);
1688 1.25.2.2 matt m_freem(m);
1689 1.25.2.2 matt }
1690 1.25.2.2 matt }
1691 1.25.2.2 matt
1692 1.25.2.2 matt static void
1693 1.25.2.2 matt bcmeth_txq_reset(
1694 1.25.2.2 matt struct bcmeth_softc *sc,
1695 1.25.2.2 matt struct bcmeth_txqueue *txq)
1696 1.25.2.2 matt {
1697 1.25.2.2 matt /*
1698 1.25.2.2 matt * sync all the descriptors
1699 1.25.2.2 matt */
1700 1.25.2.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1701 1.25.2.2 matt txq->txq_last - txq->txq_first);
1702 1.25.2.2 matt
1703 1.25.2.2 matt /*
1704 1.25.2.2 matt * Make sure we own all descriptors in the ring.
1705 1.25.2.2 matt */
1706 1.25.2.2 matt struct gmac_txdb *txdb;
1707 1.25.2.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1708 1.25.2.2 matt txdb->txdb_flags = 0;
1709 1.25.2.2 matt }
1710 1.25.2.2 matt
1711 1.25.2.2 matt /*
1712 1.25.2.2 matt * Last descriptor has the wrap flag.
1713 1.25.2.2 matt */
1714 1.25.2.2 matt txdb->txdb_flags = htole32(TXDB_FLAG_ET);
1715 1.25.2.2 matt
1716 1.25.2.2 matt /*
1717 1.25.2.2 matt * Reset the producer consumer indexes.
1718 1.25.2.2 matt */
1719 1.25.2.2 matt txq->txq_consumer = txq->txq_first;
1720 1.25.2.2 matt txq->txq_producer = txq->txq_first;
1721 1.25.2.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1722 1.25.2.2 matt txq->txq_threshold = txq->txq_free / 2;
1723 1.25.2.2 matt txq->txq_lastintr = 0;
1724 1.25.2.2 matt
1725 1.25.2.2 matt /*
1726 1.25.2.2 matt * What do we want to get interrupted on?
1727 1.25.2.2 matt */
1728 1.25.2.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1729 1.25.2.2 matt
1730 1.25.2.2 matt /*
1731 1.25.2.2 matt * Restart the transmiter at the first descriptor
1732 1.25.2.2 matt */
1733 1.25.2.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1734 1.25.2.2 matt txq->txq_descmap->dm_segs->ds_addr);
1735 1.25.2.2 matt }
1736 1.25.2.2 matt
1737 1.25.2.2 matt static void
1738 1.25.2.2 matt bcmeth_ifstart(struct ifnet *ifp)
1739 1.25.2.2 matt {
1740 1.25.2.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1741 1.25.2.2 matt
1742 1.25.2.2 matt if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) {
1743 1.25.2.2 matt return;
1744 1.25.2.2 matt }
1745 1.25.2.2 matt
1746 1.25.2.2 matt #ifdef BCMETH_MPSAFETX
1747 1.25.2.2 matt if (cpu_intr_p()) {
1748 1.25.2.2 matt #endif
1749 1.25.2.2 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1750 1.25.2.2 matt softint_schedule(sc->sc_soft_ih);
1751 1.25.2.2 matt #ifdef BCMETH_MPSAFETX
1752 1.25.2.2 matt } else {
1753 1.25.2.2 matt /*
1754 1.25.2.2 matt * Either we are in a softintr thread already or some other
1755 1.25.2.2 matt * thread so just borrow it to do the send and save ourselves
1756 1.25.2.2 matt * the overhead of a fast soft int.
1757 1.25.2.2 matt */
1758 1.25.2.2 matt bcmeth_soft_txintr(sc);
1759 1.25.2.2 matt }
1760 1.25.2.2 matt #endif
1761 1.25.2.2 matt }
1762 1.25.2.2 matt
1763 1.25.2.2 matt int
1764 1.25.2.2 matt bcmeth_intr(void *arg)
1765 1.25.2.2 matt {
1766 1.25.2.2 matt struct bcmeth_softc * const sc = arg;
1767 1.25.2.2 matt uint32_t soft_flags = 0;
1768 1.25.2.2 matt uint32_t work_flags = 0;
1769 1.25.2.2 matt int rv = 0;
1770 1.25.2.2 matt
1771 1.25.2.2 matt mutex_enter(sc->sc_hwlock);
1772 1.25.2.2 matt
1773 1.25.2.2 matt uint32_t intmask = sc->sc_intmask;
1774 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_intr);
1775 1.25.2.2 matt
1776 1.25.2.2 matt for (;;) {
1777 1.25.2.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1778 1.25.2.2 matt intstatus &= intmask;
1779 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1780 1.25.2.2 matt if (intstatus == 0) {
1781 1.25.2.2 matt break;
1782 1.25.2.2 matt }
1783 1.25.2.2 matt #if 0
1784 1.25.2.2 matt aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1785 1.25.2.2 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1786 1.25.2.2 matt #endif
1787 1.25.2.2 matt if (intstatus & RCVINT) {
1788 1.25.2.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1789 1.25.2.2 matt intmask &= ~RCVINT;
1790 1.25.2.2 matt
1791 1.25.2.2 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1792 1.25.2.2 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1793 1.25.2.2 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1794 1.25.2.2 matt /*
1795 1.25.2.2 matt * We wrapped at the end so count how far
1796 1.25.2.2 matt * we are from the end.
1797 1.25.2.2 matt */
1798 1.25.2.2 matt descs += rxq->rxq_last - rxq->rxq_consumer;
1799 1.25.2.2 matt } else {
1800 1.25.2.2 matt descs -= rxq->rxq_consumer - rxq->rxq_first;
1801 1.25.2.2 matt }
1802 1.25.2.2 matt /*
1803 1.25.2.2 matt * If we "timedout" we can't be hogging so use
1804 1.25.2.2 matt * softints. If we exceeded then we might hogging
1805 1.25.2.2 matt * so let the workqueue deal with them.
1806 1.25.2.2 matt */
1807 1.25.2.2 matt const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT);
1808 1.25.2.2 matt if (descs < framecount
1809 1.25.2.2 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1810 1.25.2.2 matt soft_flags |= SOFT_RXINTR;
1811 1.25.2.2 matt } else {
1812 1.25.2.2 matt work_flags |= WORK_RXINTR;
1813 1.25.2.2 matt }
1814 1.25.2.2 matt }
1815 1.25.2.2 matt
1816 1.25.2.2 matt if (intstatus & XMTINT_0) {
1817 1.25.2.2 matt intmask &= ~XMTINT_0;
1818 1.25.2.2 matt soft_flags |= SOFT_TXINTR;
1819 1.25.2.2 matt }
1820 1.25.2.2 matt
1821 1.25.2.2 matt if (intstatus & RCVDESCUF) {
1822 1.25.2.2 matt intmask &= ~RCVDESCUF;
1823 1.25.2.2 matt work_flags |= WORK_RXUNDERFLOW;
1824 1.25.2.2 matt }
1825 1.25.2.2 matt
1826 1.25.2.2 matt intstatus &= intmask;
1827 1.25.2.2 matt if (intstatus) {
1828 1.25.2.2 matt aprint_error_dev(sc->sc_dev,
1829 1.25.2.2 matt "intr: intstatus=%#x\n", intstatus);
1830 1.25.2.2 matt aprint_error_dev(sc->sc_dev,
1831 1.25.2.2 matt "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n",
1832 1.25.2.2 matt sc->sc_rxq.rxq_first,
1833 1.25.2.2 matt sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr,
1834 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr),
1835 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0),
1836 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1));
1837 1.25.2.2 matt aprint_error_dev(sc->sc_dev,
1838 1.25.2.2 matt "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n",
1839 1.25.2.2 matt sc->sc_txq.txq_first,
1840 1.25.2.2 matt sc->sc_txq.txq_descmap->dm_segs[0].ds_addr,
1841 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr),
1842 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0),
1843 1.25.2.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1));
1844 1.25.2.2 matt intmask &= ~intstatus;
1845 1.25.2.2 matt work_flags |= WORK_REINIT;
1846 1.25.2.2 matt break;
1847 1.25.2.2 matt }
1848 1.25.2.2 matt }
1849 1.25.2.2 matt
1850 1.25.2.2 matt if (intmask != sc->sc_intmask) {
1851 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1852 1.25.2.2 matt }
1853 1.25.2.2 matt
1854 1.25.2.2 matt if (work_flags) {
1855 1.25.2.2 matt if (sc->sc_work_flags == 0) {
1856 1.25.2.2 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1857 1.25.2.2 matt }
1858 1.25.2.2 matt atomic_or_32(&sc->sc_work_flags, work_flags);
1859 1.25.2.2 matt rv = 1;
1860 1.25.2.2 matt }
1861 1.25.2.2 matt
1862 1.25.2.2 matt if (soft_flags) {
1863 1.25.2.2 matt if (sc->sc_soft_flags == 0) {
1864 1.25.2.2 matt softint_schedule(sc->sc_soft_ih);
1865 1.25.2.2 matt }
1866 1.25.2.2 matt atomic_or_32(&sc->sc_soft_flags, soft_flags);
1867 1.25.2.2 matt rv = 1;
1868 1.25.2.2 matt }
1869 1.25.2.2 matt
1870 1.25.2.2 matt mutex_exit(sc->sc_hwlock);
1871 1.25.2.2 matt
1872 1.25.2.2 matt return rv;
1873 1.25.2.2 matt }
1874 1.25.2.2 matt
1875 1.25.2.2 matt #ifdef BCMETH_MPSAFETX
1876 1.25.2.2 matt void
1877 1.25.2.2 matt bcmeth_soft_txintr(struct bcmeth_softc *sc)
1878 1.25.2.2 matt {
1879 1.25.2.2 matt mutex_enter(sc->sc_lock);
1880 1.25.2.2 matt /*
1881 1.25.2.2 matt * Let's do what we came here for. Consume transmitted
1882 1.25.2.2 matt * packets off the the transmit ring.
1883 1.25.2.2 matt */
1884 1.25.2.2 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1885 1.25.2.2 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1886 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1887 1.25.2.2 matt sc->sc_if.if_flags |= IFF_OACTIVE;
1888 1.25.2.2 matt } else {
1889 1.25.2.2 matt sc->sc_if.if_flags &= ~IFF_OACTIVE;
1890 1.25.2.2 matt }
1891 1.25.2.2 matt if (sc->sc_if.if_flags & IFF_RUNNING) {
1892 1.25.2.2 matt mutex_spin_enter(sc->sc_hwlock);
1893 1.25.2.2 matt sc->sc_intmask |= XMTINT_0;
1894 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1895 1.25.2.2 matt mutex_spin_exit(sc->sc_hwlock);
1896 1.25.2.2 matt }
1897 1.25.2.2 matt mutex_exit(sc->sc_lock);
1898 1.25.2.2 matt }
1899 1.25.2.2 matt #endif /* BCMETH_MPSAFETX */
1900 1.25.2.2 matt
1901 1.25.2.2 matt void
1902 1.25.2.2 matt bcmeth_soft_intr(void *arg)
1903 1.25.2.2 matt {
1904 1.25.2.2 matt struct bcmeth_softc * const sc = arg;
1905 1.25.2.2 matt struct ifnet * const ifp = &sc->sc_if;
1906 1.25.2.2 matt uint32_t intmask = 0;
1907 1.25.2.2 matt
1908 1.25.2.2 matt mutex_enter(sc->sc_lock);
1909 1.25.2.2 matt
1910 1.25.2.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1911 1.25.2.2 matt
1912 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr);
1913 1.25.2.2 matt
1914 1.25.2.2 matt if ((soft_flags & SOFT_TXINTR)
1915 1.25.2.2 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1916 1.25.2.2 matt /*
1917 1.25.2.2 matt * Let's do what we came here for. Consume transmitted
1918 1.25.2.2 matt * packets off the the transmit ring.
1919 1.25.2.2 matt */
1920 1.25.2.2 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1921 1.25.2.2 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1922 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1923 1.25.2.2 matt ifp->if_flags |= IFF_OACTIVE;
1924 1.25.2.2 matt } else {
1925 1.25.2.2 matt ifp->if_flags &= ~IFF_OACTIVE;
1926 1.25.2.2 matt }
1927 1.25.2.2 matt intmask |= XMTINT_0;
1928 1.25.2.2 matt }
1929 1.25.2.2 matt
1930 1.25.2.2 matt if (soft_flags & SOFT_RXINTR) {
1931 1.25.2.2 matt /*
1932 1.25.2.2 matt * Let's consume
1933 1.25.2.2 matt */
1934 1.25.2.2 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1935 1.25.2.2 matt sc->sc_rxq.rxq_threshold / 4)) {
1936 1.25.2.2 matt /*
1937 1.25.2.2 matt * We've consumed a quarter of the ring and still have
1938 1.25.2.2 matt * more to do. Refill the ring.
1939 1.25.2.2 matt */
1940 1.25.2.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1941 1.25.2.2 matt }
1942 1.25.2.2 matt intmask |= RCVINT;
1943 1.25.2.2 matt }
1944 1.25.2.2 matt
1945 1.25.2.2 matt if (ifp->if_flags & IFF_RUNNING) {
1946 1.25.2.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1947 1.25.2.2 matt mutex_spin_enter(sc->sc_hwlock);
1948 1.25.2.2 matt sc->sc_intmask |= intmask;
1949 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1950 1.25.2.2 matt mutex_spin_exit(sc->sc_hwlock);
1951 1.25.2.2 matt }
1952 1.25.2.2 matt
1953 1.25.2.2 matt mutex_exit(sc->sc_lock);
1954 1.25.2.2 matt }
1955 1.25.2.2 matt
1956 1.25.2.2 matt void
1957 1.25.2.2 matt bcmeth_worker(struct work *wk, void *arg)
1958 1.25.2.2 matt {
1959 1.25.2.2 matt struct bcmeth_softc * const sc = arg;
1960 1.25.2.2 matt struct ifnet * const ifp = &sc->sc_if;
1961 1.25.2.2 matt uint32_t intmask = 0;
1962 1.25.2.2 matt
1963 1.25.2.2 matt mutex_enter(sc->sc_lock);
1964 1.25.2.2 matt
1965 1.25.2.2 matt BCMETH_EVCNT_INCR(sc->sc_ev_work);
1966 1.25.2.2 matt
1967 1.25.2.2 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1968 1.25.2.2 matt if (work_flags & WORK_REINIT) {
1969 1.25.2.2 matt int s = splnet();
1970 1.25.2.2 matt sc->sc_soft_flags = 0;
1971 1.25.2.2 matt bcmeth_ifinit(ifp);
1972 1.25.2.2 matt splx(s);
1973 1.25.2.2 matt work_flags &= ~WORK_RXUNDERFLOW;
1974 1.25.2.2 matt }
1975 1.25.2.2 matt
1976 1.25.2.2 matt if (work_flags & WORK_RXUNDERFLOW) {
1977 1.25.2.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1978 1.25.2.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
1979 1.25.2.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
1980 1.25.2.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
1981 1.25.2.2 matt } else {
1982 1.25.2.2 matt intmask |= RCVDESCUF;
1983 1.25.2.2 matt }
1984 1.25.2.2 matt aprint_normal_dev(sc->sc_dev,
1985 1.25.2.2 matt "increasing receive buffers from %zu to %zu\n",
1986 1.25.2.2 matt rxq->rxq_threshold, threshold);
1987 1.25.2.2 matt rxq->rxq_threshold = threshold;
1988 1.25.2.2 matt }
1989 1.25.2.2 matt
1990 1.25.2.2 matt if (work_flags & WORK_RXINTR) {
1991 1.25.2.2 matt /*
1992 1.25.2.2 matt * Let's consume
1993 1.25.2.2 matt */
1994 1.25.2.2 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1995 1.25.2.2 matt sc->sc_rxq.rxq_threshold / 4)) {
1996 1.25.2.2 matt /*
1997 1.25.2.2 matt * We've consumed a quarter of the ring and still have
1998 1.25.2.2 matt * more to do. Refill the ring.
1999 1.25.2.2 matt */
2000 1.25.2.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2001 1.25.2.2 matt }
2002 1.25.2.2 matt intmask |= RCVINT;
2003 1.25.2.2 matt }
2004 1.25.2.2 matt
2005 1.25.2.2 matt if (ifp->if_flags & IFF_RUNNING) {
2006 1.25.2.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2007 1.25.2.2 matt #if 0
2008 1.25.2.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
2009 1.25.2.2 matt if (intstatus & RCVINT) {
2010 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT);
2011 1.25.2.2 matt work_flags |= WORK_RXINTR;
2012 1.25.2.2 matt continue;
2013 1.25.2.2 matt }
2014 1.25.2.2 matt #endif
2015 1.25.2.2 matt mutex_spin_enter(sc->sc_hwlock);
2016 1.25.2.2 matt sc->sc_intmask |= intmask;
2017 1.25.2.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
2018 1.25.2.2 matt mutex_spin_exit(sc->sc_hwlock);
2019 1.25.2.2 matt }
2020 1.25.2.2 matt
2021 1.25.2.2 matt mutex_exit(sc->sc_lock);
2022 1.25.2.2 matt }
2023