bcm53xx_eth.c revision 1.32 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.10 matt #define _ARM32_BUS_DMA_PRIVATE
31 1.1 matt #define GMAC_PRIVATE
32 1.1 matt
33 1.1 matt #include "locators.h"
34 1.18 matt #include "opt_broadcom.h"
35 1.1 matt
36 1.1 matt #include <sys/cdefs.h>
37 1.1 matt
38 1.32 riastrad __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.32 2018/09/03 16:29:23 riastradh Exp $");
39 1.1 matt
40 1.1 matt #include <sys/param.h>
41 1.2 matt #include <sys/atomic.h>
42 1.1 matt #include <sys/bus.h>
43 1.1 matt #include <sys/device.h>
44 1.2 matt #include <sys/ioctl.h>
45 1.1 matt #include <sys/intr.h>
46 1.2 matt #include <sys/kmem.h>
47 1.1 matt #include <sys/mutex.h>
48 1.2 matt #include <sys/socket.h>
49 1.1 matt #include <sys/systm.h>
50 1.8 matt #include <sys/workqueue.h>
51 1.1 matt
52 1.1 matt #include <net/if.h>
53 1.1 matt #include <net/if_ether.h>
54 1.1 matt #include <net/if_media.h>
55 1.1 matt
56 1.2 matt #include <net/if_dl.h>
57 1.2 matt
58 1.2 matt #include <net/bpf.h>
59 1.2 matt
60 1.1 matt #include <dev/mii/miivar.h>
61 1.1 matt
62 1.26 matt #include <arm/locore.h>
63 1.26 matt
64 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
65 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
66 1.1 matt
67 1.16 matt //#define BCMETH_MPSAFE
68 1.16 matt
69 1.18 matt #ifdef BCMETH_COUNTERS
70 1.18 matt #define BCMETH_EVCNT_ADD(a,b) ((void)((a).ev_count += (b)))
71 1.18 matt #else
72 1.18 matt #define BCMETH_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0)
73 1.18 matt #endif
74 1.18 matt #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1)
75 1.18 matt
76 1.10 matt #define BCMETH_MAXTXMBUFS 128
77 1.2 matt #define BCMETH_NTXSEGS 30
78 1.2 matt #define BCMETH_MAXRXMBUFS 255
79 1.8 matt #define BCMETH_MINRXMBUFS 64
80 1.2 matt #define BCMETH_NRXSEGS 1
81 1.8 matt #define BCMETH_RINGSIZE PAGE_SIZE
82 1.2 matt
83 1.19 matt #if 1
84 1.10 matt #define BCMETH_RCVMAGIC 0xfeedface
85 1.16 matt #endif
86 1.10 matt
87 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
88 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
89 1.1 matt
90 1.2 matt struct bcmeth_txqueue {
91 1.2 matt bus_dmamap_t txq_descmap;
92 1.2 matt struct gmac_txdb *txq_consumer;
93 1.2 matt struct gmac_txdb *txq_producer;
94 1.2 matt struct gmac_txdb *txq_first;
95 1.2 matt struct gmac_txdb *txq_last;
96 1.2 matt struct ifqueue txq_mbufs;
97 1.2 matt struct mbuf *txq_next;
98 1.2 matt size_t txq_free;
99 1.2 matt size_t txq_threshold;
100 1.2 matt size_t txq_lastintr;
101 1.2 matt bus_size_t txq_reg_xmtaddrlo;
102 1.2 matt bus_size_t txq_reg_xmtptr;
103 1.2 matt bus_size_t txq_reg_xmtctl;
104 1.2 matt bus_size_t txq_reg_xmtsts0;
105 1.10 matt bus_size_t txq_reg_xmtsts1;
106 1.2 matt bus_dma_segment_t txq_descmap_seg;
107 1.2 matt };
108 1.2 matt
109 1.2 matt struct bcmeth_rxqueue {
110 1.2 matt bus_dmamap_t rxq_descmap;
111 1.2 matt struct gmac_rxdb *rxq_consumer;
112 1.2 matt struct gmac_rxdb *rxq_producer;
113 1.2 matt struct gmac_rxdb *rxq_first;
114 1.2 matt struct gmac_rxdb *rxq_last;
115 1.2 matt struct mbuf *rxq_mhead;
116 1.2 matt struct mbuf **rxq_mtail;
117 1.2 matt struct mbuf *rxq_mconsumer;
118 1.2 matt size_t rxq_inuse;
119 1.2 matt size_t rxq_threshold;
120 1.2 matt bus_size_t rxq_reg_rcvaddrlo;
121 1.2 matt bus_size_t rxq_reg_rcvptr;
122 1.2 matt bus_size_t rxq_reg_rcvctl;
123 1.2 matt bus_size_t rxq_reg_rcvsts0;
124 1.10 matt bus_size_t rxq_reg_rcvsts1;
125 1.2 matt bus_dma_segment_t rxq_descmap_seg;
126 1.2 matt };
127 1.2 matt
128 1.2 matt struct bcmeth_mapcache {
129 1.2 matt u_int dmc_nmaps;
130 1.2 matt u_int dmc_maxseg;
131 1.2 matt u_int dmc_maxmaps;
132 1.2 matt u_int dmc_maxmapsize;
133 1.2 matt bus_dmamap_t dmc_maps[0];
134 1.2 matt };
135 1.2 matt
136 1.1 matt struct bcmeth_softc {
137 1.1 matt device_t sc_dev;
138 1.1 matt bus_space_tag_t sc_bst;
139 1.1 matt bus_space_handle_t sc_bsh;
140 1.1 matt bus_dma_tag_t sc_dmat;
141 1.1 matt kmutex_t *sc_lock;
142 1.1 matt kmutex_t *sc_hwlock;
143 1.1 matt struct ethercom sc_ec;
144 1.2 matt #define sc_if sc_ec.ec_if
145 1.2 matt struct ifmedia sc_media;
146 1.2 matt void *sc_soft_ih;
147 1.1 matt void *sc_ih;
148 1.2 matt
149 1.2 matt struct bcmeth_rxqueue sc_rxq;
150 1.2 matt struct bcmeth_txqueue sc_txq;
151 1.2 matt
152 1.19 matt size_t sc_rcvoffset;
153 1.21 matt uint32_t sc_macaddr[2];
154 1.2 matt uint32_t sc_maxfrm;
155 1.2 matt uint32_t sc_cmdcfg;
156 1.15 matt uint32_t sc_intmask;
157 1.8 matt uint32_t sc_rcvlazy;
158 1.2 matt volatile uint32_t sc_soft_flags;
159 1.2 matt #define SOFT_RXINTR 0x01
160 1.8 matt #define SOFT_TXINTR 0x02
161 1.2 matt
162 1.18 matt #ifdef BCMETH_COUNTERS
163 1.2 matt struct evcnt sc_ev_intr;
164 1.2 matt struct evcnt sc_ev_soft_intr;
165 1.10 matt struct evcnt sc_ev_work;
166 1.2 matt struct evcnt sc_ev_tx_stall;
167 1.10 matt struct evcnt sc_ev_rx_badmagic_lo;
168 1.10 matt struct evcnt sc_ev_rx_badmagic_hi;
169 1.18 matt #endif
170 1.2 matt
171 1.2 matt struct ifqueue sc_rx_bufcache;
172 1.2 matt struct bcmeth_mapcache *sc_rx_mapcache;
173 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
174 1.2 matt
175 1.8 matt struct workqueue *sc_workq;
176 1.8 matt struct work sc_work;
177 1.8 matt
178 1.8 matt volatile uint32_t sc_work_flags;
179 1.8 matt #define WORK_RXINTR 0x01
180 1.8 matt #define WORK_RXUNDERFLOW 0x02
181 1.8 matt #define WORK_REINIT 0x04
182 1.8 matt
183 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
184 1.1 matt };
185 1.1 matt
186 1.2 matt static void bcmeth_ifstart(struct ifnet *);
187 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
188 1.2 matt static int bcmeth_ifinit(struct ifnet *);
189 1.2 matt static void bcmeth_ifstop(struct ifnet *, int);
190 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
191 1.2 matt
192 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
193 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
194 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
195 1.2 matt struct bcmeth_mapcache *);
196 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
197 1.2 matt struct bcmeth_mapcache *);
198 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
199 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
200 1.2 matt
201 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
202 1.2 matt struct bcmeth_txqueue *, u_int);
203 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
204 1.2 matt struct bcmeth_txqueue *);
205 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
206 1.2 matt struct bcmeth_txqueue *);
207 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
208 1.2 matt struct bcmeth_txqueue *);
209 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
210 1.2 matt struct bcmeth_txqueue *, struct mbuf *m);
211 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
212 1.2 matt struct bcmeth_txqueue *);
213 1.2 matt
214 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
215 1.2 matt struct bcmeth_rxqueue *, u_int);
216 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
217 1.2 matt struct bcmeth_rxqueue *);
218 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
219 1.2 matt struct bcmeth_rxqueue *, bool);
220 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
221 1.2 matt struct bcmeth_rxqueue *);
222 1.2 matt
223 1.1 matt static int bcmeth_intr(void *);
224 1.16 matt #ifdef BCMETH_MPSAFETX
225 1.16 matt static void bcmeth_soft_txintr(struct bcmeth_softc *);
226 1.16 matt #endif
227 1.2 matt static void bcmeth_soft_intr(void *);
228 1.8 matt static void bcmeth_worker(struct work *, void *);
229 1.2 matt
230 1.2 matt static int bcmeth_mediachange(struct ifnet *);
231 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
232 1.1 matt
233 1.1 matt static inline uint32_t
234 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
235 1.1 matt {
236 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
237 1.1 matt }
238 1.1 matt
239 1.1 matt static inline void
240 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
241 1.1 matt {
242 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
243 1.1 matt }
244 1.1 matt
245 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
246 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
247 1.1 matt
248 1.1 matt static int
249 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
250 1.1 matt {
251 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
252 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
253 1.1 matt
254 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
255 1.1 matt return 0;
256 1.1 matt
257 1.1 matt #ifdef DIAGNOSTIC
258 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
259 1.1 matt #endif
260 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
261 1.1 matt
262 1.1 matt return 1;
263 1.1 matt }
264 1.1 matt
265 1.1 matt static void
266 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
267 1.1 matt {
268 1.1 matt struct bcmeth_softc * const sc = device_private(self);
269 1.2 matt struct ethercom * const ec = &sc->sc_ec;
270 1.2 matt struct ifnet * const ifp = &ec->ec_if;
271 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
272 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
273 1.2 matt const char * const xname = device_xname(self);
274 1.2 matt prop_dictionary_t dict = device_properties(self);
275 1.2 matt int error;
276 1.1 matt
277 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
278 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
279 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
280 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
281 1.1 matt
282 1.10 matt /*
283 1.11 matt * We need to use the coherent dma tag for the GMAC.
284 1.10 matt */
285 1.11 matt sc->sc_dmat = &bcm53xx_coherent_dma_tag;
286 1.24 matt #if _ARM32_NEED_BUS_DMA_BOUNCE
287 1.24 matt if (device_cfdata(self)->cf_flags & 2) {
288 1.24 matt sc->sc_dmat = &bcm53xx_bounce_dma_tag;
289 1.24 matt }
290 1.24 matt #endif
291 1.10 matt
292 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
293 1.2 matt if (eaprop == NULL) {
294 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
295 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
296 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
297 1.2 matt aprint_error(": mac-address property is missing\n");
298 1.2 matt return;
299 1.2 matt }
300 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
301 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
302 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
303 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
304 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
305 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
306 1.2 matt } else {
307 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
308 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
309 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
310 1.2 matt ETHER_ADDR_LEN);
311 1.2 matt }
312 1.2 matt sc->sc_dev = self;
313 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
314 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
315 1.2 matt
316 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
317 1.1 matt
318 1.1 matt aprint_naive("\n");
319 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
320 1.1 matt
321 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
322 1.2 matt if (error) {
323 1.2 matt aprint_error(": failed to init rxq: %d\n", error);
324 1.30 msaitoh goto fail_1;
325 1.2 matt }
326 1.2 matt
327 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
328 1.2 matt if (error) {
329 1.2 matt aprint_error(": failed to init txq: %d\n", error);
330 1.30 msaitoh goto fail_1;
331 1.2 matt }
332 1.2 matt
333 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
334 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
335 1.2 matt if (error) {
336 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
337 1.30 msaitoh goto fail_1;
338 1.2 matt }
339 1.2 matt
340 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
341 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
342 1.2 matt if (error) {
343 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
344 1.30 msaitoh goto fail_1;
345 1.2 matt }
346 1.2 matt
347 1.8 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
348 1.9 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
349 1.8 matt if (error) {
350 1.8 matt aprint_error(": failed to create workqueue: %d\n", error);
351 1.30 msaitoh goto fail_2;
352 1.8 matt }
353 1.8 matt
354 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
355 1.2 matt bcmeth_soft_intr, sc);
356 1.1 matt
357 1.30 msaitoh if (sc->sc_ih == NULL) {
358 1.30 msaitoh aprint_error_dev(self, "failed to establish interrupt %d\n",
359 1.30 msaitoh loc->loc_intrs[0]);
360 1.30 msaitoh goto fail_3;
361 1.30 msaitoh }
362 1.30 msaitoh
363 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
364 1.1 matt bcmeth_intr, sc);
365 1.1 matt
366 1.1 matt if (sc->sc_ih == NULL) {
367 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
368 1.1 matt loc->loc_intrs[0]);
369 1.30 msaitoh goto fail_4;
370 1.1 matt } else {
371 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
372 1.1 matt loc->loc_intrs[0]);
373 1.1 matt }
374 1.2 matt
375 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
376 1.2 matt ether_sprintf(sc->sc_enaddr));
377 1.2 matt
378 1.2 matt /*
379 1.2 matt * Since each port in plugged into the switch/flow-accelerator,
380 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
381 1.2 matt */
382 1.2 matt int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
383 1.2 matt //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
384 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
385 1.2 matt bcmeth_mediastatus);
386 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
387 1.2 matt ifmedia_set(&sc->sc_media, ifmedia);
388 1.2 matt
389 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
390 1.2 matt
391 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
392 1.2 matt ifp->if_softc = sc;
393 1.2 matt ifp->if_baudrate = IF_Mbps(1000);
394 1.2 matt ifp->if_capabilities = 0;
395 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
396 1.16 matt #ifdef BCMETH_MPSAFE
397 1.16 matt ifp->if_flags2 = IFF2_MPSAFE;
398 1.16 matt #endif
399 1.2 matt ifp->if_ioctl = bcmeth_ifioctl;
400 1.2 matt ifp->if_start = bcmeth_ifstart;
401 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
402 1.2 matt ifp->if_init = bcmeth_ifinit;
403 1.2 matt ifp->if_stop = bcmeth_ifstop;
404 1.2 matt IFQ_SET_READY(&ifp->if_snd);
405 1.2 matt
406 1.2 matt bcmeth_ifstop(ifp, true);
407 1.2 matt
408 1.2 matt /*
409 1.2 matt * Attach the interface.
410 1.2 matt */
411 1.30 msaitoh error = if_initialize(ifp);
412 1.30 msaitoh if (error != 0) {
413 1.30 msaitoh aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n",
414 1.30 msaitoh error);
415 1.30 msaitoh goto fail_5;
416 1.30 msaitoh }
417 1.2 matt ether_ifattach(ifp, sc->sc_enaddr);
418 1.27 ozaki if_register(ifp);
419 1.2 matt
420 1.18 matt #ifdef BCMETH_COUNTERS
421 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
422 1.2 matt NULL, xname, "intr");
423 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
424 1.2 matt NULL, xname, "soft intr");
425 1.8 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
426 1.8 matt NULL, xname, "work items");
427 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
428 1.2 matt NULL, xname, "tx stalls");
429 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC,
430 1.10 matt NULL, xname, "rx badmagic lo");
431 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC,
432 1.10 matt NULL, xname, "rx badmagic hi");
433 1.18 matt #endif
434 1.30 msaitoh
435 1.30 msaitoh return;
436 1.30 msaitoh
437 1.30 msaitoh fail_5:
438 1.30 msaitoh ifmedia_removeall(&sc->sc_media);
439 1.30 msaitoh fail_4:
440 1.30 msaitoh intr_disestablish(sc->sc_ih);
441 1.30 msaitoh fail_3:
442 1.30 msaitoh softint_disestablish(sc->sc_soft_ih);
443 1.30 msaitoh fail_2:
444 1.30 msaitoh workqueue_destroy(sc->sc_workq);
445 1.30 msaitoh fail_1:
446 1.30 msaitoh mutex_obj_free(sc->sc_lock);
447 1.30 msaitoh mutex_obj_free(sc->sc_hwlock);
448 1.2 matt }
449 1.2 matt
450 1.2 matt static int
451 1.2 matt bcmeth_mediachange(struct ifnet *ifp)
452 1.2 matt {
453 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
454 1.2 matt return 0;
455 1.2 matt }
456 1.2 matt
457 1.2 matt static void
458 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
459 1.2 matt {
460 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
461 1.2 matt
462 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
463 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
464 1.2 matt }
465 1.2 matt
466 1.2 matt static uint64_t
467 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
468 1.2 matt {
469 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
470 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
471 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
472 1.19 matt | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0
473 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
474 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
475 1.2 matt }
476 1.2 matt
477 1.2 matt static int
478 1.2 matt bcmeth_ifinit(struct ifnet *ifp)
479 1.2 matt {
480 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
481 1.2 matt int error = 0;
482 1.2 matt
483 1.32 riastrad sc->sc_maxfrm = uimax(ifp->if_mtu + 32, MCLBYTES);
484 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
485 1.2 matt return error;
486 1.2 matt
487 1.2 matt KASSERT(ifp->if_flags & IFF_UP);
488 1.2 matt
489 1.2 matt /*
490 1.2 matt * Stop the interface
491 1.2 matt */
492 1.2 matt bcmeth_ifstop(ifp, 0);
493 1.2 matt
494 1.2 matt /*
495 1.19 matt * Reserve enough space at the front so that we can insert a maxsized
496 1.19 matt * link header and a VLAN tag. Also make sure we have enough room for
497 1.19 matt * the rcvsts field as well.
498 1.19 matt */
499 1.19 matt KASSERT(ALIGN(max_linkhdr) == max_linkhdr);
500 1.19 matt KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu",
501 1.19 matt max_linkhdr, sizeof(struct ether_header));
502 1.19 matt sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header);
503 1.19 matt if (sc->sc_rcvoffset <= 4)
504 1.19 matt sc->sc_rcvoffset += 4;
505 1.19 matt KASSERT((sc->sc_rcvoffset & 3) == 2);
506 1.19 matt KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET));
507 1.19 matt KASSERT(sc->sc_rcvoffset >= 6);
508 1.19 matt
509 1.19 matt /*
510 1.2 matt * If our frame size has changed (or it's our first time through)
511 1.2 matt * destroy the existing transmit mapcache.
512 1.2 matt */
513 1.2 matt if (sc->sc_tx_mapcache != NULL
514 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
515 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
516 1.2 matt sc->sc_tx_mapcache = NULL;
517 1.2 matt }
518 1.2 matt
519 1.2 matt if (sc->sc_tx_mapcache == NULL) {
520 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
521 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
522 1.2 matt if (error)
523 1.2 matt return error;
524 1.2 matt }
525 1.2 matt
526 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
527 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
528 1.2 matt | RX_ENA | TX_ENA;
529 1.2 matt
530 1.2 matt if (ifp->if_flags & IFF_PROMISC) {
531 1.2 matt sc->sc_cmdcfg |= PROMISC_EN;
532 1.2 matt } else {
533 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
534 1.2 matt }
535 1.2 matt
536 1.21 matt const uint8_t * const lladdr = CLLADDR(ifp->if_sadl);
537 1.21 matt const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr);
538 1.21 matt
539 1.21 matt /*
540 1.21 matt * We make sure that a received Ethernet packet start on a non-word
541 1.21 matt * boundary so that the packet payload will be on a word boundary.
542 1.21 matt * So to check the destination address we keep around two words to
543 1.21 matt * quickly compare with.
544 1.21 matt */
545 1.21 matt #if __ARMEL__
546 1.21 matt sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8);
547 1.21 matt sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8)
548 1.21 matt | (lladdr[4] << 16) | (lladdr[5] << 24);
549 1.21 matt #else
550 1.21 matt sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8);
551 1.21 matt sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8)
552 1.21 matt | (lladdr[1] << 16) | (lladdr[2] << 24);
553 1.21 matt #endif
554 1.2 matt
555 1.2 matt sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
556 1.2 matt
557 1.2 matt /* 5. Load RCVADDR_LO with new pointer */
558 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
559 1.2 matt
560 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
561 1.19 matt __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET)
562 1.2 matt | RCVCTL_PARITY_DIS
563 1.2 matt | RCVCTL_OFLOW_CONTINUE
564 1.17 matt | __SHIFTIN(3, RCVCTL_BURSTLEN));
565 1.2 matt
566 1.2 matt /* 6. Load XMTADDR_LO with new pointer */
567 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
568 1.2 matt
569 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
570 1.2 matt | XMTCTL_PARITY_DIS
571 1.17 matt | __SHIFTIN(3, XMTCTL_BURSTLEN));
572 1.2 matt
573 1.2 matt /* 7. Setup other UNIMAC registers */
574 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
575 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
576 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
577 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
578 1.2 matt
579 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
580 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
581 1.2 matt devctl &= ~FLOW_CTRL_MODE;
582 1.2 matt devctl &= ~MIB_RD_RESET_EN;
583 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
584 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
585 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
586 1.2 matt
587 1.3 matt /* Setup lazy receive (at most 1ms). */
588 1.22 matt const struct cpu_softc * const cpu = curcpu()->ci_softc;
589 1.8 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
590 1.22 matt | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT);
591 1.8 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
592 1.3 matt
593 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
594 1.2 matt sc->sc_intmask |= XMTINT_0|XMTUF;
595 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
596 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
597 1.2 matt
598 1.2 matt
599 1.2 matt /* 12. Enable receive queues in RQUEUE, */
600 1.2 matt sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
601 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
602 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
603 1.2 matt
604 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
605 1.3 matt
606 1.3 matt #if 0
607 1.3 matt aprint_normal_dev(sc->sc_dev,
608 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
609 1.3 matt devctl, sc->sc_cmdcfg,
610 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
611 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
612 1.2 matt #endif
613 1.2 matt
614 1.2 matt sc->sc_soft_flags = 0;
615 1.2 matt
616 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
617 1.2 matt
618 1.2 matt ifp->if_flags |= IFF_RUNNING;
619 1.2 matt
620 1.2 matt return error;
621 1.2 matt }
622 1.2 matt
623 1.2 matt static void
624 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
625 1.2 matt {
626 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
627 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
628 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
629 1.2 matt
630 1.2 matt KASSERT(!cpu_intr_p());
631 1.2 matt
632 1.2 matt sc->sc_soft_flags = 0;
633 1.16 matt sc->sc_work_flags = 0;
634 1.2 matt
635 1.2 matt /* Disable Rx processing */
636 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
637 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
638 1.2 matt
639 1.2 matt /* Disable Tx processing */
640 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
641 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
642 1.2 matt
643 1.2 matt /* Disable all interrupts */
644 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
645 1.2 matt
646 1.2 matt for (;;) {
647 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
648 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
649 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
650 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
651 1.2 matt break;
652 1.2 matt delay(50);
653 1.2 matt }
654 1.2 matt /*
655 1.2 matt * Now reset the controller.
656 1.2 matt *
657 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
658 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
659 1.2 matt */
660 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
661 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
662 1.2 matt sc->sc_intmask = 0;
663 1.2 matt ifp->if_flags &= ~IFF_RUNNING;
664 1.2 matt
665 1.2 matt /*
666 1.2 matt * Let's consume any remaining transmitted packets. And if we are
667 1.2 matt * disabling the interface, purge ourselves of any untransmitted
668 1.2 matt * packets. But don't consume any received packets, just drop them.
669 1.2 matt * If we aren't disabling the interface, save the mbufs in the
670 1.2 matt * receive queue for reuse.
671 1.2 matt */
672 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
673 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
674 1.2 matt if (disable) {
675 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
676 1.2 matt IF_PURGE(&ifp->if_snd);
677 1.2 matt }
678 1.2 matt
679 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
680 1.2 matt }
681 1.2 matt
682 1.2 matt static void
683 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
684 1.2 matt {
685 1.2 matt }
686 1.2 matt
687 1.2 matt static int
688 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
689 1.2 matt {
690 1.2 matt struct bcmeth_softc *sc = ifp->if_softc;
691 1.2 matt struct ifreq * const ifr = data;
692 1.2 matt const int s = splnet();
693 1.2 matt int error;
694 1.2 matt
695 1.2 matt switch (cmd) {
696 1.2 matt case SIOCSIFMEDIA:
697 1.2 matt case SIOCGIFMEDIA:
698 1.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
699 1.2 matt break;
700 1.2 matt
701 1.2 matt default:
702 1.2 matt error = ether_ioctl(ifp, cmd, data);
703 1.2 matt if (error != ENETRESET)
704 1.2 matt break;
705 1.2 matt
706 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
707 1.2 matt error = 0;
708 1.2 matt break;
709 1.2 matt }
710 1.2 matt error = bcmeth_ifinit(ifp);
711 1.2 matt break;
712 1.2 matt }
713 1.2 matt
714 1.2 matt splx(s);
715 1.2 matt return error;
716 1.2 matt }
717 1.2 matt
718 1.2 matt static void
719 1.2 matt bcmeth_rxq_desc_presync(
720 1.2 matt struct bcmeth_softc *sc,
721 1.2 matt struct bcmeth_rxqueue *rxq,
722 1.2 matt struct gmac_rxdb *rxdb,
723 1.2 matt size_t count)
724 1.2 matt {
725 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
726 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
727 1.2 matt BUS_DMASYNC_PREWRITE);
728 1.2 matt }
729 1.2 matt
730 1.2 matt static void
731 1.2 matt bcmeth_rxq_desc_postsync(
732 1.2 matt struct bcmeth_softc *sc,
733 1.2 matt struct bcmeth_rxqueue *rxq,
734 1.2 matt struct gmac_rxdb *rxdb,
735 1.2 matt size_t count)
736 1.2 matt {
737 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
738 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
739 1.2 matt BUS_DMASYNC_POSTWRITE);
740 1.2 matt }
741 1.2 matt
742 1.2 matt static void
743 1.2 matt bcmeth_txq_desc_presync(
744 1.2 matt struct bcmeth_softc *sc,
745 1.2 matt struct bcmeth_txqueue *txq,
746 1.2 matt struct gmac_txdb *txdb,
747 1.2 matt size_t count)
748 1.2 matt {
749 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
750 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
751 1.2 matt BUS_DMASYNC_PREWRITE);
752 1.2 matt }
753 1.2 matt
754 1.2 matt static void
755 1.2 matt bcmeth_txq_desc_postsync(
756 1.2 matt struct bcmeth_softc *sc,
757 1.2 matt struct bcmeth_txqueue *txq,
758 1.2 matt struct gmac_txdb *txdb,
759 1.2 matt size_t count)
760 1.2 matt {
761 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
762 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
763 1.2 matt BUS_DMASYNC_POSTWRITE);
764 1.2 matt }
765 1.2 matt
766 1.2 matt static bus_dmamap_t
767 1.2 matt bcmeth_mapcache_get(
768 1.2 matt struct bcmeth_softc *sc,
769 1.2 matt struct bcmeth_mapcache *dmc)
770 1.2 matt {
771 1.2 matt KASSERT(dmc->dmc_nmaps > 0);
772 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
773 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
774 1.2 matt }
775 1.2 matt
776 1.2 matt static void
777 1.2 matt bcmeth_mapcache_put(
778 1.2 matt struct bcmeth_softc *sc,
779 1.2 matt struct bcmeth_mapcache *dmc,
780 1.2 matt bus_dmamap_t map)
781 1.2 matt {
782 1.2 matt KASSERT(map != NULL);
783 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
784 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
785 1.2 matt }
786 1.2 matt
787 1.2 matt static void
788 1.2 matt bcmeth_mapcache_destroy(
789 1.2 matt struct bcmeth_softc *sc,
790 1.2 matt struct bcmeth_mapcache *dmc)
791 1.2 matt {
792 1.2 matt const size_t dmc_size =
793 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
794 1.2 matt
795 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
796 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
797 1.2 matt }
798 1.2 matt kmem_intr_free(dmc, dmc_size);
799 1.2 matt }
800 1.2 matt
801 1.2 matt static int
802 1.2 matt bcmeth_mapcache_create(
803 1.2 matt struct bcmeth_softc *sc,
804 1.2 matt struct bcmeth_mapcache **dmc_p,
805 1.2 matt size_t maxmaps,
806 1.2 matt size_t maxmapsize,
807 1.2 matt size_t maxseg)
808 1.2 matt {
809 1.2 matt const size_t dmc_size =
810 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
811 1.2 matt struct bcmeth_mapcache * const dmc =
812 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
813 1.2 matt
814 1.2 matt dmc->dmc_maxmaps = maxmaps;
815 1.2 matt dmc->dmc_nmaps = maxmaps;
816 1.2 matt dmc->dmc_maxmapsize = maxmapsize;
817 1.2 matt dmc->dmc_maxseg = maxseg;
818 1.2 matt
819 1.2 matt for (u_int i = 0; i < maxmaps; i++) {
820 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
821 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
822 1.2 matt BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
823 1.2 matt if (error) {
824 1.2 matt aprint_error_dev(sc->sc_dev,
825 1.2 matt "failed to creat dma map cache "
826 1.2 matt "entry %u of %zu: %d\n",
827 1.2 matt i, maxmaps, error);
828 1.2 matt while (i-- > 0) {
829 1.2 matt bus_dmamap_destroy(sc->sc_dmat,
830 1.2 matt dmc->dmc_maps[i]);
831 1.2 matt }
832 1.2 matt kmem_intr_free(dmc, dmc_size);
833 1.2 matt return error;
834 1.2 matt }
835 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
836 1.2 matt }
837 1.2 matt
838 1.2 matt *dmc_p = dmc;
839 1.2 matt
840 1.2 matt return 0;
841 1.2 matt }
842 1.2 matt
843 1.2 matt #if 0
844 1.2 matt static void
845 1.2 matt bcmeth_dmamem_free(
846 1.2 matt bus_dma_tag_t dmat,
847 1.2 matt size_t map_size,
848 1.2 matt bus_dma_segment_t *seg,
849 1.2 matt bus_dmamap_t map,
850 1.2 matt void *kvap)
851 1.2 matt {
852 1.2 matt bus_dmamap_destroy(dmat, map);
853 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
854 1.2 matt bus_dmamem_free(dmat, seg, 1);
855 1.2 matt }
856 1.2 matt #endif
857 1.2 matt
858 1.2 matt static int
859 1.2 matt bcmeth_dmamem_alloc(
860 1.2 matt bus_dma_tag_t dmat,
861 1.2 matt size_t map_size,
862 1.2 matt bus_dma_segment_t *seg,
863 1.2 matt bus_dmamap_t *map,
864 1.2 matt void **kvap)
865 1.2 matt {
866 1.2 matt int error;
867 1.2 matt int nseg;
868 1.2 matt
869 1.2 matt *kvap = NULL;
870 1.2 matt *map = NULL;
871 1.2 matt
872 1.10 matt error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0,
873 1.2 matt seg, 1, &nseg, 0);
874 1.2 matt if (error)
875 1.2 matt return error;
876 1.2 matt
877 1.2 matt KASSERT(nseg == 1);
878 1.2 matt
879 1.10 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0);
880 1.2 matt if (error == 0) {
881 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
882 1.2 matt map);
883 1.2 matt if (error == 0) {
884 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
885 1.2 matt NULL, 0);
886 1.2 matt if (error == 0)
887 1.2 matt return 0;
888 1.2 matt bus_dmamap_destroy(dmat, *map);
889 1.2 matt *map = NULL;
890 1.2 matt }
891 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
892 1.2 matt *kvap = NULL;
893 1.2 matt }
894 1.2 matt bus_dmamem_free(dmat, seg, nseg);
895 1.2 matt return 0;
896 1.2 matt }
897 1.2 matt
898 1.2 matt static struct mbuf *
899 1.2 matt bcmeth_rx_buf_alloc(
900 1.2 matt struct bcmeth_softc *sc)
901 1.2 matt {
902 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
903 1.2 matt if (m == NULL) {
904 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
905 1.2 matt return NULL;
906 1.2 matt }
907 1.2 matt MCLGET(m, M_DONTWAIT);
908 1.2 matt if ((m->m_flags & M_EXT) == 0) {
909 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
910 1.2 matt m_freem(m);
911 1.2 matt return NULL;
912 1.2 matt }
913 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
914 1.2 matt
915 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
916 1.2 matt if (map == NULL) {
917 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
918 1.2 matt m_freem(m);
919 1.2 matt return NULL;
920 1.2 matt }
921 1.2 matt M_SETCTX(m, map);
922 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
923 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
924 1.2 matt BUS_DMA_READ|BUS_DMA_NOWAIT);
925 1.2 matt if (error) {
926 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
927 1.2 matt error);
928 1.2 matt M_SETCTX(m, NULL);
929 1.2 matt m_freem(m);
930 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
931 1.2 matt return NULL;
932 1.2 matt }
933 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
934 1.16 matt #ifdef BCMETH_RCVMAGIC
935 1.25 matt *mtod(m, uint32_t *) = htole32(BCMETH_RCVMAGIC);
936 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
937 1.10 matt BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
938 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t),
939 1.10 matt map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD);
940 1.16 matt #else
941 1.23 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
942 1.16 matt BUS_DMASYNC_PREREAD);
943 1.16 matt #endif
944 1.2 matt
945 1.2 matt return m;
946 1.2 matt }
947 1.2 matt
948 1.2 matt static void
949 1.2 matt bcmeth_rx_map_unload(
950 1.2 matt struct bcmeth_softc *sc,
951 1.2 matt struct mbuf *m)
952 1.2 matt {
953 1.2 matt KASSERT(m);
954 1.2 matt for (; m != NULL; m = m->m_next) {
955 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
956 1.2 matt KASSERT(map);
957 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
958 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
959 1.2 matt BUS_DMASYNC_POSTREAD);
960 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
961 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
962 1.2 matt M_SETCTX(m, NULL);
963 1.2 matt }
964 1.2 matt }
965 1.2 matt
966 1.2 matt static bool
967 1.2 matt bcmeth_rxq_produce(
968 1.2 matt struct bcmeth_softc *sc,
969 1.2 matt struct bcmeth_rxqueue *rxq)
970 1.2 matt {
971 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
972 1.7 matt bool produced = false;
973 1.7 matt
974 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
975 1.2 matt struct mbuf *m;
976 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
977 1.2 matt if (m == NULL) {
978 1.2 matt m = bcmeth_rx_buf_alloc(sc);
979 1.2 matt if (m == NULL) {
980 1.2 matt printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
981 1.2 matt break;
982 1.2 matt }
983 1.2 matt }
984 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
985 1.2 matt KASSERT(map);
986 1.2 matt
987 1.25 matt producer->rxdb_buflen = htole32(MCLBYTES);
988 1.25 matt producer->rxdb_addrlo = htole32(map->dm_segs[0].ds_addr);
989 1.25 matt producer->rxdb_flags &= htole32(RXDB_FLAG_ET);
990 1.2 matt *rxq->rxq_mtail = m;
991 1.2 matt rxq->rxq_mtail = &m->m_next;
992 1.2 matt m->m_len = MCLBYTES;
993 1.2 matt m->m_next = NULL;
994 1.2 matt rxq->rxq_inuse++;
995 1.2 matt if (++producer == rxq->rxq_last) {
996 1.2 matt membar_producer();
997 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
998 1.2 matt rxq->rxq_last - rxq->rxq_producer);
999 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
1000 1.2 matt }
1001 1.7 matt produced = true;
1002 1.2 matt }
1003 1.7 matt if (produced) {
1004 1.2 matt membar_producer();
1005 1.7 matt if (producer != rxq->rxq_producer) {
1006 1.7 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
1007 1.7 matt producer - rxq->rxq_producer);
1008 1.7 matt rxq->rxq_producer = producer;
1009 1.7 matt }
1010 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
1011 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
1012 1.7 matt + ((uintptr_t)producer & RCVPTR));
1013 1.2 matt }
1014 1.2 matt return true;
1015 1.2 matt }
1016 1.2 matt
1017 1.2 matt static void
1018 1.2 matt bcmeth_rx_input(
1019 1.2 matt struct bcmeth_softc *sc,
1020 1.2 matt struct mbuf *m,
1021 1.2 matt uint32_t rxdb_flags)
1022 1.2 matt {
1023 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1024 1.2 matt
1025 1.2 matt bcmeth_rx_map_unload(sc, m);
1026 1.2 matt
1027 1.19 matt m_adj(m, sc->sc_rcvoffset);
1028 1.2 matt
1029 1.21 matt /*
1030 1.21 matt * If we are in promiscuous mode and this isn't a multicast, check the
1031 1.21 matt * destination address to make sure it matches our own. If it doesn't,
1032 1.21 matt * mark the packet as being received promiscuously.
1033 1.21 matt */
1034 1.21 matt if ((sc->sc_cmdcfg & PROMISC_EN)
1035 1.21 matt && (m->m_data[0] & 1) == 0
1036 1.21 matt && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0]
1037 1.21 matt || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) {
1038 1.21 matt m->m_flags |= M_PROMISC;
1039 1.2 matt }
1040 1.28 ozaki m_set_rcvif(m, ifp);
1041 1.2 matt
1042 1.2 matt ifp->if_ibytes += m->m_pkthdr.len;
1043 1.2 matt
1044 1.2 matt /*
1045 1.2 matt * Let's give it to the network subsystm to deal with.
1046 1.2 matt */
1047 1.16 matt #ifdef BCMETH_MPSAFE
1048 1.16 matt mutex_exit(sc->sc_lock);
1049 1.27 ozaki if_input(ifp, m);
1050 1.16 matt mutex_enter(sc->sc_lock);
1051 1.16 matt #else
1052 1.2 matt int s = splnet();
1053 1.27 ozaki if_input(ifp, m);
1054 1.2 matt splx(s);
1055 1.16 matt #endif
1056 1.2 matt }
1057 1.2 matt
1058 1.20 matt static bool
1059 1.2 matt bcmeth_rxq_consume(
1060 1.2 matt struct bcmeth_softc *sc,
1061 1.20 matt struct bcmeth_rxqueue *rxq,
1062 1.20 matt size_t atmost)
1063 1.2 matt {
1064 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1065 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
1066 1.2 matt size_t rxconsumed = 0;
1067 1.20 matt bool didconsume = false;
1068 1.2 matt
1069 1.20 matt while (atmost-- > 0) {
1070 1.2 matt if (consumer == rxq->rxq_producer) {
1071 1.2 matt KASSERT(rxq->rxq_inuse == 0);
1072 1.20 matt break;
1073 1.2 matt }
1074 1.2 matt
1075 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1076 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1077 1.2 matt if (consumer == rxq->rxq_first + currdscr) {
1078 1.20 matt break;
1079 1.2 matt }
1080 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
1081 1.2 matt
1082 1.2 matt /*
1083 1.2 matt * We own this packet again. Copy the rxsts word from it.
1084 1.2 matt */
1085 1.2 matt rxconsumed++;
1086 1.20 matt didconsume = true;
1087 1.2 matt uint32_t rxsts;
1088 1.2 matt KASSERT(rxq->rxq_mhead != NULL);
1089 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
1090 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1091 1.2 matt BUS_DMASYNC_POSTREAD);
1092 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
1093 1.25 matt rxsts = le32toh(rxsts);
1094 1.10 matt #if 0
1095 1.10 matt KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd",
1096 1.10 matt currdscr, consumer - rxq->rxq_first);
1097 1.10 matt #endif
1098 1.2 matt
1099 1.2 matt /*
1100 1.2 matt * Get the count of descriptors. Fetch the correct number
1101 1.2 matt * of mbufs.
1102 1.2 matt */
1103 1.16 matt #ifdef BCMETH_RCVMAGIC
1104 1.10 matt size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1;
1105 1.16 matt #else
1106 1.16 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
1107 1.16 matt #endif
1108 1.2 matt struct mbuf *m = rxq->rxq_mhead;
1109 1.2 matt struct mbuf *m_last = m;
1110 1.2 matt for (size_t i = 1; i < desc_count; i++) {
1111 1.2 matt if (++consumer == rxq->rxq_last) {
1112 1.2 matt consumer = rxq->rxq_first;
1113 1.2 matt }
1114 1.10 matt KASSERTMSG(consumer != rxq->rxq_first + currdscr,
1115 1.10 matt "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd",
1116 1.10 matt i, rxsts, desc_count, currdscr,
1117 1.10 matt consumer - rxq->rxq_first);
1118 1.2 matt m_last = m_last->m_next;
1119 1.2 matt }
1120 1.2 matt
1121 1.2 matt /*
1122 1.2 matt * Now remove it/them from the list of enqueued mbufs.
1123 1.2 matt */
1124 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1125 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1126 1.2 matt m_last->m_next = NULL;
1127 1.2 matt
1128 1.16 matt #ifdef BCMETH_RCVMAGIC
1129 1.10 matt if (rxsts == BCMETH_RCVMAGIC) {
1130 1.10 matt ifp->if_ierrors++;
1131 1.10 matt if ((m->m_ext.ext_paddr >> 28) == 8) {
1132 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo);
1133 1.10 matt } else {
1134 1.18 matt BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi);
1135 1.10 matt }
1136 1.10 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1137 1.16 matt } else
1138 1.16 matt #endif /* BCMETH_RCVMAGIC */
1139 1.16 matt if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
1140 1.2 matt aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
1141 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
1142 1.2 matt /*
1143 1.2 matt * We encountered an error, take the mbufs and add them
1144 1.2 matt * to the rx bufcache so we can quickly reuse them.
1145 1.2 matt */
1146 1.2 matt ifp->if_ierrors++;
1147 1.2 matt do {
1148 1.2 matt struct mbuf *m0 = m->m_next;
1149 1.2 matt m->m_next = NULL;
1150 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1151 1.2 matt m = m0;
1152 1.2 matt } while (m);
1153 1.2 matt } else {
1154 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1155 1.19 matt framelen += sc->sc_rcvoffset;
1156 1.2 matt m->m_pkthdr.len = framelen;
1157 1.2 matt if (desc_count == 1) {
1158 1.2 matt KASSERT(framelen <= MCLBYTES);
1159 1.2 matt m->m_len = framelen;
1160 1.2 matt } else {
1161 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1162 1.2 matt }
1163 1.16 matt
1164 1.16 matt #ifdef BCMETH_MPSAFE
1165 1.16 matt /*
1166 1.16 matt * Wrap at the last entry!
1167 1.16 matt */
1168 1.16 matt if (++consumer == rxq->rxq_last) {
1169 1.25 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET));
1170 1.16 matt rxq->rxq_consumer = rxq->rxq_first;
1171 1.16 matt } else {
1172 1.16 matt rxq->rxq_consumer = consumer;
1173 1.16 matt }
1174 1.16 matt rxq->rxq_inuse -= rxconsumed;
1175 1.16 matt #endif /* BCMETH_MPSAFE */
1176 1.16 matt
1177 1.16 matt /*
1178 1.16 matt * Receive the packet (which releases our lock)
1179 1.16 matt */
1180 1.2 matt bcmeth_rx_input(sc, m, rxsts);
1181 1.16 matt
1182 1.16 matt #ifdef BCMETH_MPSAFE
1183 1.16 matt /*
1184 1.16 matt * Since we had to give up our lock, we need to
1185 1.16 matt * refresh these.
1186 1.16 matt */
1187 1.16 matt consumer = rxq->rxq_consumer;
1188 1.16 matt rxconsumed = 0;
1189 1.16 matt continue;
1190 1.16 matt #endif /* BCMETH_MPSAFE */
1191 1.2 matt }
1192 1.2 matt
1193 1.2 matt /*
1194 1.2 matt * Wrap at the last entry!
1195 1.2 matt */
1196 1.2 matt if (++consumer == rxq->rxq_last) {
1197 1.25 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET));
1198 1.2 matt consumer = rxq->rxq_first;
1199 1.2 matt }
1200 1.2 matt }
1201 1.20 matt
1202 1.20 matt /*
1203 1.20 matt * Update queue info.
1204 1.20 matt */
1205 1.20 matt rxq->rxq_consumer = consumer;
1206 1.20 matt rxq->rxq_inuse -= rxconsumed;
1207 1.20 matt
1208 1.20 matt /*
1209 1.20 matt * Did we consume anything?
1210 1.20 matt */
1211 1.20 matt return didconsume;
1212 1.2 matt }
1213 1.2 matt
1214 1.2 matt static void
1215 1.2 matt bcmeth_rxq_purge(
1216 1.2 matt struct bcmeth_softc *sc,
1217 1.2 matt struct bcmeth_rxqueue *rxq,
1218 1.2 matt bool discard)
1219 1.2 matt {
1220 1.2 matt struct mbuf *m;
1221 1.2 matt
1222 1.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1223 1.2 matt if (discard) {
1224 1.2 matt bcmeth_rx_map_unload(sc, m);
1225 1.2 matt m_freem(m);
1226 1.2 matt } else {
1227 1.2 matt while (m != NULL) {
1228 1.2 matt struct mbuf *m0 = m->m_next;
1229 1.2 matt m->m_next = NULL;
1230 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1231 1.2 matt m = m0;
1232 1.2 matt }
1233 1.2 matt }
1234 1.2 matt
1235 1.2 matt }
1236 1.2 matt
1237 1.2 matt rxq->rxq_mhead = NULL;
1238 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1239 1.2 matt rxq->rxq_inuse = 0;
1240 1.1 matt }
1241 1.1 matt
1242 1.1 matt static void
1243 1.2 matt bcmeth_rxq_reset(
1244 1.2 matt struct bcmeth_softc *sc,
1245 1.2 matt struct bcmeth_rxqueue *rxq)
1246 1.2 matt {
1247 1.2 matt /*
1248 1.3 matt * sync all the descriptors
1249 1.3 matt */
1250 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1251 1.3 matt rxq->rxq_last - rxq->rxq_first);
1252 1.3 matt
1253 1.3 matt /*
1254 1.3 matt * Make sure we own all descriptors in the ring.
1255 1.3 matt */
1256 1.3 matt struct gmac_rxdb *rxdb;
1257 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1258 1.25 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_IC);
1259 1.3 matt }
1260 1.3 matt
1261 1.3 matt /*
1262 1.3 matt * Last descriptor has the wrap flag.
1263 1.3 matt */
1264 1.25 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_ET|RXDB_FLAG_IC);
1265 1.3 matt
1266 1.3 matt /*
1267 1.2 matt * Reset the producer consumer indexes.
1268 1.2 matt */
1269 1.2 matt rxq->rxq_consumer = rxq->rxq_first;
1270 1.2 matt rxq->rxq_producer = rxq->rxq_first;
1271 1.2 matt rxq->rxq_inuse = 0;
1272 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1273 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1274 1.2 matt
1275 1.2 matt sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1276 1.2 matt
1277 1.2 matt /*
1278 1.2 matt * Restart the receiver at the first descriptor
1279 1.2 matt */
1280 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1281 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1282 1.2 matt }
1283 1.2 matt
1284 1.2 matt static int
1285 1.2 matt bcmeth_rxq_attach(
1286 1.2 matt struct bcmeth_softc *sc,
1287 1.2 matt struct bcmeth_rxqueue *rxq,
1288 1.2 matt u_int qno)
1289 1.2 matt {
1290 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1291 1.2 matt int error;
1292 1.2 matt void *descs;
1293 1.2 matt
1294 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1295 1.2 matt
1296 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1297 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1298 1.2 matt if (error)
1299 1.2 matt return error;
1300 1.2 matt
1301 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1302 1.2 matt rxq->rxq_first = descs;
1303 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1304 1.2 matt rxq->rxq_consumer = descs;
1305 1.2 matt rxq->rxq_producer = descs;
1306 1.2 matt
1307 1.2 matt bcmeth_rxq_purge(sc, rxq, true);
1308 1.2 matt bcmeth_rxq_reset(sc, rxq);
1309 1.2 matt
1310 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1311 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1312 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1313 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1314 1.10 matt rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1;
1315 1.2 matt
1316 1.2 matt return 0;
1317 1.2 matt }
1318 1.2 matt
1319 1.2 matt static bool
1320 1.2 matt bcmeth_txq_active_p(
1321 1.2 matt struct bcmeth_softc * const sc,
1322 1.2 matt struct bcmeth_txqueue *txq)
1323 1.1 matt {
1324 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1325 1.2 matt }
1326 1.2 matt
1327 1.2 matt static bool
1328 1.2 matt bcmeth_txq_fillable_p(
1329 1.2 matt struct bcmeth_softc * const sc,
1330 1.2 matt struct bcmeth_txqueue *txq)
1331 1.2 matt {
1332 1.2 matt return txq->txq_free >= txq->txq_threshold;
1333 1.2 matt }
1334 1.2 matt
1335 1.2 matt static int
1336 1.2 matt bcmeth_txq_attach(
1337 1.2 matt struct bcmeth_softc *sc,
1338 1.2 matt struct bcmeth_txqueue *txq,
1339 1.2 matt u_int qno)
1340 1.2 matt {
1341 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1342 1.2 matt int error;
1343 1.2 matt void *descs;
1344 1.2 matt
1345 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1346 1.2 matt
1347 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1348 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1349 1.2 matt if (error)
1350 1.2 matt return error;
1351 1.2 matt
1352 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1353 1.2 matt txq->txq_first = descs;
1354 1.2 matt txq->txq_last = txq->txq_first + desc_count;
1355 1.2 matt txq->txq_consumer = descs;
1356 1.2 matt txq->txq_producer = descs;
1357 1.2 matt
1358 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1359 1.2 matt
1360 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1361 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1362 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1363 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1364 1.10 matt txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1;
1365 1.2 matt
1366 1.2 matt bcmeth_txq_reset(sc, txq);
1367 1.1 matt
1368 1.2 matt return 0;
1369 1.1 matt }
1370 1.1 matt
1371 1.1 matt static int
1372 1.2 matt bcmeth_txq_map_load(
1373 1.2 matt struct bcmeth_softc *sc,
1374 1.2 matt struct bcmeth_txqueue *txq,
1375 1.2 matt struct mbuf *m)
1376 1.2 matt {
1377 1.2 matt bus_dmamap_t map;
1378 1.2 matt int error;
1379 1.2 matt
1380 1.2 matt map = M_GETCTX(m, bus_dmamap_t);
1381 1.2 matt if (map != NULL)
1382 1.2 matt return 0;
1383 1.2 matt
1384 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1385 1.2 matt if (map == NULL)
1386 1.2 matt return ENOMEM;
1387 1.2 matt
1388 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1389 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1390 1.2 matt if (error)
1391 1.2 matt return error;
1392 1.2 matt
1393 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1394 1.2 matt BUS_DMASYNC_PREWRITE);
1395 1.2 matt M_SETCTX(m, map);
1396 1.2 matt return 0;
1397 1.2 matt }
1398 1.2 matt
1399 1.2 matt static void
1400 1.2 matt bcmeth_txq_map_unload(
1401 1.2 matt struct bcmeth_softc *sc,
1402 1.2 matt struct bcmeth_txqueue *txq,
1403 1.2 matt struct mbuf *m)
1404 1.2 matt {
1405 1.2 matt KASSERT(m);
1406 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1407 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1408 1.2 matt BUS_DMASYNC_POSTWRITE);
1409 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1410 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1411 1.2 matt }
1412 1.2 matt
1413 1.2 matt static bool
1414 1.2 matt bcmeth_txq_produce(
1415 1.2 matt struct bcmeth_softc *sc,
1416 1.2 matt struct bcmeth_txqueue *txq,
1417 1.2 matt struct mbuf *m)
1418 1.2 matt {
1419 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1420 1.2 matt
1421 1.2 matt if (map->dm_nsegs > txq->txq_free)
1422 1.2 matt return false;
1423 1.2 matt
1424 1.2 matt /*
1425 1.2 matt * TCP Offload flag must be set in the first descriptor.
1426 1.2 matt */
1427 1.2 matt struct gmac_txdb *producer = txq->txq_producer;
1428 1.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1429 1.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1430 1.2 matt
1431 1.2 matt /*
1432 1.2 matt * If we've produced enough descriptors without consuming any
1433 1.2 matt * we need to ask for an interrupt to reclaim some.
1434 1.2 matt */
1435 1.2 matt txq->txq_lastintr += map->dm_nsegs;
1436 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1437 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1438 1.2 matt txq->txq_lastintr = 0;
1439 1.2 matt last_flags |= TXDB_FLAG_IC;
1440 1.2 matt }
1441 1.2 matt
1442 1.2 matt KASSERT(producer != txq->txq_last);
1443 1.2 matt
1444 1.2 matt struct gmac_txdb *start = producer;
1445 1.2 matt size_t count = map->dm_nsegs;
1446 1.25 matt producer->txdb_flags |= htole32(first_flags);
1447 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[0].ds_addr);
1448 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[0].ds_len);
1449 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1450 1.2 matt #if 0
1451 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1452 1.25 matt le32toh(producer->txdb_flags),
1453 1.25 matt le32toh(producer->txdb_buflen),
1454 1.25 matt le32toh(producer->txdb_addrlo),
1455 1.25 matt le32toh(producer->txdb_addrhi));
1456 1.2 matt #endif
1457 1.2 matt if (__predict_false(++producer == txq->txq_last)) {
1458 1.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1459 1.2 matt txq->txq_last - start);
1460 1.2 matt count -= txq->txq_last - start;
1461 1.2 matt producer = txq->txq_first;
1462 1.2 matt start = txq->txq_first;
1463 1.2 matt }
1464 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[i].ds_addr);
1465 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[i].ds_len);
1466 1.2 matt }
1467 1.25 matt producer->txdb_flags |= htole32(last_flags);
1468 1.2 matt #if 0
1469 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1470 1.25 matt le32toh(producer->txdb_flags), le32toh(producer->txdb_buflen),
1471 1.25 matt le32toh(producer->txdb_addrlo), le32toh(producer->txdb_addrhi));
1472 1.2 matt #endif
1473 1.10 matt if (count)
1474 1.10 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1475 1.2 matt
1476 1.2 matt /*
1477 1.2 matt * Reduce free count by the number of segments we consumed.
1478 1.2 matt */
1479 1.2 matt txq->txq_free -= map->dm_nsegs;
1480 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1481 1.25 matt KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & htole32(TXDB_FLAG_EF)) == 0);
1482 1.25 matt KASSERT(producer->txdb_flags & htole32(TXDB_FLAG_EF));
1483 1.2 matt
1484 1.2 matt #if 0
1485 1.2 matt printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1486 1.2 matt __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1487 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1488 1.2 matt #endif
1489 1.2 matt
1490 1.10 matt if (producer + 1 == txq->txq_last)
1491 1.2 matt txq->txq_producer = txq->txq_first;
1492 1.2 matt else
1493 1.10 matt txq->txq_producer = producer + 1;
1494 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1495 1.2 matt
1496 1.2 matt /*
1497 1.2 matt * Let the transmitter know there's more to do
1498 1.2 matt */
1499 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1500 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1501 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1502 1.2 matt
1503 1.2 matt return true;
1504 1.2 matt }
1505 1.2 matt
1506 1.16 matt static struct mbuf *
1507 1.16 matt bcmeth_copy_packet(struct mbuf *m)
1508 1.16 matt {
1509 1.16 matt struct mbuf *mext = NULL;
1510 1.16 matt size_t misalignment = 0;
1511 1.16 matt size_t hlen = 0;
1512 1.16 matt
1513 1.16 matt for (mext = m; mext != NULL; mext = mext->m_next) {
1514 1.16 matt if (mext->m_flags & M_EXT) {
1515 1.16 matt misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1516 1.16 matt break;
1517 1.16 matt }
1518 1.16 matt hlen += m->m_len;
1519 1.16 matt }
1520 1.16 matt
1521 1.16 matt struct mbuf *n = m->m_next;
1522 1.16 matt if (m != mext && hlen + misalignment <= MHLEN && false) {
1523 1.16 matt KASSERT(m->m_pktdat <= m->m_data && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]);
1524 1.16 matt size_t oldoff = m->m_data - m->m_pktdat;
1525 1.16 matt size_t off;
1526 1.16 matt if (mext == NULL) {
1527 1.16 matt off = (oldoff + hlen > MHLEN) ? 0 : oldoff;
1528 1.16 matt } else {
1529 1.16 matt off = MHLEN - (hlen + misalignment);
1530 1.16 matt }
1531 1.16 matt KASSERT(off + hlen + misalignment <= MHLEN);
1532 1.16 matt if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
1533 1.16 matt memmove(&m->m_pktdat[off], m->m_data, m->m_len);
1534 1.16 matt m->m_data = &m->m_pktdat[off];
1535 1.16 matt }
1536 1.16 matt m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]);
1537 1.16 matt m->m_len = hlen;
1538 1.16 matt m->m_next = mext;
1539 1.16 matt while (n != mext) {
1540 1.16 matt n = m_free(n);
1541 1.16 matt }
1542 1.16 matt return m;
1543 1.16 matt }
1544 1.16 matt
1545 1.16 matt struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type);
1546 1.16 matt if (m0 == NULL) {
1547 1.16 matt return NULL;
1548 1.16 matt }
1549 1.16 matt M_COPY_PKTHDR(m0, m);
1550 1.16 matt MCLAIM(m0, m->m_owner);
1551 1.16 matt if (m0->m_pkthdr.len > MHLEN) {
1552 1.16 matt MCLGET(m0, M_DONTWAIT);
1553 1.16 matt if ((m0->m_flags & M_EXT) == 0) {
1554 1.16 matt m_freem(m0);
1555 1.16 matt return NULL;
1556 1.16 matt }
1557 1.16 matt }
1558 1.16 matt m0->m_len = m->m_pkthdr.len;
1559 1.16 matt m_copydata(m, 0, m0->m_len, mtod(m0, void *));
1560 1.16 matt m_freem(m);
1561 1.16 matt return m0;
1562 1.16 matt }
1563 1.16 matt
1564 1.2 matt static bool
1565 1.2 matt bcmeth_txq_enqueue(
1566 1.2 matt struct bcmeth_softc *sc,
1567 1.2 matt struct bcmeth_txqueue *txq)
1568 1.2 matt {
1569 1.2 matt for (;;) {
1570 1.2 matt if (IF_QFULL(&txq->txq_mbufs))
1571 1.2 matt return false;
1572 1.2 matt struct mbuf *m = txq->txq_next;
1573 1.2 matt if (m == NULL) {
1574 1.2 matt int s = splnet();
1575 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1576 1.2 matt splx(s);
1577 1.2 matt if (m == NULL)
1578 1.2 matt return true;
1579 1.2 matt M_SETCTX(m, NULL);
1580 1.2 matt } else {
1581 1.2 matt txq->txq_next = NULL;
1582 1.2 matt }
1583 1.15 matt /*
1584 1.15 matt * If LINK2 is set and this packet uses multiple mbufs,
1585 1.15 matt * consolidate it into a single mbuf.
1586 1.15 matt */
1587 1.15 matt if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) {
1588 1.16 matt struct mbuf *m0 = bcmeth_copy_packet(m);
1589 1.15 matt if (m0 == NULL) {
1590 1.15 matt txq->txq_next = m;
1591 1.15 matt return true;
1592 1.15 matt }
1593 1.15 matt m = m0;
1594 1.15 matt }
1595 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1596 1.2 matt if (error) {
1597 1.2 matt aprint_error_dev(sc->sc_dev,
1598 1.2 matt "discarded packet due to "
1599 1.2 matt "dmamap load failure: %d\n", error);
1600 1.2 matt m_freem(m);
1601 1.2 matt continue;
1602 1.2 matt }
1603 1.2 matt KASSERT(txq->txq_next == NULL);
1604 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1605 1.2 matt txq->txq_next = m;
1606 1.2 matt return false;
1607 1.2 matt }
1608 1.2 matt KASSERT(txq->txq_next == NULL);
1609 1.2 matt }
1610 1.2 matt }
1611 1.2 matt
1612 1.2 matt static bool
1613 1.2 matt bcmeth_txq_consume(
1614 1.2 matt struct bcmeth_softc *sc,
1615 1.2 matt struct bcmeth_txqueue *txq)
1616 1.2 matt {
1617 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1618 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1619 1.2 matt size_t txfree = 0;
1620 1.2 matt
1621 1.2 matt #if 0
1622 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1623 1.2 matt #endif
1624 1.2 matt
1625 1.2 matt for (;;) {
1626 1.2 matt if (consumer == txq->txq_producer) {
1627 1.2 matt txq->txq_consumer = consumer;
1628 1.2 matt txq->txq_free += txfree;
1629 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree);
1630 1.2 matt #if 0
1631 1.5 matt printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1632 1.2 matt __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1633 1.2 matt #endif
1634 1.2 matt KASSERT(txq->txq_lastintr == 0);
1635 1.2 matt KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1636 1.2 matt return true;
1637 1.2 matt }
1638 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1639 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1640 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1641 1.2 matt txq->txq_consumer = consumer;
1642 1.2 matt txq->txq_free += txfree;
1643 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree);
1644 1.2 matt #if 0
1645 1.2 matt printf("%s: freed %zu descriptors\n",
1646 1.2 matt __func__, txfree);
1647 1.2 matt #endif
1648 1.2 matt return bcmeth_txq_fillable_p(sc, txq);
1649 1.2 matt }
1650 1.2 matt
1651 1.2 matt /*
1652 1.2 matt * If this is the last descriptor in the chain, get the
1653 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1654 1.2 matt */
1655 1.25 matt const uint32_t txdb_flags = le32toh(consumer->txdb_flags);
1656 1.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1657 1.2 matt struct mbuf *m;
1658 1.2 matt
1659 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1660 1.2 matt KASSERT(m);
1661 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1662 1.2 matt #if 0
1663 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1664 1.2 matt __func__, m, m->m_pkthdr.len);
1665 1.2 matt #endif
1666 1.31 msaitoh bpf_mtap(ifp, m, BPF_D_OUT);
1667 1.2 matt ifp->if_opackets++;
1668 1.2 matt ifp->if_obytes += m->m_pkthdr.len;
1669 1.2 matt if (m->m_flags & M_MCAST)
1670 1.2 matt ifp->if_omcasts++;
1671 1.2 matt m_freem(m);
1672 1.2 matt }
1673 1.2 matt
1674 1.2 matt /*
1675 1.2 matt * We own this packet again. Clear all flags except wrap.
1676 1.2 matt */
1677 1.2 matt txfree++;
1678 1.2 matt
1679 1.2 matt /*
1680 1.2 matt * Wrap at the last entry!
1681 1.2 matt */
1682 1.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1683 1.25 matt consumer->txdb_flags = htole32(TXDB_FLAG_ET);
1684 1.2 matt KASSERT(consumer + 1 == txq->txq_last);
1685 1.2 matt consumer = txq->txq_first;
1686 1.2 matt } else {
1687 1.2 matt consumer->txdb_flags = 0;
1688 1.2 matt consumer++;
1689 1.2 matt KASSERT(consumer < txq->txq_last);
1690 1.2 matt }
1691 1.2 matt }
1692 1.2 matt }
1693 1.2 matt
1694 1.2 matt static void
1695 1.2 matt bcmeth_txq_purge(
1696 1.2 matt struct bcmeth_softc *sc,
1697 1.2 matt struct bcmeth_txqueue *txq)
1698 1.2 matt {
1699 1.2 matt struct mbuf *m;
1700 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1701 1.2 matt
1702 1.2 matt for (;;) {
1703 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1704 1.2 matt if (m == NULL)
1705 1.2 matt break;
1706 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1707 1.2 matt m_freem(m);
1708 1.2 matt }
1709 1.2 matt if ((m = txq->txq_next) != NULL) {
1710 1.2 matt txq->txq_next = NULL;
1711 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1712 1.2 matt m_freem(m);
1713 1.2 matt }
1714 1.2 matt }
1715 1.2 matt
1716 1.2 matt static void
1717 1.2 matt bcmeth_txq_reset(
1718 1.2 matt struct bcmeth_softc *sc,
1719 1.2 matt struct bcmeth_txqueue *txq)
1720 1.2 matt {
1721 1.2 matt /*
1722 1.2 matt * sync all the descriptors
1723 1.2 matt */
1724 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1725 1.2 matt txq->txq_last - txq->txq_first);
1726 1.2 matt
1727 1.2 matt /*
1728 1.2 matt * Make sure we own all descriptors in the ring.
1729 1.2 matt */
1730 1.2 matt struct gmac_txdb *txdb;
1731 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1732 1.2 matt txdb->txdb_flags = 0;
1733 1.2 matt }
1734 1.2 matt
1735 1.2 matt /*
1736 1.2 matt * Last descriptor has the wrap flag.
1737 1.2 matt */
1738 1.25 matt txdb->txdb_flags = htole32(TXDB_FLAG_ET);
1739 1.2 matt
1740 1.2 matt /*
1741 1.2 matt * Reset the producer consumer indexes.
1742 1.2 matt */
1743 1.2 matt txq->txq_consumer = txq->txq_first;
1744 1.2 matt txq->txq_producer = txq->txq_first;
1745 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1746 1.2 matt txq->txq_threshold = txq->txq_free / 2;
1747 1.2 matt txq->txq_lastintr = 0;
1748 1.2 matt
1749 1.2 matt /*
1750 1.2 matt * What do we want to get interrupted on?
1751 1.2 matt */
1752 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1753 1.2 matt
1754 1.2 matt /*
1755 1.2 matt * Restart the transmiter at the first descriptor
1756 1.2 matt */
1757 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1758 1.2 matt txq->txq_descmap->dm_segs->ds_addr);
1759 1.2 matt }
1760 1.2 matt
1761 1.2 matt static void
1762 1.2 matt bcmeth_ifstart(struct ifnet *ifp)
1763 1.2 matt {
1764 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1765 1.2 matt
1766 1.16 matt if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) {
1767 1.16 matt return;
1768 1.16 matt }
1769 1.16 matt
1770 1.16 matt #ifdef BCMETH_MPSAFETX
1771 1.16 matt if (cpu_intr_p()) {
1772 1.16 matt #endif
1773 1.16 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1774 1.16 matt softint_schedule(sc->sc_soft_ih);
1775 1.16 matt #ifdef BCMETH_MPSAFETX
1776 1.16 matt } else {
1777 1.16 matt /*
1778 1.16 matt * Either we are in a softintr thread already or some other
1779 1.16 matt * thread so just borrow it to do the send and save ourselves
1780 1.16 matt * the overhead of a fast soft int.
1781 1.16 matt */
1782 1.16 matt bcmeth_soft_txintr(sc);
1783 1.16 matt }
1784 1.16 matt #endif
1785 1.2 matt }
1786 1.2 matt
1787 1.2 matt int
1788 1.1 matt bcmeth_intr(void *arg)
1789 1.1 matt {
1790 1.1 matt struct bcmeth_softc * const sc = arg;
1791 1.2 matt uint32_t soft_flags = 0;
1792 1.8 matt uint32_t work_flags = 0;
1793 1.1 matt int rv = 0;
1794 1.1 matt
1795 1.1 matt mutex_enter(sc->sc_hwlock);
1796 1.1 matt
1797 1.15 matt uint32_t intmask = sc->sc_intmask;
1798 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_intr);
1799 1.2 matt
1800 1.2 matt for (;;) {
1801 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1802 1.15 matt intstatus &= intmask;
1803 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1804 1.2 matt if (intstatus == 0) {
1805 1.2 matt break;
1806 1.2 matt }
1807 1.2 matt #if 0
1808 1.8 matt aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1809 1.8 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1810 1.2 matt #endif
1811 1.2 matt if (intstatus & RCVINT) {
1812 1.8 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1813 1.15 matt intmask &= ~RCVINT;
1814 1.8 matt
1815 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1816 1.8 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1817 1.8 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1818 1.8 matt /*
1819 1.8 matt * We wrapped at the end so count how far
1820 1.8 matt * we are from the end.
1821 1.8 matt */
1822 1.8 matt descs += rxq->rxq_last - rxq->rxq_consumer;
1823 1.8 matt } else {
1824 1.8 matt descs -= rxq->rxq_consumer - rxq->rxq_first;
1825 1.8 matt }
1826 1.8 matt /*
1827 1.8 matt * If we "timedout" we can't be hogging so use
1828 1.8 matt * softints. If we exceeded then we might hogging
1829 1.8 matt * so let the workqueue deal with them.
1830 1.8 matt */
1831 1.8 matt const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT);
1832 1.9 matt if (descs < framecount
1833 1.9 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1834 1.8 matt soft_flags |= SOFT_RXINTR;
1835 1.8 matt } else {
1836 1.8 matt work_flags |= WORK_RXINTR;
1837 1.8 matt }
1838 1.2 matt }
1839 1.2 matt
1840 1.2 matt if (intstatus & XMTINT_0) {
1841 1.15 matt intmask &= ~XMTINT_0;
1842 1.2 matt soft_flags |= SOFT_TXINTR;
1843 1.2 matt }
1844 1.2 matt
1845 1.2 matt if (intstatus & RCVDESCUF) {
1846 1.15 matt intmask &= ~RCVDESCUF;
1847 1.8 matt work_flags |= WORK_RXUNDERFLOW;
1848 1.2 matt }
1849 1.2 matt
1850 1.15 matt intstatus &= intmask;
1851 1.2 matt if (intstatus) {
1852 1.10 matt aprint_error_dev(sc->sc_dev,
1853 1.10 matt "intr: intstatus=%#x\n", intstatus);
1854 1.10 matt aprint_error_dev(sc->sc_dev,
1855 1.10 matt "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n",
1856 1.10 matt sc->sc_rxq.rxq_first,
1857 1.10 matt sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr,
1858 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr),
1859 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0),
1860 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1));
1861 1.10 matt aprint_error_dev(sc->sc_dev,
1862 1.10 matt "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n",
1863 1.10 matt sc->sc_txq.txq_first,
1864 1.10 matt sc->sc_txq.txq_descmap->dm_segs[0].ds_addr,
1865 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr),
1866 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0),
1867 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1));
1868 1.15 matt intmask &= ~intstatus;
1869 1.8 matt work_flags |= WORK_REINIT;
1870 1.2 matt break;
1871 1.2 matt }
1872 1.2 matt }
1873 1.2 matt
1874 1.15 matt if (intmask != sc->sc_intmask) {
1875 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1876 1.8 matt }
1877 1.8 matt
1878 1.8 matt if (work_flags) {
1879 1.8 matt if (sc->sc_work_flags == 0) {
1880 1.8 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1881 1.8 matt }
1882 1.8 matt atomic_or_32(&sc->sc_work_flags, work_flags);
1883 1.8 matt rv = 1;
1884 1.8 matt }
1885 1.8 matt
1886 1.2 matt if (soft_flags) {
1887 1.8 matt if (sc->sc_soft_flags == 0) {
1888 1.8 matt softint_schedule(sc->sc_soft_ih);
1889 1.8 matt }
1890 1.8 matt atomic_or_32(&sc->sc_soft_flags, soft_flags);
1891 1.2 matt rv = 1;
1892 1.2 matt }
1893 1.1 matt
1894 1.1 matt mutex_exit(sc->sc_hwlock);
1895 1.1 matt
1896 1.1 matt return rv;
1897 1.1 matt }
1898 1.2 matt
1899 1.16 matt #ifdef BCMETH_MPSAFETX
1900 1.16 matt void
1901 1.16 matt bcmeth_soft_txintr(struct bcmeth_softc *sc)
1902 1.16 matt {
1903 1.16 matt mutex_enter(sc->sc_lock);
1904 1.16 matt /*
1905 1.16 matt * Let's do what we came here for. Consume transmitted
1906 1.16 matt * packets off the the transmit ring.
1907 1.16 matt */
1908 1.16 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1909 1.16 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1910 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1911 1.16 matt sc->sc_if.if_flags |= IFF_OACTIVE;
1912 1.16 matt } else {
1913 1.16 matt sc->sc_if.if_flags &= ~IFF_OACTIVE;
1914 1.16 matt }
1915 1.16 matt if (sc->sc_if.if_flags & IFF_RUNNING) {
1916 1.16 matt mutex_spin_enter(sc->sc_hwlock);
1917 1.16 matt sc->sc_intmask |= XMTINT_0;
1918 1.16 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1919 1.16 matt mutex_spin_exit(sc->sc_hwlock);
1920 1.16 matt }
1921 1.16 matt mutex_exit(sc->sc_lock);
1922 1.16 matt }
1923 1.16 matt #endif /* BCMETH_MPSAFETX */
1924 1.16 matt
1925 1.2 matt void
1926 1.2 matt bcmeth_soft_intr(void *arg)
1927 1.2 matt {
1928 1.2 matt struct bcmeth_softc * const sc = arg;
1929 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1930 1.15 matt uint32_t intmask = 0;
1931 1.2 matt
1932 1.2 matt mutex_enter(sc->sc_lock);
1933 1.2 matt
1934 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1935 1.2 matt
1936 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr);
1937 1.2 matt
1938 1.8 matt if ((soft_flags & SOFT_TXINTR)
1939 1.8 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1940 1.8 matt /*
1941 1.8 matt * Let's do what we came here for. Consume transmitted
1942 1.8 matt * packets off the the transmit ring.
1943 1.8 matt */
1944 1.8 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1945 1.8 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1946 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1947 1.8 matt ifp->if_flags |= IFF_OACTIVE;
1948 1.8 matt } else {
1949 1.8 matt ifp->if_flags &= ~IFF_OACTIVE;
1950 1.8 matt }
1951 1.15 matt intmask |= XMTINT_0;
1952 1.8 matt }
1953 1.8 matt
1954 1.8 matt if (soft_flags & SOFT_RXINTR) {
1955 1.8 matt /*
1956 1.8 matt * Let's consume
1957 1.8 matt */
1958 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1959 1.20 matt sc->sc_rxq.rxq_threshold / 4)) {
1960 1.20 matt /*
1961 1.20 matt * We've consumed a quarter of the ring and still have
1962 1.20 matt * more to do. Refill the ring.
1963 1.20 matt */
1964 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1965 1.20 matt }
1966 1.15 matt intmask |= RCVINT;
1967 1.8 matt }
1968 1.8 matt
1969 1.8 matt if (ifp->if_flags & IFF_RUNNING) {
1970 1.8 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1971 1.14 matt mutex_spin_enter(sc->sc_hwlock);
1972 1.15 matt sc->sc_intmask |= intmask;
1973 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1974 1.14 matt mutex_spin_exit(sc->sc_hwlock);
1975 1.8 matt }
1976 1.8 matt
1977 1.8 matt mutex_exit(sc->sc_lock);
1978 1.8 matt }
1979 1.8 matt
1980 1.8 matt void
1981 1.8 matt bcmeth_worker(struct work *wk, void *arg)
1982 1.8 matt {
1983 1.8 matt struct bcmeth_softc * const sc = arg;
1984 1.8 matt struct ifnet * const ifp = &sc->sc_if;
1985 1.15 matt uint32_t intmask = 0;
1986 1.8 matt
1987 1.8 matt mutex_enter(sc->sc_lock);
1988 1.8 matt
1989 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_work);
1990 1.8 matt
1991 1.8 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1992 1.8 matt if (work_flags & WORK_REINIT) {
1993 1.2 matt int s = splnet();
1994 1.8 matt sc->sc_soft_flags = 0;
1995 1.2 matt bcmeth_ifinit(ifp);
1996 1.2 matt splx(s);
1997 1.8 matt work_flags &= ~WORK_RXUNDERFLOW;
1998 1.2 matt }
1999 1.2 matt
2000 1.8 matt if (work_flags & WORK_RXUNDERFLOW) {
2001 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
2002 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
2003 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
2004 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
2005 1.2 matt } else {
2006 1.15 matt intmask |= RCVDESCUF;
2007 1.2 matt }
2008 1.2 matt aprint_normal_dev(sc->sc_dev,
2009 1.2 matt "increasing receive buffers from %zu to %zu\n",
2010 1.2 matt rxq->rxq_threshold, threshold);
2011 1.2 matt rxq->rxq_threshold = threshold;
2012 1.2 matt }
2013 1.2 matt
2014 1.8 matt if (work_flags & WORK_RXINTR) {
2015 1.2 matt /*
2016 1.2 matt * Let's consume
2017 1.2 matt */
2018 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
2019 1.20 matt sc->sc_rxq.rxq_threshold / 4)) {
2020 1.20 matt /*
2021 1.20 matt * We've consumed a quarter of the ring and still have
2022 1.20 matt * more to do. Refill the ring.
2023 1.20 matt */
2024 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2025 1.20 matt }
2026 1.15 matt intmask |= RCVINT;
2027 1.2 matt }
2028 1.2 matt
2029 1.2 matt if (ifp->if_flags & IFF_RUNNING) {
2030 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2031 1.16 matt #if 0
2032 1.16 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
2033 1.16 matt if (intstatus & RCVINT) {
2034 1.16 matt bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT);
2035 1.16 matt work_flags |= WORK_RXINTR;
2036 1.16 matt continue;
2037 1.16 matt }
2038 1.16 matt #endif
2039 1.14 matt mutex_spin_enter(sc->sc_hwlock);
2040 1.15 matt sc->sc_intmask |= intmask;
2041 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
2042 1.14 matt mutex_spin_exit(sc->sc_hwlock);
2043 1.2 matt }
2044 1.2 matt
2045 1.2 matt mutex_exit(sc->sc_lock);
2046 1.2 matt }
2047