bcm53xx_eth.c revision 1.36 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.10 matt #define _ARM32_BUS_DMA_PRIVATE
31 1.1 matt #define GMAC_PRIVATE
32 1.1 matt
33 1.1 matt #include "locators.h"
34 1.18 matt #include "opt_broadcom.h"
35 1.1 matt
36 1.1 matt #include <sys/cdefs.h>
37 1.1 matt
38 1.36 msaitoh __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.36 2019/05/29 06:21:56 msaitoh Exp $");
39 1.1 matt
40 1.1 matt #include <sys/param.h>
41 1.2 matt #include <sys/atomic.h>
42 1.1 matt #include <sys/bus.h>
43 1.1 matt #include <sys/device.h>
44 1.2 matt #include <sys/ioctl.h>
45 1.1 matt #include <sys/intr.h>
46 1.2 matt #include <sys/kmem.h>
47 1.1 matt #include <sys/mutex.h>
48 1.2 matt #include <sys/socket.h>
49 1.1 matt #include <sys/systm.h>
50 1.8 matt #include <sys/workqueue.h>
51 1.1 matt
52 1.1 matt #include <net/if.h>
53 1.1 matt #include <net/if_ether.h>
54 1.1 matt #include <net/if_media.h>
55 1.2 matt #include <net/if_dl.h>
56 1.2 matt #include <net/bpf.h>
57 1.2 matt
58 1.1 matt #include <dev/mii/miivar.h>
59 1.1 matt
60 1.26 matt #include <arm/locore.h>
61 1.26 matt
62 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
63 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
64 1.1 matt
65 1.16 matt //#define BCMETH_MPSAFE
66 1.16 matt
67 1.18 matt #ifdef BCMETH_COUNTERS
68 1.36 msaitoh #define BCMETH_EVCNT_ADD(a, b) ((void)((a).ev_count += (b)))
69 1.18 matt #else
70 1.36 msaitoh #define BCMETH_EVCNT_ADD(a, b) do { } while (/*CONSTCOND*/0)
71 1.18 matt #endif
72 1.18 matt #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1)
73 1.18 matt
74 1.10 matt #define BCMETH_MAXTXMBUFS 128
75 1.2 matt #define BCMETH_NTXSEGS 30
76 1.2 matt #define BCMETH_MAXRXMBUFS 255
77 1.8 matt #define BCMETH_MINRXMBUFS 64
78 1.2 matt #define BCMETH_NRXSEGS 1
79 1.8 matt #define BCMETH_RINGSIZE PAGE_SIZE
80 1.2 matt
81 1.19 matt #if 1
82 1.10 matt #define BCMETH_RCVMAGIC 0xfeedface
83 1.16 matt #endif
84 1.10 matt
85 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
86 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
87 1.1 matt
88 1.2 matt struct bcmeth_txqueue {
89 1.2 matt bus_dmamap_t txq_descmap;
90 1.2 matt struct gmac_txdb *txq_consumer;
91 1.2 matt struct gmac_txdb *txq_producer;
92 1.2 matt struct gmac_txdb *txq_first;
93 1.2 matt struct gmac_txdb *txq_last;
94 1.2 matt struct ifqueue txq_mbufs;
95 1.2 matt struct mbuf *txq_next;
96 1.2 matt size_t txq_free;
97 1.2 matt size_t txq_threshold;
98 1.2 matt size_t txq_lastintr;
99 1.2 matt bus_size_t txq_reg_xmtaddrlo;
100 1.2 matt bus_size_t txq_reg_xmtptr;
101 1.2 matt bus_size_t txq_reg_xmtctl;
102 1.2 matt bus_size_t txq_reg_xmtsts0;
103 1.10 matt bus_size_t txq_reg_xmtsts1;
104 1.2 matt bus_dma_segment_t txq_descmap_seg;
105 1.2 matt };
106 1.2 matt
107 1.2 matt struct bcmeth_rxqueue {
108 1.2 matt bus_dmamap_t rxq_descmap;
109 1.2 matt struct gmac_rxdb *rxq_consumer;
110 1.2 matt struct gmac_rxdb *rxq_producer;
111 1.2 matt struct gmac_rxdb *rxq_first;
112 1.2 matt struct gmac_rxdb *rxq_last;
113 1.2 matt struct mbuf *rxq_mhead;
114 1.2 matt struct mbuf **rxq_mtail;
115 1.2 matt struct mbuf *rxq_mconsumer;
116 1.2 matt size_t rxq_inuse;
117 1.2 matt size_t rxq_threshold;
118 1.2 matt bus_size_t rxq_reg_rcvaddrlo;
119 1.2 matt bus_size_t rxq_reg_rcvptr;
120 1.2 matt bus_size_t rxq_reg_rcvctl;
121 1.2 matt bus_size_t rxq_reg_rcvsts0;
122 1.10 matt bus_size_t rxq_reg_rcvsts1;
123 1.2 matt bus_dma_segment_t rxq_descmap_seg;
124 1.2 matt };
125 1.2 matt
126 1.2 matt struct bcmeth_mapcache {
127 1.2 matt u_int dmc_nmaps;
128 1.2 matt u_int dmc_maxseg;
129 1.2 matt u_int dmc_maxmaps;
130 1.2 matt u_int dmc_maxmapsize;
131 1.2 matt bus_dmamap_t dmc_maps[0];
132 1.2 matt };
133 1.2 matt
134 1.1 matt struct bcmeth_softc {
135 1.1 matt device_t sc_dev;
136 1.1 matt bus_space_tag_t sc_bst;
137 1.1 matt bus_space_handle_t sc_bsh;
138 1.1 matt bus_dma_tag_t sc_dmat;
139 1.1 matt kmutex_t *sc_lock;
140 1.1 matt kmutex_t *sc_hwlock;
141 1.1 matt struct ethercom sc_ec;
142 1.2 matt #define sc_if sc_ec.ec_if
143 1.2 matt struct ifmedia sc_media;
144 1.2 matt void *sc_soft_ih;
145 1.1 matt void *sc_ih;
146 1.2 matt
147 1.2 matt struct bcmeth_rxqueue sc_rxq;
148 1.2 matt struct bcmeth_txqueue sc_txq;
149 1.2 matt
150 1.19 matt size_t sc_rcvoffset;
151 1.21 matt uint32_t sc_macaddr[2];
152 1.2 matt uint32_t sc_maxfrm;
153 1.2 matt uint32_t sc_cmdcfg;
154 1.15 matt uint32_t sc_intmask;
155 1.8 matt uint32_t sc_rcvlazy;
156 1.2 matt volatile uint32_t sc_soft_flags;
157 1.2 matt #define SOFT_RXINTR 0x01
158 1.8 matt #define SOFT_TXINTR 0x02
159 1.2 matt
160 1.18 matt #ifdef BCMETH_COUNTERS
161 1.2 matt struct evcnt sc_ev_intr;
162 1.2 matt struct evcnt sc_ev_soft_intr;
163 1.10 matt struct evcnt sc_ev_work;
164 1.2 matt struct evcnt sc_ev_tx_stall;
165 1.10 matt struct evcnt sc_ev_rx_badmagic_lo;
166 1.10 matt struct evcnt sc_ev_rx_badmagic_hi;
167 1.18 matt #endif
168 1.2 matt
169 1.2 matt struct ifqueue sc_rx_bufcache;
170 1.35 msaitoh struct bcmeth_mapcache *sc_rx_mapcache;
171 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
172 1.2 matt
173 1.8 matt struct workqueue *sc_workq;
174 1.8 matt struct work sc_work;
175 1.8 matt
176 1.8 matt volatile uint32_t sc_work_flags;
177 1.8 matt #define WORK_RXINTR 0x01
178 1.8 matt #define WORK_RXUNDERFLOW 0x02
179 1.8 matt #define WORK_REINIT 0x04
180 1.8 matt
181 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
182 1.1 matt };
183 1.1 matt
184 1.2 matt static void bcmeth_ifstart(struct ifnet *);
185 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
186 1.2 matt static int bcmeth_ifinit(struct ifnet *);
187 1.2 matt static void bcmeth_ifstop(struct ifnet *, int);
188 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
189 1.2 matt
190 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
191 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
192 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
193 1.2 matt struct bcmeth_mapcache *);
194 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
195 1.2 matt struct bcmeth_mapcache *);
196 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
197 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
198 1.2 matt
199 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
200 1.2 matt struct bcmeth_txqueue *, u_int);
201 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
202 1.2 matt struct bcmeth_txqueue *);
203 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
204 1.2 matt struct bcmeth_txqueue *);
205 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
206 1.2 matt struct bcmeth_txqueue *);
207 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
208 1.2 matt struct bcmeth_txqueue *, struct mbuf *m);
209 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
210 1.2 matt struct bcmeth_txqueue *);
211 1.2 matt
212 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
213 1.2 matt struct bcmeth_rxqueue *, u_int);
214 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
215 1.2 matt struct bcmeth_rxqueue *);
216 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
217 1.2 matt struct bcmeth_rxqueue *, bool);
218 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
219 1.2 matt struct bcmeth_rxqueue *);
220 1.2 matt
221 1.1 matt static int bcmeth_intr(void *);
222 1.16 matt #ifdef BCMETH_MPSAFETX
223 1.16 matt static void bcmeth_soft_txintr(struct bcmeth_softc *);
224 1.16 matt #endif
225 1.2 matt static void bcmeth_soft_intr(void *);
226 1.8 matt static void bcmeth_worker(struct work *, void *);
227 1.2 matt
228 1.2 matt static int bcmeth_mediachange(struct ifnet *);
229 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
230 1.1 matt
231 1.1 matt static inline uint32_t
232 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
233 1.1 matt {
234 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
235 1.1 matt }
236 1.1 matt
237 1.1 matt static inline void
238 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
239 1.1 matt {
240 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
241 1.1 matt }
242 1.1 matt
243 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
244 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
245 1.1 matt
246 1.1 matt static int
247 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
248 1.1 matt {
249 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
250 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
251 1.1 matt
252 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
253 1.1 matt return 0;
254 1.1 matt
255 1.1 matt #ifdef DIAGNOSTIC
256 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
257 1.1 matt #endif
258 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
259 1.1 matt
260 1.1 matt return 1;
261 1.1 matt }
262 1.1 matt
263 1.1 matt static void
264 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
265 1.1 matt {
266 1.1 matt struct bcmeth_softc * const sc = device_private(self);
267 1.2 matt struct ethercom * const ec = &sc->sc_ec;
268 1.2 matt struct ifnet * const ifp = &ec->ec_if;
269 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
270 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
271 1.2 matt const char * const xname = device_xname(self);
272 1.2 matt prop_dictionary_t dict = device_properties(self);
273 1.2 matt int error;
274 1.1 matt
275 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
276 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
277 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
278 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
279 1.1 matt
280 1.10 matt /*
281 1.11 matt * We need to use the coherent dma tag for the GMAC.
282 1.10 matt */
283 1.11 matt sc->sc_dmat = &bcm53xx_coherent_dma_tag;
284 1.24 matt #if _ARM32_NEED_BUS_DMA_BOUNCE
285 1.24 matt if (device_cfdata(self)->cf_flags & 2) {
286 1.24 matt sc->sc_dmat = &bcm53xx_bounce_dma_tag;
287 1.24 matt }
288 1.24 matt #endif
289 1.10 matt
290 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
291 1.35 msaitoh if (eaprop == NULL) {
292 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
293 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
294 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
295 1.2 matt aprint_error(": mac-address property is missing\n");
296 1.2 matt return;
297 1.2 matt }
298 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
299 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
300 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
301 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
302 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
303 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
304 1.2 matt } else {
305 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
306 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
307 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
308 1.2 matt ETHER_ADDR_LEN);
309 1.2 matt }
310 1.2 matt sc->sc_dev = self;
311 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
312 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
313 1.2 matt
314 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
315 1.1 matt
316 1.1 matt aprint_naive("\n");
317 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
318 1.1 matt
319 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
320 1.2 matt if (error) {
321 1.2 matt aprint_error(": failed to init rxq: %d\n", error);
322 1.30 msaitoh goto fail_1;
323 1.2 matt }
324 1.2 matt
325 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
326 1.2 matt if (error) {
327 1.2 matt aprint_error(": failed to init txq: %d\n", error);
328 1.30 msaitoh goto fail_1;
329 1.2 matt }
330 1.2 matt
331 1.35 msaitoh error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
332 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
333 1.2 matt if (error) {
334 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
335 1.30 msaitoh goto fail_1;
336 1.2 matt }
337 1.2 matt
338 1.35 msaitoh error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
339 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
340 1.2 matt if (error) {
341 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
342 1.30 msaitoh goto fail_1;
343 1.2 matt }
344 1.2 matt
345 1.8 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
346 1.9 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
347 1.8 matt if (error) {
348 1.8 matt aprint_error(": failed to create workqueue: %d\n", error);
349 1.30 msaitoh goto fail_2;
350 1.8 matt }
351 1.8 matt
352 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
353 1.2 matt bcmeth_soft_intr, sc);
354 1.1 matt
355 1.30 msaitoh if (sc->sc_ih == NULL) {
356 1.30 msaitoh aprint_error_dev(self, "failed to establish interrupt %d\n",
357 1.30 msaitoh loc->loc_intrs[0]);
358 1.30 msaitoh goto fail_3;
359 1.30 msaitoh }
360 1.30 msaitoh
361 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
362 1.1 matt bcmeth_intr, sc);
363 1.1 matt
364 1.1 matt if (sc->sc_ih == NULL) {
365 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
366 1.1 matt loc->loc_intrs[0]);
367 1.30 msaitoh goto fail_4;
368 1.1 matt } else {
369 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
370 1.1 matt loc->loc_intrs[0]);
371 1.1 matt }
372 1.2 matt
373 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
374 1.2 matt ether_sprintf(sc->sc_enaddr));
375 1.2 matt
376 1.2 matt /*
377 1.2 matt * Since each port in plugged into the switch/flow-accelerator,
378 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
379 1.2 matt */
380 1.36 msaitoh int ifmedia = IFM_ETHER | IFM_1000_T | IFM_FDX;
381 1.36 msaitoh //ifmedia |= IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
382 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
383 1.2 matt bcmeth_mediastatus);
384 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
385 1.2 matt ifmedia_set(&sc->sc_media, ifmedia);
386 1.2 matt
387 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
388 1.2 matt
389 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
390 1.2 matt ifp->if_softc = sc;
391 1.2 matt ifp->if_baudrate = IF_Mbps(1000);
392 1.2 matt ifp->if_capabilities = 0;
393 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
394 1.16 matt #ifdef BCMETH_MPSAFE
395 1.16 matt ifp->if_flags2 = IFF2_MPSAFE;
396 1.16 matt #endif
397 1.2 matt ifp->if_ioctl = bcmeth_ifioctl;
398 1.2 matt ifp->if_start = bcmeth_ifstart;
399 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
400 1.2 matt ifp->if_init = bcmeth_ifinit;
401 1.2 matt ifp->if_stop = bcmeth_ifstop;
402 1.2 matt IFQ_SET_READY(&ifp->if_snd);
403 1.2 matt
404 1.2 matt bcmeth_ifstop(ifp, true);
405 1.2 matt
406 1.2 matt /*
407 1.2 matt * Attach the interface.
408 1.2 matt */
409 1.30 msaitoh error = if_initialize(ifp);
410 1.30 msaitoh if (error != 0) {
411 1.30 msaitoh aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n",
412 1.30 msaitoh error);
413 1.30 msaitoh goto fail_5;
414 1.30 msaitoh }
415 1.2 matt ether_ifattach(ifp, sc->sc_enaddr);
416 1.27 ozaki if_register(ifp);
417 1.2 matt
418 1.18 matt #ifdef BCMETH_COUNTERS
419 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
420 1.2 matt NULL, xname, "intr");
421 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
422 1.2 matt NULL, xname, "soft intr");
423 1.8 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
424 1.8 matt NULL, xname, "work items");
425 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
426 1.2 matt NULL, xname, "tx stalls");
427 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC,
428 1.10 matt NULL, xname, "rx badmagic lo");
429 1.10 matt evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC,
430 1.10 matt NULL, xname, "rx badmagic hi");
431 1.18 matt #endif
432 1.30 msaitoh
433 1.30 msaitoh return;
434 1.30 msaitoh
435 1.30 msaitoh fail_5:
436 1.30 msaitoh ifmedia_removeall(&sc->sc_media);
437 1.30 msaitoh fail_4:
438 1.30 msaitoh intr_disestablish(sc->sc_ih);
439 1.30 msaitoh fail_3:
440 1.30 msaitoh softint_disestablish(sc->sc_soft_ih);
441 1.35 msaitoh fail_2:
442 1.30 msaitoh workqueue_destroy(sc->sc_workq);
443 1.35 msaitoh fail_1:
444 1.30 msaitoh mutex_obj_free(sc->sc_lock);
445 1.30 msaitoh mutex_obj_free(sc->sc_hwlock);
446 1.2 matt }
447 1.2 matt
448 1.2 matt static int
449 1.2 matt bcmeth_mediachange(struct ifnet *ifp)
450 1.2 matt {
451 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
452 1.2 matt return 0;
453 1.2 matt }
454 1.2 matt
455 1.2 matt static void
456 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
457 1.2 matt {
458 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
459 1.2 matt
460 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
461 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
462 1.2 matt }
463 1.2 matt
464 1.2 matt static uint64_t
465 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
466 1.2 matt {
467 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
468 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
469 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
470 1.19 matt | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0
471 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
472 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
473 1.2 matt }
474 1.2 matt
475 1.2 matt static int
476 1.2 matt bcmeth_ifinit(struct ifnet *ifp)
477 1.2 matt {
478 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
479 1.2 matt int error = 0;
480 1.2 matt
481 1.32 riastrad sc->sc_maxfrm = uimax(ifp->if_mtu + 32, MCLBYTES);
482 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
483 1.2 matt return error;
484 1.2 matt
485 1.2 matt KASSERT(ifp->if_flags & IFF_UP);
486 1.2 matt
487 1.2 matt /*
488 1.2 matt * Stop the interface
489 1.2 matt */
490 1.2 matt bcmeth_ifstop(ifp, 0);
491 1.2 matt
492 1.2 matt /*
493 1.19 matt * Reserve enough space at the front so that we can insert a maxsized
494 1.19 matt * link header and a VLAN tag. Also make sure we have enough room for
495 1.19 matt * the rcvsts field as well.
496 1.19 matt */
497 1.19 matt KASSERT(ALIGN(max_linkhdr) == max_linkhdr);
498 1.19 matt KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu",
499 1.19 matt max_linkhdr, sizeof(struct ether_header));
500 1.19 matt sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header);
501 1.19 matt if (sc->sc_rcvoffset <= 4)
502 1.19 matt sc->sc_rcvoffset += 4;
503 1.19 matt KASSERT((sc->sc_rcvoffset & 3) == 2);
504 1.19 matt KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET));
505 1.19 matt KASSERT(sc->sc_rcvoffset >= 6);
506 1.19 matt
507 1.19 matt /*
508 1.2 matt * If our frame size has changed (or it's our first time through)
509 1.2 matt * destroy the existing transmit mapcache.
510 1.2 matt */
511 1.2 matt if (sc->sc_tx_mapcache != NULL
512 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
513 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
514 1.2 matt sc->sc_tx_mapcache = NULL;
515 1.2 matt }
516 1.2 matt
517 1.2 matt if (sc->sc_tx_mapcache == NULL) {
518 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
519 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
520 1.2 matt if (error)
521 1.2 matt return error;
522 1.2 matt }
523 1.2 matt
524 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
525 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
526 1.2 matt | RX_ENA | TX_ENA;
527 1.2 matt
528 1.2 matt if (ifp->if_flags & IFF_PROMISC) {
529 1.2 matt sc->sc_cmdcfg |= PROMISC_EN;
530 1.2 matt } else {
531 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
532 1.2 matt }
533 1.2 matt
534 1.21 matt const uint8_t * const lladdr = CLLADDR(ifp->if_sadl);
535 1.21 matt const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr);
536 1.21 matt
537 1.21 matt /*
538 1.21 matt * We make sure that a received Ethernet packet start on a non-word
539 1.21 matt * boundary so that the packet payload will be on a word boundary.
540 1.21 matt * So to check the destination address we keep around two words to
541 1.21 matt * quickly compare with.
542 1.21 matt */
543 1.21 matt #if __ARMEL__
544 1.21 matt sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8);
545 1.21 matt sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8)
546 1.21 matt | (lladdr[4] << 16) | (lladdr[5] << 24);
547 1.21 matt #else
548 1.21 matt sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8);
549 1.21 matt sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8)
550 1.21 matt | (lladdr[1] << 16) | (lladdr[2] << 24);
551 1.21 matt #endif
552 1.2 matt
553 1.36 msaitoh sc->sc_intmask = DESCPROTOERR | DATAERR | DESCERR;
554 1.2 matt
555 1.2 matt /* 5. Load RCVADDR_LO with new pointer */
556 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
557 1.2 matt
558 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
559 1.19 matt __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET)
560 1.2 matt | RCVCTL_PARITY_DIS
561 1.2 matt | RCVCTL_OFLOW_CONTINUE
562 1.17 matt | __SHIFTIN(3, RCVCTL_BURSTLEN));
563 1.2 matt
564 1.2 matt /* 6. Load XMTADDR_LO with new pointer */
565 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
566 1.2 matt
567 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
568 1.2 matt | XMTCTL_PARITY_DIS
569 1.17 matt | __SHIFTIN(3, XMTCTL_BURSTLEN));
570 1.2 matt
571 1.2 matt /* 7. Setup other UNIMAC registers */
572 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
573 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
574 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
575 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
576 1.2 matt
577 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
578 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
579 1.2 matt devctl &= ~FLOW_CTRL_MODE;
580 1.2 matt devctl &= ~MIB_RD_RESET_EN;
581 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
582 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
583 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
584 1.2 matt
585 1.3 matt /* Setup lazy receive (at most 1ms). */
586 1.22 matt const struct cpu_softc * const cpu = curcpu()->ci_softc;
587 1.8 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
588 1.22 matt | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT);
589 1.8 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
590 1.3 matt
591 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
592 1.36 msaitoh sc->sc_intmask |= XMTINT_0 | XMTUF;
593 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
594 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
595 1.2 matt
596 1.2 matt
597 1.2 matt /* 12. Enable receive queues in RQUEUE, */
598 1.36 msaitoh sc->sc_intmask |= RCVINT | RCVDESCUF | RCVFIFOOF;
599 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
600 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
601 1.2 matt
602 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
603 1.3 matt
604 1.3 matt #if 0
605 1.3 matt aprint_normal_dev(sc->sc_dev,
606 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
607 1.3 matt devctl, sc->sc_cmdcfg,
608 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
609 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
610 1.2 matt #endif
611 1.2 matt
612 1.2 matt sc->sc_soft_flags = 0;
613 1.2 matt
614 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
615 1.2 matt
616 1.2 matt ifp->if_flags |= IFF_RUNNING;
617 1.2 matt
618 1.2 matt return error;
619 1.2 matt }
620 1.2 matt
621 1.2 matt static void
622 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
623 1.2 matt {
624 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
625 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
626 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
627 1.2 matt
628 1.2 matt KASSERT(!cpu_intr_p());
629 1.2 matt
630 1.2 matt sc->sc_soft_flags = 0;
631 1.16 matt sc->sc_work_flags = 0;
632 1.2 matt
633 1.2 matt /* Disable Rx processing */
634 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
635 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
636 1.2 matt
637 1.2 matt /* Disable Tx processing */
638 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
639 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
640 1.2 matt
641 1.2 matt /* Disable all interrupts */
642 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
643 1.2 matt
644 1.2 matt for (;;) {
645 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
646 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
647 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
648 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
649 1.2 matt break;
650 1.2 matt delay(50);
651 1.2 matt }
652 1.2 matt /*
653 1.2 matt * Now reset the controller.
654 1.2 matt *
655 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
656 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
657 1.2 matt */
658 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
659 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
660 1.2 matt sc->sc_intmask = 0;
661 1.2 matt ifp->if_flags &= ~IFF_RUNNING;
662 1.2 matt
663 1.2 matt /*
664 1.2 matt * Let's consume any remaining transmitted packets. And if we are
665 1.2 matt * disabling the interface, purge ourselves of any untransmitted
666 1.2 matt * packets. But don't consume any received packets, just drop them.
667 1.2 matt * If we aren't disabling the interface, save the mbufs in the
668 1.2 matt * receive queue for reuse.
669 1.2 matt */
670 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
671 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
672 1.2 matt if (disable) {
673 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
674 1.2 matt IF_PURGE(&ifp->if_snd);
675 1.2 matt }
676 1.2 matt
677 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
678 1.2 matt }
679 1.2 matt
680 1.2 matt static void
681 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
682 1.2 matt {
683 1.2 matt }
684 1.2 matt
685 1.2 matt static int
686 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
687 1.2 matt {
688 1.35 msaitoh struct bcmeth_softc *sc = ifp->if_softc;
689 1.2 matt struct ifreq * const ifr = data;
690 1.2 matt const int s = splnet();
691 1.2 matt int error;
692 1.2 matt
693 1.2 matt switch (cmd) {
694 1.2 matt case SIOCSIFMEDIA:
695 1.2 matt case SIOCGIFMEDIA:
696 1.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
697 1.2 matt break;
698 1.2 matt
699 1.2 matt default:
700 1.2 matt error = ether_ioctl(ifp, cmd, data);
701 1.2 matt if (error != ENETRESET)
702 1.2 matt break;
703 1.2 matt
704 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
705 1.2 matt error = 0;
706 1.2 matt break;
707 1.2 matt }
708 1.2 matt error = bcmeth_ifinit(ifp);
709 1.2 matt break;
710 1.2 matt }
711 1.2 matt
712 1.2 matt splx(s);
713 1.2 matt return error;
714 1.2 matt }
715 1.2 matt
716 1.2 matt static void
717 1.2 matt bcmeth_rxq_desc_presync(
718 1.2 matt struct bcmeth_softc *sc,
719 1.2 matt struct bcmeth_rxqueue *rxq,
720 1.2 matt struct gmac_rxdb *rxdb,
721 1.2 matt size_t count)
722 1.2 matt {
723 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
724 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
725 1.2 matt BUS_DMASYNC_PREWRITE);
726 1.2 matt }
727 1.2 matt
728 1.2 matt static void
729 1.2 matt bcmeth_rxq_desc_postsync(
730 1.2 matt struct bcmeth_softc *sc,
731 1.2 matt struct bcmeth_rxqueue *rxq,
732 1.2 matt struct gmac_rxdb *rxdb,
733 1.2 matt size_t count)
734 1.2 matt {
735 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
736 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
737 1.2 matt BUS_DMASYNC_POSTWRITE);
738 1.2 matt }
739 1.2 matt
740 1.2 matt static void
741 1.2 matt bcmeth_txq_desc_presync(
742 1.2 matt struct bcmeth_softc *sc,
743 1.2 matt struct bcmeth_txqueue *txq,
744 1.2 matt struct gmac_txdb *txdb,
745 1.2 matt size_t count)
746 1.2 matt {
747 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
748 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
749 1.2 matt BUS_DMASYNC_PREWRITE);
750 1.2 matt }
751 1.2 matt
752 1.2 matt static void
753 1.2 matt bcmeth_txq_desc_postsync(
754 1.2 matt struct bcmeth_softc *sc,
755 1.2 matt struct bcmeth_txqueue *txq,
756 1.2 matt struct gmac_txdb *txdb,
757 1.2 matt size_t count)
758 1.2 matt {
759 1.35 msaitoh bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
760 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
761 1.2 matt BUS_DMASYNC_POSTWRITE);
762 1.2 matt }
763 1.2 matt
764 1.2 matt static bus_dmamap_t
765 1.2 matt bcmeth_mapcache_get(
766 1.2 matt struct bcmeth_softc *sc,
767 1.2 matt struct bcmeth_mapcache *dmc)
768 1.2 matt {
769 1.2 matt KASSERT(dmc->dmc_nmaps > 0);
770 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
771 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
772 1.2 matt }
773 1.2 matt
774 1.2 matt static void
775 1.2 matt bcmeth_mapcache_put(
776 1.2 matt struct bcmeth_softc *sc,
777 1.2 matt struct bcmeth_mapcache *dmc,
778 1.2 matt bus_dmamap_t map)
779 1.2 matt {
780 1.2 matt KASSERT(map != NULL);
781 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
782 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
783 1.2 matt }
784 1.2 matt
785 1.2 matt static void
786 1.2 matt bcmeth_mapcache_destroy(
787 1.2 matt struct bcmeth_softc *sc,
788 1.2 matt struct bcmeth_mapcache *dmc)
789 1.2 matt {
790 1.2 matt const size_t dmc_size =
791 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
792 1.2 matt
793 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
794 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
795 1.2 matt }
796 1.2 matt kmem_intr_free(dmc, dmc_size);
797 1.2 matt }
798 1.2 matt
799 1.2 matt static int
800 1.2 matt bcmeth_mapcache_create(
801 1.2 matt struct bcmeth_softc *sc,
802 1.2 matt struct bcmeth_mapcache **dmc_p,
803 1.2 matt size_t maxmaps,
804 1.2 matt size_t maxmapsize,
805 1.2 matt size_t maxseg)
806 1.2 matt {
807 1.2 matt const size_t dmc_size =
808 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
809 1.2 matt struct bcmeth_mapcache * const dmc =
810 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
811 1.2 matt
812 1.2 matt dmc->dmc_maxmaps = maxmaps;
813 1.2 matt dmc->dmc_nmaps = maxmaps;
814 1.2 matt dmc->dmc_maxmapsize = maxmapsize;
815 1.2 matt dmc->dmc_maxseg = maxseg;
816 1.2 matt
817 1.2 matt for (u_int i = 0; i < maxmaps; i++) {
818 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
819 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
820 1.36 msaitoh BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
821 1.2 matt if (error) {
822 1.2 matt aprint_error_dev(sc->sc_dev,
823 1.2 matt "failed to creat dma map cache "
824 1.2 matt "entry %u of %zu: %d\n",
825 1.2 matt i, maxmaps, error);
826 1.2 matt while (i-- > 0) {
827 1.2 matt bus_dmamap_destroy(sc->sc_dmat,
828 1.2 matt dmc->dmc_maps[i]);
829 1.2 matt }
830 1.2 matt kmem_intr_free(dmc, dmc_size);
831 1.2 matt return error;
832 1.2 matt }
833 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
834 1.2 matt }
835 1.2 matt
836 1.2 matt *dmc_p = dmc;
837 1.2 matt
838 1.2 matt return 0;
839 1.2 matt }
840 1.2 matt
841 1.2 matt #if 0
842 1.2 matt static void
843 1.2 matt bcmeth_dmamem_free(
844 1.2 matt bus_dma_tag_t dmat,
845 1.2 matt size_t map_size,
846 1.2 matt bus_dma_segment_t *seg,
847 1.2 matt bus_dmamap_t map,
848 1.2 matt void *kvap)
849 1.2 matt {
850 1.2 matt bus_dmamap_destroy(dmat, map);
851 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
852 1.2 matt bus_dmamem_free(dmat, seg, 1);
853 1.2 matt }
854 1.2 matt #endif
855 1.2 matt
856 1.2 matt static int
857 1.2 matt bcmeth_dmamem_alloc(
858 1.2 matt bus_dma_tag_t dmat,
859 1.2 matt size_t map_size,
860 1.2 matt bus_dma_segment_t *seg,
861 1.2 matt bus_dmamap_t *map,
862 1.2 matt void **kvap)
863 1.2 matt {
864 1.2 matt int error;
865 1.2 matt int nseg;
866 1.2 matt
867 1.2 matt *kvap = NULL;
868 1.2 matt *map = NULL;
869 1.2 matt
870 1.10 matt error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0,
871 1.2 matt seg, 1, &nseg, 0);
872 1.2 matt if (error)
873 1.2 matt return error;
874 1.2 matt
875 1.2 matt KASSERT(nseg == 1);
876 1.2 matt
877 1.10 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0);
878 1.2 matt if (error == 0) {
879 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
880 1.2 matt map);
881 1.2 matt if (error == 0) {
882 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
883 1.2 matt NULL, 0);
884 1.2 matt if (error == 0)
885 1.2 matt return 0;
886 1.2 matt bus_dmamap_destroy(dmat, *map);
887 1.2 matt *map = NULL;
888 1.2 matt }
889 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
890 1.2 matt *kvap = NULL;
891 1.2 matt }
892 1.2 matt bus_dmamem_free(dmat, seg, nseg);
893 1.2 matt return 0;
894 1.2 matt }
895 1.2 matt
896 1.2 matt static struct mbuf *
897 1.2 matt bcmeth_rx_buf_alloc(
898 1.2 matt struct bcmeth_softc *sc)
899 1.2 matt {
900 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
901 1.2 matt if (m == NULL) {
902 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
903 1.2 matt return NULL;
904 1.2 matt }
905 1.2 matt MCLGET(m, M_DONTWAIT);
906 1.2 matt if ((m->m_flags & M_EXT) == 0) {
907 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
908 1.2 matt m_freem(m);
909 1.2 matt return NULL;
910 1.2 matt }
911 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
912 1.2 matt
913 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
914 1.2 matt if (map == NULL) {
915 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
916 1.2 matt m_freem(m);
917 1.2 matt return NULL;
918 1.2 matt }
919 1.2 matt M_SETCTX(m, map);
920 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
921 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
922 1.36 msaitoh BUS_DMA_READ | BUS_DMA_NOWAIT);
923 1.2 matt if (error) {
924 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
925 1.2 matt error);
926 1.2 matt M_SETCTX(m, NULL);
927 1.2 matt m_freem(m);
928 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
929 1.2 matt return NULL;
930 1.2 matt }
931 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
932 1.16 matt #ifdef BCMETH_RCVMAGIC
933 1.25 matt *mtod(m, uint32_t *) = htole32(BCMETH_RCVMAGIC);
934 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t),
935 1.36 msaitoh BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
936 1.10 matt bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t),
937 1.10 matt map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD);
938 1.16 matt #else
939 1.23 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
940 1.16 matt BUS_DMASYNC_PREREAD);
941 1.16 matt #endif
942 1.2 matt
943 1.2 matt return m;
944 1.2 matt }
945 1.2 matt
946 1.2 matt static void
947 1.2 matt bcmeth_rx_map_unload(
948 1.2 matt struct bcmeth_softc *sc,
949 1.2 matt struct mbuf *m)
950 1.2 matt {
951 1.2 matt KASSERT(m);
952 1.2 matt for (; m != NULL; m = m->m_next) {
953 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
954 1.2 matt KASSERT(map);
955 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
956 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
957 1.2 matt BUS_DMASYNC_POSTREAD);
958 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
959 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
960 1.2 matt M_SETCTX(m, NULL);
961 1.2 matt }
962 1.2 matt }
963 1.2 matt
964 1.2 matt static bool
965 1.2 matt bcmeth_rxq_produce(
966 1.2 matt struct bcmeth_softc *sc,
967 1.2 matt struct bcmeth_rxqueue *rxq)
968 1.2 matt {
969 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
970 1.7 matt bool produced = false;
971 1.7 matt
972 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
973 1.2 matt struct mbuf *m;
974 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
975 1.2 matt if (m == NULL) {
976 1.2 matt m = bcmeth_rx_buf_alloc(sc);
977 1.2 matt if (m == NULL) {
978 1.35 msaitoh printf("%s: bcmeth_rx_buf_alloc failed\n",
979 1.35 msaitoh __func__);
980 1.2 matt break;
981 1.2 matt }
982 1.2 matt }
983 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
984 1.2 matt KASSERT(map);
985 1.2 matt
986 1.25 matt producer->rxdb_buflen = htole32(MCLBYTES);
987 1.25 matt producer->rxdb_addrlo = htole32(map->dm_segs[0].ds_addr);
988 1.25 matt producer->rxdb_flags &= htole32(RXDB_FLAG_ET);
989 1.2 matt *rxq->rxq_mtail = m;
990 1.2 matt rxq->rxq_mtail = &m->m_next;
991 1.2 matt m->m_len = MCLBYTES;
992 1.2 matt m->m_next = NULL;
993 1.2 matt rxq->rxq_inuse++;
994 1.2 matt if (++producer == rxq->rxq_last) {
995 1.2 matt membar_producer();
996 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
997 1.2 matt rxq->rxq_last - rxq->rxq_producer);
998 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
999 1.2 matt }
1000 1.7 matt produced = true;
1001 1.2 matt }
1002 1.7 matt if (produced) {
1003 1.2 matt membar_producer();
1004 1.7 matt if (producer != rxq->rxq_producer) {
1005 1.7 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
1006 1.7 matt producer - rxq->rxq_producer);
1007 1.7 matt rxq->rxq_producer = producer;
1008 1.7 matt }
1009 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
1010 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
1011 1.7 matt + ((uintptr_t)producer & RCVPTR));
1012 1.2 matt }
1013 1.2 matt return true;
1014 1.2 matt }
1015 1.2 matt
1016 1.2 matt static void
1017 1.2 matt bcmeth_rx_input(
1018 1.2 matt struct bcmeth_softc *sc,
1019 1.2 matt struct mbuf *m,
1020 1.2 matt uint32_t rxdb_flags)
1021 1.2 matt {
1022 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1023 1.2 matt
1024 1.2 matt bcmeth_rx_map_unload(sc, m);
1025 1.2 matt
1026 1.19 matt m_adj(m, sc->sc_rcvoffset);
1027 1.2 matt
1028 1.21 matt /*
1029 1.21 matt * If we are in promiscuous mode and this isn't a multicast, check the
1030 1.21 matt * destination address to make sure it matches our own. If it doesn't,
1031 1.21 matt * mark the packet as being received promiscuously.
1032 1.21 matt */
1033 1.21 matt if ((sc->sc_cmdcfg & PROMISC_EN)
1034 1.21 matt && (m->m_data[0] & 1) == 0
1035 1.21 matt && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0]
1036 1.21 matt || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) {
1037 1.21 matt m->m_flags |= M_PROMISC;
1038 1.2 matt }
1039 1.28 ozaki m_set_rcvif(m, ifp);
1040 1.2 matt
1041 1.2 matt ifp->if_ibytes += m->m_pkthdr.len;
1042 1.2 matt
1043 1.2 matt /*
1044 1.2 matt * Let's give it to the network subsystm to deal with.
1045 1.2 matt */
1046 1.16 matt #ifdef BCMETH_MPSAFE
1047 1.16 matt mutex_exit(sc->sc_lock);
1048 1.27 ozaki if_input(ifp, m);
1049 1.16 matt mutex_enter(sc->sc_lock);
1050 1.16 matt #else
1051 1.2 matt int s = splnet();
1052 1.27 ozaki if_input(ifp, m);
1053 1.2 matt splx(s);
1054 1.16 matt #endif
1055 1.2 matt }
1056 1.2 matt
1057 1.20 matt static bool
1058 1.2 matt bcmeth_rxq_consume(
1059 1.2 matt struct bcmeth_softc *sc,
1060 1.20 matt struct bcmeth_rxqueue *rxq,
1061 1.20 matt size_t atmost)
1062 1.2 matt {
1063 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1064 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
1065 1.2 matt size_t rxconsumed = 0;
1066 1.20 matt bool didconsume = false;
1067 1.2 matt
1068 1.20 matt while (atmost-- > 0) {
1069 1.2 matt if (consumer == rxq->rxq_producer) {
1070 1.2 matt KASSERT(rxq->rxq_inuse == 0);
1071 1.20 matt break;
1072 1.2 matt }
1073 1.35 msaitoh
1074 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1075 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1076 1.2 matt if (consumer == rxq->rxq_first + currdscr) {
1077 1.20 matt break;
1078 1.2 matt }
1079 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
1080 1.2 matt
1081 1.2 matt /*
1082 1.2 matt * We own this packet again. Copy the rxsts word from it.
1083 1.2 matt */
1084 1.2 matt rxconsumed++;
1085 1.20 matt didconsume = true;
1086 1.2 matt uint32_t rxsts;
1087 1.2 matt KASSERT(rxq->rxq_mhead != NULL);
1088 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
1089 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1090 1.2 matt BUS_DMASYNC_POSTREAD);
1091 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
1092 1.25 matt rxsts = le32toh(rxsts);
1093 1.10 matt #if 0
1094 1.10 matt KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd",
1095 1.10 matt currdscr, consumer - rxq->rxq_first);
1096 1.10 matt #endif
1097 1.2 matt
1098 1.2 matt /*
1099 1.2 matt * Get the count of descriptors. Fetch the correct number
1100 1.2 matt * of mbufs.
1101 1.2 matt */
1102 1.16 matt #ifdef BCMETH_RCVMAGIC
1103 1.35 msaitoh size_t desc_count = rxsts != BCMETH_RCVMAGIC
1104 1.35 msaitoh ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1;
1105 1.16 matt #else
1106 1.16 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
1107 1.16 matt #endif
1108 1.2 matt struct mbuf *m = rxq->rxq_mhead;
1109 1.2 matt struct mbuf *m_last = m;
1110 1.2 matt for (size_t i = 1; i < desc_count; i++) {
1111 1.2 matt if (++consumer == rxq->rxq_last) {
1112 1.2 matt consumer = rxq->rxq_first;
1113 1.2 matt }
1114 1.10 matt KASSERTMSG(consumer != rxq->rxq_first + currdscr,
1115 1.35 msaitoh "i=%zu rxsts=%#x desc_count=%zu currdscr=%u "
1116 1.35 msaitoh "consumer=%zd", i, rxsts, desc_count, currdscr,
1117 1.10 matt consumer - rxq->rxq_first);
1118 1.2 matt m_last = m_last->m_next;
1119 1.2 matt }
1120 1.2 matt
1121 1.2 matt /*
1122 1.2 matt * Now remove it/them from the list of enqueued mbufs.
1123 1.2 matt */
1124 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1125 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1126 1.2 matt m_last->m_next = NULL;
1127 1.2 matt
1128 1.16 matt #ifdef BCMETH_RCVMAGIC
1129 1.35 msaitoh if (rxsts == BCMETH_RCVMAGIC) {
1130 1.10 matt ifp->if_ierrors++;
1131 1.10 matt if ((m->m_ext.ext_paddr >> 28) == 8) {
1132 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo);
1133 1.10 matt } else {
1134 1.18 matt BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi);
1135 1.10 matt }
1136 1.10 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1137 1.16 matt } else
1138 1.16 matt #endif /* BCMETH_RCVMAGIC */
1139 1.35 msaitoh if (rxsts
1140 1.36 msaitoh & (RXSTS_CRC_ERROR |RXSTS_OVERSIZED |RXSTS_PKT_OVERFLOW)) {
1141 1.35 msaitoh aprint_error_dev(sc->sc_dev,
1142 1.35 msaitoh "[%zu]: count=%zu rxsts=%#x\n",
1143 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
1144 1.2 matt /*
1145 1.2 matt * We encountered an error, take the mbufs and add them
1146 1.2 matt * to the rx bufcache so we can quickly reuse them.
1147 1.2 matt */
1148 1.2 matt ifp->if_ierrors++;
1149 1.2 matt do {
1150 1.2 matt struct mbuf *m0 = m->m_next;
1151 1.2 matt m->m_next = NULL;
1152 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1153 1.2 matt m = m0;
1154 1.2 matt } while (m);
1155 1.2 matt } else {
1156 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1157 1.19 matt framelen += sc->sc_rcvoffset;
1158 1.2 matt m->m_pkthdr.len = framelen;
1159 1.2 matt if (desc_count == 1) {
1160 1.2 matt KASSERT(framelen <= MCLBYTES);
1161 1.2 matt m->m_len = framelen;
1162 1.2 matt } else {
1163 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1164 1.2 matt }
1165 1.16 matt
1166 1.16 matt #ifdef BCMETH_MPSAFE
1167 1.16 matt /*
1168 1.16 matt * Wrap at the last entry!
1169 1.16 matt */
1170 1.16 matt if (++consumer == rxq->rxq_last) {
1171 1.35 msaitoh KASSERT(consumer[-1].rxdb_flags
1172 1.35 msaitoh & htole32(RXDB_FLAG_ET));
1173 1.16 matt rxq->rxq_consumer = rxq->rxq_first;
1174 1.16 matt } else {
1175 1.16 matt rxq->rxq_consumer = consumer;
1176 1.16 matt }
1177 1.16 matt rxq->rxq_inuse -= rxconsumed;
1178 1.16 matt #endif /* BCMETH_MPSAFE */
1179 1.16 matt
1180 1.16 matt /*
1181 1.16 matt * Receive the packet (which releases our lock)
1182 1.16 matt */
1183 1.2 matt bcmeth_rx_input(sc, m, rxsts);
1184 1.16 matt
1185 1.16 matt #ifdef BCMETH_MPSAFE
1186 1.16 matt /*
1187 1.16 matt * Since we had to give up our lock, we need to
1188 1.16 matt * refresh these.
1189 1.16 matt */
1190 1.16 matt consumer = rxq->rxq_consumer;
1191 1.16 matt rxconsumed = 0;
1192 1.16 matt continue;
1193 1.16 matt #endif /* BCMETH_MPSAFE */
1194 1.2 matt }
1195 1.2 matt
1196 1.2 matt /*
1197 1.2 matt * Wrap at the last entry!
1198 1.2 matt */
1199 1.2 matt if (++consumer == rxq->rxq_last) {
1200 1.25 matt KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET));
1201 1.2 matt consumer = rxq->rxq_first;
1202 1.2 matt }
1203 1.2 matt }
1204 1.20 matt
1205 1.20 matt /*
1206 1.20 matt * Update queue info.
1207 1.20 matt */
1208 1.20 matt rxq->rxq_consumer = consumer;
1209 1.20 matt rxq->rxq_inuse -= rxconsumed;
1210 1.20 matt
1211 1.20 matt /*
1212 1.20 matt * Did we consume anything?
1213 1.20 matt */
1214 1.20 matt return didconsume;
1215 1.2 matt }
1216 1.2 matt
1217 1.2 matt static void
1218 1.2 matt bcmeth_rxq_purge(
1219 1.2 matt struct bcmeth_softc *sc,
1220 1.2 matt struct bcmeth_rxqueue *rxq,
1221 1.2 matt bool discard)
1222 1.2 matt {
1223 1.2 matt struct mbuf *m;
1224 1.2 matt
1225 1.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1226 1.2 matt if (discard) {
1227 1.2 matt bcmeth_rx_map_unload(sc, m);
1228 1.2 matt m_freem(m);
1229 1.2 matt } else {
1230 1.2 matt while (m != NULL) {
1231 1.2 matt struct mbuf *m0 = m->m_next;
1232 1.2 matt m->m_next = NULL;
1233 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1234 1.2 matt m = m0;
1235 1.2 matt }
1236 1.2 matt }
1237 1.2 matt }
1238 1.2 matt
1239 1.2 matt rxq->rxq_mhead = NULL;
1240 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1241 1.2 matt rxq->rxq_inuse = 0;
1242 1.1 matt }
1243 1.1 matt
1244 1.1 matt static void
1245 1.2 matt bcmeth_rxq_reset(
1246 1.2 matt struct bcmeth_softc *sc,
1247 1.2 matt struct bcmeth_rxqueue *rxq)
1248 1.2 matt {
1249 1.2 matt /*
1250 1.3 matt * sync all the descriptors
1251 1.3 matt */
1252 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1253 1.3 matt rxq->rxq_last - rxq->rxq_first);
1254 1.3 matt
1255 1.3 matt /*
1256 1.3 matt * Make sure we own all descriptors in the ring.
1257 1.3 matt */
1258 1.3 matt struct gmac_rxdb *rxdb;
1259 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1260 1.25 matt rxdb->rxdb_flags = htole32(RXDB_FLAG_IC);
1261 1.3 matt }
1262 1.3 matt
1263 1.3 matt /*
1264 1.3 matt * Last descriptor has the wrap flag.
1265 1.3 matt */
1266 1.36 msaitoh rxdb->rxdb_flags = htole32(RXDB_FLAG_ET | RXDB_FLAG_IC);
1267 1.3 matt
1268 1.3 matt /*
1269 1.2 matt * Reset the producer consumer indexes.
1270 1.2 matt */
1271 1.2 matt rxq->rxq_consumer = rxq->rxq_first;
1272 1.2 matt rxq->rxq_producer = rxq->rxq_first;
1273 1.2 matt rxq->rxq_inuse = 0;
1274 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1275 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1276 1.2 matt
1277 1.36 msaitoh sc->sc_intmask |= RCVINT | RCVFIFOOF | RCVDESCUF;
1278 1.2 matt
1279 1.2 matt /*
1280 1.2 matt * Restart the receiver at the first descriptor
1281 1.2 matt */
1282 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1283 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1284 1.2 matt }
1285 1.2 matt
1286 1.2 matt static int
1287 1.2 matt bcmeth_rxq_attach(
1288 1.2 matt struct bcmeth_softc *sc,
1289 1.2 matt struct bcmeth_rxqueue *rxq,
1290 1.2 matt u_int qno)
1291 1.2 matt {
1292 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1293 1.2 matt int error;
1294 1.2 matt void *descs;
1295 1.2 matt
1296 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1297 1.2 matt
1298 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1299 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1300 1.2 matt if (error)
1301 1.2 matt return error;
1302 1.2 matt
1303 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1304 1.2 matt rxq->rxq_first = descs;
1305 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1306 1.2 matt rxq->rxq_consumer = descs;
1307 1.2 matt rxq->rxq_producer = descs;
1308 1.2 matt
1309 1.2 matt bcmeth_rxq_purge(sc, rxq, true);
1310 1.2 matt bcmeth_rxq_reset(sc, rxq);
1311 1.2 matt
1312 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1313 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1314 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1315 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1316 1.10 matt rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1;
1317 1.2 matt
1318 1.2 matt return 0;
1319 1.2 matt }
1320 1.2 matt
1321 1.2 matt static bool
1322 1.2 matt bcmeth_txq_active_p(
1323 1.2 matt struct bcmeth_softc * const sc,
1324 1.2 matt struct bcmeth_txqueue *txq)
1325 1.1 matt {
1326 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1327 1.2 matt }
1328 1.2 matt
1329 1.2 matt static bool
1330 1.2 matt bcmeth_txq_fillable_p(
1331 1.2 matt struct bcmeth_softc * const sc,
1332 1.2 matt struct bcmeth_txqueue *txq)
1333 1.2 matt {
1334 1.2 matt return txq->txq_free >= txq->txq_threshold;
1335 1.2 matt }
1336 1.2 matt
1337 1.2 matt static int
1338 1.2 matt bcmeth_txq_attach(
1339 1.2 matt struct bcmeth_softc *sc,
1340 1.2 matt struct bcmeth_txqueue *txq,
1341 1.2 matt u_int qno)
1342 1.2 matt {
1343 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1344 1.2 matt int error;
1345 1.2 matt void *descs;
1346 1.2 matt
1347 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1348 1.2 matt
1349 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1350 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1351 1.2 matt if (error)
1352 1.2 matt return error;
1353 1.2 matt
1354 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1355 1.2 matt txq->txq_first = descs;
1356 1.2 matt txq->txq_last = txq->txq_first + desc_count;
1357 1.2 matt txq->txq_consumer = descs;
1358 1.2 matt txq->txq_producer = descs;
1359 1.2 matt
1360 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1361 1.2 matt
1362 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1363 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1364 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1365 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1366 1.10 matt txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1;
1367 1.2 matt
1368 1.2 matt bcmeth_txq_reset(sc, txq);
1369 1.1 matt
1370 1.2 matt return 0;
1371 1.1 matt }
1372 1.1 matt
1373 1.1 matt static int
1374 1.2 matt bcmeth_txq_map_load(
1375 1.2 matt struct bcmeth_softc *sc,
1376 1.2 matt struct bcmeth_txqueue *txq,
1377 1.2 matt struct mbuf *m)
1378 1.2 matt {
1379 1.2 matt bus_dmamap_t map;
1380 1.2 matt int error;
1381 1.2 matt
1382 1.2 matt map = M_GETCTX(m, bus_dmamap_t);
1383 1.2 matt if (map != NULL)
1384 1.2 matt return 0;
1385 1.2 matt
1386 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1387 1.2 matt if (map == NULL)
1388 1.2 matt return ENOMEM;
1389 1.2 matt
1390 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1391 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1392 1.2 matt if (error)
1393 1.2 matt return error;
1394 1.2 matt
1395 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1396 1.2 matt BUS_DMASYNC_PREWRITE);
1397 1.2 matt M_SETCTX(m, map);
1398 1.2 matt return 0;
1399 1.2 matt }
1400 1.2 matt
1401 1.2 matt static void
1402 1.2 matt bcmeth_txq_map_unload(
1403 1.2 matt struct bcmeth_softc *sc,
1404 1.2 matt struct bcmeth_txqueue *txq,
1405 1.2 matt struct mbuf *m)
1406 1.2 matt {
1407 1.2 matt KASSERT(m);
1408 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1409 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1410 1.2 matt BUS_DMASYNC_POSTWRITE);
1411 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1412 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1413 1.2 matt }
1414 1.2 matt
1415 1.2 matt static bool
1416 1.2 matt bcmeth_txq_produce(
1417 1.2 matt struct bcmeth_softc *sc,
1418 1.2 matt struct bcmeth_txqueue *txq,
1419 1.2 matt struct mbuf *m)
1420 1.2 matt {
1421 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1422 1.2 matt
1423 1.2 matt if (map->dm_nsegs > txq->txq_free)
1424 1.2 matt return false;
1425 1.2 matt
1426 1.2 matt /*
1427 1.2 matt * TCP Offload flag must be set in the first descriptor.
1428 1.2 matt */
1429 1.2 matt struct gmac_txdb *producer = txq->txq_producer;
1430 1.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1431 1.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1432 1.2 matt
1433 1.2 matt /*
1434 1.2 matt * If we've produced enough descriptors without consuming any
1435 1.2 matt * we need to ask for an interrupt to reclaim some.
1436 1.2 matt */
1437 1.2 matt txq->txq_lastintr += map->dm_nsegs;
1438 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1439 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1440 1.2 matt txq->txq_lastintr = 0;
1441 1.2 matt last_flags |= TXDB_FLAG_IC;
1442 1.2 matt }
1443 1.2 matt
1444 1.2 matt KASSERT(producer != txq->txq_last);
1445 1.2 matt
1446 1.2 matt struct gmac_txdb *start = producer;
1447 1.2 matt size_t count = map->dm_nsegs;
1448 1.25 matt producer->txdb_flags |= htole32(first_flags);
1449 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[0].ds_addr);
1450 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[0].ds_len);
1451 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1452 1.2 matt #if 0
1453 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1454 1.25 matt le32toh(producer->txdb_flags),
1455 1.25 matt le32toh(producer->txdb_buflen),
1456 1.25 matt le32toh(producer->txdb_addrlo),
1457 1.25 matt le32toh(producer->txdb_addrhi));
1458 1.2 matt #endif
1459 1.2 matt if (__predict_false(++producer == txq->txq_last)) {
1460 1.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1461 1.2 matt txq->txq_last - start);
1462 1.2 matt count -= txq->txq_last - start;
1463 1.2 matt producer = txq->txq_first;
1464 1.2 matt start = txq->txq_first;
1465 1.2 matt }
1466 1.25 matt producer->txdb_addrlo = htole32(map->dm_segs[i].ds_addr);
1467 1.25 matt producer->txdb_buflen = htole32(map->dm_segs[i].ds_len);
1468 1.2 matt }
1469 1.25 matt producer->txdb_flags |= htole32(last_flags);
1470 1.2 matt #if 0
1471 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1472 1.25 matt le32toh(producer->txdb_flags), le32toh(producer->txdb_buflen),
1473 1.25 matt le32toh(producer->txdb_addrlo), le32toh(producer->txdb_addrhi));
1474 1.2 matt #endif
1475 1.10 matt if (count)
1476 1.10 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1477 1.2 matt
1478 1.2 matt /*
1479 1.2 matt * Reduce free count by the number of segments we consumed.
1480 1.2 matt */
1481 1.2 matt txq->txq_free -= map->dm_nsegs;
1482 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1483 1.35 msaitoh KASSERT(map->dm_nsegs == 1
1484 1.35 msaitoh || (txq->txq_producer->txdb_flags & htole32(TXDB_FLAG_EF)) == 0);
1485 1.25 matt KASSERT(producer->txdb_flags & htole32(TXDB_FLAG_EF));
1486 1.2 matt
1487 1.2 matt #if 0
1488 1.35 msaitoh printf("%s: mbuf %p: produced a %u byte packet in %u segments "
1489 1.35 msaitoh "(%zd..%zd)\n", __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1490 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1491 1.2 matt #endif
1492 1.2 matt
1493 1.10 matt if (producer + 1 == txq->txq_last)
1494 1.2 matt txq->txq_producer = txq->txq_first;
1495 1.2 matt else
1496 1.10 matt txq->txq_producer = producer + 1;
1497 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1498 1.2 matt
1499 1.2 matt /*
1500 1.2 matt * Let the transmitter know there's more to do
1501 1.2 matt */
1502 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1503 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1504 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1505 1.2 matt
1506 1.2 matt return true;
1507 1.2 matt }
1508 1.2 matt
1509 1.16 matt static struct mbuf *
1510 1.16 matt bcmeth_copy_packet(struct mbuf *m)
1511 1.16 matt {
1512 1.16 matt struct mbuf *mext = NULL;
1513 1.16 matt size_t misalignment = 0;
1514 1.16 matt size_t hlen = 0;
1515 1.16 matt
1516 1.16 matt for (mext = m; mext != NULL; mext = mext->m_next) {
1517 1.16 matt if (mext->m_flags & M_EXT) {
1518 1.16 matt misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1519 1.16 matt break;
1520 1.16 matt }
1521 1.16 matt hlen += m->m_len;
1522 1.16 matt }
1523 1.16 matt
1524 1.16 matt struct mbuf *n = m->m_next;
1525 1.16 matt if (m != mext && hlen + misalignment <= MHLEN && false) {
1526 1.35 msaitoh KASSERT(m->m_pktdat <= m->m_data
1527 1.35 msaitoh && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]);
1528 1.16 matt size_t oldoff = m->m_data - m->m_pktdat;
1529 1.16 matt size_t off;
1530 1.16 matt if (mext == NULL) {
1531 1.16 matt off = (oldoff + hlen > MHLEN) ? 0 : oldoff;
1532 1.16 matt } else {
1533 1.16 matt off = MHLEN - (hlen + misalignment);
1534 1.16 matt }
1535 1.16 matt KASSERT(off + hlen + misalignment <= MHLEN);
1536 1.16 matt if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
1537 1.16 matt memmove(&m->m_pktdat[off], m->m_data, m->m_len);
1538 1.16 matt m->m_data = &m->m_pktdat[off];
1539 1.16 matt }
1540 1.16 matt m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]);
1541 1.16 matt m->m_len = hlen;
1542 1.16 matt m->m_next = mext;
1543 1.16 matt while (n != mext) {
1544 1.16 matt n = m_free(n);
1545 1.16 matt }
1546 1.16 matt return m;
1547 1.16 matt }
1548 1.16 matt
1549 1.16 matt struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type);
1550 1.16 matt if (m0 == NULL) {
1551 1.16 matt return NULL;
1552 1.16 matt }
1553 1.33 maxv m_copy_pkthdr(m0, m);
1554 1.16 matt MCLAIM(m0, m->m_owner);
1555 1.16 matt if (m0->m_pkthdr.len > MHLEN) {
1556 1.16 matt MCLGET(m0, M_DONTWAIT);
1557 1.16 matt if ((m0->m_flags & M_EXT) == 0) {
1558 1.16 matt m_freem(m0);
1559 1.16 matt return NULL;
1560 1.16 matt }
1561 1.16 matt }
1562 1.16 matt m0->m_len = m->m_pkthdr.len;
1563 1.16 matt m_copydata(m, 0, m0->m_len, mtod(m0, void *));
1564 1.16 matt m_freem(m);
1565 1.16 matt return m0;
1566 1.16 matt }
1567 1.16 matt
1568 1.2 matt static bool
1569 1.2 matt bcmeth_txq_enqueue(
1570 1.2 matt struct bcmeth_softc *sc,
1571 1.2 matt struct bcmeth_txqueue *txq)
1572 1.2 matt {
1573 1.2 matt for (;;) {
1574 1.2 matt if (IF_QFULL(&txq->txq_mbufs))
1575 1.2 matt return false;
1576 1.2 matt struct mbuf *m = txq->txq_next;
1577 1.2 matt if (m == NULL) {
1578 1.2 matt int s = splnet();
1579 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1580 1.2 matt splx(s);
1581 1.2 matt if (m == NULL)
1582 1.2 matt return true;
1583 1.2 matt M_SETCTX(m, NULL);
1584 1.2 matt } else {
1585 1.2 matt txq->txq_next = NULL;
1586 1.2 matt }
1587 1.15 matt /*
1588 1.15 matt * If LINK2 is set and this packet uses multiple mbufs,
1589 1.15 matt * consolidate it into a single mbuf.
1590 1.15 matt */
1591 1.15 matt if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) {
1592 1.16 matt struct mbuf *m0 = bcmeth_copy_packet(m);
1593 1.15 matt if (m0 == NULL) {
1594 1.15 matt txq->txq_next = m;
1595 1.15 matt return true;
1596 1.15 matt }
1597 1.15 matt m = m0;
1598 1.15 matt }
1599 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1600 1.2 matt if (error) {
1601 1.2 matt aprint_error_dev(sc->sc_dev,
1602 1.2 matt "discarded packet due to "
1603 1.2 matt "dmamap load failure: %d\n", error);
1604 1.2 matt m_freem(m);
1605 1.2 matt continue;
1606 1.2 matt }
1607 1.2 matt KASSERT(txq->txq_next == NULL);
1608 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1609 1.2 matt txq->txq_next = m;
1610 1.2 matt return false;
1611 1.2 matt }
1612 1.2 matt KASSERT(txq->txq_next == NULL);
1613 1.2 matt }
1614 1.2 matt }
1615 1.2 matt
1616 1.2 matt static bool
1617 1.2 matt bcmeth_txq_consume(
1618 1.2 matt struct bcmeth_softc *sc,
1619 1.2 matt struct bcmeth_txqueue *txq)
1620 1.2 matt {
1621 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1622 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1623 1.2 matt size_t txfree = 0;
1624 1.2 matt
1625 1.2 matt #if 0
1626 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1627 1.2 matt #endif
1628 1.2 matt
1629 1.2 matt for (;;) {
1630 1.2 matt if (consumer == txq->txq_producer) {
1631 1.2 matt txq->txq_consumer = consumer;
1632 1.2 matt txq->txq_free += txfree;
1633 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree);
1634 1.2 matt #if 0
1635 1.35 msaitoh printf("%s: empty: freed %zu descriptors going from "
1636 1.35 msaitoh "%zu to %zu\n", __func__, txfree,
1637 1.35 msaitoh txq->txq_free - txfree, txq->txq_free);
1638 1.2 matt #endif
1639 1.2 matt KASSERT(txq->txq_lastintr == 0);
1640 1.35 msaitoh KASSERT(txq->txq_free
1641 1.35 msaitoh == txq->txq_last - txq->txq_first - 1);
1642 1.2 matt return true;
1643 1.2 matt }
1644 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1645 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1646 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1647 1.2 matt txq->txq_consumer = consumer;
1648 1.2 matt txq->txq_free += txfree;
1649 1.32 riastrad txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree);
1650 1.2 matt #if 0
1651 1.2 matt printf("%s: freed %zu descriptors\n",
1652 1.2 matt __func__, txfree);
1653 1.2 matt #endif
1654 1.2 matt return bcmeth_txq_fillable_p(sc, txq);
1655 1.2 matt }
1656 1.2 matt
1657 1.2 matt /*
1658 1.2 matt * If this is the last descriptor in the chain, get the
1659 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1660 1.2 matt */
1661 1.25 matt const uint32_t txdb_flags = le32toh(consumer->txdb_flags);
1662 1.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1663 1.2 matt struct mbuf *m;
1664 1.2 matt
1665 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1666 1.2 matt KASSERT(m);
1667 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1668 1.2 matt #if 0
1669 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1670 1.2 matt __func__, m, m->m_pkthdr.len);
1671 1.2 matt #endif
1672 1.31 msaitoh bpf_mtap(ifp, m, BPF_D_OUT);
1673 1.2 matt ifp->if_opackets++;
1674 1.2 matt ifp->if_obytes += m->m_pkthdr.len;
1675 1.2 matt if (m->m_flags & M_MCAST)
1676 1.2 matt ifp->if_omcasts++;
1677 1.2 matt m_freem(m);
1678 1.2 matt }
1679 1.2 matt
1680 1.2 matt /*
1681 1.2 matt * We own this packet again. Clear all flags except wrap.
1682 1.2 matt */
1683 1.2 matt txfree++;
1684 1.2 matt
1685 1.2 matt /*
1686 1.2 matt * Wrap at the last entry!
1687 1.2 matt */
1688 1.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1689 1.25 matt consumer->txdb_flags = htole32(TXDB_FLAG_ET);
1690 1.2 matt KASSERT(consumer + 1 == txq->txq_last);
1691 1.2 matt consumer = txq->txq_first;
1692 1.2 matt } else {
1693 1.2 matt consumer->txdb_flags = 0;
1694 1.2 matt consumer++;
1695 1.2 matt KASSERT(consumer < txq->txq_last);
1696 1.2 matt }
1697 1.2 matt }
1698 1.2 matt }
1699 1.2 matt
1700 1.2 matt static void
1701 1.2 matt bcmeth_txq_purge(
1702 1.2 matt struct bcmeth_softc *sc,
1703 1.2 matt struct bcmeth_txqueue *txq)
1704 1.2 matt {
1705 1.2 matt struct mbuf *m;
1706 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1707 1.2 matt
1708 1.2 matt for (;;) {
1709 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1710 1.2 matt if (m == NULL)
1711 1.2 matt break;
1712 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1713 1.2 matt m_freem(m);
1714 1.2 matt }
1715 1.2 matt if ((m = txq->txq_next) != NULL) {
1716 1.2 matt txq->txq_next = NULL;
1717 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1718 1.2 matt m_freem(m);
1719 1.2 matt }
1720 1.2 matt }
1721 1.2 matt
1722 1.2 matt static void
1723 1.2 matt bcmeth_txq_reset(
1724 1.2 matt struct bcmeth_softc *sc,
1725 1.2 matt struct bcmeth_txqueue *txq)
1726 1.2 matt {
1727 1.2 matt /*
1728 1.2 matt * sync all the descriptors
1729 1.2 matt */
1730 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1731 1.2 matt txq->txq_last - txq->txq_first);
1732 1.2 matt
1733 1.2 matt /*
1734 1.2 matt * Make sure we own all descriptors in the ring.
1735 1.2 matt */
1736 1.2 matt struct gmac_txdb *txdb;
1737 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1738 1.2 matt txdb->txdb_flags = 0;
1739 1.2 matt }
1740 1.2 matt
1741 1.2 matt /*
1742 1.2 matt * Last descriptor has the wrap flag.
1743 1.2 matt */
1744 1.25 matt txdb->txdb_flags = htole32(TXDB_FLAG_ET);
1745 1.2 matt
1746 1.2 matt /*
1747 1.2 matt * Reset the producer consumer indexes.
1748 1.2 matt */
1749 1.2 matt txq->txq_consumer = txq->txq_first;
1750 1.2 matt txq->txq_producer = txq->txq_first;
1751 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1752 1.2 matt txq->txq_threshold = txq->txq_free / 2;
1753 1.2 matt txq->txq_lastintr = 0;
1754 1.2 matt
1755 1.2 matt /*
1756 1.2 matt * What do we want to get interrupted on?
1757 1.2 matt */
1758 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1759 1.2 matt
1760 1.2 matt /*
1761 1.2 matt * Restart the transmiter at the first descriptor
1762 1.2 matt */
1763 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1764 1.2 matt txq->txq_descmap->dm_segs->ds_addr);
1765 1.2 matt }
1766 1.2 matt
1767 1.2 matt static void
1768 1.2 matt bcmeth_ifstart(struct ifnet *ifp)
1769 1.2 matt {
1770 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1771 1.2 matt
1772 1.16 matt if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) {
1773 1.16 matt return;
1774 1.16 matt }
1775 1.16 matt
1776 1.16 matt #ifdef BCMETH_MPSAFETX
1777 1.16 matt if (cpu_intr_p()) {
1778 1.16 matt #endif
1779 1.16 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1780 1.16 matt softint_schedule(sc->sc_soft_ih);
1781 1.16 matt #ifdef BCMETH_MPSAFETX
1782 1.16 matt } else {
1783 1.16 matt /*
1784 1.16 matt * Either we are in a softintr thread already or some other
1785 1.16 matt * thread so just borrow it to do the send and save ourselves
1786 1.16 matt * the overhead of a fast soft int.
1787 1.16 matt */
1788 1.16 matt bcmeth_soft_txintr(sc);
1789 1.16 matt }
1790 1.16 matt #endif
1791 1.2 matt }
1792 1.2 matt
1793 1.2 matt int
1794 1.1 matt bcmeth_intr(void *arg)
1795 1.1 matt {
1796 1.1 matt struct bcmeth_softc * const sc = arg;
1797 1.2 matt uint32_t soft_flags = 0;
1798 1.8 matt uint32_t work_flags = 0;
1799 1.1 matt int rv = 0;
1800 1.1 matt
1801 1.1 matt mutex_enter(sc->sc_hwlock);
1802 1.1 matt
1803 1.15 matt uint32_t intmask = sc->sc_intmask;
1804 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_intr);
1805 1.2 matt
1806 1.2 matt for (;;) {
1807 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1808 1.15 matt intstatus &= intmask;
1809 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1810 1.2 matt if (intstatus == 0) {
1811 1.2 matt break;
1812 1.2 matt }
1813 1.2 matt #if 0
1814 1.35 msaitoh aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1815 1.8 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1816 1.2 matt #endif
1817 1.2 matt if (intstatus & RCVINT) {
1818 1.8 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1819 1.15 matt intmask &= ~RCVINT;
1820 1.8 matt
1821 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1822 1.8 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1823 1.8 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1824 1.8 matt /*
1825 1.8 matt * We wrapped at the end so count how far
1826 1.8 matt * we are from the end.
1827 1.8 matt */
1828 1.8 matt descs += rxq->rxq_last - rxq->rxq_consumer;
1829 1.8 matt } else {
1830 1.8 matt descs -= rxq->rxq_consumer - rxq->rxq_first;
1831 1.8 matt }
1832 1.8 matt /*
1833 1.8 matt * If we "timedout" we can't be hogging so use
1834 1.8 matt * softints. If we exceeded then we might hogging
1835 1.8 matt * so let the workqueue deal with them.
1836 1.8 matt */
1837 1.35 msaitoh const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy,
1838 1.35 msaitoh INTRCVLAZY_FRAMECOUNT);
1839 1.9 matt if (descs < framecount
1840 1.9 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1841 1.8 matt soft_flags |= SOFT_RXINTR;
1842 1.8 matt } else {
1843 1.8 matt work_flags |= WORK_RXINTR;
1844 1.8 matt }
1845 1.2 matt }
1846 1.2 matt
1847 1.2 matt if (intstatus & XMTINT_0) {
1848 1.15 matt intmask &= ~XMTINT_0;
1849 1.2 matt soft_flags |= SOFT_TXINTR;
1850 1.2 matt }
1851 1.2 matt
1852 1.2 matt if (intstatus & RCVDESCUF) {
1853 1.15 matt intmask &= ~RCVDESCUF;
1854 1.8 matt work_flags |= WORK_RXUNDERFLOW;
1855 1.2 matt }
1856 1.2 matt
1857 1.15 matt intstatus &= intmask;
1858 1.2 matt if (intstatus) {
1859 1.10 matt aprint_error_dev(sc->sc_dev,
1860 1.10 matt "intr: intstatus=%#x\n", intstatus);
1861 1.10 matt aprint_error_dev(sc->sc_dev,
1862 1.10 matt "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n",
1863 1.10 matt sc->sc_rxq.rxq_first,
1864 1.10 matt sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr,
1865 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr),
1866 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0),
1867 1.10 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1));
1868 1.10 matt aprint_error_dev(sc->sc_dev,
1869 1.10 matt "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n",
1870 1.10 matt sc->sc_txq.txq_first,
1871 1.10 matt sc->sc_txq.txq_descmap->dm_segs[0].ds_addr,
1872 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr),
1873 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0),
1874 1.10 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1));
1875 1.15 matt intmask &= ~intstatus;
1876 1.8 matt work_flags |= WORK_REINIT;
1877 1.2 matt break;
1878 1.2 matt }
1879 1.2 matt }
1880 1.2 matt
1881 1.15 matt if (intmask != sc->sc_intmask) {
1882 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1883 1.8 matt }
1884 1.8 matt
1885 1.8 matt if (work_flags) {
1886 1.8 matt if (sc->sc_work_flags == 0) {
1887 1.8 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1888 1.8 matt }
1889 1.8 matt atomic_or_32(&sc->sc_work_flags, work_flags);
1890 1.8 matt rv = 1;
1891 1.8 matt }
1892 1.8 matt
1893 1.2 matt if (soft_flags) {
1894 1.8 matt if (sc->sc_soft_flags == 0) {
1895 1.8 matt softint_schedule(sc->sc_soft_ih);
1896 1.8 matt }
1897 1.8 matt atomic_or_32(&sc->sc_soft_flags, soft_flags);
1898 1.2 matt rv = 1;
1899 1.2 matt }
1900 1.1 matt
1901 1.1 matt mutex_exit(sc->sc_hwlock);
1902 1.1 matt
1903 1.1 matt return rv;
1904 1.1 matt }
1905 1.2 matt
1906 1.16 matt #ifdef BCMETH_MPSAFETX
1907 1.16 matt void
1908 1.16 matt bcmeth_soft_txintr(struct bcmeth_softc *sc)
1909 1.16 matt {
1910 1.16 matt mutex_enter(sc->sc_lock);
1911 1.16 matt /*
1912 1.16 matt * Let's do what we came here for. Consume transmitted
1913 1.34 msaitoh * packets off the transmit ring.
1914 1.16 matt */
1915 1.16 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1916 1.16 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1917 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1918 1.16 matt sc->sc_if.if_flags |= IFF_OACTIVE;
1919 1.16 matt } else {
1920 1.16 matt sc->sc_if.if_flags &= ~IFF_OACTIVE;
1921 1.16 matt }
1922 1.16 matt if (sc->sc_if.if_flags & IFF_RUNNING) {
1923 1.16 matt mutex_spin_enter(sc->sc_hwlock);
1924 1.16 matt sc->sc_intmask |= XMTINT_0;
1925 1.16 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1926 1.16 matt mutex_spin_exit(sc->sc_hwlock);
1927 1.16 matt }
1928 1.16 matt mutex_exit(sc->sc_lock);
1929 1.16 matt }
1930 1.16 matt #endif /* BCMETH_MPSAFETX */
1931 1.16 matt
1932 1.2 matt void
1933 1.2 matt bcmeth_soft_intr(void *arg)
1934 1.2 matt {
1935 1.2 matt struct bcmeth_softc * const sc = arg;
1936 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1937 1.15 matt uint32_t intmask = 0;
1938 1.2 matt
1939 1.2 matt mutex_enter(sc->sc_lock);
1940 1.2 matt
1941 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1942 1.2 matt
1943 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr);
1944 1.2 matt
1945 1.8 matt if ((soft_flags & SOFT_TXINTR)
1946 1.8 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1947 1.8 matt /*
1948 1.8 matt * Let's do what we came here for. Consume transmitted
1949 1.34 msaitoh * packets off the transmit ring.
1950 1.8 matt */
1951 1.8 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1952 1.8 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1953 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall);
1954 1.8 matt ifp->if_flags |= IFF_OACTIVE;
1955 1.8 matt } else {
1956 1.8 matt ifp->if_flags &= ~IFF_OACTIVE;
1957 1.8 matt }
1958 1.15 matt intmask |= XMTINT_0;
1959 1.8 matt }
1960 1.8 matt
1961 1.8 matt if (soft_flags & SOFT_RXINTR) {
1962 1.8 matt /*
1963 1.35 msaitoh * Let's consume
1964 1.8 matt */
1965 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
1966 1.20 matt sc->sc_rxq.rxq_threshold / 4)) {
1967 1.20 matt /*
1968 1.20 matt * We've consumed a quarter of the ring and still have
1969 1.20 matt * more to do. Refill the ring.
1970 1.20 matt */
1971 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1972 1.20 matt }
1973 1.15 matt intmask |= RCVINT;
1974 1.8 matt }
1975 1.8 matt
1976 1.8 matt if (ifp->if_flags & IFF_RUNNING) {
1977 1.8 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1978 1.14 matt mutex_spin_enter(sc->sc_hwlock);
1979 1.15 matt sc->sc_intmask |= intmask;
1980 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1981 1.14 matt mutex_spin_exit(sc->sc_hwlock);
1982 1.8 matt }
1983 1.8 matt
1984 1.8 matt mutex_exit(sc->sc_lock);
1985 1.8 matt }
1986 1.8 matt
1987 1.8 matt void
1988 1.8 matt bcmeth_worker(struct work *wk, void *arg)
1989 1.8 matt {
1990 1.8 matt struct bcmeth_softc * const sc = arg;
1991 1.8 matt struct ifnet * const ifp = &sc->sc_if;
1992 1.15 matt uint32_t intmask = 0;
1993 1.8 matt
1994 1.8 matt mutex_enter(sc->sc_lock);
1995 1.8 matt
1996 1.18 matt BCMETH_EVCNT_INCR(sc->sc_ev_work);
1997 1.8 matt
1998 1.8 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1999 1.8 matt if (work_flags & WORK_REINIT) {
2000 1.2 matt int s = splnet();
2001 1.8 matt sc->sc_soft_flags = 0;
2002 1.2 matt bcmeth_ifinit(ifp);
2003 1.2 matt splx(s);
2004 1.8 matt work_flags &= ~WORK_RXUNDERFLOW;
2005 1.2 matt }
2006 1.2 matt
2007 1.8 matt if (work_flags & WORK_RXUNDERFLOW) {
2008 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
2009 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
2010 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
2011 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
2012 1.2 matt } else {
2013 1.15 matt intmask |= RCVDESCUF;
2014 1.2 matt }
2015 1.2 matt aprint_normal_dev(sc->sc_dev,
2016 1.2 matt "increasing receive buffers from %zu to %zu\n",
2017 1.2 matt rxq->rxq_threshold, threshold);
2018 1.2 matt rxq->rxq_threshold = threshold;
2019 1.2 matt }
2020 1.2 matt
2021 1.8 matt if (work_flags & WORK_RXINTR) {
2022 1.2 matt /*
2023 1.35 msaitoh * Let's consume
2024 1.2 matt */
2025 1.20 matt while (bcmeth_rxq_consume(sc, &sc->sc_rxq,
2026 1.20 matt sc->sc_rxq.rxq_threshold / 4)) {
2027 1.20 matt /*
2028 1.20 matt * We've consumed a quarter of the ring and still have
2029 1.20 matt * more to do. Refill the ring.
2030 1.20 matt */
2031 1.20 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2032 1.20 matt }
2033 1.15 matt intmask |= RCVINT;
2034 1.2 matt }
2035 1.2 matt
2036 1.2 matt if (ifp->if_flags & IFF_RUNNING) {
2037 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
2038 1.16 matt #if 0
2039 1.16 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
2040 1.16 matt if (intstatus & RCVINT) {
2041 1.16 matt bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT);
2042 1.16 matt work_flags |= WORK_RXINTR;
2043 1.16 matt continue;
2044 1.16 matt }
2045 1.16 matt #endif
2046 1.14 matt mutex_spin_enter(sc->sc_hwlock);
2047 1.15 matt sc->sc_intmask |= intmask;
2048 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
2049 1.14 matt mutex_spin_exit(sc->sc_hwlock);
2050 1.2 matt }
2051 1.2 matt
2052 1.2 matt mutex_exit(sc->sc_lock);
2053 1.2 matt }
2054