bcm53xx_eth.c revision 1.6 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.1 matt #define GMAC_PRIVATE
31 1.1 matt
32 1.1 matt #include "locators.h"
33 1.1 matt
34 1.1 matt #include <sys/cdefs.h>
35 1.1 matt
36 1.6 matt __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.6 2012/10/05 04:05:53 matt Exp $");
37 1.1 matt
38 1.1 matt #include <sys/param.h>
39 1.2 matt #include <sys/atomic.h>
40 1.1 matt #include <sys/bus.h>
41 1.1 matt #include <sys/device.h>
42 1.2 matt #include <sys/ioctl.h>
43 1.1 matt #include <sys/intr.h>
44 1.2 matt #include <sys/kmem.h>
45 1.1 matt #include <sys/mutex.h>
46 1.2 matt #include <sys/socket.h>
47 1.1 matt #include <sys/systm.h>
48 1.1 matt
49 1.1 matt #include <net/if.h>
50 1.1 matt #include <net/if_ether.h>
51 1.1 matt #include <net/if_media.h>
52 1.1 matt
53 1.2 matt #include <net/if_dl.h>
54 1.2 matt
55 1.2 matt #include <net/bpf.h>
56 1.2 matt
57 1.1 matt #include <dev/mii/miivar.h>
58 1.1 matt
59 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
60 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
61 1.1 matt
62 1.2 matt #define BCMETH_RCVOFFSET 6
63 1.2 matt #define BCMETH_MAXTXMBUFS 32
64 1.2 matt #define BCMETH_NTXSEGS 30
65 1.2 matt #define BCMETH_MAXRXMBUFS 255
66 1.2 matt #define BCMETH_MINRXMBUFS 32
67 1.2 matt #define BCMETH_NRXSEGS 1
68 1.2 matt
69 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
70 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
71 1.1 matt
72 1.2 matt struct bcmeth_txqueue {
73 1.2 matt bus_dmamap_t txq_descmap;
74 1.2 matt struct gmac_txdb *txq_consumer;
75 1.2 matt struct gmac_txdb *txq_producer;
76 1.2 matt struct gmac_txdb *txq_first;
77 1.2 matt struct gmac_txdb *txq_last;
78 1.2 matt struct ifqueue txq_mbufs;
79 1.2 matt struct mbuf *txq_next;
80 1.2 matt size_t txq_free;
81 1.2 matt size_t txq_threshold;
82 1.2 matt size_t txq_lastintr;
83 1.2 matt bus_size_t txq_reg_xmtaddrlo;
84 1.2 matt bus_size_t txq_reg_xmtptr;
85 1.2 matt bus_size_t txq_reg_xmtctl;
86 1.2 matt bus_size_t txq_reg_xmtsts0;
87 1.2 matt bus_dma_segment_t txq_descmap_seg;
88 1.2 matt };
89 1.2 matt
90 1.2 matt struct bcmeth_rxqueue {
91 1.2 matt bus_dmamap_t rxq_descmap;
92 1.2 matt struct gmac_rxdb *rxq_consumer;
93 1.2 matt struct gmac_rxdb *rxq_producer;
94 1.2 matt struct gmac_rxdb *rxq_first;
95 1.2 matt struct gmac_rxdb *rxq_last;
96 1.2 matt struct mbuf *rxq_mhead;
97 1.2 matt struct mbuf **rxq_mtail;
98 1.2 matt struct mbuf *rxq_mconsumer;
99 1.2 matt size_t rxq_inuse;
100 1.2 matt size_t rxq_threshold;
101 1.2 matt bus_size_t rxq_reg_rcvaddrlo;
102 1.2 matt bus_size_t rxq_reg_rcvptr;
103 1.2 matt bus_size_t rxq_reg_rcvctl;
104 1.2 matt bus_size_t rxq_reg_rcvsts0;
105 1.2 matt bus_dma_segment_t rxq_descmap_seg;
106 1.2 matt };
107 1.2 matt
108 1.2 matt struct bcmeth_mapcache {
109 1.2 matt u_int dmc_nmaps;
110 1.2 matt u_int dmc_maxseg;
111 1.2 matt u_int dmc_maxmaps;
112 1.2 matt u_int dmc_maxmapsize;
113 1.2 matt bus_dmamap_t dmc_maps[0];
114 1.2 matt };
115 1.2 matt
116 1.1 matt struct bcmeth_softc {
117 1.1 matt device_t sc_dev;
118 1.1 matt bus_space_tag_t sc_bst;
119 1.1 matt bus_space_handle_t sc_bsh;
120 1.1 matt bus_dma_tag_t sc_dmat;
121 1.1 matt kmutex_t *sc_lock;
122 1.1 matt kmutex_t *sc_hwlock;
123 1.1 matt struct ethercom sc_ec;
124 1.2 matt #define sc_if sc_ec.ec_if
125 1.2 matt struct ifmedia sc_media;
126 1.2 matt void *sc_soft_ih;
127 1.1 matt void *sc_ih;
128 1.2 matt
129 1.2 matt struct bcmeth_rxqueue sc_rxq;
130 1.2 matt struct bcmeth_txqueue sc_txq;
131 1.2 matt
132 1.2 matt uint32_t sc_maxfrm;
133 1.2 matt uint32_t sc_cmdcfg;
134 1.2 matt uint32_t sc_intmask;
135 1.2 matt volatile uint32_t sc_soft_flags;
136 1.2 matt #define SOFT_RXINTR 0x01
137 1.2 matt #define SOFT_RXUNDERFLOW 0x02
138 1.2 matt #define SOFT_TXINTR 0x04
139 1.2 matt #define SOFT_REINIT 0x08
140 1.2 matt
141 1.2 matt struct evcnt sc_ev_intr;
142 1.2 matt struct evcnt sc_ev_soft_intr;
143 1.2 matt struct evcnt sc_ev_tx_stall;
144 1.2 matt
145 1.2 matt struct ifqueue sc_rx_bufcache;
146 1.2 matt struct bcmeth_mapcache *sc_rx_mapcache;
147 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
148 1.2 matt
149 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
150 1.1 matt };
151 1.1 matt
152 1.2 matt static void bcmeth_ifstart(struct ifnet *);
153 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
154 1.2 matt static int bcmeth_ifinit(struct ifnet *);
155 1.2 matt static void bcmeth_ifstop(struct ifnet *, int);
156 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
157 1.2 matt
158 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
159 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
160 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
161 1.2 matt struct bcmeth_mapcache *);
162 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
163 1.2 matt struct bcmeth_mapcache *);
164 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
165 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
166 1.2 matt
167 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
168 1.2 matt struct bcmeth_txqueue *, u_int);
169 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
170 1.2 matt struct bcmeth_txqueue *);
171 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
172 1.2 matt struct bcmeth_txqueue *);
173 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
174 1.2 matt struct bcmeth_txqueue *);
175 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
176 1.2 matt struct bcmeth_txqueue *, struct mbuf *m);
177 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
178 1.2 matt struct bcmeth_txqueue *);
179 1.2 matt
180 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
181 1.2 matt struct bcmeth_rxqueue *, u_int);
182 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
183 1.2 matt struct bcmeth_rxqueue *);
184 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
185 1.2 matt struct bcmeth_rxqueue *, bool);
186 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
187 1.2 matt struct bcmeth_rxqueue *);
188 1.2 matt
189 1.1 matt static int bcmeth_intr(void *);
190 1.2 matt static void bcmeth_soft_intr(void *);
191 1.2 matt
192 1.2 matt static int bcmeth_mediachange(struct ifnet *);
193 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
194 1.1 matt
195 1.1 matt static inline uint32_t
196 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
197 1.1 matt {
198 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
199 1.1 matt }
200 1.1 matt
201 1.1 matt static inline void
202 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
203 1.1 matt {
204 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
205 1.1 matt }
206 1.1 matt
207 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
208 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
209 1.1 matt
210 1.1 matt static int
211 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
212 1.1 matt {
213 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
214 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
215 1.1 matt
216 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
217 1.1 matt return 0;
218 1.1 matt
219 1.1 matt #ifdef DIAGNOSTIC
220 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
221 1.1 matt #endif
222 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
223 1.1 matt
224 1.1 matt return 1;
225 1.1 matt }
226 1.1 matt
227 1.1 matt static void
228 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
229 1.1 matt {
230 1.1 matt struct bcmeth_softc * const sc = device_private(self);
231 1.2 matt struct ethercom * const ec = &sc->sc_ec;
232 1.2 matt struct ifnet * const ifp = &ec->ec_if;
233 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
234 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
235 1.2 matt const char * const xname = device_xname(self);
236 1.2 matt prop_dictionary_t dict = device_properties(self);
237 1.2 matt int error;
238 1.1 matt
239 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
240 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
241 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
242 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
243 1.1 matt
244 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
245 1.2 matt if (eaprop == NULL) {
246 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
247 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
248 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
249 1.2 matt aprint_error(": mac-address property is missing\n");
250 1.2 matt return;
251 1.2 matt }
252 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
253 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
254 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
255 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
256 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
257 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
258 1.2 matt } else {
259 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
260 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
261 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
262 1.2 matt ETHER_ADDR_LEN);
263 1.2 matt }
264 1.2 matt sc->sc_dev = self;
265 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
266 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
267 1.2 matt
268 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
269 1.1 matt
270 1.1 matt aprint_naive("\n");
271 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
272 1.1 matt
273 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
274 1.2 matt if (error) {
275 1.2 matt aprint_error(": failed to init rxq: %d\n", error);
276 1.2 matt return;
277 1.2 matt }
278 1.2 matt
279 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
280 1.2 matt if (error) {
281 1.2 matt aprint_error(": failed to init txq: %d\n", error);
282 1.2 matt return;
283 1.2 matt }
284 1.2 matt
285 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
286 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
287 1.2 matt if (error) {
288 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
289 1.2 matt return;
290 1.2 matt }
291 1.2 matt
292 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
293 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
294 1.2 matt if (error) {
295 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
296 1.2 matt return;
297 1.2 matt }
298 1.2 matt
299 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
300 1.2 matt bcmeth_soft_intr, sc);
301 1.1 matt
302 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
303 1.1 matt bcmeth_intr, sc);
304 1.1 matt
305 1.1 matt if (sc->sc_ih == NULL) {
306 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
307 1.1 matt loc->loc_intrs[0]);
308 1.1 matt } else {
309 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
310 1.1 matt loc->loc_intrs[0]);
311 1.1 matt }
312 1.2 matt
313 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
314 1.2 matt ether_sprintf(sc->sc_enaddr));
315 1.2 matt
316 1.2 matt /*
317 1.2 matt * Since each port in plugged into the switch/flow-accelerator,
318 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
319 1.2 matt */
320 1.2 matt int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
321 1.2 matt //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
322 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
323 1.2 matt bcmeth_mediastatus);
324 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
325 1.2 matt ifmedia_set(&sc->sc_media, ifmedia);
326 1.2 matt
327 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
328 1.2 matt
329 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
330 1.2 matt ifp->if_softc = sc;
331 1.2 matt ifp->if_baudrate = IF_Mbps(1000);
332 1.2 matt ifp->if_capabilities = 0;
333 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
334 1.2 matt ifp->if_ioctl = bcmeth_ifioctl;
335 1.2 matt ifp->if_start = bcmeth_ifstart;
336 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
337 1.2 matt ifp->if_init = bcmeth_ifinit;
338 1.2 matt ifp->if_stop = bcmeth_ifstop;
339 1.2 matt IFQ_SET_READY(&ifp->if_snd);
340 1.2 matt
341 1.2 matt bcmeth_ifstop(ifp, true);
342 1.2 matt
343 1.2 matt /*
344 1.2 matt * Attach the interface.
345 1.2 matt */
346 1.2 matt if_attach(ifp);
347 1.2 matt ether_ifattach(ifp, sc->sc_enaddr);
348 1.2 matt
349 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
350 1.2 matt NULL, xname, "intr");
351 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
352 1.2 matt NULL, xname, "soft intr");
353 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
354 1.2 matt NULL, xname, "tx stalls");
355 1.2 matt }
356 1.2 matt
357 1.2 matt static int
358 1.2 matt bcmeth_mediachange(struct ifnet *ifp)
359 1.2 matt {
360 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
361 1.2 matt return 0;
362 1.2 matt }
363 1.2 matt
364 1.2 matt static void
365 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
366 1.2 matt {
367 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
368 1.2 matt
369 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
370 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
371 1.2 matt }
372 1.2 matt
373 1.2 matt static uint64_t
374 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
375 1.2 matt {
376 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
377 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
378 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
379 1.5 matt | (enaddr[0] << 24) // UNIMAC_MAC_0
380 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
381 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
382 1.2 matt }
383 1.2 matt
384 1.2 matt static int
385 1.2 matt bcmeth_ifinit(struct ifnet *ifp)
386 1.2 matt {
387 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
388 1.2 matt int error = 0;
389 1.2 matt
390 1.2 matt sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES);
391 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
392 1.2 matt return error;
393 1.2 matt
394 1.2 matt KASSERT(ifp->if_flags & IFF_UP);
395 1.2 matt
396 1.2 matt /*
397 1.2 matt * Stop the interface
398 1.2 matt */
399 1.2 matt bcmeth_ifstop(ifp, 0);
400 1.2 matt
401 1.2 matt /*
402 1.2 matt * If our frame size has changed (or it's our first time through)
403 1.2 matt * destroy the existing transmit mapcache.
404 1.2 matt */
405 1.2 matt if (sc->sc_tx_mapcache != NULL
406 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
407 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
408 1.2 matt sc->sc_tx_mapcache = NULL;
409 1.2 matt }
410 1.2 matt
411 1.2 matt if (sc->sc_tx_mapcache == NULL) {
412 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
413 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
414 1.2 matt if (error)
415 1.2 matt return error;
416 1.2 matt }
417 1.2 matt
418 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
419 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
420 1.2 matt | RX_ENA | TX_ENA;
421 1.2 matt
422 1.2 matt if (ifp->if_flags & IFF_PROMISC) {
423 1.2 matt sc->sc_cmdcfg |= PROMISC_EN;
424 1.2 matt } else {
425 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
426 1.2 matt }
427 1.2 matt
428 1.2 matt const uint64_t macstnaddr =
429 1.2 matt bcmeth_macaddr_create(CLLADDR(ifp->if_sadl));
430 1.2 matt
431 1.2 matt sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
432 1.2 matt
433 1.2 matt /* 5. Load RCVADDR_LO with new pointer */
434 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
435 1.2 matt
436 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
437 1.4 matt __SHIFTIN(BCMETH_RCVOFFSET, RCVCTL_RCVOFFSET)
438 1.2 matt | RCVCTL_PARITY_DIS
439 1.2 matt | RCVCTL_OFLOW_CONTINUE
440 1.2 matt | __SHIFTIN(4, RCVCTL_BURSTLEN));
441 1.2 matt
442 1.2 matt /* 6. Load XMTADDR_LO with new pointer */
443 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
444 1.2 matt
445 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
446 1.2 matt | XMTCTL_PARITY_DIS
447 1.2 matt | __SHIFTIN(4, XMTCTL_BURSTLEN));
448 1.2 matt
449 1.2 matt /* 7. Setup other UNIMAC registers */
450 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
451 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
452 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
453 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
454 1.2 matt
455 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
456 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
457 1.2 matt devctl &= ~FLOW_CTRL_MODE;
458 1.2 matt devctl &= ~MIB_RD_RESET_EN;
459 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
460 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
461 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
462 1.2 matt
463 1.3 matt /* Setup lazy receive (at most 1ms). */
464 1.3 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, __SHIFTIN(10, INTRCVLAZY_FRAMECOUNT)
465 1.3 matt | __SHIFTIN(125000000 / 1000, INTRCVLAZY_TIMEOUT));
466 1.3 matt
467 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
468 1.2 matt sc->sc_intmask |= XMTINT_0|XMTUF;
469 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
470 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
471 1.2 matt
472 1.2 matt
473 1.2 matt /* 12. Enable receive queues in RQUEUE, */
474 1.2 matt sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
475 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
476 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
477 1.2 matt
478 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
479 1.3 matt
480 1.3 matt #if 0
481 1.3 matt aprint_normal_dev(sc->sc_dev,
482 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
483 1.3 matt devctl, sc->sc_cmdcfg,
484 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
485 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
486 1.2 matt #endif
487 1.2 matt
488 1.2 matt sc->sc_soft_flags = 0;
489 1.2 matt
490 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
491 1.2 matt
492 1.2 matt ifp->if_flags |= IFF_RUNNING;
493 1.2 matt
494 1.2 matt return error;
495 1.2 matt }
496 1.2 matt
497 1.2 matt static void
498 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
499 1.2 matt {
500 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
501 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
502 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
503 1.2 matt
504 1.2 matt KASSERT(!cpu_intr_p());
505 1.2 matt
506 1.2 matt sc->sc_soft_flags = 0;
507 1.2 matt
508 1.2 matt /* Disable Rx processing */
509 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
510 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
511 1.2 matt
512 1.2 matt /* Disable Tx processing */
513 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
514 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
515 1.2 matt
516 1.2 matt /* Disable all interrupts */
517 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
518 1.2 matt
519 1.2 matt for (;;) {
520 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
521 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
522 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
523 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
524 1.2 matt break;
525 1.2 matt delay(50);
526 1.2 matt }
527 1.2 matt /*
528 1.2 matt * Now reset the controller.
529 1.2 matt *
530 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
531 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
532 1.2 matt */
533 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
534 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
535 1.2 matt sc->sc_intmask = 0;
536 1.2 matt ifp->if_flags &= ~IFF_RUNNING;
537 1.2 matt
538 1.2 matt /*
539 1.2 matt * Let's consume any remaining transmitted packets. And if we are
540 1.2 matt * disabling the interface, purge ourselves of any untransmitted
541 1.2 matt * packets. But don't consume any received packets, just drop them.
542 1.2 matt * If we aren't disabling the interface, save the mbufs in the
543 1.2 matt * receive queue for reuse.
544 1.2 matt */
545 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
546 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
547 1.2 matt if (disable) {
548 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
549 1.2 matt IF_PURGE(&ifp->if_snd);
550 1.2 matt }
551 1.2 matt
552 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
553 1.2 matt }
554 1.2 matt
555 1.2 matt static void
556 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
557 1.2 matt {
558 1.2 matt }
559 1.2 matt
560 1.2 matt static int
561 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
562 1.2 matt {
563 1.2 matt struct bcmeth_softc *sc = ifp->if_softc;
564 1.2 matt struct ifreq * const ifr = data;
565 1.2 matt const int s = splnet();
566 1.2 matt int error;
567 1.2 matt
568 1.2 matt switch (cmd) {
569 1.2 matt case SIOCSIFMEDIA:
570 1.2 matt case SIOCGIFMEDIA:
571 1.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
572 1.2 matt break;
573 1.2 matt
574 1.2 matt default:
575 1.2 matt error = ether_ioctl(ifp, cmd, data);
576 1.2 matt if (error != ENETRESET)
577 1.2 matt break;
578 1.2 matt
579 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
580 1.2 matt error = 0;
581 1.2 matt break;
582 1.2 matt }
583 1.2 matt error = bcmeth_ifinit(ifp);
584 1.2 matt break;
585 1.2 matt }
586 1.2 matt
587 1.2 matt splx(s);
588 1.2 matt return error;
589 1.2 matt }
590 1.2 matt
591 1.2 matt static void
592 1.2 matt bcmeth_rxq_desc_presync(
593 1.2 matt struct bcmeth_softc *sc,
594 1.2 matt struct bcmeth_rxqueue *rxq,
595 1.2 matt struct gmac_rxdb *rxdb,
596 1.2 matt size_t count)
597 1.2 matt {
598 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
599 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
600 1.2 matt BUS_DMASYNC_PREWRITE);
601 1.2 matt }
602 1.2 matt
603 1.2 matt static void
604 1.2 matt bcmeth_rxq_desc_postsync(
605 1.2 matt struct bcmeth_softc *sc,
606 1.2 matt struct bcmeth_rxqueue *rxq,
607 1.2 matt struct gmac_rxdb *rxdb,
608 1.2 matt size_t count)
609 1.2 matt {
610 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
611 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
612 1.2 matt BUS_DMASYNC_POSTWRITE);
613 1.2 matt }
614 1.2 matt
615 1.2 matt static void
616 1.2 matt bcmeth_txq_desc_presync(
617 1.2 matt struct bcmeth_softc *sc,
618 1.2 matt struct bcmeth_txqueue *txq,
619 1.2 matt struct gmac_txdb *txdb,
620 1.2 matt size_t count)
621 1.2 matt {
622 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
623 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
624 1.2 matt BUS_DMASYNC_PREWRITE);
625 1.2 matt }
626 1.2 matt
627 1.2 matt static void
628 1.2 matt bcmeth_txq_desc_postsync(
629 1.2 matt struct bcmeth_softc *sc,
630 1.2 matt struct bcmeth_txqueue *txq,
631 1.2 matt struct gmac_txdb *txdb,
632 1.2 matt size_t count)
633 1.2 matt {
634 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
635 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
636 1.2 matt BUS_DMASYNC_POSTWRITE);
637 1.2 matt }
638 1.2 matt
639 1.2 matt static bus_dmamap_t
640 1.2 matt bcmeth_mapcache_get(
641 1.2 matt struct bcmeth_softc *sc,
642 1.2 matt struct bcmeth_mapcache *dmc)
643 1.2 matt {
644 1.2 matt KASSERT(dmc->dmc_nmaps > 0);
645 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
646 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
647 1.2 matt }
648 1.2 matt
649 1.2 matt static void
650 1.2 matt bcmeth_mapcache_put(
651 1.2 matt struct bcmeth_softc *sc,
652 1.2 matt struct bcmeth_mapcache *dmc,
653 1.2 matt bus_dmamap_t map)
654 1.2 matt {
655 1.2 matt KASSERT(map != NULL);
656 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
657 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
658 1.2 matt }
659 1.2 matt
660 1.2 matt static void
661 1.2 matt bcmeth_mapcache_destroy(
662 1.2 matt struct bcmeth_softc *sc,
663 1.2 matt struct bcmeth_mapcache *dmc)
664 1.2 matt {
665 1.2 matt const size_t dmc_size =
666 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
667 1.2 matt
668 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
669 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
670 1.2 matt }
671 1.2 matt kmem_intr_free(dmc, dmc_size);
672 1.2 matt }
673 1.2 matt
674 1.2 matt static int
675 1.2 matt bcmeth_mapcache_create(
676 1.2 matt struct bcmeth_softc *sc,
677 1.2 matt struct bcmeth_mapcache **dmc_p,
678 1.2 matt size_t maxmaps,
679 1.2 matt size_t maxmapsize,
680 1.2 matt size_t maxseg)
681 1.2 matt {
682 1.2 matt const size_t dmc_size =
683 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
684 1.2 matt struct bcmeth_mapcache * const dmc =
685 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
686 1.2 matt
687 1.2 matt dmc->dmc_maxmaps = maxmaps;
688 1.2 matt dmc->dmc_nmaps = maxmaps;
689 1.2 matt dmc->dmc_maxmapsize = maxmapsize;
690 1.2 matt dmc->dmc_maxseg = maxseg;
691 1.2 matt
692 1.2 matt for (u_int i = 0; i < maxmaps; i++) {
693 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
694 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
695 1.2 matt BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
696 1.2 matt if (error) {
697 1.2 matt aprint_error_dev(sc->sc_dev,
698 1.2 matt "failed to creat dma map cache "
699 1.2 matt "entry %u of %zu: %d\n",
700 1.2 matt i, maxmaps, error);
701 1.2 matt while (i-- > 0) {
702 1.2 matt bus_dmamap_destroy(sc->sc_dmat,
703 1.2 matt dmc->dmc_maps[i]);
704 1.2 matt }
705 1.2 matt kmem_intr_free(dmc, dmc_size);
706 1.2 matt return error;
707 1.2 matt }
708 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
709 1.2 matt }
710 1.2 matt
711 1.2 matt *dmc_p = dmc;
712 1.2 matt
713 1.2 matt return 0;
714 1.2 matt }
715 1.2 matt
716 1.2 matt #if 0
717 1.2 matt static void
718 1.2 matt bcmeth_dmamem_free(
719 1.2 matt bus_dma_tag_t dmat,
720 1.2 matt size_t map_size,
721 1.2 matt bus_dma_segment_t *seg,
722 1.2 matt bus_dmamap_t map,
723 1.2 matt void *kvap)
724 1.2 matt {
725 1.2 matt bus_dmamap_destroy(dmat, map);
726 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
727 1.2 matt bus_dmamem_free(dmat, seg, 1);
728 1.2 matt }
729 1.2 matt #endif
730 1.2 matt
731 1.2 matt static int
732 1.2 matt bcmeth_dmamem_alloc(
733 1.2 matt bus_dma_tag_t dmat,
734 1.2 matt size_t map_size,
735 1.2 matt bus_dma_segment_t *seg,
736 1.2 matt bus_dmamap_t *map,
737 1.2 matt void **kvap)
738 1.2 matt {
739 1.2 matt int error;
740 1.2 matt int nseg;
741 1.2 matt
742 1.2 matt *kvap = NULL;
743 1.2 matt *map = NULL;
744 1.2 matt
745 1.2 matt error = bus_dmamem_alloc(dmat, map_size, PAGE_SIZE, 0,
746 1.2 matt seg, 1, &nseg, 0);
747 1.2 matt if (error)
748 1.2 matt return error;
749 1.2 matt
750 1.2 matt KASSERT(nseg == 1);
751 1.2 matt
752 1.2 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap,
753 1.2 matt BUS_DMA_COHERENT);
754 1.2 matt if (error == 0) {
755 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
756 1.2 matt map);
757 1.2 matt if (error == 0) {
758 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
759 1.2 matt NULL, 0);
760 1.2 matt if (error == 0)
761 1.2 matt return 0;
762 1.2 matt bus_dmamap_destroy(dmat, *map);
763 1.2 matt *map = NULL;
764 1.2 matt }
765 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
766 1.2 matt *kvap = NULL;
767 1.2 matt }
768 1.2 matt bus_dmamem_free(dmat, seg, nseg);
769 1.2 matt return 0;
770 1.2 matt }
771 1.2 matt
772 1.2 matt static struct mbuf *
773 1.2 matt bcmeth_rx_buf_alloc(
774 1.2 matt struct bcmeth_softc *sc)
775 1.2 matt {
776 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
777 1.2 matt if (m == NULL) {
778 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
779 1.2 matt return NULL;
780 1.2 matt }
781 1.2 matt MCLGET(m, M_DONTWAIT);
782 1.2 matt if ((m->m_flags & M_EXT) == 0) {
783 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
784 1.2 matt m_freem(m);
785 1.2 matt return NULL;
786 1.2 matt }
787 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
788 1.2 matt
789 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
790 1.2 matt if (map == NULL) {
791 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
792 1.2 matt m_freem(m);
793 1.2 matt return NULL;
794 1.2 matt }
795 1.2 matt M_SETCTX(m, map);
796 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
797 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
798 1.2 matt BUS_DMA_READ|BUS_DMA_NOWAIT);
799 1.2 matt if (error) {
800 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
801 1.2 matt error);
802 1.2 matt M_SETCTX(m, NULL);
803 1.2 matt m_freem(m);
804 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
805 1.2 matt return NULL;
806 1.2 matt }
807 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
808 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
809 1.2 matt BUS_DMASYNC_PREREAD);
810 1.2 matt
811 1.2 matt return m;
812 1.2 matt }
813 1.2 matt
814 1.2 matt static void
815 1.2 matt bcmeth_rx_map_unload(
816 1.2 matt struct bcmeth_softc *sc,
817 1.2 matt struct mbuf *m)
818 1.2 matt {
819 1.2 matt KASSERT(m);
820 1.2 matt for (; m != NULL; m = m->m_next) {
821 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
822 1.2 matt KASSERT(map);
823 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
824 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
825 1.2 matt BUS_DMASYNC_POSTREAD);
826 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
827 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
828 1.2 matt M_SETCTX(m, NULL);
829 1.2 matt }
830 1.2 matt }
831 1.2 matt
832 1.2 matt static bool
833 1.2 matt bcmeth_rxq_produce(
834 1.2 matt struct bcmeth_softc *sc,
835 1.2 matt struct bcmeth_rxqueue *rxq)
836 1.2 matt {
837 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
838 1.2 matt #if 0
839 1.2 matt size_t inuse = rxq->rxq_inuse;
840 1.2 matt #endif
841 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
842 1.2 matt struct mbuf *m;
843 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
844 1.2 matt if (m == NULL) {
845 1.2 matt m = bcmeth_rx_buf_alloc(sc);
846 1.2 matt if (m == NULL) {
847 1.2 matt printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
848 1.2 matt break;
849 1.2 matt }
850 1.2 matt }
851 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
852 1.2 matt KASSERT(map);
853 1.2 matt
854 1.2 matt producer->rxdb_buflen = MCLBYTES;
855 1.2 matt producer->rxdb_addrlo = map->dm_segs[0].ds_addr;
856 1.4 matt producer->rxdb_flags &= RXDB_FLAG_ET;
857 1.3 matt producer->rxdb_flags |= RXDB_FLAG_IC;
858 1.2 matt *rxq->rxq_mtail = m;
859 1.2 matt rxq->rxq_mtail = &m->m_next;
860 1.2 matt m->m_len = MCLBYTES;
861 1.2 matt m->m_next = NULL;
862 1.2 matt rxq->rxq_inuse++;
863 1.2 matt if (++producer == rxq->rxq_last) {
864 1.2 matt membar_producer();
865 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
866 1.2 matt rxq->rxq_last - rxq->rxq_producer);
867 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
868 1.2 matt }
869 1.2 matt }
870 1.2 matt if (producer != rxq->rxq_producer) {
871 1.2 matt membar_producer();
872 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
873 1.2 matt producer - rxq->rxq_producer);
874 1.2 matt rxq->rxq_producer = producer;
875 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
876 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
877 1.2 matt + ((uintptr_t)rxq->rxq_producer & RCVPTR));
878 1.2 matt }
879 1.2 matt return true;
880 1.2 matt }
881 1.2 matt
882 1.2 matt static void
883 1.2 matt bcmeth_rx_input(
884 1.2 matt struct bcmeth_softc *sc,
885 1.2 matt struct mbuf *m,
886 1.2 matt uint32_t rxdb_flags)
887 1.2 matt {
888 1.2 matt struct ifnet * const ifp = &sc->sc_if;
889 1.2 matt
890 1.2 matt bcmeth_rx_map_unload(sc, m);
891 1.2 matt
892 1.2 matt m_adj(m, BCMETH_RCVOFFSET);
893 1.2 matt
894 1.2 matt switch (__SHIFTOUT(rxdb_flags, RXSTS_PKTTYPE)) {
895 1.2 matt case RXSTS_PKTTYPE_UC:
896 1.2 matt break;
897 1.2 matt case RXSTS_PKTTYPE_MC:
898 1.2 matt m->m_flags |= M_MCAST;
899 1.2 matt break;
900 1.2 matt case RXSTS_PKTTYPE_BC:
901 1.2 matt m->m_flags |= M_BCAST|M_MCAST;
902 1.2 matt break;
903 1.6 matt default:
904 1.6 matt if (sc->sc_cmdcfg & PROMISC_EN)
905 1.6 matt m->m_flags |= M_PROMISC;
906 1.6 matt break;
907 1.2 matt }
908 1.2 matt m->m_pkthdr.rcvif = ifp;
909 1.2 matt
910 1.2 matt ifp->if_ipackets++;
911 1.2 matt ifp->if_ibytes += m->m_pkthdr.len;
912 1.2 matt
913 1.2 matt /*
914 1.2 matt * Let's give it to the network subsystm to deal with.
915 1.2 matt */
916 1.2 matt int s = splnet();
917 1.2 matt bpf_mtap(ifp, m);
918 1.2 matt (*ifp->if_input)(ifp, m);
919 1.2 matt splx(s);
920 1.2 matt }
921 1.2 matt
922 1.2 matt static void
923 1.2 matt bcmeth_rxq_consume(
924 1.2 matt struct bcmeth_softc *sc,
925 1.2 matt struct bcmeth_rxqueue *rxq)
926 1.2 matt {
927 1.2 matt struct ifnet * const ifp = &sc->sc_if;
928 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
929 1.2 matt size_t rxconsumed = 0;
930 1.2 matt
931 1.2 matt for (;;) {
932 1.2 matt if (consumer == rxq->rxq_producer) {
933 1.2 matt rxq->rxq_consumer = consumer;
934 1.2 matt rxq->rxq_inuse -= rxconsumed;
935 1.2 matt KASSERT(rxq->rxq_inuse == 0);
936 1.2 matt return;
937 1.2 matt }
938 1.2 matt
939 1.2 matt uint32_t rcvsts0 = bcmeth_read_4(sc, GMAC_RCVSTATUS0);
940 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
941 1.2 matt if (consumer == rxq->rxq_first + currdscr) {
942 1.2 matt rxq->rxq_consumer = consumer;
943 1.2 matt rxq->rxq_inuse -= rxconsumed;
944 1.2 matt return;
945 1.2 matt }
946 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
947 1.2 matt
948 1.2 matt /*
949 1.2 matt * We own this packet again. Copy the rxsts word from it.
950 1.2 matt */
951 1.2 matt rxconsumed++;
952 1.2 matt uint32_t rxsts;
953 1.2 matt KASSERT(rxq->rxq_mhead != NULL);
954 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
955 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
956 1.2 matt BUS_DMASYNC_POSTREAD);
957 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
958 1.2 matt
959 1.2 matt /*
960 1.2 matt * Get the count of descriptors. Fetch the correct number
961 1.2 matt * of mbufs.
962 1.2 matt */
963 1.2 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
964 1.2 matt struct mbuf *m = rxq->rxq_mhead;
965 1.2 matt struct mbuf *m_last = m;
966 1.2 matt for (size_t i = 1; i < desc_count; i++) {
967 1.2 matt if (++consumer == rxq->rxq_last) {
968 1.2 matt consumer = rxq->rxq_first;
969 1.2 matt }
970 1.2 matt KASSERT(consumer != rxq->rxq_first + currdscr);
971 1.2 matt m_last = m_last->m_next;
972 1.2 matt }
973 1.2 matt
974 1.2 matt /*
975 1.2 matt * Now remove it/them from the list of enqueued mbufs.
976 1.2 matt */
977 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
978 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
979 1.2 matt m_last->m_next = NULL;
980 1.2 matt
981 1.3 matt if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
982 1.2 matt aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
983 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
984 1.2 matt /*
985 1.2 matt * We encountered an error, take the mbufs and add them
986 1.2 matt * to the rx bufcache so we can quickly reuse them.
987 1.2 matt */
988 1.2 matt ifp->if_ierrors++;
989 1.2 matt do {
990 1.2 matt struct mbuf *m0 = m->m_next;
991 1.2 matt m->m_next = NULL;
992 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
993 1.2 matt m = m0;
994 1.2 matt } while (m);
995 1.2 matt } else {
996 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
997 1.2 matt framelen += BCMETH_RCVOFFSET;
998 1.2 matt m->m_pkthdr.len = framelen;
999 1.2 matt if (desc_count == 1) {
1000 1.2 matt KASSERT(framelen <= MCLBYTES);
1001 1.2 matt m->m_len = framelen;
1002 1.2 matt } else {
1003 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1004 1.2 matt }
1005 1.2 matt bcmeth_rx_input(sc, m, rxsts);
1006 1.2 matt }
1007 1.2 matt
1008 1.2 matt /*
1009 1.2 matt * Wrap at the last entry!
1010 1.2 matt */
1011 1.2 matt if (++consumer == rxq->rxq_last) {
1012 1.2 matt KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1013 1.2 matt consumer = rxq->rxq_first;
1014 1.2 matt }
1015 1.2 matt }
1016 1.2 matt }
1017 1.2 matt
1018 1.2 matt static void
1019 1.2 matt bcmeth_rxq_purge(
1020 1.2 matt struct bcmeth_softc *sc,
1021 1.2 matt struct bcmeth_rxqueue *rxq,
1022 1.2 matt bool discard)
1023 1.2 matt {
1024 1.2 matt struct mbuf *m;
1025 1.2 matt
1026 1.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1027 1.2 matt if (discard) {
1028 1.2 matt bcmeth_rx_map_unload(sc, m);
1029 1.2 matt m_freem(m);
1030 1.2 matt } else {
1031 1.2 matt while (m != NULL) {
1032 1.2 matt struct mbuf *m0 = m->m_next;
1033 1.2 matt m->m_next = NULL;
1034 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1035 1.2 matt m = m0;
1036 1.2 matt }
1037 1.2 matt }
1038 1.2 matt
1039 1.2 matt }
1040 1.2 matt
1041 1.2 matt rxq->rxq_mhead = NULL;
1042 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1043 1.2 matt rxq->rxq_inuse = 0;
1044 1.1 matt }
1045 1.1 matt
1046 1.1 matt static void
1047 1.2 matt bcmeth_rxq_reset(
1048 1.2 matt struct bcmeth_softc *sc,
1049 1.2 matt struct bcmeth_rxqueue *rxq)
1050 1.2 matt {
1051 1.2 matt /*
1052 1.3 matt * sync all the descriptors
1053 1.3 matt */
1054 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1055 1.3 matt rxq->rxq_last - rxq->rxq_first);
1056 1.3 matt
1057 1.3 matt /*
1058 1.3 matt * Make sure we own all descriptors in the ring.
1059 1.3 matt */
1060 1.3 matt struct gmac_rxdb *rxdb;
1061 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1062 1.3 matt rxdb->rxdb_flags = 0;
1063 1.3 matt }
1064 1.3 matt
1065 1.3 matt /*
1066 1.3 matt * Last descriptor has the wrap flag.
1067 1.3 matt */
1068 1.3 matt rxdb->rxdb_flags = RXDB_FLAG_ET;
1069 1.3 matt
1070 1.3 matt /*
1071 1.2 matt * Reset the producer consumer indexes.
1072 1.2 matt */
1073 1.2 matt rxq->rxq_consumer = rxq->rxq_first;
1074 1.2 matt rxq->rxq_producer = rxq->rxq_first;
1075 1.2 matt rxq->rxq_inuse = 0;
1076 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1077 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1078 1.2 matt
1079 1.2 matt sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1080 1.2 matt
1081 1.2 matt /*
1082 1.2 matt * Restart the receiver at the first descriptor
1083 1.2 matt */
1084 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1085 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1086 1.2 matt }
1087 1.2 matt
1088 1.2 matt static int
1089 1.2 matt bcmeth_rxq_attach(
1090 1.2 matt struct bcmeth_softc *sc,
1091 1.2 matt struct bcmeth_rxqueue *rxq,
1092 1.2 matt u_int qno)
1093 1.2 matt {
1094 1.2 matt size_t map_size = PAGE_SIZE;
1095 1.2 matt size_t desc_count = map_size / sizeof(rxq->rxq_first[0]);
1096 1.2 matt int error;
1097 1.2 matt void *descs;
1098 1.2 matt
1099 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1100 1.2 matt
1101 1.2 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, map_size,
1102 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1103 1.2 matt if (error)
1104 1.2 matt return error;
1105 1.2 matt
1106 1.2 matt memset(descs, 0, map_size);
1107 1.2 matt rxq->rxq_first = descs;
1108 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1109 1.2 matt rxq->rxq_consumer = descs;
1110 1.2 matt rxq->rxq_producer = descs;
1111 1.2 matt
1112 1.2 matt bcmeth_rxq_purge(sc, rxq, true);
1113 1.2 matt bcmeth_rxq_reset(sc, rxq);
1114 1.2 matt
1115 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1116 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1117 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1118 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1119 1.2 matt
1120 1.2 matt return 0;
1121 1.2 matt }
1122 1.2 matt
1123 1.2 matt static bool
1124 1.2 matt bcmeth_txq_active_p(
1125 1.2 matt struct bcmeth_softc * const sc,
1126 1.2 matt struct bcmeth_txqueue *txq)
1127 1.1 matt {
1128 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1129 1.2 matt }
1130 1.2 matt
1131 1.2 matt static bool
1132 1.2 matt bcmeth_txq_fillable_p(
1133 1.2 matt struct bcmeth_softc * const sc,
1134 1.2 matt struct bcmeth_txqueue *txq)
1135 1.2 matt {
1136 1.2 matt return txq->txq_free >= txq->txq_threshold;
1137 1.2 matt }
1138 1.2 matt
1139 1.2 matt static int
1140 1.2 matt bcmeth_txq_attach(
1141 1.2 matt struct bcmeth_softc *sc,
1142 1.2 matt struct bcmeth_txqueue *txq,
1143 1.2 matt u_int qno)
1144 1.2 matt {
1145 1.2 matt size_t map_size = PAGE_SIZE;
1146 1.2 matt size_t desc_count = map_size / sizeof(txq->txq_first[0]);
1147 1.2 matt int error;
1148 1.2 matt void *descs;
1149 1.2 matt
1150 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1151 1.2 matt
1152 1.2 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, map_size,
1153 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1154 1.2 matt if (error)
1155 1.2 matt return error;
1156 1.2 matt
1157 1.2 matt memset(descs, 0, map_size);
1158 1.2 matt txq->txq_first = descs;
1159 1.2 matt txq->txq_last = txq->txq_first + desc_count;
1160 1.2 matt txq->txq_consumer = descs;
1161 1.2 matt txq->txq_producer = descs;
1162 1.2 matt
1163 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1164 1.2 matt
1165 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1166 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1167 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1168 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1169 1.2 matt
1170 1.2 matt bcmeth_txq_reset(sc, txq);
1171 1.1 matt
1172 1.2 matt return 0;
1173 1.1 matt }
1174 1.1 matt
1175 1.1 matt static int
1176 1.2 matt bcmeth_txq_map_load(
1177 1.2 matt struct bcmeth_softc *sc,
1178 1.2 matt struct bcmeth_txqueue *txq,
1179 1.2 matt struct mbuf *m)
1180 1.2 matt {
1181 1.2 matt bus_dmamap_t map;
1182 1.2 matt int error;
1183 1.2 matt
1184 1.2 matt map = M_GETCTX(m, bus_dmamap_t);
1185 1.2 matt if (map != NULL)
1186 1.2 matt return 0;
1187 1.2 matt
1188 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1189 1.2 matt if (map == NULL)
1190 1.2 matt return ENOMEM;
1191 1.2 matt
1192 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1193 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1194 1.2 matt if (error)
1195 1.2 matt return error;
1196 1.2 matt
1197 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1198 1.2 matt BUS_DMASYNC_PREWRITE);
1199 1.2 matt M_SETCTX(m, map);
1200 1.2 matt return 0;
1201 1.2 matt }
1202 1.2 matt
1203 1.2 matt static void
1204 1.2 matt bcmeth_txq_map_unload(
1205 1.2 matt struct bcmeth_softc *sc,
1206 1.2 matt struct bcmeth_txqueue *txq,
1207 1.2 matt struct mbuf *m)
1208 1.2 matt {
1209 1.2 matt KASSERT(m);
1210 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1211 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1212 1.2 matt BUS_DMASYNC_POSTWRITE);
1213 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1214 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1215 1.2 matt }
1216 1.2 matt
1217 1.2 matt static bool
1218 1.2 matt bcmeth_txq_produce(
1219 1.2 matt struct bcmeth_softc *sc,
1220 1.2 matt struct bcmeth_txqueue *txq,
1221 1.2 matt struct mbuf *m)
1222 1.2 matt {
1223 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1224 1.2 matt
1225 1.2 matt if (map->dm_nsegs > txq->txq_free)
1226 1.2 matt return false;
1227 1.2 matt
1228 1.2 matt /*
1229 1.2 matt * TCP Offload flag must be set in the first descriptor.
1230 1.2 matt */
1231 1.2 matt struct gmac_txdb *producer = txq->txq_producer;
1232 1.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1233 1.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1234 1.2 matt
1235 1.2 matt /*
1236 1.2 matt * If we've produced enough descriptors without consuming any
1237 1.2 matt * we need to ask for an interrupt to reclaim some.
1238 1.2 matt */
1239 1.2 matt txq->txq_lastintr += map->dm_nsegs;
1240 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1241 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1242 1.2 matt txq->txq_lastintr = 0;
1243 1.2 matt last_flags |= TXDB_FLAG_IC;
1244 1.2 matt }
1245 1.2 matt
1246 1.2 matt KASSERT(producer != txq->txq_last);
1247 1.2 matt
1248 1.2 matt struct gmac_txdb *start = producer;
1249 1.2 matt size_t count = map->dm_nsegs;
1250 1.2 matt producer->txdb_flags |= first_flags;
1251 1.2 matt producer->txdb_addrlo = map->dm_segs[0].ds_addr;
1252 1.2 matt producer->txdb_buflen = map->dm_segs[0].ds_len;
1253 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1254 1.2 matt #if 0
1255 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1256 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1257 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1258 1.2 matt #endif
1259 1.2 matt if (__predict_false(++producer == txq->txq_last)) {
1260 1.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1261 1.2 matt txq->txq_last - start);
1262 1.2 matt count -= txq->txq_last - start;
1263 1.2 matt producer = txq->txq_first;
1264 1.2 matt start = txq->txq_first;
1265 1.2 matt }
1266 1.2 matt producer->txdb_addrlo = map->dm_segs[i].ds_addr;
1267 1.2 matt producer->txdb_buflen = map->dm_segs[i].ds_len;
1268 1.2 matt }
1269 1.2 matt producer->txdb_flags |= last_flags;
1270 1.2 matt #if 0
1271 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1272 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1273 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1274 1.2 matt #endif
1275 1.2 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1276 1.2 matt
1277 1.2 matt /*
1278 1.2 matt * Reduce free count by the number of segments we consumed.
1279 1.2 matt */
1280 1.2 matt txq->txq_free -= map->dm_nsegs;
1281 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1282 1.2 matt KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0);
1283 1.2 matt KASSERT(producer->txdb_flags & TXDB_FLAG_EF);
1284 1.2 matt
1285 1.2 matt #if 0
1286 1.2 matt printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1287 1.2 matt __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1288 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1289 1.2 matt #endif
1290 1.2 matt
1291 1.2 matt if (++producer == txq->txq_last)
1292 1.2 matt txq->txq_producer = txq->txq_first;
1293 1.2 matt else
1294 1.2 matt txq->txq_producer = producer;
1295 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1296 1.2 matt bpf_mtap(&sc->sc_if, m);
1297 1.2 matt
1298 1.2 matt /*
1299 1.2 matt * Let the transmitter know there's more to do
1300 1.2 matt */
1301 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1302 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1303 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1304 1.2 matt
1305 1.2 matt return true;
1306 1.2 matt }
1307 1.2 matt
1308 1.2 matt static bool
1309 1.2 matt bcmeth_txq_enqueue(
1310 1.2 matt struct bcmeth_softc *sc,
1311 1.2 matt struct bcmeth_txqueue *txq)
1312 1.2 matt {
1313 1.2 matt for (;;) {
1314 1.2 matt if (IF_QFULL(&txq->txq_mbufs))
1315 1.2 matt return false;
1316 1.2 matt struct mbuf *m = txq->txq_next;
1317 1.2 matt if (m == NULL) {
1318 1.2 matt int s = splnet();
1319 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1320 1.2 matt splx(s);
1321 1.2 matt if (m == NULL)
1322 1.2 matt return true;
1323 1.2 matt M_SETCTX(m, NULL);
1324 1.2 matt } else {
1325 1.2 matt txq->txq_next = NULL;
1326 1.2 matt }
1327 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1328 1.2 matt if (error) {
1329 1.2 matt aprint_error_dev(sc->sc_dev,
1330 1.2 matt "discarded packet due to "
1331 1.2 matt "dmamap load failure: %d\n", error);
1332 1.2 matt m_freem(m);
1333 1.2 matt continue;
1334 1.2 matt }
1335 1.2 matt KASSERT(txq->txq_next == NULL);
1336 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1337 1.2 matt txq->txq_next = m;
1338 1.2 matt return false;
1339 1.2 matt }
1340 1.2 matt KASSERT(txq->txq_next == NULL);
1341 1.2 matt }
1342 1.2 matt }
1343 1.2 matt
1344 1.2 matt static bool
1345 1.2 matt bcmeth_txq_consume(
1346 1.2 matt struct bcmeth_softc *sc,
1347 1.2 matt struct bcmeth_txqueue *txq)
1348 1.2 matt {
1349 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1350 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1351 1.2 matt size_t txfree = 0;
1352 1.2 matt
1353 1.2 matt #if 0
1354 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1355 1.2 matt #endif
1356 1.2 matt
1357 1.2 matt for (;;) {
1358 1.2 matt if (consumer == txq->txq_producer) {
1359 1.2 matt txq->txq_consumer = consumer;
1360 1.2 matt txq->txq_free += txfree;
1361 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1362 1.2 matt #if 0
1363 1.5 matt printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1364 1.2 matt __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1365 1.2 matt #endif
1366 1.2 matt KASSERT(txq->txq_lastintr == 0);
1367 1.2 matt KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1368 1.2 matt return true;
1369 1.2 matt }
1370 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1371 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1372 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1373 1.2 matt txq->txq_consumer = consumer;
1374 1.2 matt txq->txq_free += txfree;
1375 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1376 1.2 matt #if 0
1377 1.2 matt printf("%s: freed %zu descriptors\n",
1378 1.2 matt __func__, txfree);
1379 1.2 matt #endif
1380 1.2 matt return bcmeth_txq_fillable_p(sc, txq);
1381 1.2 matt }
1382 1.2 matt
1383 1.2 matt /*
1384 1.2 matt * If this is the last descriptor in the chain, get the
1385 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1386 1.2 matt */
1387 1.2 matt const uint32_t txdb_flags = consumer->txdb_flags;
1388 1.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1389 1.2 matt struct mbuf *m;
1390 1.2 matt
1391 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1392 1.2 matt KASSERT(m);
1393 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1394 1.2 matt #if 0
1395 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1396 1.2 matt __func__, m, m->m_pkthdr.len);
1397 1.2 matt #endif
1398 1.2 matt ifp->if_opackets++;
1399 1.2 matt ifp->if_obytes += m->m_pkthdr.len;
1400 1.2 matt if (m->m_flags & M_MCAST)
1401 1.2 matt ifp->if_omcasts++;
1402 1.2 matt m_freem(m);
1403 1.2 matt }
1404 1.2 matt
1405 1.2 matt /*
1406 1.2 matt * We own this packet again. Clear all flags except wrap.
1407 1.2 matt */
1408 1.2 matt txfree++;
1409 1.2 matt
1410 1.2 matt /*
1411 1.2 matt * Wrap at the last entry!
1412 1.2 matt */
1413 1.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1414 1.2 matt consumer->txdb_flags = TXDB_FLAG_ET;
1415 1.2 matt KASSERT(consumer + 1 == txq->txq_last);
1416 1.2 matt consumer = txq->txq_first;
1417 1.2 matt } else {
1418 1.2 matt consumer->txdb_flags = 0;
1419 1.2 matt consumer++;
1420 1.2 matt KASSERT(consumer < txq->txq_last);
1421 1.2 matt }
1422 1.2 matt }
1423 1.2 matt }
1424 1.2 matt
1425 1.2 matt static void
1426 1.2 matt bcmeth_txq_purge(
1427 1.2 matt struct bcmeth_softc *sc,
1428 1.2 matt struct bcmeth_txqueue *txq)
1429 1.2 matt {
1430 1.2 matt struct mbuf *m;
1431 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1432 1.2 matt
1433 1.2 matt for (;;) {
1434 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1435 1.2 matt if (m == NULL)
1436 1.2 matt break;
1437 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1438 1.2 matt m_freem(m);
1439 1.2 matt }
1440 1.2 matt if ((m = txq->txq_next) != NULL) {
1441 1.2 matt txq->txq_next = NULL;
1442 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1443 1.2 matt m_freem(m);
1444 1.2 matt }
1445 1.2 matt }
1446 1.2 matt
1447 1.2 matt static void
1448 1.2 matt bcmeth_txq_reset(
1449 1.2 matt struct bcmeth_softc *sc,
1450 1.2 matt struct bcmeth_txqueue *txq)
1451 1.2 matt {
1452 1.2 matt /*
1453 1.2 matt * sync all the descriptors
1454 1.2 matt */
1455 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1456 1.2 matt txq->txq_last - txq->txq_first);
1457 1.2 matt
1458 1.2 matt /*
1459 1.2 matt * Make sure we own all descriptors in the ring.
1460 1.2 matt */
1461 1.2 matt struct gmac_txdb *txdb;
1462 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1463 1.2 matt txdb->txdb_flags = 0;
1464 1.2 matt }
1465 1.2 matt
1466 1.2 matt /*
1467 1.2 matt * Last descriptor has the wrap flag.
1468 1.2 matt */
1469 1.2 matt txdb->txdb_flags = TXDB_FLAG_ET;
1470 1.2 matt
1471 1.2 matt /*
1472 1.2 matt * Reset the producer consumer indexes.
1473 1.2 matt */
1474 1.2 matt txq->txq_consumer = txq->txq_first;
1475 1.2 matt txq->txq_producer = txq->txq_first;
1476 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1477 1.2 matt txq->txq_threshold = txq->txq_free / 2;
1478 1.2 matt txq->txq_lastintr = 0;
1479 1.2 matt
1480 1.2 matt /*
1481 1.2 matt * What do we want to get interrupted on?
1482 1.2 matt */
1483 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1484 1.2 matt
1485 1.2 matt /*
1486 1.2 matt * Restart the transmiter at the first descriptor
1487 1.2 matt */
1488 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1489 1.2 matt txq->txq_descmap->dm_segs->ds_addr);
1490 1.2 matt }
1491 1.2 matt
1492 1.2 matt static void
1493 1.2 matt bcmeth_ifstart(struct ifnet *ifp)
1494 1.2 matt {
1495 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1496 1.2 matt
1497 1.2 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1498 1.2 matt softint_schedule(sc->sc_soft_ih);
1499 1.2 matt }
1500 1.2 matt
1501 1.2 matt int
1502 1.1 matt bcmeth_intr(void *arg)
1503 1.1 matt {
1504 1.1 matt struct bcmeth_softc * const sc = arg;
1505 1.2 matt uint32_t soft_flags = 0;
1506 1.1 matt int rv = 0;
1507 1.1 matt
1508 1.1 matt mutex_enter(sc->sc_hwlock);
1509 1.1 matt
1510 1.2 matt sc->sc_ev_intr.ev_count++;
1511 1.2 matt
1512 1.2 matt for (;;) {
1513 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1514 1.2 matt intstatus &= sc->sc_intmask;
1515 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1516 1.2 matt if (intstatus == 0) {
1517 1.2 matt break;
1518 1.2 matt }
1519 1.2 matt #if 0
1520 1.2 matt aprint_normal_dev(sc->sc_dev, "%s: ievent=%#x intmask=%#x\n",
1521 1.2 matt __func__, ievent, bcmeth_read_4(sc, GMAC_INTMASK));
1522 1.2 matt #endif
1523 1.2 matt if (intstatus & RCVINT) {
1524 1.2 matt intstatus &= ~RCVINT;
1525 1.2 matt sc->sc_intmask &= ~RCVINT;
1526 1.2 matt soft_flags |= SOFT_RXINTR;
1527 1.2 matt }
1528 1.2 matt
1529 1.2 matt if (intstatus & XMTINT_0) {
1530 1.2 matt intstatus &= ~XMTINT_0;
1531 1.2 matt sc->sc_intmask &= ~XMTINT_0;
1532 1.2 matt soft_flags |= SOFT_TXINTR;
1533 1.2 matt }
1534 1.2 matt
1535 1.2 matt if (intstatus & RCVDESCUF) {
1536 1.2 matt intstatus &= ~RCVDESCUF;
1537 1.2 matt sc->sc_intmask &= ~RCVDESCUF;
1538 1.2 matt soft_flags |= SOFT_RXUNDERFLOW;
1539 1.2 matt }
1540 1.2 matt
1541 1.2 matt if (intstatus) {
1542 1.2 matt aprint_error_dev(sc->sc_dev, "intr: intstatus=%#x\n",
1543 1.2 matt intstatus);
1544 1.2 matt Debugger();
1545 1.2 matt sc->sc_intmask &= ~intstatus;
1546 1.2 matt soft_flags |= SOFT_REINIT;
1547 1.2 matt break;
1548 1.2 matt }
1549 1.2 matt }
1550 1.2 matt
1551 1.2 matt if (soft_flags) {
1552 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1553 1.2 matt atomic_or_uint(&sc->sc_soft_flags, soft_flags);
1554 1.2 matt softint_schedule(sc->sc_soft_ih);
1555 1.2 matt rv = 1;
1556 1.2 matt }
1557 1.1 matt
1558 1.1 matt mutex_exit(sc->sc_hwlock);
1559 1.1 matt
1560 1.1 matt return rv;
1561 1.1 matt }
1562 1.2 matt
1563 1.2 matt void
1564 1.2 matt bcmeth_soft_intr(void *arg)
1565 1.2 matt {
1566 1.2 matt struct bcmeth_softc * const sc = arg;
1567 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1568 1.2 matt
1569 1.2 matt mutex_enter(sc->sc_lock);
1570 1.2 matt
1571 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1572 1.2 matt
1573 1.2 matt sc->sc_ev_soft_intr.ev_count++;
1574 1.2 matt
1575 1.2 matt if (soft_flags & SOFT_REINIT) {
1576 1.2 matt int s = splnet();
1577 1.2 matt bcmeth_ifinit(ifp);
1578 1.2 matt splx(s);
1579 1.2 matt soft_flags = 0;
1580 1.2 matt }
1581 1.2 matt
1582 1.2 matt if (soft_flags & SOFT_RXUNDERFLOW) {
1583 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1584 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
1585 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
1586 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
1587 1.2 matt } else {
1588 1.2 matt sc->sc_intmask |= RCVDESCUF;
1589 1.2 matt }
1590 1.2 matt aprint_normal_dev(sc->sc_dev,
1591 1.2 matt "increasing receive buffers from %zu to %zu\n",
1592 1.2 matt rxq->rxq_threshold, threshold);
1593 1.2 matt rxq->rxq_threshold = threshold;
1594 1.2 matt }
1595 1.2 matt
1596 1.2 matt if ((soft_flags & SOFT_TXINTR)
1597 1.2 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1598 1.2 matt /*
1599 1.2 matt * Let's do what we came here for. Consume transmitted
1600 1.2 matt * packets off the the transmit ring.
1601 1.2 matt */
1602 1.2 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1603 1.2 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1604 1.2 matt sc->sc_ev_tx_stall.ev_count++;
1605 1.2 matt ifp->if_flags |= IFF_OACTIVE;
1606 1.2 matt } else {
1607 1.2 matt ifp->if_flags &= ~IFF_OACTIVE;
1608 1.2 matt }
1609 1.2 matt sc->sc_intmask |= XMTINT_0;
1610 1.2 matt }
1611 1.2 matt
1612 1.2 matt if (soft_flags & (SOFT_RXINTR|SOFT_RXUNDERFLOW)) {
1613 1.2 matt /*
1614 1.2 matt * Let's consume
1615 1.2 matt */
1616 1.2 matt bcmeth_rxq_consume(sc, &sc->sc_rxq);
1617 1.2 matt sc->sc_intmask |= RCVINT;
1618 1.2 matt }
1619 1.2 matt
1620 1.2 matt if (ifp->if_flags & IFF_RUNNING) {
1621 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1622 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1623 1.2 matt } else {
1624 1.2 matt KASSERT((soft_flags & SOFT_RXUNDERFLOW) == 0);
1625 1.2 matt }
1626 1.2 matt
1627 1.2 matt mutex_exit(sc->sc_lock);
1628 1.2 matt }
1629