bcm53xx_eth.c revision 1.9 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.1 matt #define GMAC_PRIVATE
31 1.1 matt
32 1.1 matt #include "locators.h"
33 1.1 matt
34 1.1 matt #include <sys/cdefs.h>
35 1.1 matt
36 1.9 matt __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.9 2012/10/08 20:54:10 matt Exp $");
37 1.1 matt
38 1.1 matt #include <sys/param.h>
39 1.2 matt #include <sys/atomic.h>
40 1.1 matt #include <sys/bus.h>
41 1.1 matt #include <sys/device.h>
42 1.2 matt #include <sys/ioctl.h>
43 1.1 matt #include <sys/intr.h>
44 1.2 matt #include <sys/kmem.h>
45 1.1 matt #include <sys/mutex.h>
46 1.2 matt #include <sys/socket.h>
47 1.1 matt #include <sys/systm.h>
48 1.8 matt #include <sys/workqueue.h>
49 1.1 matt
50 1.1 matt #include <net/if.h>
51 1.1 matt #include <net/if_ether.h>
52 1.1 matt #include <net/if_media.h>
53 1.1 matt
54 1.2 matt #include <net/if_dl.h>
55 1.2 matt
56 1.2 matt #include <net/bpf.h>
57 1.2 matt
58 1.1 matt #include <dev/mii/miivar.h>
59 1.1 matt
60 1.1 matt #include <arm/broadcom/bcm53xx_reg.h>
61 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
62 1.1 matt
63 1.2 matt #define BCMETH_RCVOFFSET 6
64 1.2 matt #define BCMETH_MAXTXMBUFS 32
65 1.2 matt #define BCMETH_NTXSEGS 30
66 1.2 matt #define BCMETH_MAXRXMBUFS 255
67 1.8 matt #define BCMETH_MINRXMBUFS 64
68 1.2 matt #define BCMETH_NRXSEGS 1
69 1.8 matt #define BCMETH_RINGSIZE PAGE_SIZE
70 1.2 matt
71 1.1 matt static int bcmeth_ccb_match(device_t, cfdata_t, void *);
72 1.1 matt static void bcmeth_ccb_attach(device_t, device_t, void *);
73 1.1 matt
74 1.2 matt struct bcmeth_txqueue {
75 1.2 matt bus_dmamap_t txq_descmap;
76 1.2 matt struct gmac_txdb *txq_consumer;
77 1.2 matt struct gmac_txdb *txq_producer;
78 1.2 matt struct gmac_txdb *txq_first;
79 1.2 matt struct gmac_txdb *txq_last;
80 1.2 matt struct ifqueue txq_mbufs;
81 1.2 matt struct mbuf *txq_next;
82 1.2 matt size_t txq_free;
83 1.2 matt size_t txq_threshold;
84 1.2 matt size_t txq_lastintr;
85 1.2 matt bus_size_t txq_reg_xmtaddrlo;
86 1.2 matt bus_size_t txq_reg_xmtptr;
87 1.2 matt bus_size_t txq_reg_xmtctl;
88 1.2 matt bus_size_t txq_reg_xmtsts0;
89 1.2 matt bus_dma_segment_t txq_descmap_seg;
90 1.2 matt };
91 1.2 matt
92 1.2 matt struct bcmeth_rxqueue {
93 1.2 matt bus_dmamap_t rxq_descmap;
94 1.2 matt struct gmac_rxdb *rxq_consumer;
95 1.2 matt struct gmac_rxdb *rxq_producer;
96 1.2 matt struct gmac_rxdb *rxq_first;
97 1.2 matt struct gmac_rxdb *rxq_last;
98 1.2 matt struct mbuf *rxq_mhead;
99 1.2 matt struct mbuf **rxq_mtail;
100 1.2 matt struct mbuf *rxq_mconsumer;
101 1.2 matt size_t rxq_inuse;
102 1.2 matt size_t rxq_threshold;
103 1.2 matt bus_size_t rxq_reg_rcvaddrlo;
104 1.2 matt bus_size_t rxq_reg_rcvptr;
105 1.2 matt bus_size_t rxq_reg_rcvctl;
106 1.2 matt bus_size_t rxq_reg_rcvsts0;
107 1.2 matt bus_dma_segment_t rxq_descmap_seg;
108 1.2 matt };
109 1.2 matt
110 1.2 matt struct bcmeth_mapcache {
111 1.2 matt u_int dmc_nmaps;
112 1.2 matt u_int dmc_maxseg;
113 1.2 matt u_int dmc_maxmaps;
114 1.2 matt u_int dmc_maxmapsize;
115 1.2 matt bus_dmamap_t dmc_maps[0];
116 1.2 matt };
117 1.2 matt
118 1.1 matt struct bcmeth_softc {
119 1.1 matt device_t sc_dev;
120 1.1 matt bus_space_tag_t sc_bst;
121 1.1 matt bus_space_handle_t sc_bsh;
122 1.1 matt bus_dma_tag_t sc_dmat;
123 1.1 matt kmutex_t *sc_lock;
124 1.1 matt kmutex_t *sc_hwlock;
125 1.1 matt struct ethercom sc_ec;
126 1.2 matt #define sc_if sc_ec.ec_if
127 1.2 matt struct ifmedia sc_media;
128 1.2 matt void *sc_soft_ih;
129 1.1 matt void *sc_ih;
130 1.2 matt
131 1.2 matt struct bcmeth_rxqueue sc_rxq;
132 1.2 matt struct bcmeth_txqueue sc_txq;
133 1.2 matt
134 1.2 matt uint32_t sc_maxfrm;
135 1.2 matt uint32_t sc_cmdcfg;
136 1.2 matt uint32_t sc_intmask;
137 1.8 matt uint32_t sc_rcvlazy;
138 1.2 matt volatile uint32_t sc_soft_flags;
139 1.2 matt #define SOFT_RXINTR 0x01
140 1.8 matt #define SOFT_TXINTR 0x02
141 1.2 matt
142 1.2 matt struct evcnt sc_ev_intr;
143 1.2 matt struct evcnt sc_ev_soft_intr;
144 1.8 matt struct evcnt sc_ev_work;;
145 1.2 matt struct evcnt sc_ev_tx_stall;
146 1.2 matt
147 1.2 matt struct ifqueue sc_rx_bufcache;
148 1.2 matt struct bcmeth_mapcache *sc_rx_mapcache;
149 1.2 matt struct bcmeth_mapcache *sc_tx_mapcache;
150 1.2 matt
151 1.8 matt struct workqueue *sc_workq;
152 1.8 matt struct work sc_work;
153 1.8 matt
154 1.8 matt volatile uint32_t sc_work_flags;
155 1.8 matt #define WORK_RXINTR 0x01
156 1.8 matt #define WORK_RXUNDERFLOW 0x02
157 1.8 matt #define WORK_REINIT 0x04
158 1.8 matt
159 1.2 matt uint8_t sc_enaddr[ETHER_ADDR_LEN];
160 1.1 matt };
161 1.1 matt
162 1.2 matt static void bcmeth_ifstart(struct ifnet *);
163 1.2 matt static void bcmeth_ifwatchdog(struct ifnet *);
164 1.2 matt static int bcmeth_ifinit(struct ifnet *);
165 1.2 matt static void bcmeth_ifstop(struct ifnet *, int);
166 1.2 matt static int bcmeth_ifioctl(struct ifnet *, u_long, void *);
167 1.2 matt
168 1.2 matt static int bcmeth_mapcache_create(struct bcmeth_softc *,
169 1.2 matt struct bcmeth_mapcache **, size_t, size_t, size_t);
170 1.2 matt static void bcmeth_mapcache_destroy(struct bcmeth_softc *,
171 1.2 matt struct bcmeth_mapcache *);
172 1.2 matt static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *,
173 1.2 matt struct bcmeth_mapcache *);
174 1.2 matt static void bcmeth_mapcache_put(struct bcmeth_softc *,
175 1.2 matt struct bcmeth_mapcache *, bus_dmamap_t);
176 1.2 matt
177 1.2 matt static int bcmeth_txq_attach(struct bcmeth_softc *,
178 1.2 matt struct bcmeth_txqueue *, u_int);
179 1.2 matt static void bcmeth_txq_purge(struct bcmeth_softc *,
180 1.2 matt struct bcmeth_txqueue *);
181 1.2 matt static void bcmeth_txq_reset(struct bcmeth_softc *,
182 1.2 matt struct bcmeth_txqueue *);
183 1.2 matt static bool bcmeth_txq_consume(struct bcmeth_softc *,
184 1.2 matt struct bcmeth_txqueue *);
185 1.2 matt static bool bcmeth_txq_produce(struct bcmeth_softc *,
186 1.2 matt struct bcmeth_txqueue *, struct mbuf *m);
187 1.2 matt static bool bcmeth_txq_active_p(struct bcmeth_softc *,
188 1.2 matt struct bcmeth_txqueue *);
189 1.2 matt
190 1.2 matt static int bcmeth_rxq_attach(struct bcmeth_softc *,
191 1.2 matt struct bcmeth_rxqueue *, u_int);
192 1.2 matt static bool bcmeth_rxq_produce(struct bcmeth_softc *,
193 1.2 matt struct bcmeth_rxqueue *);
194 1.2 matt static void bcmeth_rxq_purge(struct bcmeth_softc *,
195 1.2 matt struct bcmeth_rxqueue *, bool);
196 1.2 matt static void bcmeth_rxq_reset(struct bcmeth_softc *,
197 1.2 matt struct bcmeth_rxqueue *);
198 1.2 matt
199 1.1 matt static int bcmeth_intr(void *);
200 1.2 matt static void bcmeth_soft_intr(void *);
201 1.8 matt static void bcmeth_worker(struct work *, void *);
202 1.2 matt
203 1.2 matt static int bcmeth_mediachange(struct ifnet *);
204 1.2 matt static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *);
205 1.1 matt
206 1.1 matt static inline uint32_t
207 1.1 matt bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o)
208 1.1 matt {
209 1.1 matt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
210 1.1 matt }
211 1.1 matt
212 1.1 matt static inline void
213 1.1 matt bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v)
214 1.1 matt {
215 1.1 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
216 1.1 matt }
217 1.1 matt
218 1.1 matt CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc),
219 1.1 matt bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL);
220 1.1 matt
221 1.1 matt static int
222 1.1 matt bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux)
223 1.1 matt {
224 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
225 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
226 1.1 matt
227 1.1 matt if (strcmp(cf->cf_name, loc->loc_name))
228 1.1 matt return 0;
229 1.1 matt
230 1.1 matt #ifdef DIAGNOSTIC
231 1.1 matt const int port = cf->cf_loc[BCMCCBCF_PORT];
232 1.1 matt #endif
233 1.1 matt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
234 1.1 matt
235 1.1 matt return 1;
236 1.1 matt }
237 1.1 matt
238 1.1 matt static void
239 1.1 matt bcmeth_ccb_attach(device_t parent, device_t self, void *aux)
240 1.1 matt {
241 1.1 matt struct bcmeth_softc * const sc = device_private(self);
242 1.2 matt struct ethercom * const ec = &sc->sc_ec;
243 1.2 matt struct ifnet * const ifp = &ec->ec_if;
244 1.1 matt struct bcmccb_attach_args * const ccbaa = aux;
245 1.1 matt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
246 1.2 matt const char * const xname = device_xname(self);
247 1.2 matt prop_dictionary_t dict = device_properties(self);
248 1.2 matt int error;
249 1.1 matt
250 1.1 matt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
251 1.1 matt sc->sc_dmat = ccbaa->ccbaa_dmat;
252 1.1 matt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
253 1.1 matt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
254 1.1 matt
255 1.2 matt prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
256 1.2 matt if (eaprop == NULL) {
257 1.2 matt uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0);
258 1.2 matt uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1);
259 1.2 matt if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) {
260 1.2 matt aprint_error(": mac-address property is missing\n");
261 1.2 matt return;
262 1.2 matt }
263 1.5 matt sc->sc_enaddr[0] = (mac0 >> 0) & 0xff;
264 1.5 matt sc->sc_enaddr[1] = (mac0 >> 8) & 0xff;
265 1.5 matt sc->sc_enaddr[2] = (mac0 >> 16) & 0xff;
266 1.5 matt sc->sc_enaddr[3] = (mac0 >> 24) & 0xff;
267 1.5 matt sc->sc_enaddr[4] = (mac1 >> 0) & 0xff;
268 1.5 matt sc->sc_enaddr[5] = (mac1 >> 8) & 0xff;
269 1.2 matt } else {
270 1.2 matt KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
271 1.2 matt KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
272 1.2 matt memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
273 1.2 matt ETHER_ADDR_LEN);
274 1.2 matt }
275 1.2 matt sc->sc_dev = self;
276 1.2 matt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET);
277 1.2 matt sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
278 1.2 matt
279 1.1 matt bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts
280 1.1 matt
281 1.1 matt aprint_naive("\n");
282 1.1 matt aprint_normal(": Gigabit Ethernet Controller\n");
283 1.1 matt
284 1.2 matt error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0);
285 1.2 matt if (error) {
286 1.2 matt aprint_error(": failed to init rxq: %d\n", error);
287 1.2 matt return;
288 1.2 matt }
289 1.2 matt
290 1.2 matt error = bcmeth_txq_attach(sc, &sc->sc_txq, 0);
291 1.2 matt if (error) {
292 1.2 matt aprint_error(": failed to init txq: %d\n", error);
293 1.2 matt return;
294 1.2 matt }
295 1.2 matt
296 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache,
297 1.2 matt BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS);
298 1.2 matt if (error) {
299 1.2 matt aprint_error(": failed to allocate rx dmamaps: %d\n", error);
300 1.2 matt return;
301 1.2 matt }
302 1.2 matt
303 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
304 1.2 matt BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS);
305 1.2 matt if (error) {
306 1.2 matt aprint_error(": failed to allocate tx dmamaps: %d\n", error);
307 1.2 matt return;
308 1.2 matt }
309 1.2 matt
310 1.8 matt error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc,
311 1.9 matt (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU);
312 1.8 matt if (error) {
313 1.8 matt aprint_error(": failed to create workqueue: %d\n", error);
314 1.8 matt return;
315 1.8 matt }
316 1.8 matt
317 1.2 matt sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET,
318 1.2 matt bcmeth_soft_intr, sc);
319 1.1 matt
320 1.1 matt sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
321 1.1 matt bcmeth_intr, sc);
322 1.1 matt
323 1.1 matt if (sc->sc_ih == NULL) {
324 1.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
325 1.1 matt loc->loc_intrs[0]);
326 1.1 matt } else {
327 1.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
328 1.1 matt loc->loc_intrs[0]);
329 1.1 matt }
330 1.2 matt
331 1.2 matt aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
332 1.2 matt ether_sprintf(sc->sc_enaddr));
333 1.2 matt
334 1.2 matt /*
335 1.2 matt * Since each port in plugged into the switch/flow-accelerator,
336 1.2 matt * we hard code at Gige Full-Duplex with Flow Control enabled.
337 1.2 matt */
338 1.2 matt int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX;
339 1.2 matt //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE;
340 1.2 matt ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange,
341 1.2 matt bcmeth_mediastatus);
342 1.2 matt ifmedia_add(&sc->sc_media, ifmedia, 0, NULL);
343 1.2 matt ifmedia_set(&sc->sc_media, ifmedia);
344 1.2 matt
345 1.2 matt ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
346 1.2 matt
347 1.2 matt strlcpy(ifp->if_xname, xname, IFNAMSIZ);
348 1.2 matt ifp->if_softc = sc;
349 1.2 matt ifp->if_baudrate = IF_Mbps(1000);
350 1.2 matt ifp->if_capabilities = 0;
351 1.2 matt ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
352 1.2 matt ifp->if_ioctl = bcmeth_ifioctl;
353 1.2 matt ifp->if_start = bcmeth_ifstart;
354 1.2 matt ifp->if_watchdog = bcmeth_ifwatchdog;
355 1.2 matt ifp->if_init = bcmeth_ifinit;
356 1.2 matt ifp->if_stop = bcmeth_ifstop;
357 1.2 matt IFQ_SET_READY(&ifp->if_snd);
358 1.2 matt
359 1.2 matt bcmeth_ifstop(ifp, true);
360 1.2 matt
361 1.2 matt /*
362 1.2 matt * Attach the interface.
363 1.2 matt */
364 1.2 matt if_attach(ifp);
365 1.2 matt ether_ifattach(ifp, sc->sc_enaddr);
366 1.2 matt
367 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR,
368 1.2 matt NULL, xname, "intr");
369 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR,
370 1.2 matt NULL, xname, "soft intr");
371 1.8 matt evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC,
372 1.8 matt NULL, xname, "work items");
373 1.2 matt evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC,
374 1.2 matt NULL, xname, "tx stalls");
375 1.2 matt }
376 1.2 matt
377 1.2 matt static int
378 1.2 matt bcmeth_mediachange(struct ifnet *ifp)
379 1.2 matt {
380 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
381 1.2 matt return 0;
382 1.2 matt }
383 1.2 matt
384 1.2 matt static void
385 1.2 matt bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm)
386 1.2 matt {
387 1.2 matt //struct bcmeth_softc * const sc = ifp->if_softc;
388 1.2 matt
389 1.2 matt ifm->ifm_status = IFM_AVALID | IFM_ACTIVE;
390 1.2 matt ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T;
391 1.2 matt }
392 1.2 matt
393 1.2 matt static uint64_t
394 1.2 matt bcmeth_macaddr_create(const uint8_t *enaddr)
395 1.2 matt {
396 1.5 matt return (enaddr[3] << 0) // UNIMAC_MAC_0
397 1.5 matt | (enaddr[2] << 8) // UNIMAC_MAC_0
398 1.5 matt | (enaddr[1] << 16) // UNIMAC_MAC_0
399 1.5 matt | (enaddr[0] << 24) // UNIMAC_MAC_0
400 1.5 matt | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1
401 1.5 matt | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1
402 1.2 matt }
403 1.2 matt
404 1.2 matt static int
405 1.2 matt bcmeth_ifinit(struct ifnet *ifp)
406 1.2 matt {
407 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
408 1.2 matt int error = 0;
409 1.2 matt
410 1.2 matt sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES);
411 1.2 matt if (ifp->if_mtu > ETHERMTU_JUMBO)
412 1.2 matt return error;
413 1.2 matt
414 1.2 matt KASSERT(ifp->if_flags & IFF_UP);
415 1.2 matt
416 1.2 matt /*
417 1.2 matt * Stop the interface
418 1.2 matt */
419 1.2 matt bcmeth_ifstop(ifp, 0);
420 1.2 matt
421 1.2 matt /*
422 1.2 matt * If our frame size has changed (or it's our first time through)
423 1.2 matt * destroy the existing transmit mapcache.
424 1.2 matt */
425 1.2 matt if (sc->sc_tx_mapcache != NULL
426 1.2 matt && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) {
427 1.2 matt bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache);
428 1.2 matt sc->sc_tx_mapcache = NULL;
429 1.2 matt }
430 1.2 matt
431 1.2 matt if (sc->sc_tx_mapcache == NULL) {
432 1.2 matt error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache,
433 1.2 matt BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS);
434 1.2 matt if (error)
435 1.2 matt return error;
436 1.2 matt }
437 1.2 matt
438 1.2 matt sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE
439 1.2 matt | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED)
440 1.2 matt | RX_ENA | TX_ENA;
441 1.2 matt
442 1.2 matt if (ifp->if_flags & IFF_PROMISC) {
443 1.2 matt sc->sc_cmdcfg |= PROMISC_EN;
444 1.2 matt } else {
445 1.2 matt sc->sc_cmdcfg &= ~PROMISC_EN;
446 1.2 matt }
447 1.2 matt
448 1.2 matt const uint64_t macstnaddr =
449 1.2 matt bcmeth_macaddr_create(CLLADDR(ifp->if_sadl));
450 1.2 matt
451 1.2 matt sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR;
452 1.2 matt
453 1.2 matt /* 5. Load RCVADDR_LO with new pointer */
454 1.2 matt bcmeth_rxq_reset(sc, &sc->sc_rxq);
455 1.2 matt
456 1.4 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
457 1.4 matt __SHIFTIN(BCMETH_RCVOFFSET, RCVCTL_RCVOFFSET)
458 1.2 matt | RCVCTL_PARITY_DIS
459 1.2 matt | RCVCTL_OFLOW_CONTINUE
460 1.2 matt | __SHIFTIN(4, RCVCTL_BURSTLEN));
461 1.2 matt
462 1.2 matt /* 6. Load XMTADDR_LO with new pointer */
463 1.2 matt bcmeth_txq_reset(sc, &sc->sc_txq);
464 1.2 matt
465 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX
466 1.2 matt | XMTCTL_PARITY_DIS
467 1.2 matt | __SHIFTIN(4, XMTCTL_BURSTLEN));
468 1.2 matt
469 1.2 matt /* 7. Setup other UNIMAC registers */
470 1.2 matt bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm);
471 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0));
472 1.2 matt bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32));
473 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg);
474 1.2 matt
475 1.2 matt uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL);
476 1.2 matt devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE;
477 1.2 matt devctl &= ~FLOW_CTRL_MODE;
478 1.2 matt devctl &= ~MIB_RD_RESET_EN;
479 1.2 matt devctl &= ~RXQ_OVERFLOW_CTRL_SEL;
480 1.2 matt devctl &= ~CPU_FLOW_CTRL_ON;
481 1.2 matt bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl);
482 1.2 matt
483 1.3 matt /* Setup lazy receive (at most 1ms). */
484 1.8 matt sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT)
485 1.8 matt | __SHIFTIN(125000000 / 1000, INTRCVLAZY_TIMEOUT);
486 1.8 matt bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy);
487 1.3 matt
488 1.2 matt /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */
489 1.2 matt sc->sc_intmask |= XMTINT_0|XMTUF;
490 1.2 matt bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl,
491 1.2 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE);
492 1.2 matt
493 1.2 matt
494 1.2 matt /* 12. Enable receive queues in RQUEUE, */
495 1.2 matt sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF;
496 1.2 matt bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl,
497 1.2 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE);
498 1.2 matt
499 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */
500 1.3 matt
501 1.3 matt #if 0
502 1.3 matt aprint_normal_dev(sc->sc_dev,
503 1.3 matt "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n",
504 1.3 matt devctl, sc->sc_cmdcfg,
505 1.3 matt bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl),
506 1.3 matt bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl));
507 1.2 matt #endif
508 1.2 matt
509 1.2 matt sc->sc_soft_flags = 0;
510 1.2 matt
511 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
512 1.2 matt
513 1.2 matt ifp->if_flags |= IFF_RUNNING;
514 1.2 matt
515 1.2 matt return error;
516 1.2 matt }
517 1.2 matt
518 1.2 matt static void
519 1.2 matt bcmeth_ifstop(struct ifnet *ifp, int disable)
520 1.2 matt {
521 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
522 1.2 matt struct bcmeth_txqueue * const txq = &sc->sc_txq;
523 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
524 1.2 matt
525 1.2 matt KASSERT(!cpu_intr_p());
526 1.2 matt
527 1.2 matt sc->sc_soft_flags = 0;
528 1.2 matt
529 1.2 matt /* Disable Rx processing */
530 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvctl,
531 1.2 matt bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE);
532 1.2 matt
533 1.2 matt /* Disable Tx processing */
534 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtctl,
535 1.2 matt bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE);
536 1.2 matt
537 1.2 matt /* Disable all interrupts */
538 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, 0);
539 1.2 matt
540 1.2 matt for (;;) {
541 1.2 matt uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
542 1.2 matt uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
543 1.2 matt if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS
544 1.2 matt && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS)
545 1.2 matt break;
546 1.2 matt delay(50);
547 1.2 matt }
548 1.2 matt /*
549 1.2 matt * Now reset the controller.
550 1.2 matt *
551 1.2 matt * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register
552 1.2 matt * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register
553 1.2 matt */
554 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET);
555 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, ~0);
556 1.2 matt sc->sc_intmask = 0;
557 1.2 matt ifp->if_flags &= ~IFF_RUNNING;
558 1.2 matt
559 1.2 matt /*
560 1.2 matt * Let's consume any remaining transmitted packets. And if we are
561 1.2 matt * disabling the interface, purge ourselves of any untransmitted
562 1.2 matt * packets. But don't consume any received packets, just drop them.
563 1.2 matt * If we aren't disabling the interface, save the mbufs in the
564 1.2 matt * receive queue for reuse.
565 1.2 matt */
566 1.2 matt bcmeth_rxq_purge(sc, &sc->sc_rxq, disable);
567 1.2 matt bcmeth_txq_consume(sc, &sc->sc_txq);
568 1.2 matt if (disable) {
569 1.2 matt bcmeth_txq_purge(sc, &sc->sc_txq);
570 1.2 matt IF_PURGE(&ifp->if_snd);
571 1.2 matt }
572 1.2 matt
573 1.2 matt bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0);
574 1.2 matt }
575 1.2 matt
576 1.2 matt static void
577 1.2 matt bcmeth_ifwatchdog(struct ifnet *ifp)
578 1.2 matt {
579 1.2 matt }
580 1.2 matt
581 1.2 matt static int
582 1.2 matt bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data)
583 1.2 matt {
584 1.2 matt struct bcmeth_softc *sc = ifp->if_softc;
585 1.2 matt struct ifreq * const ifr = data;
586 1.2 matt const int s = splnet();
587 1.2 matt int error;
588 1.2 matt
589 1.2 matt switch (cmd) {
590 1.2 matt case SIOCSIFMEDIA:
591 1.2 matt case SIOCGIFMEDIA:
592 1.2 matt error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
593 1.2 matt break;
594 1.2 matt
595 1.2 matt default:
596 1.2 matt error = ether_ioctl(ifp, cmd, data);
597 1.2 matt if (error != ENETRESET)
598 1.2 matt break;
599 1.2 matt
600 1.2 matt if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
601 1.2 matt error = 0;
602 1.2 matt break;
603 1.2 matt }
604 1.2 matt error = bcmeth_ifinit(ifp);
605 1.2 matt break;
606 1.2 matt }
607 1.2 matt
608 1.2 matt splx(s);
609 1.2 matt return error;
610 1.2 matt }
611 1.2 matt
612 1.2 matt static void
613 1.2 matt bcmeth_rxq_desc_presync(
614 1.2 matt struct bcmeth_softc *sc,
615 1.2 matt struct bcmeth_rxqueue *rxq,
616 1.2 matt struct gmac_rxdb *rxdb,
617 1.2 matt size_t count)
618 1.2 matt {
619 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
620 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
621 1.2 matt BUS_DMASYNC_PREWRITE);
622 1.2 matt }
623 1.2 matt
624 1.2 matt static void
625 1.2 matt bcmeth_rxq_desc_postsync(
626 1.2 matt struct bcmeth_softc *sc,
627 1.2 matt struct bcmeth_rxqueue *rxq,
628 1.2 matt struct gmac_rxdb *rxdb,
629 1.2 matt size_t count)
630 1.2 matt {
631 1.2 matt bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap,
632 1.2 matt (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb),
633 1.2 matt BUS_DMASYNC_POSTWRITE);
634 1.2 matt }
635 1.2 matt
636 1.2 matt static void
637 1.2 matt bcmeth_txq_desc_presync(
638 1.2 matt struct bcmeth_softc *sc,
639 1.2 matt struct bcmeth_txqueue *txq,
640 1.2 matt struct gmac_txdb *txdb,
641 1.2 matt size_t count)
642 1.2 matt {
643 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
644 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
645 1.2 matt BUS_DMASYNC_PREWRITE);
646 1.2 matt }
647 1.2 matt
648 1.2 matt static void
649 1.2 matt bcmeth_txq_desc_postsync(
650 1.2 matt struct bcmeth_softc *sc,
651 1.2 matt struct bcmeth_txqueue *txq,
652 1.2 matt struct gmac_txdb *txdb,
653 1.2 matt size_t count)
654 1.2 matt {
655 1.2 matt bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap,
656 1.2 matt (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb),
657 1.2 matt BUS_DMASYNC_POSTWRITE);
658 1.2 matt }
659 1.2 matt
660 1.2 matt static bus_dmamap_t
661 1.2 matt bcmeth_mapcache_get(
662 1.2 matt struct bcmeth_softc *sc,
663 1.2 matt struct bcmeth_mapcache *dmc)
664 1.2 matt {
665 1.2 matt KASSERT(dmc->dmc_nmaps > 0);
666 1.2 matt KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL);
667 1.2 matt return dmc->dmc_maps[--dmc->dmc_nmaps];
668 1.2 matt }
669 1.2 matt
670 1.2 matt static void
671 1.2 matt bcmeth_mapcache_put(
672 1.2 matt struct bcmeth_softc *sc,
673 1.2 matt struct bcmeth_mapcache *dmc,
674 1.2 matt bus_dmamap_t map)
675 1.2 matt {
676 1.2 matt KASSERT(map != NULL);
677 1.2 matt KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps);
678 1.2 matt dmc->dmc_maps[dmc->dmc_nmaps++] = map;
679 1.2 matt }
680 1.2 matt
681 1.2 matt static void
682 1.2 matt bcmeth_mapcache_destroy(
683 1.2 matt struct bcmeth_softc *sc,
684 1.2 matt struct bcmeth_mapcache *dmc)
685 1.2 matt {
686 1.2 matt const size_t dmc_size =
687 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]);
688 1.2 matt
689 1.2 matt for (u_int i = 0; i < dmc->dmc_maxmaps; i++) {
690 1.2 matt bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]);
691 1.2 matt }
692 1.2 matt kmem_intr_free(dmc, dmc_size);
693 1.2 matt }
694 1.2 matt
695 1.2 matt static int
696 1.2 matt bcmeth_mapcache_create(
697 1.2 matt struct bcmeth_softc *sc,
698 1.2 matt struct bcmeth_mapcache **dmc_p,
699 1.2 matt size_t maxmaps,
700 1.2 matt size_t maxmapsize,
701 1.2 matt size_t maxseg)
702 1.2 matt {
703 1.2 matt const size_t dmc_size =
704 1.2 matt offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]);
705 1.2 matt struct bcmeth_mapcache * const dmc =
706 1.2 matt kmem_intr_zalloc(dmc_size, KM_NOSLEEP);
707 1.2 matt
708 1.2 matt dmc->dmc_maxmaps = maxmaps;
709 1.2 matt dmc->dmc_nmaps = maxmaps;
710 1.2 matt dmc->dmc_maxmapsize = maxmapsize;
711 1.2 matt dmc->dmc_maxseg = maxseg;
712 1.2 matt
713 1.2 matt for (u_int i = 0; i < maxmaps; i++) {
714 1.2 matt int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize,
715 1.2 matt dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0,
716 1.2 matt BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]);
717 1.2 matt if (error) {
718 1.2 matt aprint_error_dev(sc->sc_dev,
719 1.2 matt "failed to creat dma map cache "
720 1.2 matt "entry %u of %zu: %d\n",
721 1.2 matt i, maxmaps, error);
722 1.2 matt while (i-- > 0) {
723 1.2 matt bus_dmamap_destroy(sc->sc_dmat,
724 1.2 matt dmc->dmc_maps[i]);
725 1.2 matt }
726 1.2 matt kmem_intr_free(dmc, dmc_size);
727 1.2 matt return error;
728 1.2 matt }
729 1.2 matt KASSERT(dmc->dmc_maps[i] != NULL);
730 1.2 matt }
731 1.2 matt
732 1.2 matt *dmc_p = dmc;
733 1.2 matt
734 1.2 matt return 0;
735 1.2 matt }
736 1.2 matt
737 1.2 matt #if 0
738 1.2 matt static void
739 1.2 matt bcmeth_dmamem_free(
740 1.2 matt bus_dma_tag_t dmat,
741 1.2 matt size_t map_size,
742 1.2 matt bus_dma_segment_t *seg,
743 1.2 matt bus_dmamap_t map,
744 1.2 matt void *kvap)
745 1.2 matt {
746 1.2 matt bus_dmamap_destroy(dmat, map);
747 1.2 matt bus_dmamem_unmap(dmat, kvap, map_size);
748 1.2 matt bus_dmamem_free(dmat, seg, 1);
749 1.2 matt }
750 1.2 matt #endif
751 1.2 matt
752 1.2 matt static int
753 1.2 matt bcmeth_dmamem_alloc(
754 1.2 matt bus_dma_tag_t dmat,
755 1.2 matt size_t map_size,
756 1.2 matt bus_dma_segment_t *seg,
757 1.2 matt bus_dmamap_t *map,
758 1.2 matt void **kvap)
759 1.2 matt {
760 1.2 matt int error;
761 1.2 matt int nseg;
762 1.2 matt
763 1.2 matt *kvap = NULL;
764 1.2 matt *map = NULL;
765 1.2 matt
766 1.2 matt error = bus_dmamem_alloc(dmat, map_size, PAGE_SIZE, 0,
767 1.2 matt seg, 1, &nseg, 0);
768 1.2 matt if (error)
769 1.2 matt return error;
770 1.2 matt
771 1.2 matt KASSERT(nseg == 1);
772 1.2 matt
773 1.2 matt error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap,
774 1.2 matt BUS_DMA_COHERENT);
775 1.2 matt if (error == 0) {
776 1.2 matt error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0,
777 1.2 matt map);
778 1.2 matt if (error == 0) {
779 1.2 matt error = bus_dmamap_load(dmat, *map, *kvap, map_size,
780 1.2 matt NULL, 0);
781 1.2 matt if (error == 0)
782 1.2 matt return 0;
783 1.2 matt bus_dmamap_destroy(dmat, *map);
784 1.2 matt *map = NULL;
785 1.2 matt }
786 1.2 matt bus_dmamem_unmap(dmat, *kvap, map_size);
787 1.2 matt *kvap = NULL;
788 1.2 matt }
789 1.2 matt bus_dmamem_free(dmat, seg, nseg);
790 1.2 matt return 0;
791 1.2 matt }
792 1.2 matt
793 1.2 matt static struct mbuf *
794 1.2 matt bcmeth_rx_buf_alloc(
795 1.2 matt struct bcmeth_softc *sc)
796 1.2 matt {
797 1.2 matt struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA);
798 1.2 matt if (m == NULL) {
799 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr");
800 1.2 matt return NULL;
801 1.2 matt }
802 1.2 matt MCLGET(m, M_DONTWAIT);
803 1.2 matt if ((m->m_flags & M_EXT) == 0) {
804 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET");
805 1.2 matt m_freem(m);
806 1.2 matt return NULL;
807 1.2 matt }
808 1.2 matt m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
809 1.2 matt
810 1.2 matt bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache);
811 1.2 matt if (map == NULL) {
812 1.2 matt printf("%s:%d: %s\n", __func__, __LINE__, "map get");
813 1.2 matt m_freem(m);
814 1.2 matt return NULL;
815 1.2 matt }
816 1.2 matt M_SETCTX(m, map);
817 1.2 matt m->m_len = m->m_pkthdr.len = MCLBYTES;
818 1.2 matt int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
819 1.2 matt BUS_DMA_READ|BUS_DMA_NOWAIT);
820 1.2 matt if (error) {
821 1.2 matt aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n",
822 1.2 matt error);
823 1.2 matt M_SETCTX(m, NULL);
824 1.2 matt m_freem(m);
825 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
826 1.2 matt return NULL;
827 1.2 matt }
828 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
829 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
830 1.2 matt BUS_DMASYNC_PREREAD);
831 1.2 matt
832 1.2 matt return m;
833 1.2 matt }
834 1.2 matt
835 1.2 matt static void
836 1.2 matt bcmeth_rx_map_unload(
837 1.2 matt struct bcmeth_softc *sc,
838 1.2 matt struct mbuf *m)
839 1.2 matt {
840 1.2 matt KASSERT(m);
841 1.2 matt for (; m != NULL; m = m->m_next) {
842 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
843 1.2 matt KASSERT(map);
844 1.2 matt KASSERT(map->dm_mapsize == MCLBYTES);
845 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len,
846 1.2 matt BUS_DMASYNC_POSTREAD);
847 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
848 1.2 matt bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map);
849 1.2 matt M_SETCTX(m, NULL);
850 1.2 matt }
851 1.2 matt }
852 1.2 matt
853 1.2 matt static bool
854 1.2 matt bcmeth_rxq_produce(
855 1.2 matt struct bcmeth_softc *sc,
856 1.2 matt struct bcmeth_rxqueue *rxq)
857 1.2 matt {
858 1.2 matt struct gmac_rxdb *producer = rxq->rxq_producer;
859 1.7 matt bool produced = false;
860 1.7 matt
861 1.2 matt while (rxq->rxq_inuse < rxq->rxq_threshold) {
862 1.2 matt struct mbuf *m;
863 1.2 matt IF_DEQUEUE(&sc->sc_rx_bufcache, m);
864 1.2 matt if (m == NULL) {
865 1.2 matt m = bcmeth_rx_buf_alloc(sc);
866 1.2 matt if (m == NULL) {
867 1.2 matt printf("%s: bcmeth_rx_buf_alloc failed\n", __func__);
868 1.2 matt break;
869 1.2 matt }
870 1.2 matt }
871 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
872 1.2 matt KASSERT(map);
873 1.2 matt
874 1.2 matt producer->rxdb_buflen = MCLBYTES;
875 1.2 matt producer->rxdb_addrlo = map->dm_segs[0].ds_addr;
876 1.4 matt producer->rxdb_flags &= RXDB_FLAG_ET;
877 1.2 matt *rxq->rxq_mtail = m;
878 1.2 matt rxq->rxq_mtail = &m->m_next;
879 1.2 matt m->m_len = MCLBYTES;
880 1.2 matt m->m_next = NULL;
881 1.2 matt rxq->rxq_inuse++;
882 1.2 matt if (++producer == rxq->rxq_last) {
883 1.2 matt membar_producer();
884 1.2 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
885 1.2 matt rxq->rxq_last - rxq->rxq_producer);
886 1.2 matt producer = rxq->rxq_producer = rxq->rxq_first;
887 1.2 matt }
888 1.7 matt produced = true;
889 1.2 matt }
890 1.7 matt if (produced) {
891 1.2 matt membar_producer();
892 1.7 matt if (producer != rxq->rxq_producer) {
893 1.7 matt bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer,
894 1.7 matt producer - rxq->rxq_producer);
895 1.7 matt rxq->rxq_producer = producer;
896 1.7 matt }
897 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvptr,
898 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr
899 1.7 matt + ((uintptr_t)producer & RCVPTR));
900 1.2 matt }
901 1.2 matt return true;
902 1.2 matt }
903 1.2 matt
904 1.2 matt static void
905 1.2 matt bcmeth_rx_input(
906 1.2 matt struct bcmeth_softc *sc,
907 1.2 matt struct mbuf *m,
908 1.2 matt uint32_t rxdb_flags)
909 1.2 matt {
910 1.2 matt struct ifnet * const ifp = &sc->sc_if;
911 1.2 matt
912 1.2 matt bcmeth_rx_map_unload(sc, m);
913 1.2 matt
914 1.2 matt m_adj(m, BCMETH_RCVOFFSET);
915 1.2 matt
916 1.2 matt switch (__SHIFTOUT(rxdb_flags, RXSTS_PKTTYPE)) {
917 1.2 matt case RXSTS_PKTTYPE_UC:
918 1.2 matt break;
919 1.2 matt case RXSTS_PKTTYPE_MC:
920 1.2 matt m->m_flags |= M_MCAST;
921 1.2 matt break;
922 1.2 matt case RXSTS_PKTTYPE_BC:
923 1.2 matt m->m_flags |= M_BCAST|M_MCAST;
924 1.2 matt break;
925 1.6 matt default:
926 1.6 matt if (sc->sc_cmdcfg & PROMISC_EN)
927 1.6 matt m->m_flags |= M_PROMISC;
928 1.6 matt break;
929 1.2 matt }
930 1.2 matt m->m_pkthdr.rcvif = ifp;
931 1.2 matt
932 1.2 matt ifp->if_ipackets++;
933 1.2 matt ifp->if_ibytes += m->m_pkthdr.len;
934 1.2 matt
935 1.2 matt /*
936 1.2 matt * Let's give it to the network subsystm to deal with.
937 1.2 matt */
938 1.2 matt int s = splnet();
939 1.2 matt bpf_mtap(ifp, m);
940 1.2 matt (*ifp->if_input)(ifp, m);
941 1.2 matt splx(s);
942 1.2 matt }
943 1.2 matt
944 1.2 matt static void
945 1.2 matt bcmeth_rxq_consume(
946 1.2 matt struct bcmeth_softc *sc,
947 1.2 matt struct bcmeth_rxqueue *rxq)
948 1.2 matt {
949 1.2 matt struct ifnet * const ifp = &sc->sc_if;
950 1.2 matt struct gmac_rxdb *consumer = rxq->rxq_consumer;
951 1.2 matt size_t rxconsumed = 0;
952 1.2 matt
953 1.2 matt for (;;) {
954 1.2 matt if (consumer == rxq->rxq_producer) {
955 1.2 matt rxq->rxq_consumer = consumer;
956 1.2 matt rxq->rxq_inuse -= rxconsumed;
957 1.2 matt KASSERT(rxq->rxq_inuse == 0);
958 1.2 matt return;
959 1.2 matt }
960 1.2 matt
961 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
962 1.2 matt uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
963 1.2 matt if (consumer == rxq->rxq_first + currdscr) {
964 1.2 matt rxq->rxq_consumer = consumer;
965 1.2 matt rxq->rxq_inuse -= rxconsumed;
966 1.2 matt return;
967 1.2 matt }
968 1.2 matt bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1);
969 1.2 matt
970 1.2 matt /*
971 1.2 matt * We own this packet again. Copy the rxsts word from it.
972 1.2 matt */
973 1.2 matt rxconsumed++;
974 1.2 matt uint32_t rxsts;
975 1.2 matt KASSERT(rxq->rxq_mhead != NULL);
976 1.2 matt bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t);
977 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
978 1.2 matt BUS_DMASYNC_POSTREAD);
979 1.2 matt memcpy(&rxsts, rxq->rxq_mhead->m_data, 4);
980 1.2 matt
981 1.2 matt /*
982 1.2 matt * Get the count of descriptors. Fetch the correct number
983 1.2 matt * of mbufs.
984 1.2 matt */
985 1.2 matt size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1;
986 1.2 matt struct mbuf *m = rxq->rxq_mhead;
987 1.2 matt struct mbuf *m_last = m;
988 1.2 matt for (size_t i = 1; i < desc_count; i++) {
989 1.2 matt if (++consumer == rxq->rxq_last) {
990 1.2 matt consumer = rxq->rxq_first;
991 1.2 matt }
992 1.2 matt KASSERT(consumer != rxq->rxq_first + currdscr);
993 1.2 matt m_last = m_last->m_next;
994 1.2 matt }
995 1.2 matt
996 1.2 matt /*
997 1.2 matt * Now remove it/them from the list of enqueued mbufs.
998 1.2 matt */
999 1.2 matt if ((rxq->rxq_mhead = m_last->m_next) == NULL)
1000 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1001 1.2 matt m_last->m_next = NULL;
1002 1.2 matt
1003 1.3 matt if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) {
1004 1.2 matt aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n",
1005 1.2 matt consumer - rxq->rxq_first, desc_count, rxsts);
1006 1.2 matt /*
1007 1.2 matt * We encountered an error, take the mbufs and add them
1008 1.2 matt * to the rx bufcache so we can quickly reuse them.
1009 1.2 matt */
1010 1.2 matt ifp->if_ierrors++;
1011 1.2 matt do {
1012 1.2 matt struct mbuf *m0 = m->m_next;
1013 1.2 matt m->m_next = NULL;
1014 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1015 1.2 matt m = m0;
1016 1.2 matt } while (m);
1017 1.2 matt } else {
1018 1.2 matt uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN);
1019 1.2 matt framelen += BCMETH_RCVOFFSET;
1020 1.2 matt m->m_pkthdr.len = framelen;
1021 1.2 matt if (desc_count == 1) {
1022 1.2 matt KASSERT(framelen <= MCLBYTES);
1023 1.2 matt m->m_len = framelen;
1024 1.2 matt } else {
1025 1.2 matt m_last->m_len = framelen & (MCLBYTES - 1);
1026 1.2 matt }
1027 1.2 matt bcmeth_rx_input(sc, m, rxsts);
1028 1.2 matt }
1029 1.2 matt
1030 1.2 matt /*
1031 1.2 matt * Wrap at the last entry!
1032 1.2 matt */
1033 1.2 matt if (++consumer == rxq->rxq_last) {
1034 1.2 matt KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET);
1035 1.2 matt consumer = rxq->rxq_first;
1036 1.2 matt }
1037 1.2 matt }
1038 1.2 matt }
1039 1.2 matt
1040 1.2 matt static void
1041 1.2 matt bcmeth_rxq_purge(
1042 1.2 matt struct bcmeth_softc *sc,
1043 1.2 matt struct bcmeth_rxqueue *rxq,
1044 1.2 matt bool discard)
1045 1.2 matt {
1046 1.2 matt struct mbuf *m;
1047 1.2 matt
1048 1.2 matt if ((m = rxq->rxq_mhead) != NULL) {
1049 1.2 matt if (discard) {
1050 1.2 matt bcmeth_rx_map_unload(sc, m);
1051 1.2 matt m_freem(m);
1052 1.2 matt } else {
1053 1.2 matt while (m != NULL) {
1054 1.2 matt struct mbuf *m0 = m->m_next;
1055 1.2 matt m->m_next = NULL;
1056 1.2 matt IF_ENQUEUE(&sc->sc_rx_bufcache, m);
1057 1.2 matt m = m0;
1058 1.2 matt }
1059 1.2 matt }
1060 1.2 matt
1061 1.2 matt }
1062 1.2 matt
1063 1.2 matt rxq->rxq_mhead = NULL;
1064 1.2 matt rxq->rxq_mtail = &rxq->rxq_mhead;
1065 1.2 matt rxq->rxq_inuse = 0;
1066 1.1 matt }
1067 1.1 matt
1068 1.1 matt static void
1069 1.2 matt bcmeth_rxq_reset(
1070 1.2 matt struct bcmeth_softc *sc,
1071 1.2 matt struct bcmeth_rxqueue *rxq)
1072 1.2 matt {
1073 1.2 matt /*
1074 1.3 matt * sync all the descriptors
1075 1.3 matt */
1076 1.3 matt bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first,
1077 1.3 matt rxq->rxq_last - rxq->rxq_first);
1078 1.3 matt
1079 1.3 matt /*
1080 1.3 matt * Make sure we own all descriptors in the ring.
1081 1.3 matt */
1082 1.3 matt struct gmac_rxdb *rxdb;
1083 1.3 matt for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) {
1084 1.7 matt rxdb->rxdb_flags = RXDB_FLAG_IC;
1085 1.3 matt }
1086 1.3 matt
1087 1.3 matt /*
1088 1.3 matt * Last descriptor has the wrap flag.
1089 1.3 matt */
1090 1.7 matt rxdb->rxdb_flags = RXDB_FLAG_ET|RXDB_FLAG_IC;
1091 1.3 matt
1092 1.3 matt /*
1093 1.2 matt * Reset the producer consumer indexes.
1094 1.2 matt */
1095 1.2 matt rxq->rxq_consumer = rxq->rxq_first;
1096 1.2 matt rxq->rxq_producer = rxq->rxq_first;
1097 1.2 matt rxq->rxq_inuse = 0;
1098 1.2 matt if (rxq->rxq_threshold < BCMETH_MINRXMBUFS)
1099 1.2 matt rxq->rxq_threshold = BCMETH_MINRXMBUFS;
1100 1.2 matt
1101 1.2 matt sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF;
1102 1.2 matt
1103 1.2 matt /*
1104 1.2 matt * Restart the receiver at the first descriptor
1105 1.2 matt */
1106 1.2 matt bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo,
1107 1.2 matt rxq->rxq_descmap->dm_segs[0].ds_addr);
1108 1.2 matt }
1109 1.2 matt
1110 1.2 matt static int
1111 1.2 matt bcmeth_rxq_attach(
1112 1.2 matt struct bcmeth_softc *sc,
1113 1.2 matt struct bcmeth_rxqueue *rxq,
1114 1.2 matt u_int qno)
1115 1.2 matt {
1116 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]);
1117 1.2 matt int error;
1118 1.2 matt void *descs;
1119 1.2 matt
1120 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1121 1.2 matt
1122 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1123 1.2 matt &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs);
1124 1.2 matt if (error)
1125 1.2 matt return error;
1126 1.2 matt
1127 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1128 1.2 matt rxq->rxq_first = descs;
1129 1.2 matt rxq->rxq_last = rxq->rxq_first + desc_count;
1130 1.2 matt rxq->rxq_consumer = descs;
1131 1.2 matt rxq->rxq_producer = descs;
1132 1.2 matt
1133 1.2 matt bcmeth_rxq_purge(sc, rxq, true);
1134 1.2 matt bcmeth_rxq_reset(sc, rxq);
1135 1.2 matt
1136 1.2 matt rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW;
1137 1.2 matt rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL;
1138 1.2 matt rxq->rxq_reg_rcvptr = GMAC_RCVPTR;
1139 1.2 matt rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0;
1140 1.2 matt
1141 1.2 matt return 0;
1142 1.2 matt }
1143 1.2 matt
1144 1.2 matt static bool
1145 1.2 matt bcmeth_txq_active_p(
1146 1.2 matt struct bcmeth_softc * const sc,
1147 1.2 matt struct bcmeth_txqueue *txq)
1148 1.1 matt {
1149 1.2 matt return !IF_IS_EMPTY(&txq->txq_mbufs);
1150 1.2 matt }
1151 1.2 matt
1152 1.2 matt static bool
1153 1.2 matt bcmeth_txq_fillable_p(
1154 1.2 matt struct bcmeth_softc * const sc,
1155 1.2 matt struct bcmeth_txqueue *txq)
1156 1.2 matt {
1157 1.2 matt return txq->txq_free >= txq->txq_threshold;
1158 1.2 matt }
1159 1.2 matt
1160 1.2 matt static int
1161 1.2 matt bcmeth_txq_attach(
1162 1.2 matt struct bcmeth_softc *sc,
1163 1.2 matt struct bcmeth_txqueue *txq,
1164 1.2 matt u_int qno)
1165 1.2 matt {
1166 1.8 matt size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]);
1167 1.2 matt int error;
1168 1.2 matt void *descs;
1169 1.2 matt
1170 1.2 matt KASSERT(desc_count == 256 || desc_count == 512);
1171 1.2 matt
1172 1.8 matt error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE,
1173 1.2 matt &txq->txq_descmap_seg, &txq->txq_descmap, &descs);
1174 1.2 matt if (error)
1175 1.2 matt return error;
1176 1.2 matt
1177 1.8 matt memset(descs, 0, BCMETH_RINGSIZE);
1178 1.2 matt txq->txq_first = descs;
1179 1.2 matt txq->txq_last = txq->txq_first + desc_count;
1180 1.2 matt txq->txq_consumer = descs;
1181 1.2 matt txq->txq_producer = descs;
1182 1.2 matt
1183 1.2 matt IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS);
1184 1.2 matt
1185 1.2 matt txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW;
1186 1.2 matt txq->txq_reg_xmtctl = GMAC_XMTCONTROL;
1187 1.2 matt txq->txq_reg_xmtptr = GMAC_XMTPTR;
1188 1.2 matt txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0;
1189 1.2 matt
1190 1.2 matt bcmeth_txq_reset(sc, txq);
1191 1.1 matt
1192 1.2 matt return 0;
1193 1.1 matt }
1194 1.1 matt
1195 1.1 matt static int
1196 1.2 matt bcmeth_txq_map_load(
1197 1.2 matt struct bcmeth_softc *sc,
1198 1.2 matt struct bcmeth_txqueue *txq,
1199 1.2 matt struct mbuf *m)
1200 1.2 matt {
1201 1.2 matt bus_dmamap_t map;
1202 1.2 matt int error;
1203 1.2 matt
1204 1.2 matt map = M_GETCTX(m, bus_dmamap_t);
1205 1.2 matt if (map != NULL)
1206 1.2 matt return 0;
1207 1.2 matt
1208 1.2 matt map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache);
1209 1.2 matt if (map == NULL)
1210 1.2 matt return ENOMEM;
1211 1.2 matt
1212 1.2 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1213 1.2 matt BUS_DMA_WRITE | BUS_DMA_NOWAIT);
1214 1.2 matt if (error)
1215 1.2 matt return error;
1216 1.2 matt
1217 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len,
1218 1.2 matt BUS_DMASYNC_PREWRITE);
1219 1.2 matt M_SETCTX(m, map);
1220 1.2 matt return 0;
1221 1.2 matt }
1222 1.2 matt
1223 1.2 matt static void
1224 1.2 matt bcmeth_txq_map_unload(
1225 1.2 matt struct bcmeth_softc *sc,
1226 1.2 matt struct bcmeth_txqueue *txq,
1227 1.2 matt struct mbuf *m)
1228 1.2 matt {
1229 1.2 matt KASSERT(m);
1230 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1231 1.2 matt bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1232 1.2 matt BUS_DMASYNC_POSTWRITE);
1233 1.2 matt bus_dmamap_unload(sc->sc_dmat, map);
1234 1.2 matt bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map);
1235 1.2 matt }
1236 1.2 matt
1237 1.2 matt static bool
1238 1.2 matt bcmeth_txq_produce(
1239 1.2 matt struct bcmeth_softc *sc,
1240 1.2 matt struct bcmeth_txqueue *txq,
1241 1.2 matt struct mbuf *m)
1242 1.2 matt {
1243 1.2 matt bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t);
1244 1.2 matt
1245 1.2 matt if (map->dm_nsegs > txq->txq_free)
1246 1.2 matt return false;
1247 1.2 matt
1248 1.2 matt /*
1249 1.2 matt * TCP Offload flag must be set in the first descriptor.
1250 1.2 matt */
1251 1.2 matt struct gmac_txdb *producer = txq->txq_producer;
1252 1.2 matt uint32_t first_flags = TXDB_FLAG_SF;
1253 1.2 matt uint32_t last_flags = TXDB_FLAG_EF;
1254 1.2 matt
1255 1.2 matt /*
1256 1.2 matt * If we've produced enough descriptors without consuming any
1257 1.2 matt * we need to ask for an interrupt to reclaim some.
1258 1.2 matt */
1259 1.2 matt txq->txq_lastintr += map->dm_nsegs;
1260 1.2 matt if (txq->txq_lastintr >= txq->txq_threshold
1261 1.2 matt || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) {
1262 1.2 matt txq->txq_lastintr = 0;
1263 1.2 matt last_flags |= TXDB_FLAG_IC;
1264 1.2 matt }
1265 1.2 matt
1266 1.2 matt KASSERT(producer != txq->txq_last);
1267 1.2 matt
1268 1.2 matt struct gmac_txdb *start = producer;
1269 1.2 matt size_t count = map->dm_nsegs;
1270 1.2 matt producer->txdb_flags |= first_flags;
1271 1.2 matt producer->txdb_addrlo = map->dm_segs[0].ds_addr;
1272 1.2 matt producer->txdb_buflen = map->dm_segs[0].ds_len;
1273 1.2 matt for (u_int i = 1; i < map->dm_nsegs; i++) {
1274 1.2 matt #if 0
1275 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1276 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1277 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1278 1.2 matt #endif
1279 1.2 matt if (__predict_false(++producer == txq->txq_last)) {
1280 1.2 matt bcmeth_txq_desc_presync(sc, txq, start,
1281 1.2 matt txq->txq_last - start);
1282 1.2 matt count -= txq->txq_last - start;
1283 1.2 matt producer = txq->txq_first;
1284 1.2 matt start = txq->txq_first;
1285 1.2 matt }
1286 1.2 matt producer->txdb_addrlo = map->dm_segs[i].ds_addr;
1287 1.2 matt producer->txdb_buflen = map->dm_segs[i].ds_len;
1288 1.2 matt }
1289 1.2 matt producer->txdb_flags |= last_flags;
1290 1.2 matt #if 0
1291 1.2 matt printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first,
1292 1.2 matt producer->txdb_flags, producer->txdb_buflen,
1293 1.2 matt producer->txdb_addrlo, producer->txdb_addrhi);
1294 1.2 matt #endif
1295 1.2 matt bcmeth_txq_desc_presync(sc, txq, start, count);
1296 1.2 matt
1297 1.2 matt /*
1298 1.2 matt * Reduce free count by the number of segments we consumed.
1299 1.2 matt */
1300 1.2 matt txq->txq_free -= map->dm_nsegs;
1301 1.2 matt KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer);
1302 1.2 matt KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0);
1303 1.2 matt KASSERT(producer->txdb_flags & TXDB_FLAG_EF);
1304 1.2 matt
1305 1.2 matt #if 0
1306 1.2 matt printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n",
1307 1.2 matt __func__, m, m->m_pkthdr.len, map->dm_nsegs,
1308 1.2 matt txq->txq_producer - txq->txq_first, producer - txq->txq_first);
1309 1.2 matt #endif
1310 1.2 matt
1311 1.2 matt if (++producer == txq->txq_last)
1312 1.2 matt txq->txq_producer = txq->txq_first;
1313 1.2 matt else
1314 1.2 matt txq->txq_producer = producer;
1315 1.2 matt IF_ENQUEUE(&txq->txq_mbufs, m);
1316 1.2 matt bpf_mtap(&sc->sc_if, m);
1317 1.2 matt
1318 1.2 matt /*
1319 1.2 matt * Let the transmitter know there's more to do
1320 1.2 matt */
1321 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtptr,
1322 1.2 matt txq->txq_descmap->dm_segs[0].ds_addr
1323 1.2 matt + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR));
1324 1.2 matt
1325 1.2 matt return true;
1326 1.2 matt }
1327 1.2 matt
1328 1.2 matt static bool
1329 1.2 matt bcmeth_txq_enqueue(
1330 1.2 matt struct bcmeth_softc *sc,
1331 1.2 matt struct bcmeth_txqueue *txq)
1332 1.2 matt {
1333 1.2 matt for (;;) {
1334 1.2 matt if (IF_QFULL(&txq->txq_mbufs))
1335 1.2 matt return false;
1336 1.2 matt struct mbuf *m = txq->txq_next;
1337 1.2 matt if (m == NULL) {
1338 1.2 matt int s = splnet();
1339 1.2 matt IF_DEQUEUE(&sc->sc_if.if_snd, m);
1340 1.2 matt splx(s);
1341 1.2 matt if (m == NULL)
1342 1.2 matt return true;
1343 1.2 matt M_SETCTX(m, NULL);
1344 1.2 matt } else {
1345 1.2 matt txq->txq_next = NULL;
1346 1.2 matt }
1347 1.2 matt int error = bcmeth_txq_map_load(sc, txq, m);
1348 1.2 matt if (error) {
1349 1.2 matt aprint_error_dev(sc->sc_dev,
1350 1.2 matt "discarded packet due to "
1351 1.2 matt "dmamap load failure: %d\n", error);
1352 1.2 matt m_freem(m);
1353 1.2 matt continue;
1354 1.2 matt }
1355 1.2 matt KASSERT(txq->txq_next == NULL);
1356 1.2 matt if (!bcmeth_txq_produce(sc, txq, m)) {
1357 1.2 matt txq->txq_next = m;
1358 1.2 matt return false;
1359 1.2 matt }
1360 1.2 matt KASSERT(txq->txq_next == NULL);
1361 1.2 matt }
1362 1.2 matt }
1363 1.2 matt
1364 1.2 matt static bool
1365 1.2 matt bcmeth_txq_consume(
1366 1.2 matt struct bcmeth_softc *sc,
1367 1.2 matt struct bcmeth_txqueue *txq)
1368 1.2 matt {
1369 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1370 1.2 matt struct gmac_txdb *consumer = txq->txq_consumer;
1371 1.2 matt size_t txfree = 0;
1372 1.2 matt
1373 1.2 matt #if 0
1374 1.2 matt printf("%s: entry: free=%zu\n", __func__, txq->txq_free);
1375 1.2 matt #endif
1376 1.2 matt
1377 1.2 matt for (;;) {
1378 1.2 matt if (consumer == txq->txq_producer) {
1379 1.2 matt txq->txq_consumer = consumer;
1380 1.2 matt txq->txq_free += txfree;
1381 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1382 1.2 matt #if 0
1383 1.5 matt printf("%s: empty: freed %zu descriptors going from %zu to %zu\n",
1384 1.2 matt __func__, txfree, txq->txq_free - txfree, txq->txq_free);
1385 1.2 matt #endif
1386 1.2 matt KASSERT(txq->txq_lastintr == 0);
1387 1.2 matt KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1);
1388 1.2 matt return true;
1389 1.2 matt }
1390 1.2 matt bcmeth_txq_desc_postsync(sc, txq, consumer, 1);
1391 1.2 matt uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0);
1392 1.2 matt if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) {
1393 1.2 matt txq->txq_consumer = consumer;
1394 1.2 matt txq->txq_free += txfree;
1395 1.2 matt txq->txq_lastintr -= min(txq->txq_lastintr, txfree);
1396 1.2 matt #if 0
1397 1.2 matt printf("%s: freed %zu descriptors\n",
1398 1.2 matt __func__, txfree);
1399 1.2 matt #endif
1400 1.2 matt return bcmeth_txq_fillable_p(sc, txq);
1401 1.2 matt }
1402 1.2 matt
1403 1.2 matt /*
1404 1.2 matt * If this is the last descriptor in the chain, get the
1405 1.2 matt * mbuf, free its dmamap, and free the mbuf chain itself.
1406 1.2 matt */
1407 1.2 matt const uint32_t txdb_flags = consumer->txdb_flags;
1408 1.2 matt if (txdb_flags & TXDB_FLAG_EF) {
1409 1.2 matt struct mbuf *m;
1410 1.2 matt
1411 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1412 1.2 matt KASSERT(m);
1413 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1414 1.2 matt #if 0
1415 1.2 matt printf("%s: mbuf %p: consumed a %u byte packet\n",
1416 1.2 matt __func__, m, m->m_pkthdr.len);
1417 1.2 matt #endif
1418 1.2 matt ifp->if_opackets++;
1419 1.2 matt ifp->if_obytes += m->m_pkthdr.len;
1420 1.2 matt if (m->m_flags & M_MCAST)
1421 1.2 matt ifp->if_omcasts++;
1422 1.2 matt m_freem(m);
1423 1.2 matt }
1424 1.2 matt
1425 1.2 matt /*
1426 1.2 matt * We own this packet again. Clear all flags except wrap.
1427 1.2 matt */
1428 1.2 matt txfree++;
1429 1.2 matt
1430 1.2 matt /*
1431 1.2 matt * Wrap at the last entry!
1432 1.2 matt */
1433 1.2 matt if (txdb_flags & TXDB_FLAG_ET) {
1434 1.2 matt consumer->txdb_flags = TXDB_FLAG_ET;
1435 1.2 matt KASSERT(consumer + 1 == txq->txq_last);
1436 1.2 matt consumer = txq->txq_first;
1437 1.2 matt } else {
1438 1.2 matt consumer->txdb_flags = 0;
1439 1.2 matt consumer++;
1440 1.2 matt KASSERT(consumer < txq->txq_last);
1441 1.2 matt }
1442 1.2 matt }
1443 1.2 matt }
1444 1.2 matt
1445 1.2 matt static void
1446 1.2 matt bcmeth_txq_purge(
1447 1.2 matt struct bcmeth_softc *sc,
1448 1.2 matt struct bcmeth_txqueue *txq)
1449 1.2 matt {
1450 1.2 matt struct mbuf *m;
1451 1.2 matt KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0);
1452 1.2 matt
1453 1.2 matt for (;;) {
1454 1.2 matt IF_DEQUEUE(&txq->txq_mbufs, m);
1455 1.2 matt if (m == NULL)
1456 1.2 matt break;
1457 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1458 1.2 matt m_freem(m);
1459 1.2 matt }
1460 1.2 matt if ((m = txq->txq_next) != NULL) {
1461 1.2 matt txq->txq_next = NULL;
1462 1.2 matt bcmeth_txq_map_unload(sc, txq, m);
1463 1.2 matt m_freem(m);
1464 1.2 matt }
1465 1.2 matt }
1466 1.2 matt
1467 1.2 matt static void
1468 1.2 matt bcmeth_txq_reset(
1469 1.2 matt struct bcmeth_softc *sc,
1470 1.2 matt struct bcmeth_txqueue *txq)
1471 1.2 matt {
1472 1.2 matt /*
1473 1.2 matt * sync all the descriptors
1474 1.2 matt */
1475 1.2 matt bcmeth_txq_desc_postsync(sc, txq, txq->txq_first,
1476 1.2 matt txq->txq_last - txq->txq_first);
1477 1.2 matt
1478 1.2 matt /*
1479 1.2 matt * Make sure we own all descriptors in the ring.
1480 1.2 matt */
1481 1.2 matt struct gmac_txdb *txdb;
1482 1.2 matt for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) {
1483 1.2 matt txdb->txdb_flags = 0;
1484 1.2 matt }
1485 1.2 matt
1486 1.2 matt /*
1487 1.2 matt * Last descriptor has the wrap flag.
1488 1.2 matt */
1489 1.2 matt txdb->txdb_flags = TXDB_FLAG_ET;
1490 1.2 matt
1491 1.2 matt /*
1492 1.2 matt * Reset the producer consumer indexes.
1493 1.2 matt */
1494 1.2 matt txq->txq_consumer = txq->txq_first;
1495 1.2 matt txq->txq_producer = txq->txq_first;
1496 1.2 matt txq->txq_free = txq->txq_last - txq->txq_first - 1;
1497 1.2 matt txq->txq_threshold = txq->txq_free / 2;
1498 1.2 matt txq->txq_lastintr = 0;
1499 1.2 matt
1500 1.2 matt /*
1501 1.2 matt * What do we want to get interrupted on?
1502 1.2 matt */
1503 1.2 matt sc->sc_intmask |= XMTINT_0 | XMTUF;
1504 1.2 matt
1505 1.2 matt /*
1506 1.2 matt * Restart the transmiter at the first descriptor
1507 1.2 matt */
1508 1.2 matt bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo,
1509 1.2 matt txq->txq_descmap->dm_segs->ds_addr);
1510 1.2 matt }
1511 1.2 matt
1512 1.2 matt static void
1513 1.2 matt bcmeth_ifstart(struct ifnet *ifp)
1514 1.2 matt {
1515 1.2 matt struct bcmeth_softc * const sc = ifp->if_softc;
1516 1.2 matt
1517 1.2 matt atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR);
1518 1.2 matt softint_schedule(sc->sc_soft_ih);
1519 1.2 matt }
1520 1.2 matt
1521 1.2 matt int
1522 1.1 matt bcmeth_intr(void *arg)
1523 1.1 matt {
1524 1.1 matt struct bcmeth_softc * const sc = arg;
1525 1.2 matt uint32_t soft_flags = 0;
1526 1.8 matt uint32_t work_flags = 0;
1527 1.1 matt int rv = 0;
1528 1.1 matt
1529 1.1 matt mutex_enter(sc->sc_hwlock);
1530 1.1 matt
1531 1.2 matt sc->sc_ev_intr.ev_count++;
1532 1.2 matt
1533 1.2 matt for (;;) {
1534 1.2 matt uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS);
1535 1.2 matt intstatus &= sc->sc_intmask;
1536 1.2 matt bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */
1537 1.2 matt if (intstatus == 0) {
1538 1.2 matt break;
1539 1.2 matt }
1540 1.2 matt #if 0
1541 1.8 matt aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n",
1542 1.8 matt __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK));
1543 1.2 matt #endif
1544 1.2 matt if (intstatus & RCVINT) {
1545 1.8 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1546 1.2 matt intstatus &= ~RCVINT;
1547 1.2 matt sc->sc_intmask &= ~RCVINT;
1548 1.8 matt
1549 1.8 matt uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0);
1550 1.8 matt uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR);
1551 1.8 matt if (descs < rxq->rxq_consumer - rxq->rxq_first) {
1552 1.8 matt /*
1553 1.8 matt * We wrapped at the end so count how far
1554 1.8 matt * we are from the end.
1555 1.8 matt */
1556 1.8 matt descs += rxq->rxq_last - rxq->rxq_consumer;
1557 1.8 matt } else {
1558 1.8 matt descs -= rxq->rxq_consumer - rxq->rxq_first;
1559 1.8 matt }
1560 1.8 matt /*
1561 1.8 matt * If we "timedout" we can't be hogging so use
1562 1.8 matt * softints. If we exceeded then we might hogging
1563 1.8 matt * so let the workqueue deal with them.
1564 1.8 matt */
1565 1.8 matt const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT);
1566 1.9 matt if (descs < framecount
1567 1.9 matt || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) {
1568 1.8 matt soft_flags |= SOFT_RXINTR;
1569 1.8 matt } else {
1570 1.8 matt work_flags |= WORK_RXINTR;
1571 1.8 matt }
1572 1.2 matt }
1573 1.2 matt
1574 1.2 matt if (intstatus & XMTINT_0) {
1575 1.2 matt intstatus &= ~XMTINT_0;
1576 1.2 matt sc->sc_intmask &= ~XMTINT_0;
1577 1.2 matt soft_flags |= SOFT_TXINTR;
1578 1.2 matt }
1579 1.2 matt
1580 1.2 matt if (intstatus & RCVDESCUF) {
1581 1.2 matt intstatus &= ~RCVDESCUF;
1582 1.2 matt sc->sc_intmask &= ~RCVDESCUF;
1583 1.8 matt work_flags |= WORK_RXUNDERFLOW;
1584 1.2 matt }
1585 1.2 matt
1586 1.2 matt if (intstatus) {
1587 1.2 matt aprint_error_dev(sc->sc_dev, "intr: intstatus=%#x\n",
1588 1.2 matt intstatus);
1589 1.2 matt Debugger();
1590 1.2 matt sc->sc_intmask &= ~intstatus;
1591 1.8 matt work_flags |= WORK_REINIT;
1592 1.2 matt break;
1593 1.2 matt }
1594 1.2 matt }
1595 1.2 matt
1596 1.8 matt if (work_flags | soft_flags) {
1597 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1598 1.8 matt }
1599 1.8 matt
1600 1.8 matt if (work_flags) {
1601 1.8 matt if (sc->sc_work_flags == 0) {
1602 1.8 matt workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL);
1603 1.8 matt }
1604 1.8 matt atomic_or_32(&sc->sc_work_flags, work_flags);
1605 1.8 matt rv = 1;
1606 1.8 matt }
1607 1.8 matt
1608 1.2 matt if (soft_flags) {
1609 1.8 matt if (sc->sc_soft_flags == 0) {
1610 1.8 matt softint_schedule(sc->sc_soft_ih);
1611 1.8 matt }
1612 1.8 matt atomic_or_32(&sc->sc_soft_flags, soft_flags);
1613 1.2 matt rv = 1;
1614 1.2 matt }
1615 1.1 matt
1616 1.1 matt mutex_exit(sc->sc_hwlock);
1617 1.1 matt
1618 1.1 matt return rv;
1619 1.1 matt }
1620 1.2 matt
1621 1.2 matt void
1622 1.2 matt bcmeth_soft_intr(void *arg)
1623 1.2 matt {
1624 1.2 matt struct bcmeth_softc * const sc = arg;
1625 1.2 matt struct ifnet * const ifp = &sc->sc_if;
1626 1.2 matt
1627 1.2 matt mutex_enter(sc->sc_lock);
1628 1.2 matt
1629 1.2 matt u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0);
1630 1.2 matt
1631 1.2 matt sc->sc_ev_soft_intr.ev_count++;
1632 1.2 matt
1633 1.8 matt if ((soft_flags & SOFT_TXINTR)
1634 1.8 matt || bcmeth_txq_active_p(sc, &sc->sc_txq)) {
1635 1.8 matt /*
1636 1.8 matt * Let's do what we came here for. Consume transmitted
1637 1.8 matt * packets off the the transmit ring.
1638 1.8 matt */
1639 1.8 matt if (!bcmeth_txq_consume(sc, &sc->sc_txq)
1640 1.8 matt || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) {
1641 1.8 matt sc->sc_ev_tx_stall.ev_count++;
1642 1.8 matt ifp->if_flags |= IFF_OACTIVE;
1643 1.8 matt } else {
1644 1.8 matt ifp->if_flags &= ~IFF_OACTIVE;
1645 1.8 matt }
1646 1.8 matt sc->sc_intmask |= XMTINT_0;
1647 1.8 matt }
1648 1.8 matt
1649 1.8 matt if (soft_flags & SOFT_RXINTR) {
1650 1.8 matt /*
1651 1.8 matt * Let's consume
1652 1.8 matt */
1653 1.8 matt bcmeth_rxq_consume(sc, &sc->sc_rxq);
1654 1.8 matt sc->sc_intmask |= RCVINT;
1655 1.8 matt }
1656 1.8 matt
1657 1.8 matt if (ifp->if_flags & IFF_RUNNING) {
1658 1.8 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1659 1.8 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1660 1.8 matt }
1661 1.8 matt
1662 1.8 matt mutex_exit(sc->sc_lock);
1663 1.8 matt }
1664 1.8 matt
1665 1.8 matt void
1666 1.8 matt bcmeth_worker(struct work *wk, void *arg)
1667 1.8 matt {
1668 1.8 matt struct bcmeth_softc * const sc = arg;
1669 1.8 matt struct ifnet * const ifp = &sc->sc_if;
1670 1.8 matt
1671 1.8 matt mutex_enter(sc->sc_lock);
1672 1.8 matt
1673 1.8 matt sc->sc_ev_work.ev_count++;
1674 1.8 matt
1675 1.8 matt uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0);
1676 1.8 matt if (work_flags & WORK_REINIT) {
1677 1.2 matt int s = splnet();
1678 1.8 matt sc->sc_soft_flags = 0;
1679 1.2 matt bcmeth_ifinit(ifp);
1680 1.2 matt splx(s);
1681 1.8 matt work_flags &= ~WORK_RXUNDERFLOW;
1682 1.2 matt }
1683 1.2 matt
1684 1.8 matt if (work_flags & WORK_RXUNDERFLOW) {
1685 1.2 matt struct bcmeth_rxqueue * const rxq = &sc->sc_rxq;
1686 1.2 matt size_t threshold = 5 * rxq->rxq_threshold / 4;
1687 1.2 matt if (threshold >= rxq->rxq_last - rxq->rxq_first) {
1688 1.2 matt threshold = rxq->rxq_last - rxq->rxq_first - 1;
1689 1.2 matt } else {
1690 1.2 matt sc->sc_intmask |= RCVDESCUF;
1691 1.2 matt }
1692 1.2 matt aprint_normal_dev(sc->sc_dev,
1693 1.2 matt "increasing receive buffers from %zu to %zu\n",
1694 1.2 matt rxq->rxq_threshold, threshold);
1695 1.2 matt rxq->rxq_threshold = threshold;
1696 1.2 matt }
1697 1.2 matt
1698 1.8 matt if (work_flags & WORK_RXINTR) {
1699 1.2 matt /*
1700 1.2 matt * Let's consume
1701 1.2 matt */
1702 1.2 matt bcmeth_rxq_consume(sc, &sc->sc_rxq);
1703 1.2 matt sc->sc_intmask |= RCVINT;
1704 1.2 matt }
1705 1.2 matt
1706 1.2 matt if (ifp->if_flags & IFF_RUNNING) {
1707 1.2 matt bcmeth_rxq_produce(sc, &sc->sc_rxq);
1708 1.2 matt bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask);
1709 1.2 matt }
1710 1.2 matt
1711 1.2 matt mutex_exit(sc->sc_lock);
1712 1.2 matt }
1713