bcm53xx_eth.c revision 1.13
1 /*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #define _ARM32_BUS_DMA_PRIVATE 31 #define GMAC_PRIVATE 32 33 #include "locators.h" 34 35 #include <sys/cdefs.h> 36 37 __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.13 2012/10/26 05:11:34 matt Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/atomic.h> 41 #include <sys/bus.h> 42 #include <sys/device.h> 43 #include <sys/ioctl.h> 44 #include <sys/intr.h> 45 #include <sys/kmem.h> 46 #include <sys/mutex.h> 47 #include <sys/socket.h> 48 #include <sys/systm.h> 49 #include <sys/workqueue.h> 50 51 #include <net/if.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 55 #include <net/if_dl.h> 56 57 #include <net/bpf.h> 58 59 #include <dev/mii/miivar.h> 60 61 #include <arm/broadcom/bcm53xx_reg.h> 62 #include <arm/broadcom/bcm53xx_var.h> 63 64 #define BCMETH_RCVOFFSET 6 65 #define BCMETH_MAXTXMBUFS 128 66 #define BCMETH_NTXSEGS 30 67 #define BCMETH_MAXRXMBUFS 255 68 #define BCMETH_MINRXMBUFS 64 69 #define BCMETH_NRXSEGS 1 70 #define BCMETH_RINGSIZE PAGE_SIZE 71 72 #define BCMETH_RCVMAGIC 0xfeedface 73 74 static int bcmeth_ccb_match(device_t, cfdata_t, void *); 75 static void bcmeth_ccb_attach(device_t, device_t, void *); 76 77 struct bcmeth_txqueue { 78 bus_dmamap_t txq_descmap; 79 struct gmac_txdb *txq_consumer; 80 struct gmac_txdb *txq_producer; 81 struct gmac_txdb *txq_first; 82 struct gmac_txdb *txq_last; 83 struct ifqueue txq_mbufs; 84 struct mbuf *txq_next; 85 size_t txq_free; 86 size_t txq_threshold; 87 size_t txq_lastintr; 88 bus_size_t txq_reg_xmtaddrlo; 89 bus_size_t txq_reg_xmtptr; 90 bus_size_t txq_reg_xmtctl; 91 bus_size_t txq_reg_xmtsts0; 92 bus_size_t txq_reg_xmtsts1; 93 bus_dma_segment_t txq_descmap_seg; 94 }; 95 96 struct bcmeth_rxqueue { 97 bus_dmamap_t rxq_descmap; 98 struct gmac_rxdb *rxq_consumer; 99 struct gmac_rxdb *rxq_producer; 100 struct gmac_rxdb *rxq_first; 101 struct gmac_rxdb *rxq_last; 102 struct mbuf *rxq_mhead; 103 struct mbuf **rxq_mtail; 104 struct mbuf *rxq_mconsumer; 105 size_t rxq_inuse; 106 size_t rxq_threshold; 107 bus_size_t rxq_reg_rcvaddrlo; 108 bus_size_t rxq_reg_rcvptr; 109 bus_size_t rxq_reg_rcvctl; 110 bus_size_t rxq_reg_rcvsts0; 111 bus_size_t rxq_reg_rcvsts1; 112 bus_dma_segment_t rxq_descmap_seg; 113 }; 114 115 struct bcmeth_mapcache { 116 u_int dmc_nmaps; 117 u_int dmc_maxseg; 118 u_int dmc_maxmaps; 119 u_int dmc_maxmapsize; 120 bus_dmamap_t dmc_maps[0]; 121 }; 122 123 struct bcmeth_softc { 124 device_t sc_dev; 125 bus_space_tag_t sc_bst; 126 bus_space_handle_t sc_bsh; 127 bus_dma_tag_t sc_dmat; 128 kmutex_t *sc_lock; 129 kmutex_t *sc_hwlock; 130 struct ethercom sc_ec; 131 #define sc_if sc_ec.ec_if 132 struct ifmedia sc_media; 133 void *sc_soft_ih; 134 void *sc_ih; 135 136 struct bcmeth_rxqueue sc_rxq; 137 struct bcmeth_txqueue sc_txq; 138 139 uint32_t sc_maxfrm; 140 uint32_t sc_cmdcfg; 141 uint32_t sc_intmask; 142 uint32_t sc_rcvlazy; 143 volatile uint32_t sc_soft_flags; 144 #define SOFT_RXINTR 0x01 145 #define SOFT_TXINTR 0x02 146 147 struct evcnt sc_ev_intr; 148 struct evcnt sc_ev_soft_intr; 149 struct evcnt sc_ev_work; 150 struct evcnt sc_ev_tx_stall; 151 struct evcnt sc_ev_rx_badmagic_lo; 152 struct evcnt sc_ev_rx_badmagic_hi; 153 154 struct ifqueue sc_rx_bufcache; 155 struct bcmeth_mapcache *sc_rx_mapcache; 156 struct bcmeth_mapcache *sc_tx_mapcache; 157 158 struct workqueue *sc_workq; 159 struct work sc_work; 160 161 volatile uint32_t sc_work_flags; 162 #define WORK_RXINTR 0x01 163 #define WORK_RXUNDERFLOW 0x02 164 #define WORK_REINIT 0x04 165 166 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 167 }; 168 169 static void bcmeth_ifstart(struct ifnet *); 170 static void bcmeth_ifwatchdog(struct ifnet *); 171 static int bcmeth_ifinit(struct ifnet *); 172 static void bcmeth_ifstop(struct ifnet *, int); 173 static int bcmeth_ifioctl(struct ifnet *, u_long, void *); 174 175 static int bcmeth_mapcache_create(struct bcmeth_softc *, 176 struct bcmeth_mapcache **, size_t, size_t, size_t); 177 static void bcmeth_mapcache_destroy(struct bcmeth_softc *, 178 struct bcmeth_mapcache *); 179 static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *, 180 struct bcmeth_mapcache *); 181 static void bcmeth_mapcache_put(struct bcmeth_softc *, 182 struct bcmeth_mapcache *, bus_dmamap_t); 183 184 static int bcmeth_txq_attach(struct bcmeth_softc *, 185 struct bcmeth_txqueue *, u_int); 186 static void bcmeth_txq_purge(struct bcmeth_softc *, 187 struct bcmeth_txqueue *); 188 static void bcmeth_txq_reset(struct bcmeth_softc *, 189 struct bcmeth_txqueue *); 190 static bool bcmeth_txq_consume(struct bcmeth_softc *, 191 struct bcmeth_txqueue *); 192 static bool bcmeth_txq_produce(struct bcmeth_softc *, 193 struct bcmeth_txqueue *, struct mbuf *m); 194 static bool bcmeth_txq_active_p(struct bcmeth_softc *, 195 struct bcmeth_txqueue *); 196 197 static int bcmeth_rxq_attach(struct bcmeth_softc *, 198 struct bcmeth_rxqueue *, u_int); 199 static bool bcmeth_rxq_produce(struct bcmeth_softc *, 200 struct bcmeth_rxqueue *); 201 static void bcmeth_rxq_purge(struct bcmeth_softc *, 202 struct bcmeth_rxqueue *, bool); 203 static void bcmeth_rxq_reset(struct bcmeth_softc *, 204 struct bcmeth_rxqueue *); 205 206 static int bcmeth_intr(void *); 207 static void bcmeth_soft_intr(void *); 208 static void bcmeth_worker(struct work *, void *); 209 210 static int bcmeth_mediachange(struct ifnet *); 211 static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *); 212 213 static inline uint32_t 214 bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o) 215 { 216 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 217 } 218 219 static inline void 220 bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v) 221 { 222 bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 223 } 224 225 CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc), 226 bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL); 227 228 static int 229 bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux) 230 { 231 struct bcmccb_attach_args * const ccbaa = aux; 232 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 233 234 if (strcmp(cf->cf_name, loc->loc_name)) 235 return 0; 236 237 #ifdef DIAGNOSTIC 238 const int port = cf->cf_loc[BCMCCBCF_PORT]; 239 #endif 240 KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port); 241 242 return 1; 243 } 244 245 static void 246 bcmeth_ccb_attach(device_t parent, device_t self, void *aux) 247 { 248 struct bcmeth_softc * const sc = device_private(self); 249 struct ethercom * const ec = &sc->sc_ec; 250 struct ifnet * const ifp = &ec->ec_if; 251 struct bcmccb_attach_args * const ccbaa = aux; 252 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 253 const char * const xname = device_xname(self); 254 prop_dictionary_t dict = device_properties(self); 255 int error; 256 257 sc->sc_bst = ccbaa->ccbaa_ccb_bst; 258 sc->sc_dmat = ccbaa->ccbaa_dmat; 259 bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh, 260 loc->loc_offset, loc->loc_size, &sc->sc_bsh); 261 262 /* 263 * We need to use the coherent dma tag for the GMAC. 264 */ 265 sc->sc_dmat = &bcm53xx_coherent_dma_tag; 266 267 prop_data_t eaprop = prop_dictionary_get(dict, "mac-address"); 268 if (eaprop == NULL) { 269 uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0); 270 uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1); 271 if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) { 272 aprint_error(": mac-address property is missing\n"); 273 return; 274 } 275 sc->sc_enaddr[0] = (mac0 >> 0) & 0xff; 276 sc->sc_enaddr[1] = (mac0 >> 8) & 0xff; 277 sc->sc_enaddr[2] = (mac0 >> 16) & 0xff; 278 sc->sc_enaddr[3] = (mac0 >> 24) & 0xff; 279 sc->sc_enaddr[4] = (mac1 >> 0) & 0xff; 280 sc->sc_enaddr[5] = (mac1 >> 8) & 0xff; 281 } else { 282 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA); 283 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN); 284 memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop), 285 ETHER_ADDR_LEN); 286 } 287 sc->sc_dev = self; 288 sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); 289 sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM); 290 291 bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts 292 293 aprint_naive("\n"); 294 aprint_normal(": Gigabit Ethernet Controller\n"); 295 296 error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0); 297 if (error) { 298 aprint_error(": failed to init rxq: %d\n", error); 299 return; 300 } 301 302 error = bcmeth_txq_attach(sc, &sc->sc_txq, 0); 303 if (error) { 304 aprint_error(": failed to init txq: %d\n", error); 305 return; 306 } 307 308 error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache, 309 BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS); 310 if (error) { 311 aprint_error(": failed to allocate rx dmamaps: %d\n", error); 312 return; 313 } 314 315 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 316 BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS); 317 if (error) { 318 aprint_error(": failed to allocate tx dmamaps: %d\n", error); 319 return; 320 } 321 322 error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc, 323 (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU); 324 if (error) { 325 aprint_error(": failed to create workqueue: %d\n", error); 326 return; 327 } 328 329 sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET, 330 bcmeth_soft_intr, sc); 331 332 sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL, 333 bcmeth_intr, sc); 334 335 if (sc->sc_ih == NULL) { 336 aprint_error_dev(self, "failed to establish interrupt %d\n", 337 loc->loc_intrs[0]); 338 } else { 339 aprint_normal_dev(self, "interrupting on irq %d\n", 340 loc->loc_intrs[0]); 341 } 342 343 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 344 ether_sprintf(sc->sc_enaddr)); 345 346 /* 347 * Since each port in plugged into the switch/flow-accelerator, 348 * we hard code at Gige Full-Duplex with Flow Control enabled. 349 */ 350 int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX; 351 //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE; 352 ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange, 353 bcmeth_mediastatus); 354 ifmedia_add(&sc->sc_media, ifmedia, 0, NULL); 355 ifmedia_set(&sc->sc_media, ifmedia); 356 357 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU; 358 359 strlcpy(ifp->if_xname, xname, IFNAMSIZ); 360 ifp->if_softc = sc; 361 ifp->if_baudrate = IF_Mbps(1000); 362 ifp->if_capabilities = 0; 363 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 364 ifp->if_ioctl = bcmeth_ifioctl; 365 ifp->if_start = bcmeth_ifstart; 366 ifp->if_watchdog = bcmeth_ifwatchdog; 367 ifp->if_init = bcmeth_ifinit; 368 ifp->if_stop = bcmeth_ifstop; 369 IFQ_SET_READY(&ifp->if_snd); 370 371 bcmeth_ifstop(ifp, true); 372 373 /* 374 * Attach the interface. 375 */ 376 if_attach(ifp); 377 ether_ifattach(ifp, sc->sc_enaddr); 378 379 evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, 380 NULL, xname, "intr"); 381 evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR, 382 NULL, xname, "soft intr"); 383 evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC, 384 NULL, xname, "work items"); 385 evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC, 386 NULL, xname, "tx stalls"); 387 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC, 388 NULL, xname, "rx badmagic lo"); 389 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC, 390 NULL, xname, "rx badmagic hi"); 391 } 392 393 static int 394 bcmeth_mediachange(struct ifnet *ifp) 395 { 396 //struct bcmeth_softc * const sc = ifp->if_softc; 397 return 0; 398 } 399 400 static void 401 bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm) 402 { 403 //struct bcmeth_softc * const sc = ifp->if_softc; 404 405 ifm->ifm_status = IFM_AVALID | IFM_ACTIVE; 406 ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T; 407 } 408 409 static uint64_t 410 bcmeth_macaddr_create(const uint8_t *enaddr) 411 { 412 return (enaddr[3] << 0) // UNIMAC_MAC_0 413 | (enaddr[2] << 8) // UNIMAC_MAC_0 414 | (enaddr[1] << 16) // UNIMAC_MAC_0 415 | (enaddr[0] << 24) // UNIMAC_MAC_0 416 | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1 417 | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1 418 } 419 420 static int 421 bcmeth_ifinit(struct ifnet *ifp) 422 { 423 struct bcmeth_softc * const sc = ifp->if_softc; 424 int error = 0; 425 426 sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES); 427 if (ifp->if_mtu > ETHERMTU_JUMBO) 428 return error; 429 430 KASSERT(ifp->if_flags & IFF_UP); 431 432 /* 433 * Stop the interface 434 */ 435 bcmeth_ifstop(ifp, 0); 436 437 /* 438 * If our frame size has changed (or it's our first time through) 439 * destroy the existing transmit mapcache. 440 */ 441 if (sc->sc_tx_mapcache != NULL 442 && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) { 443 bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache); 444 sc->sc_tx_mapcache = NULL; 445 } 446 447 if (sc->sc_tx_mapcache == NULL) { 448 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 449 BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS); 450 if (error) 451 return error; 452 } 453 454 sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE 455 | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED) 456 | RX_ENA | TX_ENA; 457 458 if (ifp->if_flags & IFF_PROMISC) { 459 sc->sc_cmdcfg |= PROMISC_EN; 460 } else { 461 sc->sc_cmdcfg &= ~PROMISC_EN; 462 } 463 464 const uint64_t macstnaddr = 465 bcmeth_macaddr_create(CLLADDR(ifp->if_sadl)); 466 467 sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR; 468 469 /* 5. Load RCVADDR_LO with new pointer */ 470 bcmeth_rxq_reset(sc, &sc->sc_rxq); 471 472 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 473 __SHIFTIN(BCMETH_RCVOFFSET, RCVCTL_RCVOFFSET) 474 | RCVCTL_PARITY_DIS 475 | RCVCTL_OFLOW_CONTINUE 476 | __SHIFTIN(4, RCVCTL_BURSTLEN)); 477 478 /* 6. Load XMTADDR_LO with new pointer */ 479 bcmeth_txq_reset(sc, &sc->sc_txq); 480 481 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX 482 | XMTCTL_PARITY_DIS 483 | __SHIFTIN(4, XMTCTL_BURSTLEN)); 484 485 /* 7. Setup other UNIMAC registers */ 486 bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm); 487 bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0)); 488 bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32)); 489 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg); 490 491 uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); 492 devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 493 devctl &= ~FLOW_CTRL_MODE; 494 devctl &= ~MIB_RD_RESET_EN; 495 devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 496 devctl &= ~CPU_FLOW_CTRL_ON; 497 bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 498 499 /* Setup lazy receive (at most 1ms). */ 500 sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT) 501 | __SHIFTIN(125000000 / 1000, INTRCVLAZY_TIMEOUT); 502 bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy); 503 504 /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */ 505 sc->sc_intmask |= XMTINT_0|XMTUF; 506 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, 507 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE); 508 509 510 /* 12. Enable receive queues in RQUEUE, */ 511 sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF; 512 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 513 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE); 514 515 bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */ 516 517 #if 0 518 aprint_normal_dev(sc->sc_dev, 519 "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 520 devctl, sc->sc_cmdcfg, 521 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl), 522 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl)); 523 #endif 524 525 sc->sc_soft_flags = 0; 526 527 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 528 529 ifp->if_flags |= IFF_RUNNING; 530 531 return error; 532 } 533 534 static void 535 bcmeth_ifstop(struct ifnet *ifp, int disable) 536 { 537 struct bcmeth_softc * const sc = ifp->if_softc; 538 struct bcmeth_txqueue * const txq = &sc->sc_txq; 539 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 540 541 KASSERT(!cpu_intr_p()); 542 543 sc->sc_soft_flags = 0; 544 545 /* Disable Rx processing */ 546 bcmeth_write_4(sc, rxq->rxq_reg_rcvctl, 547 bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE); 548 549 /* Disable Tx processing */ 550 bcmeth_write_4(sc, txq->txq_reg_xmtctl, 551 bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE); 552 553 /* Disable all interrupts */ 554 bcmeth_write_4(sc, GMAC_INTMASK, 0); 555 556 for (;;) { 557 uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 558 uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 559 if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS 560 && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS) 561 break; 562 delay(50); 563 } 564 /* 565 * Now reset the controller. 566 * 567 * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register 568 * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register 569 */ 570 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET); 571 bcmeth_write_4(sc, GMAC_INTSTATUS, ~0); 572 sc->sc_intmask = 0; 573 ifp->if_flags &= ~IFF_RUNNING; 574 575 /* 576 * Let's consume any remaining transmitted packets. And if we are 577 * disabling the interface, purge ourselves of any untransmitted 578 * packets. But don't consume any received packets, just drop them. 579 * If we aren't disabling the interface, save the mbufs in the 580 * receive queue for reuse. 581 */ 582 bcmeth_rxq_purge(sc, &sc->sc_rxq, disable); 583 bcmeth_txq_consume(sc, &sc->sc_txq); 584 if (disable) { 585 bcmeth_txq_purge(sc, &sc->sc_txq); 586 IF_PURGE(&ifp->if_snd); 587 } 588 589 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0); 590 } 591 592 static void 593 bcmeth_ifwatchdog(struct ifnet *ifp) 594 { 595 } 596 597 static int 598 bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 599 { 600 struct bcmeth_softc *sc = ifp->if_softc; 601 struct ifreq * const ifr = data; 602 const int s = splnet(); 603 int error; 604 605 switch (cmd) { 606 case SIOCSIFMEDIA: 607 case SIOCGIFMEDIA: 608 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 609 break; 610 611 default: 612 error = ether_ioctl(ifp, cmd, data); 613 if (error != ENETRESET) 614 break; 615 616 if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) { 617 error = 0; 618 break; 619 } 620 error = bcmeth_ifinit(ifp); 621 break; 622 } 623 624 splx(s); 625 return error; 626 } 627 628 static void 629 bcmeth_rxq_desc_presync( 630 struct bcmeth_softc *sc, 631 struct bcmeth_rxqueue *rxq, 632 struct gmac_rxdb *rxdb, 633 size_t count) 634 { 635 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 636 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 637 BUS_DMASYNC_PREWRITE); 638 } 639 640 static void 641 bcmeth_rxq_desc_postsync( 642 struct bcmeth_softc *sc, 643 struct bcmeth_rxqueue *rxq, 644 struct gmac_rxdb *rxdb, 645 size_t count) 646 { 647 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 648 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 649 BUS_DMASYNC_POSTWRITE); 650 } 651 652 static void 653 bcmeth_txq_desc_presync( 654 struct bcmeth_softc *sc, 655 struct bcmeth_txqueue *txq, 656 struct gmac_txdb *txdb, 657 size_t count) 658 { 659 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 660 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 661 BUS_DMASYNC_PREWRITE); 662 } 663 664 static void 665 bcmeth_txq_desc_postsync( 666 struct bcmeth_softc *sc, 667 struct bcmeth_txqueue *txq, 668 struct gmac_txdb *txdb, 669 size_t count) 670 { 671 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 672 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 673 BUS_DMASYNC_POSTWRITE); 674 } 675 676 static bus_dmamap_t 677 bcmeth_mapcache_get( 678 struct bcmeth_softc *sc, 679 struct bcmeth_mapcache *dmc) 680 { 681 KASSERT(dmc->dmc_nmaps > 0); 682 KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL); 683 return dmc->dmc_maps[--dmc->dmc_nmaps]; 684 } 685 686 static void 687 bcmeth_mapcache_put( 688 struct bcmeth_softc *sc, 689 struct bcmeth_mapcache *dmc, 690 bus_dmamap_t map) 691 { 692 KASSERT(map != NULL); 693 KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps); 694 dmc->dmc_maps[dmc->dmc_nmaps++] = map; 695 } 696 697 static void 698 bcmeth_mapcache_destroy( 699 struct bcmeth_softc *sc, 700 struct bcmeth_mapcache *dmc) 701 { 702 const size_t dmc_size = 703 offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]); 704 705 for (u_int i = 0; i < dmc->dmc_maxmaps; i++) { 706 bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]); 707 } 708 kmem_intr_free(dmc, dmc_size); 709 } 710 711 static int 712 bcmeth_mapcache_create( 713 struct bcmeth_softc *sc, 714 struct bcmeth_mapcache **dmc_p, 715 size_t maxmaps, 716 size_t maxmapsize, 717 size_t maxseg) 718 { 719 const size_t dmc_size = 720 offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]); 721 struct bcmeth_mapcache * const dmc = 722 kmem_intr_zalloc(dmc_size, KM_NOSLEEP); 723 724 dmc->dmc_maxmaps = maxmaps; 725 dmc->dmc_nmaps = maxmaps; 726 dmc->dmc_maxmapsize = maxmapsize; 727 dmc->dmc_maxseg = maxseg; 728 729 for (u_int i = 0; i < maxmaps; i++) { 730 int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize, 731 dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0, 732 BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]); 733 if (error) { 734 aprint_error_dev(sc->sc_dev, 735 "failed to creat dma map cache " 736 "entry %u of %zu: %d\n", 737 i, maxmaps, error); 738 while (i-- > 0) { 739 bus_dmamap_destroy(sc->sc_dmat, 740 dmc->dmc_maps[i]); 741 } 742 kmem_intr_free(dmc, dmc_size); 743 return error; 744 } 745 KASSERT(dmc->dmc_maps[i] != NULL); 746 } 747 748 *dmc_p = dmc; 749 750 return 0; 751 } 752 753 #if 0 754 static void 755 bcmeth_dmamem_free( 756 bus_dma_tag_t dmat, 757 size_t map_size, 758 bus_dma_segment_t *seg, 759 bus_dmamap_t map, 760 void *kvap) 761 { 762 bus_dmamap_destroy(dmat, map); 763 bus_dmamem_unmap(dmat, kvap, map_size); 764 bus_dmamem_free(dmat, seg, 1); 765 } 766 #endif 767 768 static int 769 bcmeth_dmamem_alloc( 770 bus_dma_tag_t dmat, 771 size_t map_size, 772 bus_dma_segment_t *seg, 773 bus_dmamap_t *map, 774 void **kvap) 775 { 776 int error; 777 int nseg; 778 779 *kvap = NULL; 780 *map = NULL; 781 782 error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0, 783 seg, 1, &nseg, 0); 784 if (error) 785 return error; 786 787 KASSERT(nseg == 1); 788 789 error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0); 790 if (error == 0) { 791 error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0, 792 map); 793 if (error == 0) { 794 error = bus_dmamap_load(dmat, *map, *kvap, map_size, 795 NULL, 0); 796 if (error == 0) 797 return 0; 798 bus_dmamap_destroy(dmat, *map); 799 *map = NULL; 800 } 801 bus_dmamem_unmap(dmat, *kvap, map_size); 802 *kvap = NULL; 803 } 804 bus_dmamem_free(dmat, seg, nseg); 805 return 0; 806 } 807 808 static struct mbuf * 809 bcmeth_rx_buf_alloc( 810 struct bcmeth_softc *sc) 811 { 812 struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA); 813 if (m == NULL) { 814 printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr"); 815 return NULL; 816 } 817 MCLGET(m, M_DONTWAIT); 818 if ((m->m_flags & M_EXT) == 0) { 819 printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET"); 820 m_freem(m); 821 return NULL; 822 } 823 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 824 825 bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache); 826 if (map == NULL) { 827 printf("%s:%d: %s\n", __func__, __LINE__, "map get"); 828 m_freem(m); 829 return NULL; 830 } 831 M_SETCTX(m, map); 832 m->m_len = m->m_pkthdr.len = MCLBYTES; 833 int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 834 BUS_DMA_READ|BUS_DMA_NOWAIT); 835 if (error) { 836 aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n", 837 error); 838 M_SETCTX(m, NULL); 839 m_freem(m); 840 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 841 return NULL; 842 } 843 KASSERT(((map->_dm_flags ^ sc->sc_dmat->_ranges[0].dr_flags) & _BUS_DMAMAP_COHERENT) == 0); 844 KASSERT(map->dm_mapsize == MCLBYTES); 845 *mtod(m, uint32_t *) = BCMETH_RCVMAGIC; 846 bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t), 847 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 848 849 bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t), 850 map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD); 851 852 return m; 853 } 854 855 static void 856 bcmeth_rx_map_unload( 857 struct bcmeth_softc *sc, 858 struct mbuf *m) 859 { 860 KASSERT(m); 861 for (; m != NULL; m = m->m_next) { 862 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 863 KASSERT(map); 864 KASSERT(map->dm_mapsize == MCLBYTES); 865 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len, 866 BUS_DMASYNC_POSTREAD); 867 bus_dmamap_unload(sc->sc_dmat, map); 868 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 869 M_SETCTX(m, NULL); 870 } 871 } 872 873 static bool 874 bcmeth_rxq_produce( 875 struct bcmeth_softc *sc, 876 struct bcmeth_rxqueue *rxq) 877 { 878 struct gmac_rxdb *producer = rxq->rxq_producer; 879 bool produced = false; 880 881 while (rxq->rxq_inuse < rxq->rxq_threshold) { 882 struct mbuf *m; 883 IF_DEQUEUE(&sc->sc_rx_bufcache, m); 884 if (m == NULL) { 885 m = bcmeth_rx_buf_alloc(sc); 886 if (m == NULL) { 887 printf("%s: bcmeth_rx_buf_alloc failed\n", __func__); 888 break; 889 } 890 } 891 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 892 KASSERT(map); 893 894 producer->rxdb_buflen = MCLBYTES; 895 producer->rxdb_addrlo = map->dm_segs[0].ds_addr; 896 producer->rxdb_flags &= RXDB_FLAG_ET; 897 *rxq->rxq_mtail = m; 898 rxq->rxq_mtail = &m->m_next; 899 m->m_len = MCLBYTES; 900 m->m_next = NULL; 901 rxq->rxq_inuse++; 902 if (++producer == rxq->rxq_last) { 903 membar_producer(); 904 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 905 rxq->rxq_last - rxq->rxq_producer); 906 producer = rxq->rxq_producer = rxq->rxq_first; 907 } 908 produced = true; 909 } 910 if (produced) { 911 membar_producer(); 912 if (producer != rxq->rxq_producer) { 913 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 914 producer - rxq->rxq_producer); 915 rxq->rxq_producer = producer; 916 } 917 bcmeth_write_4(sc, rxq->rxq_reg_rcvptr, 918 rxq->rxq_descmap->dm_segs[0].ds_addr 919 + ((uintptr_t)producer & RCVPTR)); 920 } 921 return true; 922 } 923 924 static void 925 bcmeth_rx_input( 926 struct bcmeth_softc *sc, 927 struct mbuf *m, 928 uint32_t rxdb_flags) 929 { 930 struct ifnet * const ifp = &sc->sc_if; 931 932 bcmeth_rx_map_unload(sc, m); 933 934 m_adj(m, BCMETH_RCVOFFSET); 935 936 switch (__SHIFTOUT(rxdb_flags, RXSTS_PKTTYPE)) { 937 case RXSTS_PKTTYPE_UC: 938 break; 939 case RXSTS_PKTTYPE_MC: 940 m->m_flags |= M_MCAST; 941 break; 942 case RXSTS_PKTTYPE_BC: 943 m->m_flags |= M_BCAST|M_MCAST; 944 break; 945 default: 946 if (sc->sc_cmdcfg & PROMISC_EN) 947 m->m_flags |= M_PROMISC; 948 break; 949 } 950 m->m_pkthdr.rcvif = ifp; 951 952 ifp->if_ipackets++; 953 ifp->if_ibytes += m->m_pkthdr.len; 954 955 /* 956 * Let's give it to the network subsystm to deal with. 957 */ 958 int s = splnet(); 959 bpf_mtap(ifp, m); 960 (*ifp->if_input)(ifp, m); 961 splx(s); 962 } 963 964 static void 965 bcmeth_rxq_consume( 966 struct bcmeth_softc *sc, 967 struct bcmeth_rxqueue *rxq) 968 { 969 struct ifnet * const ifp = &sc->sc_if; 970 struct gmac_rxdb *consumer = rxq->rxq_consumer; 971 size_t rxconsumed = 0; 972 973 for (;;) { 974 if (consumer == rxq->rxq_producer) { 975 rxq->rxq_consumer = consumer; 976 rxq->rxq_inuse -= rxconsumed; 977 KASSERT(rxq->rxq_inuse == 0); 978 return; 979 } 980 981 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 982 uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 983 if (consumer == rxq->rxq_first + currdscr) { 984 rxq->rxq_consumer = consumer; 985 rxq->rxq_inuse -= rxconsumed; 986 return; 987 } 988 bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1); 989 990 /* 991 * We own this packet again. Copy the rxsts word from it. 992 */ 993 rxconsumed++; 994 uint32_t rxsts; 995 KASSERT(rxq->rxq_mhead != NULL); 996 bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t); 997 bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align, 998 BUS_DMASYNC_POSTREAD); 999 memcpy(&rxsts, rxq->rxq_mhead->m_data, 4); 1000 #if 0 1001 KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd", 1002 currdscr, consumer - rxq->rxq_first); 1003 #endif 1004 1005 /* 1006 * Get the count of descriptors. Fetch the correct number 1007 * of mbufs. 1008 */ 1009 size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1; 1010 struct mbuf *m = rxq->rxq_mhead; 1011 struct mbuf *m_last = m; 1012 for (size_t i = 1; i < desc_count; i++) { 1013 if (++consumer == rxq->rxq_last) { 1014 consumer = rxq->rxq_first; 1015 } 1016 KASSERTMSG(consumer != rxq->rxq_first + currdscr, 1017 "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd", 1018 i, rxsts, desc_count, currdscr, 1019 consumer - rxq->rxq_first); 1020 m_last = m_last->m_next; 1021 } 1022 1023 /* 1024 * Now remove it/them from the list of enqueued mbufs. 1025 */ 1026 if ((rxq->rxq_mhead = m_last->m_next) == NULL) 1027 rxq->rxq_mtail = &rxq->rxq_mhead; 1028 m_last->m_next = NULL; 1029 1030 if (rxsts == BCMETH_RCVMAGIC) { 1031 ifp->if_ierrors++; 1032 if ((m->m_ext.ext_paddr >> 28) == 8) { 1033 sc->sc_ev_rx_badmagic_lo.ev_count++; 1034 } else { 1035 sc->sc_ev_rx_badmagic_hi.ev_count++; 1036 } 1037 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1038 } else if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) { 1039 aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n", 1040 consumer - rxq->rxq_first, desc_count, rxsts); 1041 /* 1042 * We encountered an error, take the mbufs and add them 1043 * to the rx bufcache so we can quickly reuse them. 1044 */ 1045 ifp->if_ierrors++; 1046 do { 1047 struct mbuf *m0 = m->m_next; 1048 m->m_next = NULL; 1049 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1050 m = m0; 1051 } while (m); 1052 } else { 1053 uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN); 1054 framelen += BCMETH_RCVOFFSET; 1055 m->m_pkthdr.len = framelen; 1056 if (desc_count == 1) { 1057 KASSERT(framelen <= MCLBYTES); 1058 m->m_len = framelen; 1059 } else { 1060 m_last->m_len = framelen & (MCLBYTES - 1); 1061 } 1062 bcmeth_rx_input(sc, m, rxsts); 1063 } 1064 1065 /* 1066 * Wrap at the last entry! 1067 */ 1068 if (++consumer == rxq->rxq_last) { 1069 KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET); 1070 consumer = rxq->rxq_first; 1071 } 1072 } 1073 } 1074 1075 static void 1076 bcmeth_rxq_purge( 1077 struct bcmeth_softc *sc, 1078 struct bcmeth_rxqueue *rxq, 1079 bool discard) 1080 { 1081 struct mbuf *m; 1082 1083 if ((m = rxq->rxq_mhead) != NULL) { 1084 if (discard) { 1085 bcmeth_rx_map_unload(sc, m); 1086 m_freem(m); 1087 } else { 1088 while (m != NULL) { 1089 struct mbuf *m0 = m->m_next; 1090 m->m_next = NULL; 1091 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1092 m = m0; 1093 } 1094 } 1095 1096 } 1097 1098 rxq->rxq_mhead = NULL; 1099 rxq->rxq_mtail = &rxq->rxq_mhead; 1100 rxq->rxq_inuse = 0; 1101 } 1102 1103 static void 1104 bcmeth_rxq_reset( 1105 struct bcmeth_softc *sc, 1106 struct bcmeth_rxqueue *rxq) 1107 { 1108 /* 1109 * sync all the descriptors 1110 */ 1111 bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first, 1112 rxq->rxq_last - rxq->rxq_first); 1113 1114 /* 1115 * Make sure we own all descriptors in the ring. 1116 */ 1117 struct gmac_rxdb *rxdb; 1118 for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) { 1119 rxdb->rxdb_flags = RXDB_FLAG_IC; 1120 } 1121 1122 /* 1123 * Last descriptor has the wrap flag. 1124 */ 1125 rxdb->rxdb_flags = RXDB_FLAG_ET|RXDB_FLAG_IC; 1126 1127 /* 1128 * Reset the producer consumer indexes. 1129 */ 1130 rxq->rxq_consumer = rxq->rxq_first; 1131 rxq->rxq_producer = rxq->rxq_first; 1132 rxq->rxq_inuse = 0; 1133 if (rxq->rxq_threshold < BCMETH_MINRXMBUFS) 1134 rxq->rxq_threshold = BCMETH_MINRXMBUFS; 1135 1136 sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF; 1137 1138 /* 1139 * Restart the receiver at the first descriptor 1140 */ 1141 bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo, 1142 rxq->rxq_descmap->dm_segs[0].ds_addr); 1143 } 1144 1145 static int 1146 bcmeth_rxq_attach( 1147 struct bcmeth_softc *sc, 1148 struct bcmeth_rxqueue *rxq, 1149 u_int qno) 1150 { 1151 size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]); 1152 int error; 1153 void *descs; 1154 1155 KASSERT(desc_count == 256 || desc_count == 512); 1156 1157 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1158 &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs); 1159 if (error) 1160 return error; 1161 1162 memset(descs, 0, BCMETH_RINGSIZE); 1163 rxq->rxq_first = descs; 1164 rxq->rxq_last = rxq->rxq_first + desc_count; 1165 rxq->rxq_consumer = descs; 1166 rxq->rxq_producer = descs; 1167 1168 bcmeth_rxq_purge(sc, rxq, true); 1169 bcmeth_rxq_reset(sc, rxq); 1170 1171 rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW; 1172 rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL; 1173 rxq->rxq_reg_rcvptr = GMAC_RCVPTR; 1174 rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0; 1175 rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1; 1176 1177 return 0; 1178 } 1179 1180 static bool 1181 bcmeth_txq_active_p( 1182 struct bcmeth_softc * const sc, 1183 struct bcmeth_txqueue *txq) 1184 { 1185 return !IF_IS_EMPTY(&txq->txq_mbufs); 1186 } 1187 1188 static bool 1189 bcmeth_txq_fillable_p( 1190 struct bcmeth_softc * const sc, 1191 struct bcmeth_txqueue *txq) 1192 { 1193 return txq->txq_free >= txq->txq_threshold; 1194 } 1195 1196 static int 1197 bcmeth_txq_attach( 1198 struct bcmeth_softc *sc, 1199 struct bcmeth_txqueue *txq, 1200 u_int qno) 1201 { 1202 size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]); 1203 int error; 1204 void *descs; 1205 1206 KASSERT(desc_count == 256 || desc_count == 512); 1207 1208 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1209 &txq->txq_descmap_seg, &txq->txq_descmap, &descs); 1210 if (error) 1211 return error; 1212 1213 memset(descs, 0, BCMETH_RINGSIZE); 1214 txq->txq_first = descs; 1215 txq->txq_last = txq->txq_first + desc_count; 1216 txq->txq_consumer = descs; 1217 txq->txq_producer = descs; 1218 1219 IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS); 1220 1221 txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW; 1222 txq->txq_reg_xmtctl = GMAC_XMTCONTROL; 1223 txq->txq_reg_xmtptr = GMAC_XMTPTR; 1224 txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0; 1225 txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1; 1226 1227 bcmeth_txq_reset(sc, txq); 1228 1229 return 0; 1230 } 1231 1232 static int 1233 bcmeth_txq_map_load( 1234 struct bcmeth_softc *sc, 1235 struct bcmeth_txqueue *txq, 1236 struct mbuf *m) 1237 { 1238 bus_dmamap_t map; 1239 int error; 1240 1241 map = M_GETCTX(m, bus_dmamap_t); 1242 if (map != NULL) 1243 return 0; 1244 1245 map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache); 1246 if (map == NULL) 1247 return ENOMEM; 1248 1249 error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 1250 BUS_DMA_WRITE | BUS_DMA_NOWAIT); 1251 if (error) 1252 return error; 1253 1254 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len, 1255 BUS_DMASYNC_PREWRITE); 1256 M_SETCTX(m, map); 1257 return 0; 1258 } 1259 1260 static void 1261 bcmeth_txq_map_unload( 1262 struct bcmeth_softc *sc, 1263 struct bcmeth_txqueue *txq, 1264 struct mbuf *m) 1265 { 1266 KASSERT(m); 1267 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1268 bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 1269 BUS_DMASYNC_POSTWRITE); 1270 bus_dmamap_unload(sc->sc_dmat, map); 1271 bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map); 1272 } 1273 1274 static bool 1275 bcmeth_txq_produce( 1276 struct bcmeth_softc *sc, 1277 struct bcmeth_txqueue *txq, 1278 struct mbuf *m) 1279 { 1280 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1281 1282 if (map->dm_nsegs > txq->txq_free) 1283 return false; 1284 1285 /* 1286 * TCP Offload flag must be set in the first descriptor. 1287 */ 1288 struct gmac_txdb *producer = txq->txq_producer; 1289 uint32_t first_flags = TXDB_FLAG_SF; 1290 uint32_t last_flags = TXDB_FLAG_EF; 1291 1292 /* 1293 * If we've produced enough descriptors without consuming any 1294 * we need to ask for an interrupt to reclaim some. 1295 */ 1296 txq->txq_lastintr += map->dm_nsegs; 1297 if (txq->txq_lastintr >= txq->txq_threshold 1298 || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) { 1299 txq->txq_lastintr = 0; 1300 last_flags |= TXDB_FLAG_IC; 1301 } 1302 1303 KASSERT(producer != txq->txq_last); 1304 1305 struct gmac_txdb *start = producer; 1306 size_t count = map->dm_nsegs; 1307 producer->txdb_flags |= first_flags; 1308 producer->txdb_addrlo = map->dm_segs[0].ds_addr; 1309 producer->txdb_buflen = map->dm_segs[0].ds_len; 1310 for (u_int i = 1; i < map->dm_nsegs; i++) { 1311 #if 0 1312 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1313 producer->txdb_flags, producer->txdb_buflen, 1314 producer->txdb_addrlo, producer->txdb_addrhi); 1315 #endif 1316 if (__predict_false(++producer == txq->txq_last)) { 1317 bcmeth_txq_desc_presync(sc, txq, start, 1318 txq->txq_last - start); 1319 count -= txq->txq_last - start; 1320 producer = txq->txq_first; 1321 start = txq->txq_first; 1322 } 1323 producer->txdb_addrlo = map->dm_segs[i].ds_addr; 1324 producer->txdb_buflen = map->dm_segs[i].ds_len; 1325 } 1326 producer->txdb_flags |= last_flags; 1327 #if 0 1328 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1329 producer->txdb_flags, producer->txdb_buflen, 1330 producer->txdb_addrlo, producer->txdb_addrhi); 1331 #endif 1332 if (count) 1333 bcmeth_txq_desc_presync(sc, txq, start, count); 1334 1335 /* 1336 * Reduce free count by the number of segments we consumed. 1337 */ 1338 txq->txq_free -= map->dm_nsegs; 1339 KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer); 1340 KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0); 1341 KASSERT(producer->txdb_flags & TXDB_FLAG_EF); 1342 1343 #if 0 1344 printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n", 1345 __func__, m, m->m_pkthdr.len, map->dm_nsegs, 1346 txq->txq_producer - txq->txq_first, producer - txq->txq_first); 1347 #endif 1348 1349 if (producer + 1 == txq->txq_last) 1350 txq->txq_producer = txq->txq_first; 1351 else 1352 txq->txq_producer = producer + 1; 1353 IF_ENQUEUE(&txq->txq_mbufs, m); 1354 1355 /* 1356 * Let the transmitter know there's more to do 1357 */ 1358 bcmeth_write_4(sc, txq->txq_reg_xmtptr, 1359 txq->txq_descmap->dm_segs[0].ds_addr 1360 + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR)); 1361 1362 return true; 1363 } 1364 1365 static bool 1366 bcmeth_txq_enqueue( 1367 struct bcmeth_softc *sc, 1368 struct bcmeth_txqueue *txq) 1369 { 1370 for (;;) { 1371 if (IF_QFULL(&txq->txq_mbufs)) 1372 return false; 1373 struct mbuf *m = txq->txq_next; 1374 if (m == NULL) { 1375 int s = splnet(); 1376 IF_DEQUEUE(&sc->sc_if.if_snd, m); 1377 splx(s); 1378 if (m == NULL) 1379 return true; 1380 M_SETCTX(m, NULL); 1381 } else { 1382 txq->txq_next = NULL; 1383 } 1384 int error = bcmeth_txq_map_load(sc, txq, m); 1385 if (error) { 1386 aprint_error_dev(sc->sc_dev, 1387 "discarded packet due to " 1388 "dmamap load failure: %d\n", error); 1389 m_freem(m); 1390 continue; 1391 } 1392 KASSERT(txq->txq_next == NULL); 1393 if (!bcmeth_txq_produce(sc, txq, m)) { 1394 txq->txq_next = m; 1395 return false; 1396 } 1397 KASSERT(txq->txq_next == NULL); 1398 } 1399 } 1400 1401 static bool 1402 bcmeth_txq_consume( 1403 struct bcmeth_softc *sc, 1404 struct bcmeth_txqueue *txq) 1405 { 1406 struct ifnet * const ifp = &sc->sc_if; 1407 struct gmac_txdb *consumer = txq->txq_consumer; 1408 size_t txfree = 0; 1409 1410 #if 0 1411 printf("%s: entry: free=%zu\n", __func__, txq->txq_free); 1412 #endif 1413 1414 for (;;) { 1415 if (consumer == txq->txq_producer) { 1416 txq->txq_consumer = consumer; 1417 txq->txq_free += txfree; 1418 txq->txq_lastintr -= min(txq->txq_lastintr, txfree); 1419 #if 0 1420 printf("%s: empty: freed %zu descriptors going from %zu to %zu\n", 1421 __func__, txfree, txq->txq_free - txfree, txq->txq_free); 1422 #endif 1423 KASSERT(txq->txq_lastintr == 0); 1424 KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1); 1425 return true; 1426 } 1427 bcmeth_txq_desc_postsync(sc, txq, consumer, 1); 1428 uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 1429 if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) { 1430 txq->txq_consumer = consumer; 1431 txq->txq_free += txfree; 1432 txq->txq_lastintr -= min(txq->txq_lastintr, txfree); 1433 #if 0 1434 printf("%s: freed %zu descriptors\n", 1435 __func__, txfree); 1436 #endif 1437 return bcmeth_txq_fillable_p(sc, txq); 1438 } 1439 1440 /* 1441 * If this is the last descriptor in the chain, get the 1442 * mbuf, free its dmamap, and free the mbuf chain itself. 1443 */ 1444 const uint32_t txdb_flags = consumer->txdb_flags; 1445 if (txdb_flags & TXDB_FLAG_EF) { 1446 struct mbuf *m; 1447 1448 IF_DEQUEUE(&txq->txq_mbufs, m); 1449 KASSERT(m); 1450 bcmeth_txq_map_unload(sc, txq, m); 1451 #if 0 1452 printf("%s: mbuf %p: consumed a %u byte packet\n", 1453 __func__, m, m->m_pkthdr.len); 1454 #endif 1455 bpf_mtap(ifp, m); 1456 ifp->if_opackets++; 1457 ifp->if_obytes += m->m_pkthdr.len; 1458 if (m->m_flags & M_MCAST) 1459 ifp->if_omcasts++; 1460 m_freem(m); 1461 } 1462 1463 /* 1464 * We own this packet again. Clear all flags except wrap. 1465 */ 1466 txfree++; 1467 1468 /* 1469 * Wrap at the last entry! 1470 */ 1471 if (txdb_flags & TXDB_FLAG_ET) { 1472 consumer->txdb_flags = TXDB_FLAG_ET; 1473 KASSERT(consumer + 1 == txq->txq_last); 1474 consumer = txq->txq_first; 1475 } else { 1476 consumer->txdb_flags = 0; 1477 consumer++; 1478 KASSERT(consumer < txq->txq_last); 1479 } 1480 } 1481 } 1482 1483 static void 1484 bcmeth_txq_purge( 1485 struct bcmeth_softc *sc, 1486 struct bcmeth_txqueue *txq) 1487 { 1488 struct mbuf *m; 1489 KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0); 1490 1491 for (;;) { 1492 IF_DEQUEUE(&txq->txq_mbufs, m); 1493 if (m == NULL) 1494 break; 1495 bcmeth_txq_map_unload(sc, txq, m); 1496 m_freem(m); 1497 } 1498 if ((m = txq->txq_next) != NULL) { 1499 txq->txq_next = NULL; 1500 bcmeth_txq_map_unload(sc, txq, m); 1501 m_freem(m); 1502 } 1503 } 1504 1505 static void 1506 bcmeth_txq_reset( 1507 struct bcmeth_softc *sc, 1508 struct bcmeth_txqueue *txq) 1509 { 1510 /* 1511 * sync all the descriptors 1512 */ 1513 bcmeth_txq_desc_postsync(sc, txq, txq->txq_first, 1514 txq->txq_last - txq->txq_first); 1515 1516 /* 1517 * Make sure we own all descriptors in the ring. 1518 */ 1519 struct gmac_txdb *txdb; 1520 for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) { 1521 txdb->txdb_flags = 0; 1522 } 1523 1524 /* 1525 * Last descriptor has the wrap flag. 1526 */ 1527 txdb->txdb_flags = TXDB_FLAG_ET; 1528 1529 /* 1530 * Reset the producer consumer indexes. 1531 */ 1532 txq->txq_consumer = txq->txq_first; 1533 txq->txq_producer = txq->txq_first; 1534 txq->txq_free = txq->txq_last - txq->txq_first - 1; 1535 txq->txq_threshold = txq->txq_free / 2; 1536 txq->txq_lastintr = 0; 1537 1538 /* 1539 * What do we want to get interrupted on? 1540 */ 1541 sc->sc_intmask |= XMTINT_0 | XMTUF; 1542 1543 /* 1544 * Restart the transmiter at the first descriptor 1545 */ 1546 bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo, 1547 txq->txq_descmap->dm_segs->ds_addr); 1548 } 1549 1550 static void 1551 bcmeth_ifstart(struct ifnet *ifp) 1552 { 1553 struct bcmeth_softc * const sc = ifp->if_softc; 1554 1555 atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR); 1556 softint_schedule(sc->sc_soft_ih); 1557 } 1558 1559 int 1560 bcmeth_intr(void *arg) 1561 { 1562 struct bcmeth_softc * const sc = arg; 1563 uint32_t soft_flags = 0; 1564 uint32_t work_flags = 0; 1565 int rv = 0; 1566 1567 mutex_enter(sc->sc_hwlock); 1568 1569 sc->sc_ev_intr.ev_count++; 1570 1571 for (;;) { 1572 uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 1573 intstatus &= sc->sc_intmask; 1574 bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */ 1575 if (intstatus == 0) { 1576 break; 1577 } 1578 #if 0 1579 aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n", 1580 __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK)); 1581 #endif 1582 if (intstatus & RCVINT) { 1583 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1584 intstatus &= ~RCVINT; 1585 atomic_and_32(&sc->sc_intmask, (uint32_t)~RCVINT); 1586 1587 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1588 uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1589 if (descs < rxq->rxq_consumer - rxq->rxq_first) { 1590 /* 1591 * We wrapped at the end so count how far 1592 * we are from the end. 1593 */ 1594 descs += rxq->rxq_last - rxq->rxq_consumer; 1595 } else { 1596 descs -= rxq->rxq_consumer - rxq->rxq_first; 1597 } 1598 /* 1599 * If we "timedout" we can't be hogging so use 1600 * softints. If we exceeded then we might hogging 1601 * so let the workqueue deal with them. 1602 */ 1603 const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT); 1604 if (descs < framecount 1605 || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) { 1606 soft_flags |= SOFT_RXINTR; 1607 } else { 1608 work_flags |= WORK_RXINTR; 1609 } 1610 } 1611 1612 if (intstatus & XMTINT_0) { 1613 intstatus &= ~XMTINT_0; 1614 atomic_and_32(&sc->sc_intmask, (uint32_t)~XMTINT_0); 1615 soft_flags |= SOFT_TXINTR; 1616 } 1617 1618 if (intstatus & RCVDESCUF) { 1619 intstatus &= ~RCVDESCUF; 1620 atomic_and_32(&sc->sc_intmask, (uint32_t)~RCVDESCUF); 1621 work_flags |= WORK_RXUNDERFLOW; 1622 } 1623 1624 if (intstatus) { 1625 aprint_error_dev(sc->sc_dev, 1626 "intr: intstatus=%#x\n", intstatus); 1627 aprint_error_dev(sc->sc_dev, 1628 "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n", 1629 sc->sc_rxq.rxq_first, 1630 sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr, 1631 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr), 1632 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0), 1633 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1)); 1634 aprint_error_dev(sc->sc_dev, 1635 "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n", 1636 sc->sc_txq.txq_first, 1637 sc->sc_txq.txq_descmap->dm_segs[0].ds_addr, 1638 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr), 1639 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0), 1640 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1)); 1641 Debugger(); 1642 atomic_and_32(&sc->sc_intmask, ~intstatus); 1643 work_flags |= WORK_REINIT; 1644 break; 1645 } 1646 } 1647 1648 if (work_flags | soft_flags) { 1649 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1650 } 1651 1652 if (work_flags) { 1653 if (sc->sc_work_flags == 0) { 1654 workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL); 1655 } 1656 atomic_or_32(&sc->sc_work_flags, work_flags); 1657 rv = 1; 1658 } 1659 1660 if (soft_flags) { 1661 if (sc->sc_soft_flags == 0) { 1662 softint_schedule(sc->sc_soft_ih); 1663 } 1664 atomic_or_32(&sc->sc_soft_flags, soft_flags); 1665 rv = 1; 1666 } 1667 1668 mutex_exit(sc->sc_hwlock); 1669 1670 return rv; 1671 } 1672 1673 void 1674 bcmeth_soft_intr(void *arg) 1675 { 1676 struct bcmeth_softc * const sc = arg; 1677 struct ifnet * const ifp = &sc->sc_if; 1678 1679 mutex_enter(sc->sc_lock); 1680 1681 u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0); 1682 1683 sc->sc_ev_soft_intr.ev_count++; 1684 1685 if ((soft_flags & SOFT_TXINTR) 1686 || bcmeth_txq_active_p(sc, &sc->sc_txq)) { 1687 /* 1688 * Let's do what we came here for. Consume transmitted 1689 * packets off the the transmit ring. 1690 */ 1691 if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1692 || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1693 sc->sc_ev_tx_stall.ev_count++; 1694 ifp->if_flags |= IFF_OACTIVE; 1695 } else { 1696 ifp->if_flags &= ~IFF_OACTIVE; 1697 } 1698 atomic_or_32(&sc->sc_intmask, XMTINT_0); 1699 } 1700 1701 if (soft_flags & SOFT_RXINTR) { 1702 /* 1703 * Let's consume 1704 */ 1705 bcmeth_rxq_consume(sc, &sc->sc_rxq); 1706 atomic_or_32(&sc->sc_intmask, RCVINT); 1707 } 1708 1709 if (ifp->if_flags & IFF_RUNNING) { 1710 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1711 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1712 } 1713 1714 mutex_exit(sc->sc_lock); 1715 } 1716 1717 void 1718 bcmeth_worker(struct work *wk, void *arg) 1719 { 1720 struct bcmeth_softc * const sc = arg; 1721 struct ifnet * const ifp = &sc->sc_if; 1722 1723 mutex_enter(sc->sc_lock); 1724 1725 sc->sc_ev_work.ev_count++; 1726 1727 uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0); 1728 if (work_flags & WORK_REINIT) { 1729 int s = splnet(); 1730 sc->sc_soft_flags = 0; 1731 bcmeth_ifinit(ifp); 1732 splx(s); 1733 work_flags &= ~WORK_RXUNDERFLOW; 1734 } 1735 1736 if (work_flags & WORK_RXUNDERFLOW) { 1737 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1738 size_t threshold = 5 * rxq->rxq_threshold / 4; 1739 if (threshold >= rxq->rxq_last - rxq->rxq_first) { 1740 threshold = rxq->rxq_last - rxq->rxq_first - 1; 1741 } else { 1742 atomic_or_32(&sc->sc_intmask, RCVDESCUF); 1743 } 1744 aprint_normal_dev(sc->sc_dev, 1745 "increasing receive buffers from %zu to %zu\n", 1746 rxq->rxq_threshold, threshold); 1747 rxq->rxq_threshold = threshold; 1748 } 1749 1750 if (work_flags & WORK_RXINTR) { 1751 /* 1752 * Let's consume 1753 */ 1754 bcmeth_rxq_consume(sc, &sc->sc_rxq); 1755 atomic_or_32(&sc->sc_intmask, RCVINT); 1756 } 1757 1758 if (ifp->if_flags & IFF_RUNNING) { 1759 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1760 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1761 } 1762 1763 mutex_exit(sc->sc_lock); 1764 } 1765
Indexes created Sun Sep 28 16:09:52 GMT 2025