bcm53xx_eth.c revision 1.16
1 /*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #define _ARM32_BUS_DMA_PRIVATE 31 #define GMAC_PRIVATE 32 33 #include "locators.h" 34 35 #include <sys/cdefs.h> 36 37 __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.16 2012/11/08 00:59:12 matt Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/atomic.h> 41 #include <sys/bus.h> 42 #include <sys/device.h> 43 #include <sys/ioctl.h> 44 #include <sys/intr.h> 45 #include <sys/kmem.h> 46 #include <sys/mutex.h> 47 #include <sys/socket.h> 48 #include <sys/systm.h> 49 #include <sys/workqueue.h> 50 51 #include <net/if.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 55 #include <net/if_dl.h> 56 57 #include <net/bpf.h> 58 59 #include <dev/mii/miivar.h> 60 61 #include <arm/broadcom/bcm53xx_reg.h> 62 #include <arm/broadcom/bcm53xx_var.h> 63 64 //#define BCMETH_MPSAFE 65 66 #define BCMETH_RCVOFFSET 10 67 #define BCMETH_MAXTXMBUFS 128 68 #define BCMETH_NTXSEGS 30 69 #define BCMETH_MAXRXMBUFS 255 70 #define BCMETH_MINRXMBUFS 64 71 #define BCMETH_NRXSEGS 1 72 #define BCMETH_RINGSIZE PAGE_SIZE 73 74 #if 0 75 #define BCMETH_RCVMAGIC 0xfeedface 76 #endif 77 78 static int bcmeth_ccb_match(device_t, cfdata_t, void *); 79 static void bcmeth_ccb_attach(device_t, device_t, void *); 80 81 struct bcmeth_txqueue { 82 bus_dmamap_t txq_descmap; 83 struct gmac_txdb *txq_consumer; 84 struct gmac_txdb *txq_producer; 85 struct gmac_txdb *txq_first; 86 struct gmac_txdb *txq_last; 87 struct ifqueue txq_mbufs; 88 struct mbuf *txq_next; 89 size_t txq_free; 90 size_t txq_threshold; 91 size_t txq_lastintr; 92 bus_size_t txq_reg_xmtaddrlo; 93 bus_size_t txq_reg_xmtptr; 94 bus_size_t txq_reg_xmtctl; 95 bus_size_t txq_reg_xmtsts0; 96 bus_size_t txq_reg_xmtsts1; 97 bus_dma_segment_t txq_descmap_seg; 98 }; 99 100 struct bcmeth_rxqueue { 101 bus_dmamap_t rxq_descmap; 102 struct gmac_rxdb *rxq_consumer; 103 struct gmac_rxdb *rxq_producer; 104 struct gmac_rxdb *rxq_first; 105 struct gmac_rxdb *rxq_last; 106 struct mbuf *rxq_mhead; 107 struct mbuf **rxq_mtail; 108 struct mbuf *rxq_mconsumer; 109 size_t rxq_inuse; 110 size_t rxq_threshold; 111 bus_size_t rxq_reg_rcvaddrlo; 112 bus_size_t rxq_reg_rcvptr; 113 bus_size_t rxq_reg_rcvctl; 114 bus_size_t rxq_reg_rcvsts0; 115 bus_size_t rxq_reg_rcvsts1; 116 bus_dma_segment_t rxq_descmap_seg; 117 }; 118 119 struct bcmeth_mapcache { 120 u_int dmc_nmaps; 121 u_int dmc_maxseg; 122 u_int dmc_maxmaps; 123 u_int dmc_maxmapsize; 124 bus_dmamap_t dmc_maps[0]; 125 }; 126 127 struct bcmeth_softc { 128 device_t sc_dev; 129 bus_space_tag_t sc_bst; 130 bus_space_handle_t sc_bsh; 131 bus_dma_tag_t sc_dmat; 132 kmutex_t *sc_lock; 133 kmutex_t *sc_hwlock; 134 struct ethercom sc_ec; 135 #define sc_if sc_ec.ec_if 136 struct ifmedia sc_media; 137 void *sc_soft_ih; 138 void *sc_ih; 139 140 struct bcmeth_rxqueue sc_rxq; 141 struct bcmeth_txqueue sc_txq; 142 143 uint32_t sc_maxfrm; 144 uint32_t sc_cmdcfg; 145 uint32_t sc_intmask; 146 uint32_t sc_rcvlazy; 147 volatile uint32_t sc_soft_flags; 148 #define SOFT_RXINTR 0x01 149 #define SOFT_TXINTR 0x02 150 151 struct evcnt sc_ev_intr; 152 struct evcnt sc_ev_soft_intr; 153 struct evcnt sc_ev_work; 154 struct evcnt sc_ev_tx_stall; 155 struct evcnt sc_ev_rx_badmagic_lo; 156 struct evcnt sc_ev_rx_badmagic_hi; 157 158 struct ifqueue sc_rx_bufcache; 159 struct bcmeth_mapcache *sc_rx_mapcache; 160 struct bcmeth_mapcache *sc_tx_mapcache; 161 162 struct workqueue *sc_workq; 163 struct work sc_work; 164 165 volatile uint32_t sc_work_flags; 166 #define WORK_RXINTR 0x01 167 #define WORK_RXUNDERFLOW 0x02 168 #define WORK_REINIT 0x04 169 170 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 171 }; 172 173 static void bcmeth_ifstart(struct ifnet *); 174 static void bcmeth_ifwatchdog(struct ifnet *); 175 static int bcmeth_ifinit(struct ifnet *); 176 static void bcmeth_ifstop(struct ifnet *, int); 177 static int bcmeth_ifioctl(struct ifnet *, u_long, void *); 178 179 static int bcmeth_mapcache_create(struct bcmeth_softc *, 180 struct bcmeth_mapcache **, size_t, size_t, size_t); 181 static void bcmeth_mapcache_destroy(struct bcmeth_softc *, 182 struct bcmeth_mapcache *); 183 static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *, 184 struct bcmeth_mapcache *); 185 static void bcmeth_mapcache_put(struct bcmeth_softc *, 186 struct bcmeth_mapcache *, bus_dmamap_t); 187 188 static int bcmeth_txq_attach(struct bcmeth_softc *, 189 struct bcmeth_txqueue *, u_int); 190 static void bcmeth_txq_purge(struct bcmeth_softc *, 191 struct bcmeth_txqueue *); 192 static void bcmeth_txq_reset(struct bcmeth_softc *, 193 struct bcmeth_txqueue *); 194 static bool bcmeth_txq_consume(struct bcmeth_softc *, 195 struct bcmeth_txqueue *); 196 static bool bcmeth_txq_produce(struct bcmeth_softc *, 197 struct bcmeth_txqueue *, struct mbuf *m); 198 static bool bcmeth_txq_active_p(struct bcmeth_softc *, 199 struct bcmeth_txqueue *); 200 201 static int bcmeth_rxq_attach(struct bcmeth_softc *, 202 struct bcmeth_rxqueue *, u_int); 203 static bool bcmeth_rxq_produce(struct bcmeth_softc *, 204 struct bcmeth_rxqueue *); 205 static void bcmeth_rxq_purge(struct bcmeth_softc *, 206 struct bcmeth_rxqueue *, bool); 207 static void bcmeth_rxq_reset(struct bcmeth_softc *, 208 struct bcmeth_rxqueue *); 209 210 static int bcmeth_intr(void *); 211 #ifdef BCMETH_MPSAFETX 212 static void bcmeth_soft_txintr(struct bcmeth_softc *); 213 #endif 214 static void bcmeth_soft_intr(void *); 215 static void bcmeth_worker(struct work *, void *); 216 217 static int bcmeth_mediachange(struct ifnet *); 218 static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *); 219 220 static inline uint32_t 221 bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o) 222 { 223 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 224 } 225 226 static inline void 227 bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v) 228 { 229 bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 230 } 231 232 CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc), 233 bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL); 234 235 static int 236 bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux) 237 { 238 struct bcmccb_attach_args * const ccbaa = aux; 239 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 240 241 if (strcmp(cf->cf_name, loc->loc_name)) 242 return 0; 243 244 #ifdef DIAGNOSTIC 245 const int port = cf->cf_loc[BCMCCBCF_PORT]; 246 #endif 247 KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port); 248 249 return 1; 250 } 251 252 static void 253 bcmeth_ccb_attach(device_t parent, device_t self, void *aux) 254 { 255 struct bcmeth_softc * const sc = device_private(self); 256 struct ethercom * const ec = &sc->sc_ec; 257 struct ifnet * const ifp = &ec->ec_if; 258 struct bcmccb_attach_args * const ccbaa = aux; 259 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 260 const char * const xname = device_xname(self); 261 prop_dictionary_t dict = device_properties(self); 262 int error; 263 264 sc->sc_bst = ccbaa->ccbaa_ccb_bst; 265 sc->sc_dmat = ccbaa->ccbaa_dmat; 266 bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh, 267 loc->loc_offset, loc->loc_size, &sc->sc_bsh); 268 269 /* 270 * We need to use the coherent dma tag for the GMAC. 271 */ 272 sc->sc_dmat = &bcm53xx_coherent_dma_tag; 273 274 prop_data_t eaprop = prop_dictionary_get(dict, "mac-address"); 275 if (eaprop == NULL) { 276 uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0); 277 uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1); 278 if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) { 279 aprint_error(": mac-address property is missing\n"); 280 return; 281 } 282 sc->sc_enaddr[0] = (mac0 >> 0) & 0xff; 283 sc->sc_enaddr[1] = (mac0 >> 8) & 0xff; 284 sc->sc_enaddr[2] = (mac0 >> 16) & 0xff; 285 sc->sc_enaddr[3] = (mac0 >> 24) & 0xff; 286 sc->sc_enaddr[4] = (mac1 >> 0) & 0xff; 287 sc->sc_enaddr[5] = (mac1 >> 8) & 0xff; 288 } else { 289 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA); 290 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN); 291 memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop), 292 ETHER_ADDR_LEN); 293 } 294 sc->sc_dev = self; 295 sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); 296 sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM); 297 298 bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts 299 300 aprint_naive("\n"); 301 aprint_normal(": Gigabit Ethernet Controller\n"); 302 303 error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0); 304 if (error) { 305 aprint_error(": failed to init rxq: %d\n", error); 306 return; 307 } 308 309 error = bcmeth_txq_attach(sc, &sc->sc_txq, 0); 310 if (error) { 311 aprint_error(": failed to init txq: %d\n", error); 312 return; 313 } 314 315 error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache, 316 BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS); 317 if (error) { 318 aprint_error(": failed to allocate rx dmamaps: %d\n", error); 319 return; 320 } 321 322 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 323 BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS); 324 if (error) { 325 aprint_error(": failed to allocate tx dmamaps: %d\n", error); 326 return; 327 } 328 329 error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc, 330 (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU); 331 if (error) { 332 aprint_error(": failed to create workqueue: %d\n", error); 333 return; 334 } 335 336 sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET, 337 bcmeth_soft_intr, sc); 338 339 sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL, 340 bcmeth_intr, sc); 341 342 if (sc->sc_ih == NULL) { 343 aprint_error_dev(self, "failed to establish interrupt %d\n", 344 loc->loc_intrs[0]); 345 } else { 346 aprint_normal_dev(self, "interrupting on irq %d\n", 347 loc->loc_intrs[0]); 348 } 349 350 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 351 ether_sprintf(sc->sc_enaddr)); 352 353 /* 354 * Since each port in plugged into the switch/flow-accelerator, 355 * we hard code at Gige Full-Duplex with Flow Control enabled. 356 */ 357 int ifmedia = IFM_ETHER|IFM_1000_T|IFM_FDX; 358 //ifmedia |= IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE; 359 ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange, 360 bcmeth_mediastatus); 361 ifmedia_add(&sc->sc_media, ifmedia, 0, NULL); 362 ifmedia_set(&sc->sc_media, ifmedia); 363 364 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU; 365 366 strlcpy(ifp->if_xname, xname, IFNAMSIZ); 367 ifp->if_softc = sc; 368 ifp->if_baudrate = IF_Mbps(1000); 369 ifp->if_capabilities = 0; 370 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 371 #ifdef BCMETH_MPSAFE 372 ifp->if_flags2 = IFF2_MPSAFE; 373 #endif 374 ifp->if_ioctl = bcmeth_ifioctl; 375 ifp->if_start = bcmeth_ifstart; 376 ifp->if_watchdog = bcmeth_ifwatchdog; 377 ifp->if_init = bcmeth_ifinit; 378 ifp->if_stop = bcmeth_ifstop; 379 IFQ_SET_READY(&ifp->if_snd); 380 381 bcmeth_ifstop(ifp, true); 382 383 /* 384 * Attach the interface. 385 */ 386 if_attach(ifp); 387 ether_ifattach(ifp, sc->sc_enaddr); 388 389 evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, 390 NULL, xname, "intr"); 391 evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR, 392 NULL, xname, "soft intr"); 393 evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC, 394 NULL, xname, "work items"); 395 evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC, 396 NULL, xname, "tx stalls"); 397 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC, 398 NULL, xname, "rx badmagic lo"); 399 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC, 400 NULL, xname, "rx badmagic hi"); 401 } 402 403 static int 404 bcmeth_mediachange(struct ifnet *ifp) 405 { 406 //struct bcmeth_softc * const sc = ifp->if_softc; 407 return 0; 408 } 409 410 static void 411 bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm) 412 { 413 //struct bcmeth_softc * const sc = ifp->if_softc; 414 415 ifm->ifm_status = IFM_AVALID | IFM_ACTIVE; 416 ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T; 417 } 418 419 static uint64_t 420 bcmeth_macaddr_create(const uint8_t *enaddr) 421 { 422 return (enaddr[3] << 0) // UNIMAC_MAC_0 423 | (enaddr[2] << 8) // UNIMAC_MAC_0 424 | (enaddr[1] << 16) // UNIMAC_MAC_0 425 | (enaddr[0] << 24) // UNIMAC_MAC_0 426 | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1 427 | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1 428 } 429 430 static int 431 bcmeth_ifinit(struct ifnet *ifp) 432 { 433 struct bcmeth_softc * const sc = ifp->if_softc; 434 int error = 0; 435 436 sc->sc_maxfrm = max(ifp->if_mtu + 32, MCLBYTES); 437 if (ifp->if_mtu > ETHERMTU_JUMBO) 438 return error; 439 440 KASSERT(ifp->if_flags & IFF_UP); 441 442 /* 443 * Stop the interface 444 */ 445 bcmeth_ifstop(ifp, 0); 446 447 /* 448 * If our frame size has changed (or it's our first time through) 449 * destroy the existing transmit mapcache. 450 */ 451 if (sc->sc_tx_mapcache != NULL 452 && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) { 453 bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache); 454 sc->sc_tx_mapcache = NULL; 455 } 456 457 if (sc->sc_tx_mapcache == NULL) { 458 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 459 BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS); 460 if (error) 461 return error; 462 } 463 464 sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE 465 | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED) 466 | RX_ENA | TX_ENA; 467 468 if (ifp->if_flags & IFF_PROMISC) { 469 sc->sc_cmdcfg |= PROMISC_EN; 470 } else { 471 sc->sc_cmdcfg &= ~PROMISC_EN; 472 } 473 474 const uint64_t macstnaddr = 475 bcmeth_macaddr_create(CLLADDR(ifp->if_sadl)); 476 477 sc->sc_intmask = DESCPROTOERR|DATAERR|DESCERR; 478 479 /* 5. Load RCVADDR_LO with new pointer */ 480 bcmeth_rxq_reset(sc, &sc->sc_rxq); 481 482 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 483 __SHIFTIN(BCMETH_RCVOFFSET, RCVCTL_RCVOFFSET) 484 | RCVCTL_PARITY_DIS 485 | RCVCTL_OFLOW_CONTINUE 486 | __SHIFTIN(4, RCVCTL_BURSTLEN)); 487 488 /* 6. Load XMTADDR_LO with new pointer */ 489 bcmeth_txq_reset(sc, &sc->sc_txq); 490 491 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX 492 | XMTCTL_PARITY_DIS 493 | __SHIFTIN(4, XMTCTL_BURSTLEN)); 494 495 /* 7. Setup other UNIMAC registers */ 496 bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm); 497 bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0)); 498 bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32)); 499 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg); 500 501 uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); 502 devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 503 devctl &= ~FLOW_CTRL_MODE; 504 devctl &= ~MIB_RD_RESET_EN; 505 devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 506 devctl &= ~CPU_FLOW_CTRL_ON; 507 bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 508 509 /* Setup lazy receive (at most 1ms). */ 510 sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT) 511 | __SHIFTIN(125000000 / 1000, INTRCVLAZY_TIMEOUT); 512 bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy); 513 514 /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */ 515 sc->sc_intmask |= XMTINT_0|XMTUF; 516 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, 517 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE); 518 519 520 /* 12. Enable receive queues in RQUEUE, */ 521 sc->sc_intmask |= RCVINT|RCVDESCUF|RCVFIFOOF; 522 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 523 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE); 524 525 bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */ 526 527 #if 0 528 aprint_normal_dev(sc->sc_dev, 529 "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 530 devctl, sc->sc_cmdcfg, 531 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl), 532 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl)); 533 #endif 534 535 sc->sc_soft_flags = 0; 536 537 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 538 539 ifp->if_flags |= IFF_RUNNING; 540 541 return error; 542 } 543 544 static void 545 bcmeth_ifstop(struct ifnet *ifp, int disable) 546 { 547 struct bcmeth_softc * const sc = ifp->if_softc; 548 struct bcmeth_txqueue * const txq = &sc->sc_txq; 549 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 550 551 KASSERT(!cpu_intr_p()); 552 553 sc->sc_soft_flags = 0; 554 sc->sc_work_flags = 0; 555 556 /* Disable Rx processing */ 557 bcmeth_write_4(sc, rxq->rxq_reg_rcvctl, 558 bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE); 559 560 /* Disable Tx processing */ 561 bcmeth_write_4(sc, txq->txq_reg_xmtctl, 562 bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE); 563 564 /* Disable all interrupts */ 565 bcmeth_write_4(sc, GMAC_INTMASK, 0); 566 567 for (;;) { 568 uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 569 uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 570 if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS 571 && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS) 572 break; 573 delay(50); 574 } 575 /* 576 * Now reset the controller. 577 * 578 * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register 579 * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register 580 */ 581 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET); 582 bcmeth_write_4(sc, GMAC_INTSTATUS, ~0); 583 sc->sc_intmask = 0; 584 ifp->if_flags &= ~IFF_RUNNING; 585 586 /* 587 * Let's consume any remaining transmitted packets. And if we are 588 * disabling the interface, purge ourselves of any untransmitted 589 * packets. But don't consume any received packets, just drop them. 590 * If we aren't disabling the interface, save the mbufs in the 591 * receive queue for reuse. 592 */ 593 bcmeth_rxq_purge(sc, &sc->sc_rxq, disable); 594 bcmeth_txq_consume(sc, &sc->sc_txq); 595 if (disable) { 596 bcmeth_txq_purge(sc, &sc->sc_txq); 597 IF_PURGE(&ifp->if_snd); 598 } 599 600 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0); 601 } 602 603 static void 604 bcmeth_ifwatchdog(struct ifnet *ifp) 605 { 606 } 607 608 static int 609 bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 610 { 611 struct bcmeth_softc *sc = ifp->if_softc; 612 struct ifreq * const ifr = data; 613 const int s = splnet(); 614 int error; 615 616 switch (cmd) { 617 case SIOCSIFMEDIA: 618 case SIOCGIFMEDIA: 619 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 620 break; 621 622 default: 623 error = ether_ioctl(ifp, cmd, data); 624 if (error != ENETRESET) 625 break; 626 627 if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) { 628 error = 0; 629 break; 630 } 631 error = bcmeth_ifinit(ifp); 632 break; 633 } 634 635 splx(s); 636 return error; 637 } 638 639 static void 640 bcmeth_rxq_desc_presync( 641 struct bcmeth_softc *sc, 642 struct bcmeth_rxqueue *rxq, 643 struct gmac_rxdb *rxdb, 644 size_t count) 645 { 646 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 647 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 648 BUS_DMASYNC_PREWRITE); 649 } 650 651 static void 652 bcmeth_rxq_desc_postsync( 653 struct bcmeth_softc *sc, 654 struct bcmeth_rxqueue *rxq, 655 struct gmac_rxdb *rxdb, 656 size_t count) 657 { 658 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 659 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 660 BUS_DMASYNC_POSTWRITE); 661 } 662 663 static void 664 bcmeth_txq_desc_presync( 665 struct bcmeth_softc *sc, 666 struct bcmeth_txqueue *txq, 667 struct gmac_txdb *txdb, 668 size_t count) 669 { 670 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 671 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 672 BUS_DMASYNC_PREWRITE); 673 } 674 675 static void 676 bcmeth_txq_desc_postsync( 677 struct bcmeth_softc *sc, 678 struct bcmeth_txqueue *txq, 679 struct gmac_txdb *txdb, 680 size_t count) 681 { 682 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 683 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 684 BUS_DMASYNC_POSTWRITE); 685 } 686 687 static bus_dmamap_t 688 bcmeth_mapcache_get( 689 struct bcmeth_softc *sc, 690 struct bcmeth_mapcache *dmc) 691 { 692 KASSERT(dmc->dmc_nmaps > 0); 693 KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL); 694 return dmc->dmc_maps[--dmc->dmc_nmaps]; 695 } 696 697 static void 698 bcmeth_mapcache_put( 699 struct bcmeth_softc *sc, 700 struct bcmeth_mapcache *dmc, 701 bus_dmamap_t map) 702 { 703 KASSERT(map != NULL); 704 KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps); 705 dmc->dmc_maps[dmc->dmc_nmaps++] = map; 706 } 707 708 static void 709 bcmeth_mapcache_destroy( 710 struct bcmeth_softc *sc, 711 struct bcmeth_mapcache *dmc) 712 { 713 const size_t dmc_size = 714 offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]); 715 716 for (u_int i = 0; i < dmc->dmc_maxmaps; i++) { 717 bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]); 718 } 719 kmem_intr_free(dmc, dmc_size); 720 } 721 722 static int 723 bcmeth_mapcache_create( 724 struct bcmeth_softc *sc, 725 struct bcmeth_mapcache **dmc_p, 726 size_t maxmaps, 727 size_t maxmapsize, 728 size_t maxseg) 729 { 730 const size_t dmc_size = 731 offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]); 732 struct bcmeth_mapcache * const dmc = 733 kmem_intr_zalloc(dmc_size, KM_NOSLEEP); 734 735 dmc->dmc_maxmaps = maxmaps; 736 dmc->dmc_nmaps = maxmaps; 737 dmc->dmc_maxmapsize = maxmapsize; 738 dmc->dmc_maxseg = maxseg; 739 740 for (u_int i = 0; i < maxmaps; i++) { 741 int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize, 742 dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0, 743 BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]); 744 if (error) { 745 aprint_error_dev(sc->sc_dev, 746 "failed to creat dma map cache " 747 "entry %u of %zu: %d\n", 748 i, maxmaps, error); 749 while (i-- > 0) { 750 bus_dmamap_destroy(sc->sc_dmat, 751 dmc->dmc_maps[i]); 752 } 753 kmem_intr_free(dmc, dmc_size); 754 return error; 755 } 756 KASSERT(dmc->dmc_maps[i] != NULL); 757 } 758 759 *dmc_p = dmc; 760 761 return 0; 762 } 763 764 #if 0 765 static void 766 bcmeth_dmamem_free( 767 bus_dma_tag_t dmat, 768 size_t map_size, 769 bus_dma_segment_t *seg, 770 bus_dmamap_t map, 771 void *kvap) 772 { 773 bus_dmamap_destroy(dmat, map); 774 bus_dmamem_unmap(dmat, kvap, map_size); 775 bus_dmamem_free(dmat, seg, 1); 776 } 777 #endif 778 779 static int 780 bcmeth_dmamem_alloc( 781 bus_dma_tag_t dmat, 782 size_t map_size, 783 bus_dma_segment_t *seg, 784 bus_dmamap_t *map, 785 void **kvap) 786 { 787 int error; 788 int nseg; 789 790 *kvap = NULL; 791 *map = NULL; 792 793 error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0, 794 seg, 1, &nseg, 0); 795 if (error) 796 return error; 797 798 KASSERT(nseg == 1); 799 800 error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0); 801 if (error == 0) { 802 error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0, 803 map); 804 if (error == 0) { 805 error = bus_dmamap_load(dmat, *map, *kvap, map_size, 806 NULL, 0); 807 if (error == 0) 808 return 0; 809 bus_dmamap_destroy(dmat, *map); 810 *map = NULL; 811 } 812 bus_dmamem_unmap(dmat, *kvap, map_size); 813 *kvap = NULL; 814 } 815 bus_dmamem_free(dmat, seg, nseg); 816 return 0; 817 } 818 819 static struct mbuf * 820 bcmeth_rx_buf_alloc( 821 struct bcmeth_softc *sc) 822 { 823 struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA); 824 if (m == NULL) { 825 printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr"); 826 return NULL; 827 } 828 MCLGET(m, M_DONTWAIT); 829 if ((m->m_flags & M_EXT) == 0) { 830 printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET"); 831 m_freem(m); 832 return NULL; 833 } 834 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 835 836 bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache); 837 if (map == NULL) { 838 printf("%s:%d: %s\n", __func__, __LINE__, "map get"); 839 m_freem(m); 840 return NULL; 841 } 842 M_SETCTX(m, map); 843 m->m_len = m->m_pkthdr.len = MCLBYTES; 844 int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 845 BUS_DMA_READ|BUS_DMA_NOWAIT); 846 if (error) { 847 aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n", 848 error); 849 M_SETCTX(m, NULL); 850 m_freem(m); 851 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 852 return NULL; 853 } 854 KASSERT(((map->_dm_flags ^ sc->sc_dmat->_ranges[0].dr_flags) & _BUS_DMAMAP_COHERENT) == 0); 855 KASSERT(map->dm_mapsize == MCLBYTES); 856 #ifdef BCMETH_RCVMAGIC 857 *mtod(m, uint32_t *) = BCMETH_RCVMAGIC; 858 bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t), 859 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 860 bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t), 861 map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD); 862 #else 863 bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t), 864 BUS_DMASYNC_PREREAD); 865 #endif 866 867 return m; 868 } 869 870 static void 871 bcmeth_rx_map_unload( 872 struct bcmeth_softc *sc, 873 struct mbuf *m) 874 { 875 KASSERT(m); 876 for (; m != NULL; m = m->m_next) { 877 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 878 KASSERT(map); 879 KASSERT(map->dm_mapsize == MCLBYTES); 880 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len, 881 BUS_DMASYNC_POSTREAD); 882 bus_dmamap_unload(sc->sc_dmat, map); 883 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 884 M_SETCTX(m, NULL); 885 } 886 } 887 888 static bool 889 bcmeth_rxq_produce( 890 struct bcmeth_softc *sc, 891 struct bcmeth_rxqueue *rxq) 892 { 893 struct gmac_rxdb *producer = rxq->rxq_producer; 894 bool produced = false; 895 896 while (rxq->rxq_inuse < rxq->rxq_threshold) { 897 struct mbuf *m; 898 IF_DEQUEUE(&sc->sc_rx_bufcache, m); 899 if (m == NULL) { 900 m = bcmeth_rx_buf_alloc(sc); 901 if (m == NULL) { 902 printf("%s: bcmeth_rx_buf_alloc failed\n", __func__); 903 break; 904 } 905 } 906 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 907 KASSERT(map); 908 909 producer->rxdb_buflen = MCLBYTES; 910 producer->rxdb_addrlo = map->dm_segs[0].ds_addr; 911 producer->rxdb_flags &= RXDB_FLAG_ET; 912 *rxq->rxq_mtail = m; 913 rxq->rxq_mtail = &m->m_next; 914 m->m_len = MCLBYTES; 915 m->m_next = NULL; 916 rxq->rxq_inuse++; 917 if (++producer == rxq->rxq_last) { 918 membar_producer(); 919 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 920 rxq->rxq_last - rxq->rxq_producer); 921 producer = rxq->rxq_producer = rxq->rxq_first; 922 } 923 produced = true; 924 } 925 if (produced) { 926 membar_producer(); 927 if (producer != rxq->rxq_producer) { 928 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 929 producer - rxq->rxq_producer); 930 rxq->rxq_producer = producer; 931 } 932 bcmeth_write_4(sc, rxq->rxq_reg_rcvptr, 933 rxq->rxq_descmap->dm_segs[0].ds_addr 934 + ((uintptr_t)producer & RCVPTR)); 935 } 936 return true; 937 } 938 939 static void 940 bcmeth_rx_input( 941 struct bcmeth_softc *sc, 942 struct mbuf *m, 943 uint32_t rxdb_flags) 944 { 945 struct ifnet * const ifp = &sc->sc_if; 946 947 bcmeth_rx_map_unload(sc, m); 948 949 m_adj(m, BCMETH_RCVOFFSET); 950 951 switch (__SHIFTOUT(rxdb_flags, RXSTS_PKTTYPE)) { 952 case RXSTS_PKTTYPE_UC: 953 break; 954 case RXSTS_PKTTYPE_MC: 955 m->m_flags |= M_MCAST; 956 break; 957 case RXSTS_PKTTYPE_BC: 958 m->m_flags |= M_BCAST|M_MCAST; 959 break; 960 default: 961 if (sc->sc_cmdcfg & PROMISC_EN) 962 m->m_flags |= M_PROMISC; 963 break; 964 } 965 m->m_pkthdr.rcvif = ifp; 966 967 ifp->if_ipackets++; 968 ifp->if_ibytes += m->m_pkthdr.len; 969 970 /* 971 * Let's give it to the network subsystm to deal with. 972 */ 973 #ifdef BCMETH_MPSAFE 974 mutex_exit(sc->sc_lock); 975 (*ifp->if_input)(ifp, m); 976 mutex_enter(sc->sc_lock); 977 #else 978 int s = splnet(); 979 bpf_mtap(ifp, m); 980 (*ifp->if_input)(ifp, m); 981 splx(s); 982 #endif 983 } 984 985 static void 986 bcmeth_rxq_consume( 987 struct bcmeth_softc *sc, 988 struct bcmeth_rxqueue *rxq) 989 { 990 struct ifnet * const ifp = &sc->sc_if; 991 struct gmac_rxdb *consumer = rxq->rxq_consumer; 992 size_t rxconsumed = 0; 993 994 for (;;) { 995 if (consumer == rxq->rxq_producer) { 996 rxq->rxq_consumer = consumer; 997 rxq->rxq_inuse -= rxconsumed; 998 KASSERT(rxq->rxq_inuse == 0); 999 return; 1000 } 1001 1002 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1003 uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1004 if (consumer == rxq->rxq_first + currdscr) { 1005 rxq->rxq_consumer = consumer; 1006 rxq->rxq_inuse -= rxconsumed; 1007 return; 1008 } 1009 bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1); 1010 1011 /* 1012 * We own this packet again. Copy the rxsts word from it. 1013 */ 1014 rxconsumed++; 1015 uint32_t rxsts; 1016 KASSERT(rxq->rxq_mhead != NULL); 1017 bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t); 1018 bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align, 1019 BUS_DMASYNC_POSTREAD); 1020 memcpy(&rxsts, rxq->rxq_mhead->m_data, 4); 1021 #if 0 1022 KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd", 1023 currdscr, consumer - rxq->rxq_first); 1024 #endif 1025 1026 /* 1027 * Get the count of descriptors. Fetch the correct number 1028 * of mbufs. 1029 */ 1030 #ifdef BCMETH_RCVMAGIC 1031 size_t desc_count = rxsts != BCMETH_RCVMAGIC ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1; 1032 #else 1033 size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1; 1034 #endif 1035 struct mbuf *m = rxq->rxq_mhead; 1036 struct mbuf *m_last = m; 1037 for (size_t i = 1; i < desc_count; i++) { 1038 if (++consumer == rxq->rxq_last) { 1039 consumer = rxq->rxq_first; 1040 } 1041 KASSERTMSG(consumer != rxq->rxq_first + currdscr, 1042 "i=%zu rxsts=%#x desc_count=%zu currdscr=%u consumer=%zd", 1043 i, rxsts, desc_count, currdscr, 1044 consumer - rxq->rxq_first); 1045 m_last = m_last->m_next; 1046 } 1047 1048 /* 1049 * Now remove it/them from the list of enqueued mbufs. 1050 */ 1051 if ((rxq->rxq_mhead = m_last->m_next) == NULL) 1052 rxq->rxq_mtail = &rxq->rxq_mhead; 1053 m_last->m_next = NULL; 1054 1055 #ifdef BCMETH_RCVMAGIC 1056 if (rxsts == BCMETH_RCVMAGIC) { 1057 ifp->if_ierrors++; 1058 if ((m->m_ext.ext_paddr >> 28) == 8) { 1059 sc->sc_ev_rx_badmagic_lo.ev_count++; 1060 } else { 1061 sc->sc_ev_rx_badmagic_hi.ev_count++; 1062 } 1063 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1064 } else 1065 #endif /* BCMETH_RCVMAGIC */ 1066 if (rxsts & (RXSTS_CRC_ERROR|RXSTS_OVERSIZED|RXSTS_PKT_OVERFLOW)) { 1067 aprint_error_dev(sc->sc_dev, "[%zu]: count=%zu rxsts=%#x\n", 1068 consumer - rxq->rxq_first, desc_count, rxsts); 1069 /* 1070 * We encountered an error, take the mbufs and add them 1071 * to the rx bufcache so we can quickly reuse them. 1072 */ 1073 ifp->if_ierrors++; 1074 do { 1075 struct mbuf *m0 = m->m_next; 1076 m->m_next = NULL; 1077 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1078 m = m0; 1079 } while (m); 1080 } else { 1081 uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN); 1082 framelen += BCMETH_RCVOFFSET; 1083 m->m_pkthdr.len = framelen; 1084 if (desc_count == 1) { 1085 KASSERT(framelen <= MCLBYTES); 1086 m->m_len = framelen; 1087 } else { 1088 m_last->m_len = framelen & (MCLBYTES - 1); 1089 } 1090 1091 #ifdef BCMETH_MPSAFE 1092 /* 1093 * Wrap at the last entry! 1094 */ 1095 if (++consumer == rxq->rxq_last) { 1096 KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET); 1097 rxq->rxq_consumer = rxq->rxq_first; 1098 } else { 1099 rxq->rxq_consumer = consumer; 1100 } 1101 rxq->rxq_inuse -= rxconsumed; 1102 #endif /* BCMETH_MPSAFE */ 1103 1104 /* 1105 * Receive the packet (which releases our lock) 1106 */ 1107 bcmeth_rx_input(sc, m, rxsts); 1108 1109 #ifdef BCMETH_MPSAFE 1110 /* 1111 * Since we had to give up our lock, we need to 1112 * refresh these. 1113 */ 1114 consumer = rxq->rxq_consumer; 1115 rxconsumed = 0; 1116 continue; 1117 #endif /* BCMETH_MPSAFE */ 1118 } 1119 1120 /* 1121 * Wrap at the last entry! 1122 */ 1123 if (++consumer == rxq->rxq_last) { 1124 KASSERT(consumer[-1].rxdb_flags & RXDB_FLAG_ET); 1125 consumer = rxq->rxq_first; 1126 } 1127 } 1128 } 1129 1130 static void 1131 bcmeth_rxq_purge( 1132 struct bcmeth_softc *sc, 1133 struct bcmeth_rxqueue *rxq, 1134 bool discard) 1135 { 1136 struct mbuf *m; 1137 1138 if ((m = rxq->rxq_mhead) != NULL) { 1139 if (discard) { 1140 bcmeth_rx_map_unload(sc, m); 1141 m_freem(m); 1142 } else { 1143 while (m != NULL) { 1144 struct mbuf *m0 = m->m_next; 1145 m->m_next = NULL; 1146 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1147 m = m0; 1148 } 1149 } 1150 1151 } 1152 1153 rxq->rxq_mhead = NULL; 1154 rxq->rxq_mtail = &rxq->rxq_mhead; 1155 rxq->rxq_inuse = 0; 1156 } 1157 1158 static void 1159 bcmeth_rxq_reset( 1160 struct bcmeth_softc *sc, 1161 struct bcmeth_rxqueue *rxq) 1162 { 1163 /* 1164 * sync all the descriptors 1165 */ 1166 bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first, 1167 rxq->rxq_last - rxq->rxq_first); 1168 1169 /* 1170 * Make sure we own all descriptors in the ring. 1171 */ 1172 struct gmac_rxdb *rxdb; 1173 for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) { 1174 rxdb->rxdb_flags = RXDB_FLAG_IC; 1175 } 1176 1177 /* 1178 * Last descriptor has the wrap flag. 1179 */ 1180 rxdb->rxdb_flags = RXDB_FLAG_ET|RXDB_FLAG_IC; 1181 1182 /* 1183 * Reset the producer consumer indexes. 1184 */ 1185 rxq->rxq_consumer = rxq->rxq_first; 1186 rxq->rxq_producer = rxq->rxq_first; 1187 rxq->rxq_inuse = 0; 1188 if (rxq->rxq_threshold < BCMETH_MINRXMBUFS) 1189 rxq->rxq_threshold = BCMETH_MINRXMBUFS; 1190 1191 sc->sc_intmask |= RCVINT|RCVFIFOOF|RCVDESCUF; 1192 1193 /* 1194 * Restart the receiver at the first descriptor 1195 */ 1196 bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo, 1197 rxq->rxq_descmap->dm_segs[0].ds_addr); 1198 } 1199 1200 static int 1201 bcmeth_rxq_attach( 1202 struct bcmeth_softc *sc, 1203 struct bcmeth_rxqueue *rxq, 1204 u_int qno) 1205 { 1206 size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]); 1207 int error; 1208 void *descs; 1209 1210 KASSERT(desc_count == 256 || desc_count == 512); 1211 1212 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1213 &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs); 1214 if (error) 1215 return error; 1216 1217 memset(descs, 0, BCMETH_RINGSIZE); 1218 rxq->rxq_first = descs; 1219 rxq->rxq_last = rxq->rxq_first + desc_count; 1220 rxq->rxq_consumer = descs; 1221 rxq->rxq_producer = descs; 1222 1223 bcmeth_rxq_purge(sc, rxq, true); 1224 bcmeth_rxq_reset(sc, rxq); 1225 1226 rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW; 1227 rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL; 1228 rxq->rxq_reg_rcvptr = GMAC_RCVPTR; 1229 rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0; 1230 rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1; 1231 1232 return 0; 1233 } 1234 1235 static bool 1236 bcmeth_txq_active_p( 1237 struct bcmeth_softc * const sc, 1238 struct bcmeth_txqueue *txq) 1239 { 1240 return !IF_IS_EMPTY(&txq->txq_mbufs); 1241 } 1242 1243 static bool 1244 bcmeth_txq_fillable_p( 1245 struct bcmeth_softc * const sc, 1246 struct bcmeth_txqueue *txq) 1247 { 1248 return txq->txq_free >= txq->txq_threshold; 1249 } 1250 1251 static int 1252 bcmeth_txq_attach( 1253 struct bcmeth_softc *sc, 1254 struct bcmeth_txqueue *txq, 1255 u_int qno) 1256 { 1257 size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]); 1258 int error; 1259 void *descs; 1260 1261 KASSERT(desc_count == 256 || desc_count == 512); 1262 1263 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1264 &txq->txq_descmap_seg, &txq->txq_descmap, &descs); 1265 if (error) 1266 return error; 1267 1268 memset(descs, 0, BCMETH_RINGSIZE); 1269 txq->txq_first = descs; 1270 txq->txq_last = txq->txq_first + desc_count; 1271 txq->txq_consumer = descs; 1272 txq->txq_producer = descs; 1273 1274 IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS); 1275 1276 txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW; 1277 txq->txq_reg_xmtctl = GMAC_XMTCONTROL; 1278 txq->txq_reg_xmtptr = GMAC_XMTPTR; 1279 txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0; 1280 txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1; 1281 1282 bcmeth_txq_reset(sc, txq); 1283 1284 return 0; 1285 } 1286 1287 static int 1288 bcmeth_txq_map_load( 1289 struct bcmeth_softc *sc, 1290 struct bcmeth_txqueue *txq, 1291 struct mbuf *m) 1292 { 1293 bus_dmamap_t map; 1294 int error; 1295 1296 map = M_GETCTX(m, bus_dmamap_t); 1297 if (map != NULL) 1298 return 0; 1299 1300 map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache); 1301 if (map == NULL) 1302 return ENOMEM; 1303 1304 error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 1305 BUS_DMA_WRITE | BUS_DMA_NOWAIT); 1306 if (error) 1307 return error; 1308 1309 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len, 1310 BUS_DMASYNC_PREWRITE); 1311 M_SETCTX(m, map); 1312 return 0; 1313 } 1314 1315 static void 1316 bcmeth_txq_map_unload( 1317 struct bcmeth_softc *sc, 1318 struct bcmeth_txqueue *txq, 1319 struct mbuf *m) 1320 { 1321 KASSERT(m); 1322 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1323 bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 1324 BUS_DMASYNC_POSTWRITE); 1325 bus_dmamap_unload(sc->sc_dmat, map); 1326 bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map); 1327 } 1328 1329 static bool 1330 bcmeth_txq_produce( 1331 struct bcmeth_softc *sc, 1332 struct bcmeth_txqueue *txq, 1333 struct mbuf *m) 1334 { 1335 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1336 1337 if (map->dm_nsegs > txq->txq_free) 1338 return false; 1339 1340 /* 1341 * TCP Offload flag must be set in the first descriptor. 1342 */ 1343 struct gmac_txdb *producer = txq->txq_producer; 1344 uint32_t first_flags = TXDB_FLAG_SF; 1345 uint32_t last_flags = TXDB_FLAG_EF; 1346 1347 /* 1348 * If we've produced enough descriptors without consuming any 1349 * we need to ask for an interrupt to reclaim some. 1350 */ 1351 txq->txq_lastintr += map->dm_nsegs; 1352 if (txq->txq_lastintr >= txq->txq_threshold 1353 || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) { 1354 txq->txq_lastintr = 0; 1355 last_flags |= TXDB_FLAG_IC; 1356 } 1357 1358 KASSERT(producer != txq->txq_last); 1359 1360 struct gmac_txdb *start = producer; 1361 size_t count = map->dm_nsegs; 1362 producer->txdb_flags |= first_flags; 1363 producer->txdb_addrlo = map->dm_segs[0].ds_addr; 1364 producer->txdb_buflen = map->dm_segs[0].ds_len; 1365 for (u_int i = 1; i < map->dm_nsegs; i++) { 1366 #if 0 1367 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1368 producer->txdb_flags, producer->txdb_buflen, 1369 producer->txdb_addrlo, producer->txdb_addrhi); 1370 #endif 1371 if (__predict_false(++producer == txq->txq_last)) { 1372 bcmeth_txq_desc_presync(sc, txq, start, 1373 txq->txq_last - start); 1374 count -= txq->txq_last - start; 1375 producer = txq->txq_first; 1376 start = txq->txq_first; 1377 } 1378 producer->txdb_addrlo = map->dm_segs[i].ds_addr; 1379 producer->txdb_buflen = map->dm_segs[i].ds_len; 1380 } 1381 producer->txdb_flags |= last_flags; 1382 #if 0 1383 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1384 producer->txdb_flags, producer->txdb_buflen, 1385 producer->txdb_addrlo, producer->txdb_addrhi); 1386 #endif 1387 if (count) 1388 bcmeth_txq_desc_presync(sc, txq, start, count); 1389 1390 /* 1391 * Reduce free count by the number of segments we consumed. 1392 */ 1393 txq->txq_free -= map->dm_nsegs; 1394 KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer); 1395 KASSERT(map->dm_nsegs == 1 || (txq->txq_producer->txdb_flags & TXDB_FLAG_EF) == 0); 1396 KASSERT(producer->txdb_flags & TXDB_FLAG_EF); 1397 1398 #if 0 1399 printf("%s: mbuf %p: produced a %u byte packet in %u segments (%zd..%zd)\n", 1400 __func__, m, m->m_pkthdr.len, map->dm_nsegs, 1401 txq->txq_producer - txq->txq_first, producer - txq->txq_first); 1402 #endif 1403 1404 if (producer + 1 == txq->txq_last) 1405 txq->txq_producer = txq->txq_first; 1406 else 1407 txq->txq_producer = producer + 1; 1408 IF_ENQUEUE(&txq->txq_mbufs, m); 1409 1410 /* 1411 * Let the transmitter know there's more to do 1412 */ 1413 bcmeth_write_4(sc, txq->txq_reg_xmtptr, 1414 txq->txq_descmap->dm_segs[0].ds_addr 1415 + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR)); 1416 1417 return true; 1418 } 1419 1420 static struct mbuf * 1421 bcmeth_copy_packet(struct mbuf *m) 1422 { 1423 struct mbuf *mext = NULL; 1424 size_t misalignment = 0; 1425 size_t hlen = 0; 1426 1427 for (mext = m; mext != NULL; mext = mext->m_next) { 1428 if (mext->m_flags & M_EXT) { 1429 misalignment = mtod(mext, vaddr_t) & arm_dcache_align; 1430 break; 1431 } 1432 hlen += m->m_len; 1433 } 1434 1435 struct mbuf *n = m->m_next; 1436 if (m != mext && hlen + misalignment <= MHLEN && false) { 1437 KASSERT(m->m_pktdat <= m->m_data && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]); 1438 size_t oldoff = m->m_data - m->m_pktdat; 1439 size_t off; 1440 if (mext == NULL) { 1441 off = (oldoff + hlen > MHLEN) ? 0 : oldoff; 1442 } else { 1443 off = MHLEN - (hlen + misalignment); 1444 } 1445 KASSERT(off + hlen + misalignment <= MHLEN); 1446 if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) { 1447 memmove(&m->m_pktdat[off], m->m_data, m->m_len); 1448 m->m_data = &m->m_pktdat[off]; 1449 } 1450 m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]); 1451 m->m_len = hlen; 1452 m->m_next = mext; 1453 while (n != mext) { 1454 n = m_free(n); 1455 } 1456 return m; 1457 } 1458 1459 struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type); 1460 if (m0 == NULL) { 1461 return NULL; 1462 } 1463 M_COPY_PKTHDR(m0, m); 1464 MCLAIM(m0, m->m_owner); 1465 if (m0->m_pkthdr.len > MHLEN) { 1466 MCLGET(m0, M_DONTWAIT); 1467 if ((m0->m_flags & M_EXT) == 0) { 1468 m_freem(m0); 1469 return NULL; 1470 } 1471 } 1472 m0->m_len = m->m_pkthdr.len; 1473 m_copydata(m, 0, m0->m_len, mtod(m0, void *)); 1474 m_freem(m); 1475 return m0; 1476 } 1477 1478 static bool 1479 bcmeth_txq_enqueue( 1480 struct bcmeth_softc *sc, 1481 struct bcmeth_txqueue *txq) 1482 { 1483 for (;;) { 1484 if (IF_QFULL(&txq->txq_mbufs)) 1485 return false; 1486 struct mbuf *m = txq->txq_next; 1487 if (m == NULL) { 1488 int s = splnet(); 1489 IF_DEQUEUE(&sc->sc_if.if_snd, m); 1490 splx(s); 1491 if (m == NULL) 1492 return true; 1493 M_SETCTX(m, NULL); 1494 } else { 1495 txq->txq_next = NULL; 1496 } 1497 /* 1498 * If LINK2 is set and this packet uses multiple mbufs, 1499 * consolidate it into a single mbuf. 1500 */ 1501 if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) { 1502 struct mbuf *m0 = bcmeth_copy_packet(m); 1503 if (m0 == NULL) { 1504 txq->txq_next = m; 1505 return true; 1506 } 1507 m = m0; 1508 } 1509 int error = bcmeth_txq_map_load(sc, txq, m); 1510 if (error) { 1511 aprint_error_dev(sc->sc_dev, 1512 "discarded packet due to " 1513 "dmamap load failure: %d\n", error); 1514 m_freem(m); 1515 continue; 1516 } 1517 KASSERT(txq->txq_next == NULL); 1518 if (!bcmeth_txq_produce(sc, txq, m)) { 1519 txq->txq_next = m; 1520 return false; 1521 } 1522 KASSERT(txq->txq_next == NULL); 1523 } 1524 } 1525 1526 static bool 1527 bcmeth_txq_consume( 1528 struct bcmeth_softc *sc, 1529 struct bcmeth_txqueue *txq) 1530 { 1531 struct ifnet * const ifp = &sc->sc_if; 1532 struct gmac_txdb *consumer = txq->txq_consumer; 1533 size_t txfree = 0; 1534 1535 #if 0 1536 printf("%s: entry: free=%zu\n", __func__, txq->txq_free); 1537 #endif 1538 1539 for (;;) { 1540 if (consumer == txq->txq_producer) { 1541 txq->txq_consumer = consumer; 1542 txq->txq_free += txfree; 1543 txq->txq_lastintr -= min(txq->txq_lastintr, txfree); 1544 #if 0 1545 printf("%s: empty: freed %zu descriptors going from %zu to %zu\n", 1546 __func__, txfree, txq->txq_free - txfree, txq->txq_free); 1547 #endif 1548 KASSERT(txq->txq_lastintr == 0); 1549 KASSERT(txq->txq_free == txq->txq_last - txq->txq_first - 1); 1550 return true; 1551 } 1552 bcmeth_txq_desc_postsync(sc, txq, consumer, 1); 1553 uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 1554 if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) { 1555 txq->txq_consumer = consumer; 1556 txq->txq_free += txfree; 1557 txq->txq_lastintr -= min(txq->txq_lastintr, txfree); 1558 #if 0 1559 printf("%s: freed %zu descriptors\n", 1560 __func__, txfree); 1561 #endif 1562 return bcmeth_txq_fillable_p(sc, txq); 1563 } 1564 1565 /* 1566 * If this is the last descriptor in the chain, get the 1567 * mbuf, free its dmamap, and free the mbuf chain itself. 1568 */ 1569 const uint32_t txdb_flags = consumer->txdb_flags; 1570 if (txdb_flags & TXDB_FLAG_EF) { 1571 struct mbuf *m; 1572 1573 IF_DEQUEUE(&txq->txq_mbufs, m); 1574 KASSERT(m); 1575 bcmeth_txq_map_unload(sc, txq, m); 1576 #if 0 1577 printf("%s: mbuf %p: consumed a %u byte packet\n", 1578 __func__, m, m->m_pkthdr.len); 1579 #endif 1580 bpf_mtap(ifp, m); 1581 ifp->if_opackets++; 1582 ifp->if_obytes += m->m_pkthdr.len; 1583 if (m->m_flags & M_MCAST) 1584 ifp->if_omcasts++; 1585 m_freem(m); 1586 } 1587 1588 /* 1589 * We own this packet again. Clear all flags except wrap. 1590 */ 1591 txfree++; 1592 1593 /* 1594 * Wrap at the last entry! 1595 */ 1596 if (txdb_flags & TXDB_FLAG_ET) { 1597 consumer->txdb_flags = TXDB_FLAG_ET; 1598 KASSERT(consumer + 1 == txq->txq_last); 1599 consumer = txq->txq_first; 1600 } else { 1601 consumer->txdb_flags = 0; 1602 consumer++; 1603 KASSERT(consumer < txq->txq_last); 1604 } 1605 } 1606 } 1607 1608 static void 1609 bcmeth_txq_purge( 1610 struct bcmeth_softc *sc, 1611 struct bcmeth_txqueue *txq) 1612 { 1613 struct mbuf *m; 1614 KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0); 1615 1616 for (;;) { 1617 IF_DEQUEUE(&txq->txq_mbufs, m); 1618 if (m == NULL) 1619 break; 1620 bcmeth_txq_map_unload(sc, txq, m); 1621 m_freem(m); 1622 } 1623 if ((m = txq->txq_next) != NULL) { 1624 txq->txq_next = NULL; 1625 bcmeth_txq_map_unload(sc, txq, m); 1626 m_freem(m); 1627 } 1628 } 1629 1630 static void 1631 bcmeth_txq_reset( 1632 struct bcmeth_softc *sc, 1633 struct bcmeth_txqueue *txq) 1634 { 1635 /* 1636 * sync all the descriptors 1637 */ 1638 bcmeth_txq_desc_postsync(sc, txq, txq->txq_first, 1639 txq->txq_last - txq->txq_first); 1640 1641 /* 1642 * Make sure we own all descriptors in the ring. 1643 */ 1644 struct gmac_txdb *txdb; 1645 for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) { 1646 txdb->txdb_flags = 0; 1647 } 1648 1649 /* 1650 * Last descriptor has the wrap flag. 1651 */ 1652 txdb->txdb_flags = TXDB_FLAG_ET; 1653 1654 /* 1655 * Reset the producer consumer indexes. 1656 */ 1657 txq->txq_consumer = txq->txq_first; 1658 txq->txq_producer = txq->txq_first; 1659 txq->txq_free = txq->txq_last - txq->txq_first - 1; 1660 txq->txq_threshold = txq->txq_free / 2; 1661 txq->txq_lastintr = 0; 1662 1663 /* 1664 * What do we want to get interrupted on? 1665 */ 1666 sc->sc_intmask |= XMTINT_0 | XMTUF; 1667 1668 /* 1669 * Restart the transmiter at the first descriptor 1670 */ 1671 bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo, 1672 txq->txq_descmap->dm_segs->ds_addr); 1673 } 1674 1675 static void 1676 bcmeth_ifstart(struct ifnet *ifp) 1677 { 1678 struct bcmeth_softc * const sc = ifp->if_softc; 1679 1680 if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) { 1681 return; 1682 } 1683 1684 #ifdef BCMETH_MPSAFETX 1685 if (cpu_intr_p()) { 1686 #endif 1687 atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR); 1688 softint_schedule(sc->sc_soft_ih); 1689 #ifdef BCMETH_MPSAFETX 1690 } else { 1691 /* 1692 * Either we are in a softintr thread already or some other 1693 * thread so just borrow it to do the send and save ourselves 1694 * the overhead of a fast soft int. 1695 */ 1696 bcmeth_soft_txintr(sc); 1697 } 1698 #endif 1699 } 1700 1701 int 1702 bcmeth_intr(void *arg) 1703 { 1704 struct bcmeth_softc * const sc = arg; 1705 uint32_t soft_flags = 0; 1706 uint32_t work_flags = 0; 1707 int rv = 0; 1708 1709 mutex_enter(sc->sc_hwlock); 1710 1711 uint32_t intmask = sc->sc_intmask; 1712 sc->sc_ev_intr.ev_count++; 1713 1714 for (;;) { 1715 uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 1716 intstatus &= intmask; 1717 bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */ 1718 if (intstatus == 0) { 1719 break; 1720 } 1721 #if 0 1722 aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n", 1723 __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK)); 1724 #endif 1725 if (intstatus & RCVINT) { 1726 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1727 intmask &= ~RCVINT; 1728 1729 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1730 uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1731 if (descs < rxq->rxq_consumer - rxq->rxq_first) { 1732 /* 1733 * We wrapped at the end so count how far 1734 * we are from the end. 1735 */ 1736 descs += rxq->rxq_last - rxq->rxq_consumer; 1737 } else { 1738 descs -= rxq->rxq_consumer - rxq->rxq_first; 1739 } 1740 /* 1741 * If we "timedout" we can't be hogging so use 1742 * softints. If we exceeded then we might hogging 1743 * so let the workqueue deal with them. 1744 */ 1745 const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, INTRCVLAZY_FRAMECOUNT); 1746 if (descs < framecount 1747 || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) { 1748 soft_flags |= SOFT_RXINTR; 1749 } else { 1750 work_flags |= WORK_RXINTR; 1751 } 1752 } 1753 1754 if (intstatus & XMTINT_0) { 1755 intmask &= ~XMTINT_0; 1756 soft_flags |= SOFT_TXINTR; 1757 } 1758 1759 if (intstatus & RCVDESCUF) { 1760 intmask &= ~RCVDESCUF; 1761 work_flags |= WORK_RXUNDERFLOW; 1762 } 1763 1764 intstatus &= intmask; 1765 if (intstatus) { 1766 aprint_error_dev(sc->sc_dev, 1767 "intr: intstatus=%#x\n", intstatus); 1768 aprint_error_dev(sc->sc_dev, 1769 "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n", 1770 sc->sc_rxq.rxq_first, 1771 sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr, 1772 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr), 1773 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0), 1774 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1)); 1775 aprint_error_dev(sc->sc_dev, 1776 "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n", 1777 sc->sc_txq.txq_first, 1778 sc->sc_txq.txq_descmap->dm_segs[0].ds_addr, 1779 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr), 1780 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0), 1781 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1)); 1782 intmask &= ~intstatus; 1783 work_flags |= WORK_REINIT; 1784 break; 1785 } 1786 } 1787 1788 if (intmask != sc->sc_intmask) { 1789 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1790 } 1791 1792 if (work_flags) { 1793 if (sc->sc_work_flags == 0) { 1794 workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL); 1795 } 1796 atomic_or_32(&sc->sc_work_flags, work_flags); 1797 rv = 1; 1798 } 1799 1800 if (soft_flags) { 1801 if (sc->sc_soft_flags == 0) { 1802 softint_schedule(sc->sc_soft_ih); 1803 } 1804 atomic_or_32(&sc->sc_soft_flags, soft_flags); 1805 rv = 1; 1806 } 1807 1808 mutex_exit(sc->sc_hwlock); 1809 1810 return rv; 1811 } 1812 1813 #ifdef BCMETH_MPSAFETX 1814 void 1815 bcmeth_soft_txintr(struct bcmeth_softc *sc) 1816 { 1817 mutex_enter(sc->sc_lock); 1818 /* 1819 * Let's do what we came here for. Consume transmitted 1820 * packets off the the transmit ring. 1821 */ 1822 if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1823 || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1824 sc->sc_ev_tx_stall.ev_count++; 1825 sc->sc_if.if_flags |= IFF_OACTIVE; 1826 } else { 1827 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1828 } 1829 if (sc->sc_if.if_flags & IFF_RUNNING) { 1830 mutex_spin_enter(sc->sc_hwlock); 1831 sc->sc_intmask |= XMTINT_0; 1832 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1833 mutex_spin_exit(sc->sc_hwlock); 1834 } 1835 mutex_exit(sc->sc_lock); 1836 } 1837 #endif /* BCMETH_MPSAFETX */ 1838 1839 void 1840 bcmeth_soft_intr(void *arg) 1841 { 1842 struct bcmeth_softc * const sc = arg; 1843 struct ifnet * const ifp = &sc->sc_if; 1844 uint32_t intmask = 0; 1845 1846 mutex_enter(sc->sc_lock); 1847 1848 u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0); 1849 1850 sc->sc_ev_soft_intr.ev_count++; 1851 1852 if ((soft_flags & SOFT_TXINTR) 1853 || bcmeth_txq_active_p(sc, &sc->sc_txq)) { 1854 /* 1855 * Let's do what we came here for. Consume transmitted 1856 * packets off the the transmit ring. 1857 */ 1858 if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1859 || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1860 sc->sc_ev_tx_stall.ev_count++; 1861 ifp->if_flags |= IFF_OACTIVE; 1862 } else { 1863 ifp->if_flags &= ~IFF_OACTIVE; 1864 } 1865 intmask |= XMTINT_0; 1866 } 1867 1868 if (soft_flags & SOFT_RXINTR) { 1869 /* 1870 * Let's consume 1871 */ 1872 bcmeth_rxq_consume(sc, &sc->sc_rxq); 1873 intmask |= RCVINT; 1874 } 1875 1876 if (ifp->if_flags & IFF_RUNNING) { 1877 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1878 mutex_spin_enter(sc->sc_hwlock); 1879 sc->sc_intmask |= intmask; 1880 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1881 mutex_spin_exit(sc->sc_hwlock); 1882 } 1883 1884 mutex_exit(sc->sc_lock); 1885 } 1886 1887 void 1888 bcmeth_worker(struct work *wk, void *arg) 1889 { 1890 struct bcmeth_softc * const sc = arg; 1891 struct ifnet * const ifp = &sc->sc_if; 1892 uint32_t intmask = 0; 1893 1894 mutex_enter(sc->sc_lock); 1895 1896 sc->sc_ev_work.ev_count++; 1897 1898 uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0); 1899 if (work_flags & WORK_REINIT) { 1900 int s = splnet(); 1901 sc->sc_soft_flags = 0; 1902 bcmeth_ifinit(ifp); 1903 splx(s); 1904 work_flags &= ~WORK_RXUNDERFLOW; 1905 } 1906 1907 if (work_flags & WORK_RXUNDERFLOW) { 1908 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1909 size_t threshold = 5 * rxq->rxq_threshold / 4; 1910 if (threshold >= rxq->rxq_last - rxq->rxq_first) { 1911 threshold = rxq->rxq_last - rxq->rxq_first - 1; 1912 } else { 1913 intmask |= RCVDESCUF; 1914 } 1915 aprint_normal_dev(sc->sc_dev, 1916 "increasing receive buffers from %zu to %zu\n", 1917 rxq->rxq_threshold, threshold); 1918 rxq->rxq_threshold = threshold; 1919 } 1920 1921 if (work_flags & WORK_RXINTR) { 1922 /* 1923 * Let's consume 1924 */ 1925 bcmeth_rxq_consume(sc, &sc->sc_rxq); 1926 intmask |= RCVINT; 1927 } 1928 1929 if (ifp->if_flags & IFF_RUNNING) { 1930 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1931 #if 0 1932 uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 1933 if (intstatus & RCVINT) { 1934 bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT); 1935 work_flags |= WORK_RXINTR; 1936 continue; 1937 } 1938 #endif 1939 mutex_spin_enter(sc->sc_hwlock); 1940 sc->sc_intmask |= intmask; 1941 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1942 mutex_spin_exit(sc->sc_hwlock); 1943 } 1944 1945 mutex_exit(sc->sc_lock); 1946 } 1947
Indexes created Sun Sep 28 16:09:52 GMT 2025