bcm53xx_eth.c revision 1.40
1 /*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #define _ARM32_BUS_DMA_PRIVATE 31 #define GMAC_PRIVATE 32 33 #include "locators.h" 34 #include "opt_broadcom.h" 35 36 #include <sys/cdefs.h> 37 38 __KERNEL_RCSID(1, "$NetBSD: bcm53xx_eth.c,v 1.40 2020/02/03 08:00:35 skrll Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/atomic.h> 42 #include <sys/bus.h> 43 #include <sys/device.h> 44 #include <sys/ioctl.h> 45 #include <sys/intr.h> 46 #include <sys/kmem.h> 47 #include <sys/mutex.h> 48 #include <sys/socket.h> 49 #include <sys/systm.h> 50 #include <sys/workqueue.h> 51 52 #include <net/if.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 #include <net/if_dl.h> 56 #include <net/bpf.h> 57 58 #include <dev/mii/miivar.h> 59 60 #include <arm/locore.h> 61 62 #include <arm/broadcom/bcm53xx_reg.h> 63 #include <arm/broadcom/bcm53xx_var.h> 64 65 //#define BCMETH_MPSAFE 66 67 #ifdef BCMETH_COUNTERS 68 #define BCMETH_EVCNT_ADD(a, b) ((void)((a).ev_count += (b))) 69 #else 70 #define BCMETH_EVCNT_ADD(a, b) do { } while (/*CONSTCOND*/0) 71 #endif 72 #define BCMETH_EVCNT_INCR(a) BCMETH_EVCNT_ADD((a), 1) 73 74 #define BCMETH_MAXTXMBUFS 128 75 #define BCMETH_NTXSEGS 30 76 #define BCMETH_MAXRXMBUFS 255 77 #define BCMETH_MINRXMBUFS 64 78 #define BCMETH_NRXSEGS 1 79 #define BCMETH_RINGSIZE PAGE_SIZE 80 81 #if 1 82 #define BCMETH_RCVMAGIC 0xfeedface 83 #endif 84 85 static int bcmeth_ccb_match(device_t, cfdata_t, void *); 86 static void bcmeth_ccb_attach(device_t, device_t, void *); 87 88 struct bcmeth_txqueue { 89 bus_dmamap_t txq_descmap; 90 struct gmac_txdb *txq_consumer; 91 struct gmac_txdb *txq_producer; 92 struct gmac_txdb *txq_first; 93 struct gmac_txdb *txq_last; 94 struct ifqueue txq_mbufs; 95 struct mbuf *txq_next; 96 size_t txq_free; 97 size_t txq_threshold; 98 size_t txq_lastintr; 99 bus_size_t txq_reg_xmtaddrlo; 100 bus_size_t txq_reg_xmtptr; 101 bus_size_t txq_reg_xmtctl; 102 bus_size_t txq_reg_xmtsts0; 103 bus_size_t txq_reg_xmtsts1; 104 bus_dma_segment_t txq_descmap_seg; 105 }; 106 107 struct bcmeth_rxqueue { 108 bus_dmamap_t rxq_descmap; 109 struct gmac_rxdb *rxq_consumer; 110 struct gmac_rxdb *rxq_producer; 111 struct gmac_rxdb *rxq_first; 112 struct gmac_rxdb *rxq_last; 113 struct mbuf *rxq_mhead; 114 struct mbuf **rxq_mtail; 115 struct mbuf *rxq_mconsumer; 116 size_t rxq_inuse; 117 size_t rxq_threshold; 118 bus_size_t rxq_reg_rcvaddrlo; 119 bus_size_t rxq_reg_rcvptr; 120 bus_size_t rxq_reg_rcvctl; 121 bus_size_t rxq_reg_rcvsts0; 122 bus_size_t rxq_reg_rcvsts1; 123 bus_dma_segment_t rxq_descmap_seg; 124 }; 125 126 struct bcmeth_mapcache { 127 u_int dmc_nmaps; 128 u_int dmc_maxseg; 129 u_int dmc_maxmaps; 130 u_int dmc_maxmapsize; 131 bus_dmamap_t dmc_maps[0]; 132 }; 133 134 struct bcmeth_softc { 135 device_t sc_dev; 136 bus_space_tag_t sc_bst; 137 bus_space_handle_t sc_bsh; 138 bus_dma_tag_t sc_dmat; 139 kmutex_t *sc_lock; 140 kmutex_t *sc_hwlock; 141 struct ethercom sc_ec; 142 #define sc_if sc_ec.ec_if 143 struct ifmedia sc_media; 144 void *sc_soft_ih; 145 void *sc_ih; 146 147 struct bcmeth_rxqueue sc_rxq; 148 struct bcmeth_txqueue sc_txq; 149 150 size_t sc_rcvoffset; 151 uint32_t sc_macaddr[2]; 152 uint32_t sc_maxfrm; 153 uint32_t sc_cmdcfg; 154 uint32_t sc_intmask; 155 uint32_t sc_rcvlazy; 156 volatile uint32_t sc_soft_flags; 157 #define SOFT_RXINTR 0x01 158 #define SOFT_TXINTR 0x02 159 160 #ifdef BCMETH_COUNTERS 161 struct evcnt sc_ev_intr; 162 struct evcnt sc_ev_soft_intr; 163 struct evcnt sc_ev_work; 164 struct evcnt sc_ev_tx_stall; 165 struct evcnt sc_ev_rx_badmagic_lo; 166 struct evcnt sc_ev_rx_badmagic_hi; 167 #endif 168 169 struct ifqueue sc_rx_bufcache; 170 struct bcmeth_mapcache *sc_rx_mapcache; 171 struct bcmeth_mapcache *sc_tx_mapcache; 172 173 struct workqueue *sc_workq; 174 struct work sc_work; 175 176 volatile uint32_t sc_work_flags; 177 #define WORK_RXINTR 0x01 178 #define WORK_RXUNDERFLOW 0x02 179 #define WORK_REINIT 0x04 180 181 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 182 }; 183 184 static void bcmeth_ifstart(struct ifnet *); 185 static void bcmeth_ifwatchdog(struct ifnet *); 186 static int bcmeth_ifinit(struct ifnet *); 187 static void bcmeth_ifstop(struct ifnet *, int); 188 static int bcmeth_ifioctl(struct ifnet *, u_long, void *); 189 190 static int bcmeth_mapcache_create(struct bcmeth_softc *, 191 struct bcmeth_mapcache **, size_t, size_t, size_t); 192 static void bcmeth_mapcache_destroy(struct bcmeth_softc *, 193 struct bcmeth_mapcache *); 194 static bus_dmamap_t bcmeth_mapcache_get(struct bcmeth_softc *, 195 struct bcmeth_mapcache *); 196 static void bcmeth_mapcache_put(struct bcmeth_softc *, 197 struct bcmeth_mapcache *, bus_dmamap_t); 198 199 static int bcmeth_txq_attach(struct bcmeth_softc *, 200 struct bcmeth_txqueue *, u_int); 201 static void bcmeth_txq_purge(struct bcmeth_softc *, 202 struct bcmeth_txqueue *); 203 static void bcmeth_txq_reset(struct bcmeth_softc *, 204 struct bcmeth_txqueue *); 205 static bool bcmeth_txq_consume(struct bcmeth_softc *, 206 struct bcmeth_txqueue *); 207 static bool bcmeth_txq_produce(struct bcmeth_softc *, 208 struct bcmeth_txqueue *, struct mbuf *m); 209 static bool bcmeth_txq_active_p(struct bcmeth_softc *, 210 struct bcmeth_txqueue *); 211 212 static int bcmeth_rxq_attach(struct bcmeth_softc *, 213 struct bcmeth_rxqueue *, u_int); 214 static bool bcmeth_rxq_produce(struct bcmeth_softc *, 215 struct bcmeth_rxqueue *); 216 static void bcmeth_rxq_purge(struct bcmeth_softc *, 217 struct bcmeth_rxqueue *, bool); 218 static void bcmeth_rxq_reset(struct bcmeth_softc *, 219 struct bcmeth_rxqueue *); 220 221 static int bcmeth_intr(void *); 222 #ifdef BCMETH_MPSAFETX 223 static void bcmeth_soft_txintr(struct bcmeth_softc *); 224 #endif 225 static void bcmeth_soft_intr(void *); 226 static void bcmeth_worker(struct work *, void *); 227 228 static int bcmeth_mediachange(struct ifnet *); 229 static void bcmeth_mediastatus(struct ifnet *, struct ifmediareq *); 230 231 static inline uint32_t 232 bcmeth_read_4(struct bcmeth_softc *sc, bus_size_t o) 233 { 234 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 235 } 236 237 static inline void 238 bcmeth_write_4(struct bcmeth_softc *sc, bus_size_t o, uint32_t v) 239 { 240 bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 241 } 242 243 CFATTACH_DECL_NEW(bcmeth_ccb, sizeof(struct bcmeth_softc), 244 bcmeth_ccb_match, bcmeth_ccb_attach, NULL, NULL); 245 246 static int 247 bcmeth_ccb_match(device_t parent, cfdata_t cf, void *aux) 248 { 249 struct bcmccb_attach_args * const ccbaa = aux; 250 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 251 252 if (strcmp(cf->cf_name, loc->loc_name)) 253 return 0; 254 255 #ifdef DIAGNOSTIC 256 const int port = cf->cf_loc[BCMCCBCF_PORT]; 257 #endif 258 KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port); 259 260 return 1; 261 } 262 263 static void 264 bcmeth_ccb_attach(device_t parent, device_t self, void *aux) 265 { 266 struct bcmeth_softc * const sc = device_private(self); 267 struct ethercom * const ec = &sc->sc_ec; 268 struct ifnet * const ifp = &ec->ec_if; 269 struct bcmccb_attach_args * const ccbaa = aux; 270 const struct bcm_locators * const loc = &ccbaa->ccbaa_loc; 271 const char * const xname = device_xname(self); 272 prop_dictionary_t dict = device_properties(self); 273 int error; 274 275 sc->sc_bst = ccbaa->ccbaa_ccb_bst; 276 sc->sc_dmat = ccbaa->ccbaa_dmat; 277 bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh, 278 loc->loc_offset, loc->loc_size, &sc->sc_bsh); 279 280 /* 281 * We need to use the coherent dma tag for the GMAC. 282 */ 283 sc->sc_dmat = &bcm53xx_coherent_dma_tag; 284 #if _ARM32_NEED_BUS_DMA_BOUNCE 285 if (device_cfdata(self)->cf_flags & 2) { 286 sc->sc_dmat = &bcm53xx_bounce_dma_tag; 287 } 288 #endif 289 290 prop_data_t eaprop = prop_dictionary_get(dict, "mac-address"); 291 if (eaprop == NULL) { 292 uint32_t mac0 = bcmeth_read_4(sc, UNIMAC_MAC_0); 293 uint32_t mac1 = bcmeth_read_4(sc, UNIMAC_MAC_1); 294 if ((mac0 == 0 && mac1 == 0) || (mac1 & 1)) { 295 aprint_error(": mac-address property is missing\n"); 296 return; 297 } 298 sc->sc_enaddr[0] = (mac0 >> 0) & 0xff; 299 sc->sc_enaddr[1] = (mac0 >> 8) & 0xff; 300 sc->sc_enaddr[2] = (mac0 >> 16) & 0xff; 301 sc->sc_enaddr[3] = (mac0 >> 24) & 0xff; 302 sc->sc_enaddr[4] = (mac1 >> 0) & 0xff; 303 sc->sc_enaddr[5] = (mac1 >> 8) & 0xff; 304 } else { 305 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA); 306 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN); 307 memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop), 308 ETHER_ADDR_LEN); 309 } 310 sc->sc_dev = self; 311 sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); 312 sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM); 313 314 bcmeth_write_4(sc, GMAC_INTMASK, 0); // disable interrupts 315 316 aprint_naive("\n"); 317 aprint_normal(": Gigabit Ethernet Controller\n"); 318 319 error = bcmeth_rxq_attach(sc, &sc->sc_rxq, 0); 320 if (error) { 321 aprint_error(": failed to init rxq: %d\n", error); 322 goto fail_1; 323 } 324 325 error = bcmeth_txq_attach(sc, &sc->sc_txq, 0); 326 if (error) { 327 aprint_error(": failed to init txq: %d\n", error); 328 goto fail_1; 329 } 330 331 error = bcmeth_mapcache_create(sc, &sc->sc_rx_mapcache, 332 BCMETH_MAXRXMBUFS, MCLBYTES, BCMETH_NRXSEGS); 333 if (error) { 334 aprint_error(": failed to allocate rx dmamaps: %d\n", error); 335 goto fail_1; 336 } 337 338 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 339 BCMETH_MAXTXMBUFS, MCLBYTES, BCMETH_NTXSEGS); 340 if (error) { 341 aprint_error(": failed to allocate tx dmamaps: %d\n", error); 342 goto fail_1; 343 } 344 345 error = workqueue_create(&sc->sc_workq, xname, bcmeth_worker, sc, 346 (PRI_USER + MAXPRI_USER) / 2, IPL_NET, WQ_MPSAFE|WQ_PERCPU); 347 if (error) { 348 aprint_error(": failed to create workqueue: %d\n", error); 349 goto fail_2; 350 } 351 352 sc->sc_soft_ih = softint_establish(SOFTINT_MPSAFE | SOFTINT_NET, 353 bcmeth_soft_intr, sc); 354 355 if (sc->sc_ih == NULL) { 356 aprint_error_dev(self, "failed to establish interrupt %d\n", 357 loc->loc_intrs[0]); 358 goto fail_3; 359 } 360 361 sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL, 362 bcmeth_intr, sc); 363 364 if (sc->sc_ih == NULL) { 365 aprint_error_dev(self, "failed to establish interrupt %d\n", 366 loc->loc_intrs[0]); 367 goto fail_4; 368 } else { 369 aprint_normal_dev(self, "interrupting on irq %d\n", 370 loc->loc_intrs[0]); 371 } 372 373 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 374 ether_sprintf(sc->sc_enaddr)); 375 376 /* 377 * Since each port in plugged into the switch/flow-accelerator, 378 * we hard code at Gige Full-Duplex with Flow Control enabled. 379 */ 380 int ifmedia = IFM_ETHER | IFM_1000_T | IFM_FDX; 381 //ifmedia |= IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE; 382 ec->ec_ifmedia = &sc->sc_media; 383 ifmedia_init(&sc->sc_media, IFM_IMASK, bcmeth_mediachange, 384 bcmeth_mediastatus); 385 ifmedia_add(&sc->sc_media, ifmedia, 0, NULL); 386 ifmedia_set(&sc->sc_media, ifmedia); 387 388 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU; 389 390 strlcpy(ifp->if_xname, xname, IFNAMSIZ); 391 ifp->if_softc = sc; 392 ifp->if_baudrate = IF_Mbps(1000); 393 ifp->if_capabilities = 0; 394 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 395 #ifdef BCMETH_MPSAFE 396 ifp->if_flags2 = IFF2_MPSAFE; 397 #endif 398 ifp->if_ioctl = bcmeth_ifioctl; 399 ifp->if_start = bcmeth_ifstart; 400 ifp->if_watchdog = bcmeth_ifwatchdog; 401 ifp->if_init = bcmeth_ifinit; 402 ifp->if_stop = bcmeth_ifstop; 403 IFQ_SET_READY(&ifp->if_snd); 404 405 bcmeth_ifstop(ifp, true); 406 407 /* 408 * Attach the interface. 409 */ 410 error = if_initialize(ifp); 411 if (error != 0) { 412 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 413 error); 414 goto fail_5; 415 } 416 ether_ifattach(ifp, sc->sc_enaddr); 417 if_register(ifp); 418 419 #ifdef BCMETH_COUNTERS 420 evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, 421 NULL, xname, "intr"); 422 evcnt_attach_dynamic(&sc->sc_ev_soft_intr, EVCNT_TYPE_INTR, 423 NULL, xname, "soft intr"); 424 evcnt_attach_dynamic(&sc->sc_ev_work, EVCNT_TYPE_MISC, 425 NULL, xname, "work items"); 426 evcnt_attach_dynamic(&sc->sc_ev_tx_stall, EVCNT_TYPE_MISC, 427 NULL, xname, "tx stalls"); 428 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_lo, EVCNT_TYPE_MISC, 429 NULL, xname, "rx badmagic lo"); 430 evcnt_attach_dynamic(&sc->sc_ev_rx_badmagic_hi, EVCNT_TYPE_MISC, 431 NULL, xname, "rx badmagic hi"); 432 #endif 433 434 return; 435 436 fail_5: 437 ifmedia_removeall(&sc->sc_media); 438 fail_4: 439 intr_disestablish(sc->sc_ih); 440 fail_3: 441 softint_disestablish(sc->sc_soft_ih); 442 fail_2: 443 workqueue_destroy(sc->sc_workq); 444 fail_1: 445 mutex_obj_free(sc->sc_lock); 446 mutex_obj_free(sc->sc_hwlock); 447 } 448 449 static int 450 bcmeth_mediachange(struct ifnet *ifp) 451 { 452 //struct bcmeth_softc * const sc = ifp->if_softc; 453 return 0; 454 } 455 456 static void 457 bcmeth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifm) 458 { 459 //struct bcmeth_softc * const sc = ifp->if_softc; 460 461 ifm->ifm_status = IFM_AVALID | IFM_ACTIVE; 462 ifm->ifm_active = IFM_ETHER | IFM_FDX | IFM_1000_T; 463 } 464 465 static uint64_t 466 bcmeth_macaddr_create(const uint8_t *enaddr) 467 { 468 return (enaddr[3] << 0) // UNIMAC_MAC_0 469 | (enaddr[2] << 8) // UNIMAC_MAC_0 470 | (enaddr[1] << 16) // UNIMAC_MAC_0 471 | ((uint64_t)enaddr[0] << 24) // UNIMAC_MAC_0 472 | ((uint64_t)enaddr[5] << 32) // UNIMAC_MAC_1 473 | ((uint64_t)enaddr[4] << 40); // UNIMAC_MAC_1 474 } 475 476 static int 477 bcmeth_ifinit(struct ifnet *ifp) 478 { 479 struct bcmeth_softc * const sc = ifp->if_softc; 480 int error = 0; 481 482 sc->sc_maxfrm = uimax(ifp->if_mtu + 32, MCLBYTES); 483 if (ifp->if_mtu > ETHERMTU_JUMBO) 484 return error; 485 486 KASSERT(ifp->if_flags & IFF_UP); 487 488 /* 489 * Stop the interface 490 */ 491 bcmeth_ifstop(ifp, 0); 492 493 /* 494 * Reserve enough space at the front so that we can insert a maxsized 495 * link header and a VLAN tag. Also make sure we have enough room for 496 * the rcvsts field as well. 497 */ 498 KASSERT(ALIGN(max_linkhdr) == max_linkhdr); 499 KASSERTMSG(max_linkhdr > sizeof(struct ether_header), "%u > %zu", 500 max_linkhdr, sizeof(struct ether_header)); 501 sc->sc_rcvoffset = max_linkhdr + 4 - sizeof(struct ether_header); 502 if (sc->sc_rcvoffset <= 4) 503 sc->sc_rcvoffset += 4; 504 KASSERT((sc->sc_rcvoffset & 3) == 2); 505 KASSERT(sc->sc_rcvoffset <= __SHIFTOUT(RCVCTL_RCVOFFSET, RCVCTL_RCVOFFSET)); 506 KASSERT(sc->sc_rcvoffset >= 6); 507 508 /* 509 * If our frame size has changed (or it's our first time through) 510 * destroy the existing transmit mapcache. 511 */ 512 if (sc->sc_tx_mapcache != NULL 513 && sc->sc_maxfrm != sc->sc_tx_mapcache->dmc_maxmapsize) { 514 bcmeth_mapcache_destroy(sc, sc->sc_tx_mapcache); 515 sc->sc_tx_mapcache = NULL; 516 } 517 518 if (sc->sc_tx_mapcache == NULL) { 519 error = bcmeth_mapcache_create(sc, &sc->sc_tx_mapcache, 520 BCMETH_MAXTXMBUFS, sc->sc_maxfrm, BCMETH_NTXSEGS); 521 if (error) 522 return error; 523 } 524 525 sc->sc_cmdcfg = NO_LENGTH_CHECK | PAUSE_IGNORE 526 | __SHIFTIN(ETH_SPEED_1000, ETH_SPEED) 527 | RX_ENA | TX_ENA; 528 529 if (ifp->if_flags & IFF_PROMISC) { 530 sc->sc_cmdcfg |= PROMISC_EN; 531 } else { 532 sc->sc_cmdcfg &= ~PROMISC_EN; 533 } 534 535 const uint8_t * const lladdr = CLLADDR(ifp->if_sadl); 536 const uint64_t macstnaddr = bcmeth_macaddr_create(lladdr); 537 538 /* 539 * We make sure that a received Ethernet packet start on a non-word 540 * boundary so that the packet payload will be on a word boundary. 541 * So to check the destination address we keep around two words to 542 * quickly compare with. 543 */ 544 #if __ARMEL__ 545 sc->sc_macaddr[0] = lladdr[0] | (lladdr[1] << 8); 546 sc->sc_macaddr[1] = lladdr[2] | (lladdr[3] << 8) 547 | (lladdr[4] << 16) | (lladdr[5] << 24); 548 #else 549 sc->sc_macaddr[0] = lladdr[1] | (lladdr[0] << 8); 550 sc->sc_macaddr[1] = lladdr[5] | (lladdr[4] << 8) 551 | (lladdr[1] << 16) | (lladdr[2] << 24); 552 #endif 553 554 sc->sc_intmask = DESCPROTOERR | DATAERR | DESCERR; 555 556 /* 5. Load RCVADDR_LO with new pointer */ 557 bcmeth_rxq_reset(sc, &sc->sc_rxq); 558 559 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 560 __SHIFTIN(sc->sc_rcvoffset, RCVCTL_RCVOFFSET) 561 | RCVCTL_PARITY_DIS 562 | RCVCTL_OFLOW_CONTINUE 563 | __SHIFTIN(3, RCVCTL_BURSTLEN)); 564 565 /* 6. Load XMTADDR_LO with new pointer */ 566 bcmeth_txq_reset(sc, &sc->sc_txq); 567 568 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, XMTCTL_DMA_ACT_INDEX 569 | XMTCTL_PARITY_DIS 570 | __SHIFTIN(3, XMTCTL_BURSTLEN)); 571 572 /* 7. Setup other UNIMAC registers */ 573 bcmeth_write_4(sc, UNIMAC_FRAME_LEN, sc->sc_maxfrm); 574 bcmeth_write_4(sc, UNIMAC_MAC_0, (uint32_t)(macstnaddr >> 0)); 575 bcmeth_write_4(sc, UNIMAC_MAC_1, (uint32_t)(macstnaddr >> 32)); 576 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, sc->sc_cmdcfg); 577 578 uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); 579 devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 580 devctl &= ~FLOW_CTRL_MODE; 581 devctl &= ~MIB_RD_RESET_EN; 582 devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 583 devctl &= ~CPU_FLOW_CTRL_ON; 584 bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 585 586 /* Setup lazy receive (at most 1ms). */ 587 const struct cpu_softc * const cpu = curcpu()->ci_softc; 588 sc->sc_rcvlazy = __SHIFTIN(4, INTRCVLAZY_FRAMECOUNT) 589 | __SHIFTIN(cpu->cpu_clk.clk_apb / 1000, INTRCVLAZY_TIMEOUT); 590 bcmeth_write_4(sc, GMAC_INTRCVLAZY, sc->sc_rcvlazy); 591 592 /* 11. Enable transmit queues in TQUEUE, and ensure that the transmit scheduling mode is correctly set in TCTRL. */ 593 sc->sc_intmask |= XMTINT_0 | XMTUF; 594 bcmeth_write_4(sc, sc->sc_txq.txq_reg_xmtctl, 595 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl) | XMTCTL_ENABLE); 596 597 598 /* 12. Enable receive queues in RQUEUE, */ 599 sc->sc_intmask |= RCVINT | RCVDESCUF | RCVFIFOOF; 600 bcmeth_write_4(sc, sc->sc_rxq.rxq_reg_rcvctl, 601 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl) | RCVCTL_ENABLE); 602 603 bcmeth_rxq_produce(sc, &sc->sc_rxq); /* fill with rx buffers */ 604 605 #if 0 606 aprint_normal_dev(sc->sc_dev, 607 "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 608 devctl, sc->sc_cmdcfg, 609 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtctl), 610 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvctl)); 611 #endif 612 613 sc->sc_soft_flags = 0; 614 615 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 616 617 ifp->if_flags |= IFF_RUNNING; 618 619 return error; 620 } 621 622 static void 623 bcmeth_ifstop(struct ifnet *ifp, int disable) 624 { 625 struct bcmeth_softc * const sc = ifp->if_softc; 626 struct bcmeth_txqueue * const txq = &sc->sc_txq; 627 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 628 629 KASSERT(!cpu_intr_p()); 630 631 sc->sc_soft_flags = 0; 632 sc->sc_work_flags = 0; 633 634 /* Disable Rx processing */ 635 bcmeth_write_4(sc, rxq->rxq_reg_rcvctl, 636 bcmeth_read_4(sc, rxq->rxq_reg_rcvctl) & ~RCVCTL_ENABLE); 637 638 /* Disable Tx processing */ 639 bcmeth_write_4(sc, txq->txq_reg_xmtctl, 640 bcmeth_read_4(sc, txq->txq_reg_xmtctl) & ~XMTCTL_ENABLE); 641 642 /* Disable all interrupts */ 643 bcmeth_write_4(sc, GMAC_INTMASK, 0); 644 645 for (;;) { 646 uint32_t tx0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 647 uint32_t rx0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 648 if (__SHIFTOUT(tx0, XMTSTATE) == XMTSTATE_DIS 649 && __SHIFTOUT(rx0, RCVSTATE) == RCVSTATE_DIS) 650 break; 651 delay(50); 652 } 653 /* 654 * Now reset the controller. 655 * 656 * 3. Set SW_RESET bit in UNIMAC_COMMAND_CONFIG register 657 * 4. Clear SW_RESET bit in UNIMAC_COMMAND_CONFIG register 658 */ 659 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, SW_RESET); 660 bcmeth_write_4(sc, GMAC_INTSTATUS, ~0); 661 sc->sc_intmask = 0; 662 ifp->if_flags &= ~IFF_RUNNING; 663 664 /* 665 * Let's consume any remaining transmitted packets. And if we are 666 * disabling the interface, purge ourselves of any untransmitted 667 * packets. But don't consume any received packets, just drop them. 668 * If we aren't disabling the interface, save the mbufs in the 669 * receive queue for reuse. 670 */ 671 bcmeth_rxq_purge(sc, &sc->sc_rxq, disable); 672 bcmeth_txq_consume(sc, &sc->sc_txq); 673 if (disable) { 674 bcmeth_txq_purge(sc, &sc->sc_txq); 675 IF_PURGE(&ifp->if_snd); 676 } 677 678 bcmeth_write_4(sc, UNIMAC_COMMAND_CONFIG, 0); 679 } 680 681 static void 682 bcmeth_ifwatchdog(struct ifnet *ifp) 683 { 684 } 685 686 static int 687 bcmeth_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 688 { 689 const int s = splnet(); 690 int error; 691 692 switch (cmd) { 693 default: 694 error = ether_ioctl(ifp, cmd, data); 695 if (error != ENETRESET) 696 break; 697 698 if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) { 699 error = 0; 700 break; 701 } 702 error = bcmeth_ifinit(ifp); 703 break; 704 } 705 706 splx(s); 707 return error; 708 } 709 710 static void 711 bcmeth_rxq_desc_presync( 712 struct bcmeth_softc *sc, 713 struct bcmeth_rxqueue *rxq, 714 struct gmac_rxdb *rxdb, 715 size_t count) 716 { 717 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 718 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 719 BUS_DMASYNC_PREWRITE); 720 } 721 722 static void 723 bcmeth_rxq_desc_postsync( 724 struct bcmeth_softc *sc, 725 struct bcmeth_rxqueue *rxq, 726 struct gmac_rxdb *rxdb, 727 size_t count) 728 { 729 bus_dmamap_sync(sc->sc_dmat, rxq->rxq_descmap, 730 (rxdb - rxq->rxq_first) * sizeof(*rxdb), count * sizeof(*rxdb), 731 BUS_DMASYNC_POSTWRITE); 732 } 733 734 static void 735 bcmeth_txq_desc_presync( 736 struct bcmeth_softc *sc, 737 struct bcmeth_txqueue *txq, 738 struct gmac_txdb *txdb, 739 size_t count) 740 { 741 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 742 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 743 BUS_DMASYNC_PREWRITE); 744 } 745 746 static void 747 bcmeth_txq_desc_postsync( 748 struct bcmeth_softc *sc, 749 struct bcmeth_txqueue *txq, 750 struct gmac_txdb *txdb, 751 size_t count) 752 { 753 bus_dmamap_sync(sc->sc_dmat, txq->txq_descmap, 754 (txdb - txq->txq_first) * sizeof(*txdb), count * sizeof(*txdb), 755 BUS_DMASYNC_POSTWRITE); 756 } 757 758 static bus_dmamap_t 759 bcmeth_mapcache_get( 760 struct bcmeth_softc *sc, 761 struct bcmeth_mapcache *dmc) 762 { 763 KASSERT(dmc->dmc_nmaps > 0); 764 KASSERT(dmc->dmc_maps[dmc->dmc_nmaps-1] != NULL); 765 return dmc->dmc_maps[--dmc->dmc_nmaps]; 766 } 767 768 static void 769 bcmeth_mapcache_put( 770 struct bcmeth_softc *sc, 771 struct bcmeth_mapcache *dmc, 772 bus_dmamap_t map) 773 { 774 KASSERT(map != NULL); 775 KASSERT(dmc->dmc_nmaps < dmc->dmc_maxmaps); 776 dmc->dmc_maps[dmc->dmc_nmaps++] = map; 777 } 778 779 static void 780 bcmeth_mapcache_destroy( 781 struct bcmeth_softc *sc, 782 struct bcmeth_mapcache *dmc) 783 { 784 const size_t dmc_size = 785 offsetof(struct bcmeth_mapcache, dmc_maps[dmc->dmc_maxmaps]); 786 787 for (u_int i = 0; i < dmc->dmc_maxmaps; i++) { 788 bus_dmamap_destroy(sc->sc_dmat, dmc->dmc_maps[i]); 789 } 790 kmem_intr_free(dmc, dmc_size); 791 } 792 793 static int 794 bcmeth_mapcache_create( 795 struct bcmeth_softc *sc, 796 struct bcmeth_mapcache **dmc_p, 797 size_t maxmaps, 798 size_t maxmapsize, 799 size_t maxseg) 800 { 801 const size_t dmc_size = 802 offsetof(struct bcmeth_mapcache, dmc_maps[maxmaps]); 803 struct bcmeth_mapcache * const dmc = 804 kmem_intr_zalloc(dmc_size, KM_NOSLEEP); 805 806 dmc->dmc_maxmaps = maxmaps; 807 dmc->dmc_nmaps = maxmaps; 808 dmc->dmc_maxmapsize = maxmapsize; 809 dmc->dmc_maxseg = maxseg; 810 811 for (u_int i = 0; i < maxmaps; i++) { 812 int error = bus_dmamap_create(sc->sc_dmat, dmc->dmc_maxmapsize, 813 dmc->dmc_maxseg, dmc->dmc_maxmapsize, 0, 814 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, &dmc->dmc_maps[i]); 815 if (error) { 816 aprint_error_dev(sc->sc_dev, 817 "failed to creat dma map cache " 818 "entry %u of %zu: %d\n", 819 i, maxmaps, error); 820 while (i-- > 0) { 821 bus_dmamap_destroy(sc->sc_dmat, 822 dmc->dmc_maps[i]); 823 } 824 kmem_intr_free(dmc, dmc_size); 825 return error; 826 } 827 KASSERT(dmc->dmc_maps[i] != NULL); 828 } 829 830 *dmc_p = dmc; 831 832 return 0; 833 } 834 835 #if 0 836 static void 837 bcmeth_dmamem_free( 838 bus_dma_tag_t dmat, 839 size_t map_size, 840 bus_dma_segment_t *seg, 841 bus_dmamap_t map, 842 void *kvap) 843 { 844 bus_dmamap_destroy(dmat, map); 845 bus_dmamem_unmap(dmat, kvap, map_size); 846 bus_dmamem_free(dmat, seg, 1); 847 } 848 #endif 849 850 static int 851 bcmeth_dmamem_alloc( 852 bus_dma_tag_t dmat, 853 size_t map_size, 854 bus_dma_segment_t *seg, 855 bus_dmamap_t *map, 856 void **kvap) 857 { 858 int error; 859 int nseg; 860 861 *kvap = NULL; 862 *map = NULL; 863 864 error = bus_dmamem_alloc(dmat, map_size, 2*PAGE_SIZE, 0, 865 seg, 1, &nseg, 0); 866 if (error) 867 return error; 868 869 KASSERT(nseg == 1); 870 871 error = bus_dmamem_map(dmat, seg, nseg, map_size, (void **)kvap, 0); 872 if (error == 0) { 873 error = bus_dmamap_create(dmat, map_size, 1, map_size, 0, 0, 874 map); 875 if (error == 0) { 876 error = bus_dmamap_load(dmat, *map, *kvap, map_size, 877 NULL, 0); 878 if (error == 0) 879 return 0; 880 bus_dmamap_destroy(dmat, *map); 881 *map = NULL; 882 } 883 bus_dmamem_unmap(dmat, *kvap, map_size); 884 *kvap = NULL; 885 } 886 bus_dmamem_free(dmat, seg, nseg); 887 return 0; 888 } 889 890 static struct mbuf * 891 bcmeth_rx_buf_alloc( 892 struct bcmeth_softc *sc) 893 { 894 struct mbuf *m = m_gethdr(M_DONTWAIT, MT_DATA); 895 if (m == NULL) { 896 printf("%s:%d: %s\n", __func__, __LINE__, "m_gethdr"); 897 return NULL; 898 } 899 MCLGET(m, M_DONTWAIT); 900 if ((m->m_flags & M_EXT) == 0) { 901 printf("%s:%d: %s\n", __func__, __LINE__, "MCLGET"); 902 m_freem(m); 903 return NULL; 904 } 905 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; 906 907 bus_dmamap_t map = bcmeth_mapcache_get(sc, sc->sc_rx_mapcache); 908 if (map == NULL) { 909 printf("%s:%d: %s\n", __func__, __LINE__, "map get"); 910 m_freem(m); 911 return NULL; 912 } 913 M_SETCTX(m, map); 914 m->m_len = m->m_pkthdr.len = MCLBYTES; 915 int error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 916 BUS_DMA_READ | BUS_DMA_NOWAIT); 917 if (error) { 918 aprint_error_dev(sc->sc_dev, "fail to load rx dmamap: %d\n", 919 error); 920 M_SETCTX(m, NULL); 921 m_freem(m); 922 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 923 return NULL; 924 } 925 KASSERT(map->dm_mapsize == MCLBYTES); 926 #ifdef BCMETH_RCVMAGIC 927 *mtod(m, uint32_t *) = htole32(BCMETH_RCVMAGIC); 928 bus_dmamap_sync(sc->sc_dmat, map, 0, sizeof(uint32_t), 929 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 930 bus_dmamap_sync(sc->sc_dmat, map, sizeof(uint32_t), 931 map->dm_mapsize - sizeof(uint32_t), BUS_DMASYNC_PREREAD); 932 #else 933 bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 934 BUS_DMASYNC_PREREAD); 935 #endif 936 937 return m; 938 } 939 940 static void 941 bcmeth_rx_map_unload( 942 struct bcmeth_softc *sc, 943 struct mbuf *m) 944 { 945 KASSERT(m); 946 for (; m != NULL; m = m->m_next) { 947 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 948 KASSERT(map); 949 KASSERT(map->dm_mapsize == MCLBYTES); 950 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_len, 951 BUS_DMASYNC_POSTREAD); 952 bus_dmamap_unload(sc->sc_dmat, map); 953 bcmeth_mapcache_put(sc, sc->sc_rx_mapcache, map); 954 M_SETCTX(m, NULL); 955 } 956 } 957 958 static bool 959 bcmeth_rxq_produce( 960 struct bcmeth_softc *sc, 961 struct bcmeth_rxqueue *rxq) 962 { 963 struct gmac_rxdb *producer = rxq->rxq_producer; 964 bool produced = false; 965 966 while (rxq->rxq_inuse < rxq->rxq_threshold) { 967 struct mbuf *m; 968 IF_DEQUEUE(&sc->sc_rx_bufcache, m); 969 if (m == NULL) { 970 m = bcmeth_rx_buf_alloc(sc); 971 if (m == NULL) { 972 printf("%s: bcmeth_rx_buf_alloc failed\n", 973 __func__); 974 break; 975 } 976 } 977 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 978 KASSERT(map); 979 980 producer->rxdb_buflen = htole32(MCLBYTES); 981 producer->rxdb_addrlo = htole32(map->dm_segs[0].ds_addr); 982 producer->rxdb_flags &= htole32(RXDB_FLAG_ET); 983 *rxq->rxq_mtail = m; 984 rxq->rxq_mtail = &m->m_next; 985 m->m_len = MCLBYTES; 986 m->m_next = NULL; 987 rxq->rxq_inuse++; 988 if (++producer == rxq->rxq_last) { 989 membar_producer(); 990 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 991 rxq->rxq_last - rxq->rxq_producer); 992 producer = rxq->rxq_producer = rxq->rxq_first; 993 } 994 produced = true; 995 } 996 if (produced) { 997 membar_producer(); 998 if (producer != rxq->rxq_producer) { 999 bcmeth_rxq_desc_presync(sc, rxq, rxq->rxq_producer, 1000 producer - rxq->rxq_producer); 1001 rxq->rxq_producer = producer; 1002 } 1003 bcmeth_write_4(sc, rxq->rxq_reg_rcvptr, 1004 rxq->rxq_descmap->dm_segs[0].ds_addr 1005 + ((uintptr_t)producer & RCVPTR)); 1006 } 1007 return true; 1008 } 1009 1010 static void 1011 bcmeth_rx_input( 1012 struct bcmeth_softc *sc, 1013 struct mbuf *m, 1014 uint32_t rxdb_flags) 1015 { 1016 struct ifnet * const ifp = &sc->sc_if; 1017 1018 bcmeth_rx_map_unload(sc, m); 1019 1020 m_adj(m, sc->sc_rcvoffset); 1021 1022 /* 1023 * If we are in promiscuous mode and this isn't a multicast, check the 1024 * destination address to make sure it matches our own. If it doesn't, 1025 * mark the packet as being received promiscuously. 1026 */ 1027 if ((sc->sc_cmdcfg & PROMISC_EN) 1028 && (m->m_data[0] & 1) == 0 1029 && (*(uint16_t *)&m->m_data[0] != sc->sc_macaddr[0] 1030 || *(uint32_t *)&m->m_data[2] != sc->sc_macaddr[1])) { 1031 m->m_flags |= M_PROMISC; 1032 } 1033 m_set_rcvif(m, ifp); 1034 1035 /* 1036 * Let's give it to the network subsystm to deal with. 1037 */ 1038 #ifdef BCMETH_MPSAFE 1039 mutex_exit(sc->sc_lock); 1040 if_input(ifp, m); 1041 mutex_enter(sc->sc_lock); 1042 #else 1043 int s = splnet(); 1044 if_input(ifp, m); 1045 splx(s); 1046 #endif 1047 } 1048 1049 static bool 1050 bcmeth_rxq_consume( 1051 struct bcmeth_softc *sc, 1052 struct bcmeth_rxqueue *rxq, 1053 size_t atmost) 1054 { 1055 struct ifnet * const ifp = &sc->sc_if; 1056 struct gmac_rxdb *consumer = rxq->rxq_consumer; 1057 size_t rxconsumed = 0; 1058 bool didconsume = false; 1059 1060 while (atmost-- > 0) { 1061 if (consumer == rxq->rxq_producer) { 1062 KASSERT(rxq->rxq_inuse == 0); 1063 break; 1064 } 1065 1066 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1067 uint32_t currdscr = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1068 if (consumer == rxq->rxq_first + currdscr) { 1069 break; 1070 } 1071 bcmeth_rxq_desc_postsync(sc, rxq, consumer, 1); 1072 1073 /* 1074 * We own this packet again. Copy the rxsts word from it. 1075 */ 1076 rxconsumed++; 1077 didconsume = true; 1078 uint32_t rxsts; 1079 KASSERT(rxq->rxq_mhead != NULL); 1080 bus_dmamap_t map = M_GETCTX(rxq->rxq_mhead, bus_dmamap_t); 1081 bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align, 1082 BUS_DMASYNC_POSTREAD); 1083 memcpy(&rxsts, rxq->rxq_mhead->m_data, 4); 1084 rxsts = le32toh(rxsts); 1085 #if 0 1086 KASSERTMSG(rxsts != BCMETH_RCVMAGIC, "currdscr=%u consumer=%zd", 1087 currdscr, consumer - rxq->rxq_first); 1088 #endif 1089 1090 /* 1091 * Get the count of descriptors. Fetch the correct number 1092 * of mbufs. 1093 */ 1094 #ifdef BCMETH_RCVMAGIC 1095 size_t desc_count = rxsts != BCMETH_RCVMAGIC 1096 ? __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1 : 1; 1097 #else 1098 size_t desc_count = __SHIFTOUT(rxsts, RXSTS_DESC_COUNT) + 1; 1099 #endif 1100 struct mbuf *m = rxq->rxq_mhead; 1101 struct mbuf *m_last = m; 1102 for (size_t i = 1; i < desc_count; i++) { 1103 if (++consumer == rxq->rxq_last) { 1104 consumer = rxq->rxq_first; 1105 } 1106 KASSERTMSG(consumer != rxq->rxq_first + currdscr, 1107 "i=%zu rxsts=%#x desc_count=%zu currdscr=%u " 1108 "consumer=%zd", i, rxsts, desc_count, currdscr, 1109 consumer - rxq->rxq_first); 1110 m_last = m_last->m_next; 1111 } 1112 1113 /* 1114 * Now remove it/them from the list of enqueued mbufs. 1115 */ 1116 if ((rxq->rxq_mhead = m_last->m_next) == NULL) 1117 rxq->rxq_mtail = &rxq->rxq_mhead; 1118 m_last->m_next = NULL; 1119 1120 #ifdef BCMETH_RCVMAGIC 1121 if (rxsts == BCMETH_RCVMAGIC) { 1122 if_statinc(ifp, if_ierrors); 1123 if ((m->m_ext.ext_paddr >> 28) == 8) { 1124 BCMETH_EVCNT_INCR(sc->sc_ev_rx_badmagic_lo); 1125 } else { 1126 BCMETH_EVCNT_INCR( sc->sc_ev_rx_badmagic_hi); 1127 } 1128 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1129 } else 1130 #endif /* BCMETH_RCVMAGIC */ 1131 if (rxsts 1132 & (RXSTS_CRC_ERROR |RXSTS_OVERSIZED |RXSTS_PKT_OVERFLOW)) { 1133 aprint_error_dev(sc->sc_dev, 1134 "[%zu]: count=%zu rxsts=%#x\n", 1135 consumer - rxq->rxq_first, desc_count, rxsts); 1136 /* 1137 * We encountered an error, take the mbufs and add them 1138 * to the rx bufcache so we can quickly reuse them. 1139 */ 1140 if_statinc(ifp, if_ierrors); 1141 do { 1142 struct mbuf *m0 = m->m_next; 1143 m->m_next = NULL; 1144 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1145 m = m0; 1146 } while (m); 1147 } else { 1148 uint32_t framelen = __SHIFTOUT(rxsts, RXSTS_FRAMELEN); 1149 framelen += sc->sc_rcvoffset; 1150 m->m_pkthdr.len = framelen; 1151 if (desc_count == 1) { 1152 KASSERT(framelen <= MCLBYTES); 1153 m->m_len = framelen; 1154 } else { 1155 m_last->m_len = framelen & (MCLBYTES - 1); 1156 } 1157 1158 #ifdef BCMETH_MPSAFE 1159 /* 1160 * Wrap at the last entry! 1161 */ 1162 if (++consumer == rxq->rxq_last) { 1163 KASSERT(consumer[-1].rxdb_flags 1164 & htole32(RXDB_FLAG_ET)); 1165 rxq->rxq_consumer = rxq->rxq_first; 1166 } else { 1167 rxq->rxq_consumer = consumer; 1168 } 1169 rxq->rxq_inuse -= rxconsumed; 1170 #endif /* BCMETH_MPSAFE */ 1171 1172 /* 1173 * Receive the packet (which releases our lock) 1174 */ 1175 bcmeth_rx_input(sc, m, rxsts); 1176 1177 #ifdef BCMETH_MPSAFE 1178 /* 1179 * Since we had to give up our lock, we need to 1180 * refresh these. 1181 */ 1182 consumer = rxq->rxq_consumer; 1183 rxconsumed = 0; 1184 continue; 1185 #endif /* BCMETH_MPSAFE */ 1186 } 1187 1188 /* 1189 * Wrap at the last entry! 1190 */ 1191 if (++consumer == rxq->rxq_last) { 1192 KASSERT(consumer[-1].rxdb_flags & htole32(RXDB_FLAG_ET)); 1193 consumer = rxq->rxq_first; 1194 } 1195 } 1196 1197 /* 1198 * Update queue info. 1199 */ 1200 rxq->rxq_consumer = consumer; 1201 rxq->rxq_inuse -= rxconsumed; 1202 1203 /* 1204 * Did we consume anything? 1205 */ 1206 return didconsume; 1207 } 1208 1209 static void 1210 bcmeth_rxq_purge( 1211 struct bcmeth_softc *sc, 1212 struct bcmeth_rxqueue *rxq, 1213 bool discard) 1214 { 1215 struct mbuf *m; 1216 1217 if ((m = rxq->rxq_mhead) != NULL) { 1218 if (discard) { 1219 bcmeth_rx_map_unload(sc, m); 1220 m_freem(m); 1221 } else { 1222 while (m != NULL) { 1223 struct mbuf *m0 = m->m_next; 1224 m->m_next = NULL; 1225 IF_ENQUEUE(&sc->sc_rx_bufcache, m); 1226 m = m0; 1227 } 1228 } 1229 } 1230 1231 rxq->rxq_mhead = NULL; 1232 rxq->rxq_mtail = &rxq->rxq_mhead; 1233 rxq->rxq_inuse = 0; 1234 } 1235 1236 static void 1237 bcmeth_rxq_reset( 1238 struct bcmeth_softc *sc, 1239 struct bcmeth_rxqueue *rxq) 1240 { 1241 /* 1242 * sync all the descriptors 1243 */ 1244 bcmeth_rxq_desc_postsync(sc, rxq, rxq->rxq_first, 1245 rxq->rxq_last - rxq->rxq_first); 1246 1247 /* 1248 * Make sure we own all descriptors in the ring. 1249 */ 1250 struct gmac_rxdb *rxdb; 1251 for (rxdb = rxq->rxq_first; rxdb < rxq->rxq_last - 1; rxdb++) { 1252 rxdb->rxdb_flags = htole32(RXDB_FLAG_IC); 1253 } 1254 1255 /* 1256 * Last descriptor has the wrap flag. 1257 */ 1258 rxdb->rxdb_flags = htole32(RXDB_FLAG_ET | RXDB_FLAG_IC); 1259 1260 /* 1261 * Reset the producer consumer indexes. 1262 */ 1263 rxq->rxq_consumer = rxq->rxq_first; 1264 rxq->rxq_producer = rxq->rxq_first; 1265 rxq->rxq_inuse = 0; 1266 if (rxq->rxq_threshold < BCMETH_MINRXMBUFS) 1267 rxq->rxq_threshold = BCMETH_MINRXMBUFS; 1268 1269 sc->sc_intmask |= RCVINT | RCVFIFOOF | RCVDESCUF; 1270 1271 /* 1272 * Restart the receiver at the first descriptor 1273 */ 1274 bcmeth_write_4(sc, rxq->rxq_reg_rcvaddrlo, 1275 rxq->rxq_descmap->dm_segs[0].ds_addr); 1276 } 1277 1278 static int 1279 bcmeth_rxq_attach( 1280 struct bcmeth_softc *sc, 1281 struct bcmeth_rxqueue *rxq, 1282 u_int qno) 1283 { 1284 size_t desc_count = BCMETH_RINGSIZE / sizeof(rxq->rxq_first[0]); 1285 int error; 1286 void *descs; 1287 1288 KASSERT(desc_count == 256 || desc_count == 512); 1289 1290 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1291 &rxq->rxq_descmap_seg, &rxq->rxq_descmap, &descs); 1292 if (error) 1293 return error; 1294 1295 memset(descs, 0, BCMETH_RINGSIZE); 1296 rxq->rxq_first = descs; 1297 rxq->rxq_last = rxq->rxq_first + desc_count; 1298 rxq->rxq_consumer = descs; 1299 rxq->rxq_producer = descs; 1300 1301 bcmeth_rxq_purge(sc, rxq, true); 1302 bcmeth_rxq_reset(sc, rxq); 1303 1304 rxq->rxq_reg_rcvaddrlo = GMAC_RCVADDR_LOW; 1305 rxq->rxq_reg_rcvctl = GMAC_RCVCONTROL; 1306 rxq->rxq_reg_rcvptr = GMAC_RCVPTR; 1307 rxq->rxq_reg_rcvsts0 = GMAC_RCVSTATUS0; 1308 rxq->rxq_reg_rcvsts1 = GMAC_RCVSTATUS1; 1309 1310 return 0; 1311 } 1312 1313 static bool 1314 bcmeth_txq_active_p( 1315 struct bcmeth_softc * const sc, 1316 struct bcmeth_txqueue *txq) 1317 { 1318 return !IF_IS_EMPTY(&txq->txq_mbufs); 1319 } 1320 1321 static bool 1322 bcmeth_txq_fillable_p( 1323 struct bcmeth_softc * const sc, 1324 struct bcmeth_txqueue *txq) 1325 { 1326 return txq->txq_free >= txq->txq_threshold; 1327 } 1328 1329 static int 1330 bcmeth_txq_attach( 1331 struct bcmeth_softc *sc, 1332 struct bcmeth_txqueue *txq, 1333 u_int qno) 1334 { 1335 size_t desc_count = BCMETH_RINGSIZE / sizeof(txq->txq_first[0]); 1336 int error; 1337 void *descs; 1338 1339 KASSERT(desc_count == 256 || desc_count == 512); 1340 1341 error = bcmeth_dmamem_alloc(sc->sc_dmat, BCMETH_RINGSIZE, 1342 &txq->txq_descmap_seg, &txq->txq_descmap, &descs); 1343 if (error) 1344 return error; 1345 1346 memset(descs, 0, BCMETH_RINGSIZE); 1347 txq->txq_first = descs; 1348 txq->txq_last = txq->txq_first + desc_count; 1349 txq->txq_consumer = descs; 1350 txq->txq_producer = descs; 1351 1352 IFQ_SET_MAXLEN(&txq->txq_mbufs, BCMETH_MAXTXMBUFS); 1353 1354 txq->txq_reg_xmtaddrlo = GMAC_XMTADDR_LOW; 1355 txq->txq_reg_xmtctl = GMAC_XMTCONTROL; 1356 txq->txq_reg_xmtptr = GMAC_XMTPTR; 1357 txq->txq_reg_xmtsts0 = GMAC_XMTSTATUS0; 1358 txq->txq_reg_xmtsts1 = GMAC_XMTSTATUS1; 1359 1360 bcmeth_txq_reset(sc, txq); 1361 1362 return 0; 1363 } 1364 1365 static int 1366 bcmeth_txq_map_load( 1367 struct bcmeth_softc *sc, 1368 struct bcmeth_txqueue *txq, 1369 struct mbuf *m) 1370 { 1371 bus_dmamap_t map; 1372 int error; 1373 1374 map = M_GETCTX(m, bus_dmamap_t); 1375 if (map != NULL) 1376 return 0; 1377 1378 map = bcmeth_mapcache_get(sc, sc->sc_tx_mapcache); 1379 if (map == NULL) 1380 return ENOMEM; 1381 1382 error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 1383 BUS_DMA_WRITE | BUS_DMA_NOWAIT); 1384 if (error) 1385 return error; 1386 1387 bus_dmamap_sync(sc->sc_dmat, map, 0, m->m_pkthdr.len, 1388 BUS_DMASYNC_PREWRITE); 1389 M_SETCTX(m, map); 1390 return 0; 1391 } 1392 1393 static void 1394 bcmeth_txq_map_unload( 1395 struct bcmeth_softc *sc, 1396 struct bcmeth_txqueue *txq, 1397 struct mbuf *m) 1398 { 1399 KASSERT(m); 1400 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1401 bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 1402 BUS_DMASYNC_POSTWRITE); 1403 bus_dmamap_unload(sc->sc_dmat, map); 1404 bcmeth_mapcache_put(sc, sc->sc_tx_mapcache, map); 1405 } 1406 1407 static bool 1408 bcmeth_txq_produce( 1409 struct bcmeth_softc *sc, 1410 struct bcmeth_txqueue *txq, 1411 struct mbuf *m) 1412 { 1413 bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); 1414 1415 if (map->dm_nsegs > txq->txq_free) 1416 return false; 1417 1418 /* 1419 * TCP Offload flag must be set in the first descriptor. 1420 */ 1421 struct gmac_txdb *producer = txq->txq_producer; 1422 uint32_t first_flags = TXDB_FLAG_SF; 1423 uint32_t last_flags = TXDB_FLAG_EF; 1424 1425 /* 1426 * If we've produced enough descriptors without consuming any 1427 * we need to ask for an interrupt to reclaim some. 1428 */ 1429 txq->txq_lastintr += map->dm_nsegs; 1430 if (txq->txq_lastintr >= txq->txq_threshold 1431 || txq->txq_mbufs.ifq_len + 1 == txq->txq_mbufs.ifq_maxlen) { 1432 txq->txq_lastintr = 0; 1433 last_flags |= TXDB_FLAG_IC; 1434 } 1435 1436 KASSERT(producer != txq->txq_last); 1437 1438 struct gmac_txdb *start = producer; 1439 size_t count = map->dm_nsegs; 1440 producer->txdb_flags |= htole32(first_flags); 1441 producer->txdb_addrlo = htole32(map->dm_segs[0].ds_addr); 1442 producer->txdb_buflen = htole32(map->dm_segs[0].ds_len); 1443 for (u_int i = 1; i < map->dm_nsegs; i++) { 1444 #if 0 1445 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1446 le32toh(producer->txdb_flags), 1447 le32toh(producer->txdb_buflen), 1448 le32toh(producer->txdb_addrlo), 1449 le32toh(producer->txdb_addrhi)); 1450 #endif 1451 if (__predict_false(++producer == txq->txq_last)) { 1452 bcmeth_txq_desc_presync(sc, txq, start, 1453 txq->txq_last - start); 1454 count -= txq->txq_last - start; 1455 producer = txq->txq_first; 1456 start = txq->txq_first; 1457 } 1458 producer->txdb_addrlo = htole32(map->dm_segs[i].ds_addr); 1459 producer->txdb_buflen = htole32(map->dm_segs[i].ds_len); 1460 } 1461 producer->txdb_flags |= htole32(last_flags); 1462 #if 0 1463 printf("[%zu]: %#x/%#x/%#x/%#x\n", producer - txq->txq_first, 1464 le32toh(producer->txdb_flags), le32toh(producer->txdb_buflen), 1465 le32toh(producer->txdb_addrlo), le32toh(producer->txdb_addrhi)); 1466 #endif 1467 if (count) 1468 bcmeth_txq_desc_presync(sc, txq, start, count); 1469 1470 /* 1471 * Reduce free count by the number of segments we consumed. 1472 */ 1473 txq->txq_free -= map->dm_nsegs; 1474 KASSERT(map->dm_nsegs == 1 || txq->txq_producer != producer); 1475 KASSERT(map->dm_nsegs == 1 1476 || (txq->txq_producer->txdb_flags & htole32(TXDB_FLAG_EF)) == 0); 1477 KASSERT(producer->txdb_flags & htole32(TXDB_FLAG_EF)); 1478 1479 #if 0 1480 printf("%s: mbuf %p: produced a %u byte packet in %u segments " 1481 "(%zd..%zd)\n", __func__, m, m->m_pkthdr.len, map->dm_nsegs, 1482 txq->txq_producer - txq->txq_first, producer - txq->txq_first); 1483 #endif 1484 1485 if (producer + 1 == txq->txq_last) 1486 txq->txq_producer = txq->txq_first; 1487 else 1488 txq->txq_producer = producer + 1; 1489 IF_ENQUEUE(&txq->txq_mbufs, m); 1490 1491 /* 1492 * Let the transmitter know there's more to do 1493 */ 1494 bcmeth_write_4(sc, txq->txq_reg_xmtptr, 1495 txq->txq_descmap->dm_segs[0].ds_addr 1496 + ((uintptr_t)txq->txq_producer & XMT_LASTDSCR)); 1497 1498 return true; 1499 } 1500 1501 static struct mbuf * 1502 bcmeth_copy_packet(struct mbuf *m) 1503 { 1504 struct mbuf *mext = NULL; 1505 size_t misalignment = 0; 1506 size_t hlen = 0; 1507 1508 for (mext = m; mext != NULL; mext = mext->m_next) { 1509 if (mext->m_flags & M_EXT) { 1510 misalignment = mtod(mext, vaddr_t) & arm_dcache_align; 1511 break; 1512 } 1513 hlen += m->m_len; 1514 } 1515 1516 struct mbuf *n = m->m_next; 1517 if (m != mext && hlen + misalignment <= MHLEN && false) { 1518 KASSERT(m->m_pktdat <= m->m_data 1519 && m->m_data <= &m->m_pktdat[MHLEN - m->m_len]); 1520 size_t oldoff = m->m_data - m->m_pktdat; 1521 size_t off; 1522 if (mext == NULL) { 1523 off = (oldoff + hlen > MHLEN) ? 0 : oldoff; 1524 } else { 1525 off = MHLEN - (hlen + misalignment); 1526 } 1527 KASSERT(off + hlen + misalignment <= MHLEN); 1528 if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) { 1529 memmove(&m->m_pktdat[off], m->m_data, m->m_len); 1530 m->m_data = &m->m_pktdat[off]; 1531 } 1532 m_copydata(n, 0, hlen - m->m_len, &m->m_data[m->m_len]); 1533 m->m_len = hlen; 1534 m->m_next = mext; 1535 while (n != mext) { 1536 n = m_free(n); 1537 } 1538 return m; 1539 } 1540 1541 struct mbuf *m0 = m_gethdr(M_DONTWAIT, m->m_type); 1542 if (m0 == NULL) { 1543 return NULL; 1544 } 1545 m_copy_pkthdr(m0, m); 1546 MCLAIM(m0, m->m_owner); 1547 if (m0->m_pkthdr.len > MHLEN) { 1548 MCLGET(m0, M_DONTWAIT); 1549 if ((m0->m_flags & M_EXT) == 0) { 1550 m_freem(m0); 1551 return NULL; 1552 } 1553 } 1554 m0->m_len = m->m_pkthdr.len; 1555 m_copydata(m, 0, m0->m_len, mtod(m0, void *)); 1556 m_freem(m); 1557 return m0; 1558 } 1559 1560 static bool 1561 bcmeth_txq_enqueue( 1562 struct bcmeth_softc *sc, 1563 struct bcmeth_txqueue *txq) 1564 { 1565 for (;;) { 1566 if (IF_QFULL(&txq->txq_mbufs)) 1567 return false; 1568 struct mbuf *m = txq->txq_next; 1569 if (m == NULL) { 1570 int s = splnet(); 1571 IF_DEQUEUE(&sc->sc_if.if_snd, m); 1572 splx(s); 1573 if (m == NULL) 1574 return true; 1575 M_SETCTX(m, NULL); 1576 } else { 1577 txq->txq_next = NULL; 1578 } 1579 /* 1580 * If LINK2 is set and this packet uses multiple mbufs, 1581 * consolidate it into a single mbuf. 1582 */ 1583 if (m->m_next != NULL && (sc->sc_if.if_flags & IFF_LINK2)) { 1584 struct mbuf *m0 = bcmeth_copy_packet(m); 1585 if (m0 == NULL) { 1586 txq->txq_next = m; 1587 return true; 1588 } 1589 m = m0; 1590 } 1591 int error = bcmeth_txq_map_load(sc, txq, m); 1592 if (error) { 1593 aprint_error_dev(sc->sc_dev, 1594 "discarded packet due to " 1595 "dmamap load failure: %d\n", error); 1596 m_freem(m); 1597 continue; 1598 } 1599 KASSERT(txq->txq_next == NULL); 1600 if (!bcmeth_txq_produce(sc, txq, m)) { 1601 txq->txq_next = m; 1602 return false; 1603 } 1604 KASSERT(txq->txq_next == NULL); 1605 } 1606 } 1607 1608 static bool 1609 bcmeth_txq_consume( 1610 struct bcmeth_softc *sc, 1611 struct bcmeth_txqueue *txq) 1612 { 1613 struct ifnet * const ifp = &sc->sc_if; 1614 struct gmac_txdb *consumer = txq->txq_consumer; 1615 size_t txfree = 0; 1616 1617 #if 0 1618 printf("%s: entry: free=%zu\n", __func__, txq->txq_free); 1619 #endif 1620 1621 for (;;) { 1622 if (consumer == txq->txq_producer) { 1623 txq->txq_consumer = consumer; 1624 txq->txq_free += txfree; 1625 txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree); 1626 #if 0 1627 printf("%s: empty: freed %zu descriptors going from " 1628 "%zu to %zu\n", __func__, txfree, 1629 txq->txq_free - txfree, txq->txq_free); 1630 #endif 1631 KASSERT(txq->txq_lastintr == 0); 1632 KASSERT(txq->txq_free 1633 == txq->txq_last - txq->txq_first - 1); 1634 return true; 1635 } 1636 bcmeth_txq_desc_postsync(sc, txq, consumer, 1); 1637 uint32_t s0 = bcmeth_read_4(sc, txq->txq_reg_xmtsts0); 1638 if (consumer == txq->txq_first + __SHIFTOUT(s0, XMT_CURRDSCR)) { 1639 txq->txq_consumer = consumer; 1640 txq->txq_free += txfree; 1641 txq->txq_lastintr -= uimin(txq->txq_lastintr, txfree); 1642 #if 0 1643 printf("%s: freed %zu descriptors\n", 1644 __func__, txfree); 1645 #endif 1646 return bcmeth_txq_fillable_p(sc, txq); 1647 } 1648 1649 /* 1650 * If this is the last descriptor in the chain, get the 1651 * mbuf, free its dmamap, and free the mbuf chain itself. 1652 */ 1653 const uint32_t txdb_flags = le32toh(consumer->txdb_flags); 1654 if (txdb_flags & TXDB_FLAG_EF) { 1655 struct mbuf *m; 1656 1657 IF_DEQUEUE(&txq->txq_mbufs, m); 1658 KASSERT(m); 1659 bcmeth_txq_map_unload(sc, txq, m); 1660 #if 0 1661 printf("%s: mbuf %p: consumed a %u byte packet\n", 1662 __func__, m, m->m_pkthdr.len); 1663 #endif 1664 bpf_mtap(ifp, m, BPF_D_OUT); 1665 if_statinc(ifp, if_opackets); 1666 if_statadd(ifp, if_obytes, m->m_pkthdr.len); 1667 if (m->m_flags & M_MCAST) 1668 if_statinc(ifp, if_omcasts); 1669 m_freem(m); 1670 } 1671 1672 /* 1673 * We own this packet again. Clear all flags except wrap. 1674 */ 1675 txfree++; 1676 1677 /* 1678 * Wrap at the last entry! 1679 */ 1680 if (txdb_flags & TXDB_FLAG_ET) { 1681 consumer->txdb_flags = htole32(TXDB_FLAG_ET); 1682 KASSERT(consumer + 1 == txq->txq_last); 1683 consumer = txq->txq_first; 1684 } else { 1685 consumer->txdb_flags = 0; 1686 consumer++; 1687 KASSERT(consumer < txq->txq_last); 1688 } 1689 } 1690 } 1691 1692 static void 1693 bcmeth_txq_purge( 1694 struct bcmeth_softc *sc, 1695 struct bcmeth_txqueue *txq) 1696 { 1697 struct mbuf *m; 1698 KASSERT((bcmeth_read_4(sc, UNIMAC_COMMAND_CONFIG) & TX_ENA) == 0); 1699 1700 for (;;) { 1701 IF_DEQUEUE(&txq->txq_mbufs, m); 1702 if (m == NULL) 1703 break; 1704 bcmeth_txq_map_unload(sc, txq, m); 1705 m_freem(m); 1706 } 1707 if ((m = txq->txq_next) != NULL) { 1708 txq->txq_next = NULL; 1709 bcmeth_txq_map_unload(sc, txq, m); 1710 m_freem(m); 1711 } 1712 } 1713 1714 static void 1715 bcmeth_txq_reset( 1716 struct bcmeth_softc *sc, 1717 struct bcmeth_txqueue *txq) 1718 { 1719 /* 1720 * sync all the descriptors 1721 */ 1722 bcmeth_txq_desc_postsync(sc, txq, txq->txq_first, 1723 txq->txq_last - txq->txq_first); 1724 1725 /* 1726 * Make sure we own all descriptors in the ring. 1727 */ 1728 struct gmac_txdb *txdb; 1729 for (txdb = txq->txq_first; txdb < txq->txq_last - 1; txdb++) { 1730 txdb->txdb_flags = 0; 1731 } 1732 1733 /* 1734 * Last descriptor has the wrap flag. 1735 */ 1736 txdb->txdb_flags = htole32(TXDB_FLAG_ET); 1737 1738 /* 1739 * Reset the producer consumer indexes. 1740 */ 1741 txq->txq_consumer = txq->txq_first; 1742 txq->txq_producer = txq->txq_first; 1743 txq->txq_free = txq->txq_last - txq->txq_first - 1; 1744 txq->txq_threshold = txq->txq_free / 2; 1745 txq->txq_lastintr = 0; 1746 1747 /* 1748 * What do we want to get interrupted on? 1749 */ 1750 sc->sc_intmask |= XMTINT_0 | XMTUF; 1751 1752 /* 1753 * Restart the transmiter at the first descriptor 1754 */ 1755 bcmeth_write_4(sc, txq->txq_reg_xmtaddrlo, 1756 txq->txq_descmap->dm_segs->ds_addr); 1757 } 1758 1759 static void 1760 bcmeth_ifstart(struct ifnet *ifp) 1761 { 1762 struct bcmeth_softc * const sc = ifp->if_softc; 1763 1764 if (__predict_false((ifp->if_flags & IFF_RUNNING) == 0)) { 1765 return; 1766 } 1767 1768 #ifdef BCMETH_MPSAFETX 1769 if (cpu_intr_p()) { 1770 #endif 1771 atomic_or_uint(&sc->sc_soft_flags, SOFT_TXINTR); 1772 softint_schedule(sc->sc_soft_ih); 1773 #ifdef BCMETH_MPSAFETX 1774 } else { 1775 /* 1776 * Either we are in a softintr thread already or some other 1777 * thread so just borrow it to do the send and save ourselves 1778 * the overhead of a fast soft int. 1779 */ 1780 bcmeth_soft_txintr(sc); 1781 } 1782 #endif 1783 } 1784 1785 int 1786 bcmeth_intr(void *arg) 1787 { 1788 struct bcmeth_softc * const sc = arg; 1789 uint32_t soft_flags = 0; 1790 uint32_t work_flags = 0; 1791 int rv = 0; 1792 1793 mutex_enter(sc->sc_hwlock); 1794 1795 uint32_t intmask = sc->sc_intmask; 1796 BCMETH_EVCNT_INCR(sc->sc_ev_intr); 1797 1798 for (;;) { 1799 uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 1800 intstatus &= intmask; 1801 bcmeth_write_4(sc, GMAC_INTSTATUS, intstatus); /* write 1 to clear */ 1802 if (intstatus == 0) { 1803 break; 1804 } 1805 #if 0 1806 aprint_normal_dev(sc->sc_dev, "%s: intstatus=%#x intmask=%#x\n", 1807 __func__, intstatus, bcmeth_read_4(sc, GMAC_INTMASK)); 1808 #endif 1809 if (intstatus & RCVINT) { 1810 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 1811 intmask &= ~RCVINT; 1812 1813 uint32_t rcvsts0 = bcmeth_read_4(sc, rxq->rxq_reg_rcvsts0); 1814 uint32_t descs = __SHIFTOUT(rcvsts0, RCV_CURRDSCR); 1815 if (descs < rxq->rxq_consumer - rxq->rxq_first) { 1816 /* 1817 * We wrapped at the end so count how far 1818 * we are from the end. 1819 */ 1820 descs += rxq->rxq_last - rxq->rxq_consumer; 1821 } else { 1822 descs -= rxq->rxq_consumer - rxq->rxq_first; 1823 } 1824 /* 1825 * If we "timedout" we can't be hogging so use 1826 * softints. If we exceeded then we might hogging 1827 * so let the workqueue deal with them. 1828 */ 1829 const uint32_t framecount = __SHIFTOUT(sc->sc_rcvlazy, 1830 INTRCVLAZY_FRAMECOUNT); 1831 if (descs < framecount 1832 || (curcpu()->ci_curlwp->l_flag & LW_IDLE)) { 1833 soft_flags |= SOFT_RXINTR; 1834 } else { 1835 work_flags |= WORK_RXINTR; 1836 } 1837 } 1838 1839 if (intstatus & XMTINT_0) { 1840 intmask &= ~XMTINT_0; 1841 soft_flags |= SOFT_TXINTR; 1842 } 1843 1844 if (intstatus & RCVDESCUF) { 1845 intmask &= ~RCVDESCUF; 1846 work_flags |= WORK_RXUNDERFLOW; 1847 } 1848 1849 intstatus &= intmask; 1850 if (intstatus) { 1851 aprint_error_dev(sc->sc_dev, 1852 "intr: intstatus=%#x\n", intstatus); 1853 aprint_error_dev(sc->sc_dev, 1854 "rcvbase=%p/%#lx rcvptr=%#x rcvsts=%#x/%#x\n", 1855 sc->sc_rxq.rxq_first, 1856 sc->sc_rxq.rxq_descmap->dm_segs[0].ds_addr, 1857 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvptr), 1858 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts0), 1859 bcmeth_read_4(sc, sc->sc_rxq.rxq_reg_rcvsts1)); 1860 aprint_error_dev(sc->sc_dev, 1861 "xmtbase=%p/%#lx xmtptr=%#x xmtsts=%#x/%#x\n", 1862 sc->sc_txq.txq_first, 1863 sc->sc_txq.txq_descmap->dm_segs[0].ds_addr, 1864 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtptr), 1865 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts0), 1866 bcmeth_read_4(sc, sc->sc_txq.txq_reg_xmtsts1)); 1867 intmask &= ~intstatus; 1868 work_flags |= WORK_REINIT; 1869 break; 1870 } 1871 } 1872 1873 if (intmask != sc->sc_intmask) { 1874 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1875 } 1876 1877 if (work_flags) { 1878 if (sc->sc_work_flags == 0) { 1879 workqueue_enqueue(sc->sc_workq, &sc->sc_work, NULL); 1880 } 1881 atomic_or_32(&sc->sc_work_flags, work_flags); 1882 rv = 1; 1883 } 1884 1885 if (soft_flags) { 1886 if (sc->sc_soft_flags == 0) { 1887 softint_schedule(sc->sc_soft_ih); 1888 } 1889 atomic_or_32(&sc->sc_soft_flags, soft_flags); 1890 rv = 1; 1891 } 1892 1893 mutex_exit(sc->sc_hwlock); 1894 1895 return rv; 1896 } 1897 1898 #ifdef BCMETH_MPSAFETX 1899 void 1900 bcmeth_soft_txintr(struct bcmeth_softc *sc) 1901 { 1902 mutex_enter(sc->sc_lock); 1903 /* 1904 * Let's do what we came here for. Consume transmitted 1905 * packets off the transmit ring. 1906 */ 1907 if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1908 || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1909 BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall); 1910 sc->sc_if.if_flags |= IFF_OACTIVE; 1911 } else { 1912 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1913 } 1914 if (sc->sc_if.if_flags & IFF_RUNNING) { 1915 mutex_spin_enter(sc->sc_hwlock); 1916 sc->sc_intmask |= XMTINT_0; 1917 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1918 mutex_spin_exit(sc->sc_hwlock); 1919 } 1920 mutex_exit(sc->sc_lock); 1921 } 1922 #endif /* BCMETH_MPSAFETX */ 1923 1924 void 1925 bcmeth_soft_intr(void *arg) 1926 { 1927 struct bcmeth_softc * const sc = arg; 1928 struct ifnet * const ifp = &sc->sc_if; 1929 uint32_t intmask = 0; 1930 1931 mutex_enter(sc->sc_lock); 1932 1933 u_int soft_flags = atomic_swap_uint(&sc->sc_soft_flags, 0); 1934 1935 BCMETH_EVCNT_INCR(sc->sc_ev_soft_intr); 1936 1937 if ((soft_flags & SOFT_TXINTR) 1938 || bcmeth_txq_active_p(sc, &sc->sc_txq)) { 1939 /* 1940 * Let's do what we came here for. Consume transmitted 1941 * packets off the transmit ring. 1942 */ 1943 if (!bcmeth_txq_consume(sc, &sc->sc_txq) 1944 || !bcmeth_txq_enqueue(sc, &sc->sc_txq)) { 1945 BCMETH_EVCNT_INCR(sc->sc_ev_tx_stall); 1946 ifp->if_flags |= IFF_OACTIVE; 1947 } else { 1948 ifp->if_flags &= ~IFF_OACTIVE; 1949 } 1950 intmask |= XMTINT_0; 1951 } 1952 1953 if (soft_flags & SOFT_RXINTR) { 1954 /* 1955 * Let's consume 1956 */ 1957 while (bcmeth_rxq_consume(sc, &sc->sc_rxq, 1958 sc->sc_rxq.rxq_threshold / 4)) { 1959 /* 1960 * We've consumed a quarter of the ring and still have 1961 * more to do. Refill the ring. 1962 */ 1963 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1964 } 1965 intmask |= RCVINT; 1966 } 1967 1968 if (ifp->if_flags & IFF_RUNNING) { 1969 bcmeth_rxq_produce(sc, &sc->sc_rxq); 1970 mutex_spin_enter(sc->sc_hwlock); 1971 sc->sc_intmask |= intmask; 1972 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 1973 mutex_spin_exit(sc->sc_hwlock); 1974 } 1975 1976 mutex_exit(sc->sc_lock); 1977 } 1978 1979 void 1980 bcmeth_worker(struct work *wk, void *arg) 1981 { 1982 struct bcmeth_softc * const sc = arg; 1983 struct ifnet * const ifp = &sc->sc_if; 1984 uint32_t intmask = 0; 1985 1986 mutex_enter(sc->sc_lock); 1987 1988 BCMETH_EVCNT_INCR(sc->sc_ev_work); 1989 1990 uint32_t work_flags = atomic_swap_32(&sc->sc_work_flags, 0); 1991 if (work_flags & WORK_REINIT) { 1992 int s = splnet(); 1993 sc->sc_soft_flags = 0; 1994 bcmeth_ifinit(ifp); 1995 splx(s); 1996 work_flags &= ~WORK_RXUNDERFLOW; 1997 } 1998 1999 if (work_flags & WORK_RXUNDERFLOW) { 2000 struct bcmeth_rxqueue * const rxq = &sc->sc_rxq; 2001 size_t threshold = 5 * rxq->rxq_threshold / 4; 2002 if (threshold >= rxq->rxq_last - rxq->rxq_first) { 2003 threshold = rxq->rxq_last - rxq->rxq_first - 1; 2004 } else { 2005 intmask |= RCVDESCUF; 2006 } 2007 aprint_normal_dev(sc->sc_dev, 2008 "increasing receive buffers from %zu to %zu\n", 2009 rxq->rxq_threshold, threshold); 2010 rxq->rxq_threshold = threshold; 2011 } 2012 2013 if (work_flags & WORK_RXINTR) { 2014 /* 2015 * Let's consume 2016 */ 2017 while (bcmeth_rxq_consume(sc, &sc->sc_rxq, 2018 sc->sc_rxq.rxq_threshold / 4)) { 2019 /* 2020 * We've consumed a quarter of the ring and still have 2021 * more to do. Refill the ring. 2022 */ 2023 bcmeth_rxq_produce(sc, &sc->sc_rxq); 2024 } 2025 intmask |= RCVINT; 2026 } 2027 2028 if (ifp->if_flags & IFF_RUNNING) { 2029 bcmeth_rxq_produce(sc, &sc->sc_rxq); 2030 #if 0 2031 uint32_t intstatus = bcmeth_read_4(sc, GMAC_INTSTATUS); 2032 if (intstatus & RCVINT) { 2033 bcmeth_write_4(sc, GMAC_INTSTATUS, RCVINT); 2034 work_flags |= WORK_RXINTR; 2035 continue; 2036 } 2037 #endif 2038 mutex_spin_enter(sc->sc_hwlock); 2039 sc->sc_intmask |= intmask; 2040 bcmeth_write_4(sc, GMAC_INTMASK, sc->sc_intmask); 2041 mutex_spin_exit(sc->sc_hwlock); 2042 } 2043 2044 mutex_exit(sc->sc_lock); 2045 } 2046
Indexes created Tue Sep 30 10:09:55 GMT 2025